flashrom

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[commit] r1298 - trunk
by repository service 11 May '11

11 May '11

Author: mkarcher Date: Wed May 11 19:07:02 2011 New Revision: 1298 URL: http://flashrom.org/trac/flashrom/changeset/1298 Log: Factor out SPI write/read chunking wrappers. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/bitbang_spi.c trunk/buspirate_spi.c trunk/dummyflasher.c trunk/ft2232_spi.c trunk/ichspi.c trunk/it85spi.c trunk/programmer.h trunk/sb600spi.c trunk/spi.c Modified: trunk/bitbang_spi.c ============================================================================== --- trunk/bitbang_spi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/bitbang_spi.c Wed May 11 19:07:02 2011 (r1298) @@ -151,14 +151,3 @@ return 0; } - -int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - /* Maximum read length is unlimited, use 64k bytes. */ - return spi_read_chunked(flash, buf, start, len, 64 * 1024); -} - -int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - return spi_write_chunked(flash, buf, start, len, 256); -} Modified: trunk/buspirate_spi.c ============================================================================== --- trunk/buspirate_spi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/buspirate_spi.c Wed May 11 19:07:02 2011 (r1298) @@ -326,13 +326,3 @@ return ret; } - -int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - return spi_read_chunked(flash, buf, start, len, 12); -} - -int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - return spi_write_chunked(flash, buf, start, len, 12); -} Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/dummyflasher.c Wed May 11 19:07:02 2011 (r1298) @@ -507,12 +507,6 @@ return 0; } -int dummy_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - /* Maximum read length is unlimited, use 64kB. */ - return spi_read_chunked(flash, buf, start, len, 64 * 1024); -} - int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { return spi_write_chunked(flash, buf, start, len, Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/ft2232_spi.c Wed May 11 19:07:02 2011 (r1298) @@ -352,17 +352,6 @@ return failed ? -1 : 0; } -int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - /* Maximum read length is 64k bytes. */ - return spi_read_chunked(flash, buf, start, len, 64 * 1024); -} - -int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - return spi_write_chunked(flash, buf, start, len, 256); -} - void print_supported_usbdevs(const struct usbdev_status *devs) { int i; Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/ichspi.c Wed May 11 19:07:02 2011 (r1298) @@ -834,26 +834,6 @@ return -1; } -int ich_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len) -{ - int maxdata = 64; - - if (spi_controller == SPI_CONTROLLER_VIA) - maxdata = 16; - - return spi_read_chunked(flash, buf, start, len, maxdata); -} - -int ich_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len) -{ - int maxdata = 64; - - if (spi_controller == SPI_CONTROLLER_VIA) - maxdata = 16; - - return spi_write_chunked(flash, buf, start, len, maxdata); -} - int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { Modified: trunk/it85spi.c ============================================================================== --- trunk/it85spi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/it85spi.c Wed May 11 19:07:02 2011 (r1298) @@ -347,14 +347,4 @@ return 0; } -int it85_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len) -{ - return spi_read_chunked(flash, buf, start, len, 64); -} - -int it85_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len) -{ - return spi_write_chunked(flash, buf, start, len, 64); -} - #endif Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sun May 8 02:24:18 2011 (r1297) +++ trunk/programmer.h Wed May 11 19:07:02 2011 (r1298) @@ -374,7 +374,6 @@ void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int dummy_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); #endif @@ -487,8 +486,6 @@ }; int ft2232_spi_init(void); int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); extern const struct usbdev_status devs_ft2232spi[]; void print_supported_usbdevs(const struct usbdev_status *devs); #endif @@ -509,8 +506,6 @@ int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod); int bitbang_spi_shutdown(const struct bitbang_spi_master *master); int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); /* buspirate_spi.c */ struct buspirate_spispeeds { @@ -520,8 +515,6 @@ int buspirate_spi_init(void); int buspirate_spi_shutdown(void); int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); /* dediprog.c */ int dediprog_init(void); @@ -586,7 +579,13 @@ SPI_CONTROLLER_INVALID /* This must always be the last entry. */ }; extern const int spi_programmer_count; + +#define MAX_DATA_UNSPECIFIED 0 +#define MAX_DATA_READ_UNLIMITED 64 * 1024 +#define MAX_DATA_WRITE_UNLIMITED 256 struct spi_programmer { + int max_data_read; + int max_data_write; int (*command)(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int (*multicommand)(struct spi_command *cmds); @@ -601,6 +600,8 @@ int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int default_spi_send_multicommand(struct spi_command *cmds); +int default_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); +int default_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); /* ichspi.c */ #if CONFIG_INTERNAL == 1 @@ -610,8 +611,6 @@ int via_init_spi(struct pci_dev *dev); int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int ich_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len); int ich_spi_send_multicommand(struct spi_command *cmds); #endif @@ -620,8 +619,6 @@ int it85xx_shutdown(void); int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int it85_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len); -int it85_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len); /* it87spi.c */ void enter_conf_mode_ite(uint16_t port); @@ -638,8 +635,6 @@ int sb600_probe_spi(struct pci_dev *dev); int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); #endif /* wbsio_spi.c */ Modified: trunk/sb600spi.c ============================================================================== --- trunk/sb600spi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/sb600spi.c Wed May 11 19:07:02 2011 (r1298) @@ -43,17 +43,6 @@ static uint8_t *sb600_spibar = NULL; -int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - /* Maximum read length is 8 bytes. */ - return spi_read_chunked(flash, buf, start, len, 8); -} - -int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - return spi_write_chunked(flash, buf, start, len, 5); -} - static void reset_internal_fifo_pointer(void) { mmio_writeb(mmio_readb(sb600_spibar + 2) | 0x10, sb600_spibar + 2); Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/spi.c Wed May 11 19:07:02 2011 (r1298) @@ -34,6 +34,8 @@ const struct spi_programmer spi_programmer[] = { { /* SPI_CONTROLLER_NONE */ + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, .command = NULL, .multicommand = NULL, .read = NULL, @@ -43,27 +45,35 @@ #if CONFIG_INTERNAL == 1 #if defined(__i386__) || defined(__x86_64__) { /* SPI_CONTROLLER_ICH7 */ + .max_data_read = 64, + .max_data_write = 64, .command = ich_spi_send_command, .multicommand = ich_spi_send_multicommand, - .read = ich_spi_read, - .write_256 = ich_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, { /* SPI_CONTROLLER_ICH9 */ + .max_data_read = 64, + .max_data_write = 64, .command = ich_spi_send_command, .multicommand = ich_spi_send_multicommand, - .read = ich_spi_read, - .write_256 = ich_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, { /* SPI_CONTROLLER_IT85XX */ + .max_data_read = 64, + .max_data_write = 64, .command = it85xx_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = it85_spi_read, - .write_256 = it85_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, { /* SPI_CONTROLLER_IT87XX */ + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, .command = it8716f_spi_send_command, .multicommand = default_spi_send_multicommand, .read = it8716f_spi_chip_read, @@ -71,20 +81,26 @@ }, { /* SPI_CONTROLLER_SB600 */ + .max_data_read = 8, + .max_data_write = 5, .command = sb600_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = sb600_spi_read, - .write_256 = sb600_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, { /* SPI_CONTROLLER_VIA */ + .max_data_read = 16, + .max_data_write = 16, .command = ich_spi_send_command, .multicommand = ich_spi_send_multicommand, - .read = ich_spi_read, - .write_256 = ich_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, { /* SPI_CONTROLLER_WBSIO */ + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, .command = wbsio_spi_send_command, .multicommand = default_spi_send_multicommand, .read = wbsio_spi_read, @@ -92,43 +108,53 @@ }, { /* SPI_CONTROLLER_MCP6X_BITBANG */ + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_WRITE_UNLIMITED, .command = bitbang_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = bitbang_spi_read, - .write_256 = bitbang_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, #endif #endif #if CONFIG_FT2232_SPI == 1 { /* SPI_CONTROLLER_FT2232 */ + .max_data_read = 64 * 1024, + .max_data_write = 256, .command = ft2232_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = ft2232_spi_read, - .write_256 = ft2232_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, #endif #if CONFIG_DUMMY == 1 { /* SPI_CONTROLLER_DUMMY */ + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_UNSPECIFIED, .command = dummy_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = dummy_spi_read, + .read = default_spi_read, .write_256 = dummy_spi_write_256, }, #endif #if CONFIG_BUSPIRATE_SPI == 1 { /* SPI_CONTROLLER_BUSPIRATE */ + .max_data_read = 12, + .max_data_write = 12, .command = buspirate_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = buspirate_spi_read, - .write_256 = buspirate_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, #endif #if CONFIG_DEDIPROG == 1 { /* SPI_CONTROLLER_DEDIPROG */ + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, .command = dediprog_spi_send_command, .multicommand = default_spi_send_multicommand, .read = dediprog_spi_read, @@ -138,28 +164,34 @@ #if CONFIG_RAYER_SPI == 1 { /* SPI_CONTROLLER_RAYER */ + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_WRITE_UNLIMITED, .command = bitbang_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = bitbang_spi_read, - .write_256 = bitbang_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, #endif #if CONFIG_NICINTEL_SPI == 1 { /* SPI_CONTROLLER_NICINTEL */ + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_WRITE_UNLIMITED, .command = bitbang_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = bitbang_spi_read, - .write_256 = bitbang_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, #endif #if CONFIG_OGP_SPI == 1 { /* SPI_CONTROLLER_OGP */ + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_WRITE_UNLIMITED, .command = bitbang_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = bitbang_spi_read, - .write_256 = bitbang_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, #endif @@ -223,6 +255,30 @@ return result; } +int default_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + int max_data = spi_programmer[spi_controller].max_data_read; + if (max_data == MAX_DATA_UNSPECIFIED) { + msg_perr("%s called, but SPI read chunk size not defined " + "on this hardware. Please report a bug at " + "flashrom(a)flashrom.org\n", __func__); + return 1; + } + return spi_read_chunked(flash, buf, start, len, max_data); +} + +int default_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + int max_data = spi_programmer[spi_controller].max_data_write; + if (max_data == MAX_DATA_UNSPECIFIED) { + msg_perr("%s called, but SPI write chunk size not defined " + "on this hardware. Please report a bug at " + "flashrom(a)flashrom.org\n", __func__); + return 1; + } + return spi_write_chunked(flash, buf, start, len, max_data); +} + int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) { int addrbase = 0;

1 0

flashrom, hardened gentoo (grsecurity) and iopl()
by Антон Кочков 10 May '11

10 May '11

Good day! Just found that flashrom doesnt work on some hardened configuration - Hardened Gentoo - on hardened kernel-2.6.38 Linux xserver 2.6.38-hardened #1 SMP Wed Apr 20 02:19:23 CEST 2011 x86_64 Intel(R) Core(TM) i7 CPU 930 @ 2.80GHz GenuineIntel GNU/Linux flashrom v0.9.3-r1297 on Linux 2.6.38-hardened (x86_64), built with libpci 3.1.7, GCC 4.5.2, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1530M loops per second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 996 us, 10000 myus = 9977 us, 4 myus = 4 us, OK. Initializing internal programmer ERROR: Could not get I/O privileges (Operation not permitted). You need to be root. And this from dmesg: [1578171.686680] grsec: From 79.111.220.160: denied use of iopl() by /home/xvilka/flashrom/flashrom[flashrom:10596] uid/euid:0/0 gid/egid:0/0, parent /bin/bash[bash:10591] uid/euid:0/0 gid/egid:0/0 [1578218.043347] grsec: From 79.111.220.160: denied use of iopl() by /home/xvilka/flashrom/flashrom[flashrom:10612] uid/euid:0/0 gid/egid:0/0, parent /bin/bash[bash:10606] uid/euid:0/0 gid/egid:0/0 [1578388.047996] grsec: From 79.111.220.160: denied use of iopl() by /home/xvilka/flashrom/flashrom[flashrom:10645] uid/euid:0/0 gid/egid:0/0, parent /bin/bash[bash:10606] uid/euid:0/0 gid/egid:0/0 And found this theme http://forums.grsecurity.net/viewtopic.php?t=1654 So, for access ioperm() and iopl() you need disable "Disable Privileged I/O (CONFIG_GRKERSEC_IO)" option in kernel config. Can we print this message when found such configuration? Are there way to make port access without iopl()? Best regards, Anton Kochkov.

3 3

Tyan S8230 support
by Anton Rommerskirchen 08 May '11

08 May '11

Hello ! got a littel talk with the helpstar guys from tyan. The problem is to get a S8230 to be updated. the suggested way of using a usb stick means to take a windows 98 or 95, format and so on. I tried freedos and their tool stuck - no flash at all. for linux i got a hint to flashrom, but the board seems to be not supportet now. is their any way to circumvent this or do i have a chance to get support for the S8230 board in near future ? according to the doc its a AMD SP5100 and SR5690, winbond w83627 chispset. best regards Anton Rommerskirchen

1 0

[PATCH] Intel NIC with parallel flash
by Carl-Daniel Hailfinger 08 May '11

08 May '11

Intel NIC with parallel flash support. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> -- http://www.hailfinger.org/

2 4

[commit] r1297 - trunk
by repository service 08 May '11

08 May '11

Author: hailfinger Date: Sun May 8 02:24:18 2011 New Revision: 1297 URL: http://flashrom.org/trac/flashrom/changeset/1297 Log: Intel NIC with parallel flash support. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Tested-by: Anton Kochkov <anton.kochkov(a)gmail.com> Acked-by: Anton Kochkov <anton.kochkov(a)gmail.com> Tested-by: Maciej Pijanka <maciej.pijanka(a)gmail.com> Added: trunk/nicintel.c Modified: trunk/Makefile trunk/flashrom.c trunk/print.c trunk/print_wiki.c trunk/programmer.h Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sat May 7 21:19:36 2011 (r1296) +++ trunk/Makefile Sun May 8 02:24:18 2011 (r1297) @@ -178,6 +178,9 @@ # Disable National Semiconductor NICs until support is complete and tested. CONFIG_NICNATSEMI ?= no +# Always enable Intel NICs for now. +CONFIG_NICINTEL ?= yes + # Always enable SPI on Intel NICs for now. CONFIG_NICINTEL_SPI ?= yes @@ -297,6 +300,12 @@ NEED_PCI := yes endif +ifeq ($(CONFIG_NICINTEL), yes) +FEATURE_CFLAGS += -D'CONFIG_NICINTEL=1' +PROGRAMMER_OBJS += nicintel.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_NICINTEL_SPI), yes) FEATURE_CFLAGS += -D'CONFIG_NICINTEL_SPI=1' PROGRAMMER_OBJS += nicintel_spi.o Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sat May 7 21:19:36 2011 (r1296) +++ trunk/flashrom.c Sun May 8 02:24:18 2011 (r1297) @@ -52,7 +52,7 @@ * if more than one of them is selected. If only one is selected, it is clear * that the user wants that one to become the default. */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV > 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV > 1 #error Please enable either CONFIG_DUMMY or CONFIG_INTERNAL or disable support for all programmers except one. #endif enum programmer programmer = @@ -92,6 +92,9 @@ #if CONFIG_RAYER_SPI == 1 PROGRAMMER_RAYER_SPI #endif +#if CONFIG_NICINTEL == 1 + PROGRAMMER_NICINTEL +#endif #if CONFIG_NICINTEL_SPI == 1 PROGRAMMER_NICINTEL_SPI #endif @@ -386,6 +389,25 @@ .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, +#endif + +#if CONFIG_NICINTEL == 1 + { + .name = "nicintel", + .init = nicintel_init, + .shutdown = nicintel_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = nicintel_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nicintel_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif Added: trunk/nicintel.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/nicintel.c Sun May 8 02:24:18 2011 (r1297) @@ -0,0 +1,109 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2011 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Datasheet: http://download.intel.com/design/network/datashts/82559_Fast_Ethernet_Multi… */ + +#include <stdlib.h> +#include "flash.h" +#include "programmer.h" + +uint8_t *nicintel_bar; +uint8_t *nicintel_control_bar; + +const struct pcidev_status nics_intel[] = { + {PCI_VENDOR_ID_INTEL, 0x1209, NT, "Intel", "8255xER/82551IT Fast Ethernet Controller"}, + {PCI_VENDOR_ID_INTEL, 0x1229, NT, "Intel", "82557/8/9/0/1 Ethernet Pro 100"}, + + {}, +}; + +/* Arbitrary limit, taken from the datasheet I just had lying around. + * 128 kByte on the 82559 device. Or not. Depends on whom you ask. + */ +#define NICINTEL_MEMMAP_SIZE (128 * 1024) +#define NICINTEL_MEMMAP_MASK (NICINTEL_MEMMAP_SIZE - 1) + +#define CSR_FCR 0x0c + +int nicintel_init(void) +{ + uintptr_t addr; + + /* Needed only for PCI accesses on some platforms. + * FIXME: Refactor that into get_mem_perms/get_io_perms/get_pci_perms? + */ + get_io_perms(); + + /* No need to check for errors, pcidev_init() will not return in case + * of errors. + * FIXME: BAR2 is not available if the device uses the CardBus function. + */ + addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel); + + nicintel_bar = physmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); + if (nicintel_bar == ERROR_PTR) + goto error_out; + + /* FIXME: Using pcidev_dev _will_ cause pretty explosions in the future. */ + addr = pcidev_validate(pcidev_dev, PCI_BASE_ADDRESS_0, nics_intel); + /* FIXME: This is not an aligned mapping. Use 4k? */ + nicintel_control_bar = physmap("Intel NIC control/status reg", addr, 0x10); + if (nicintel_control_bar == ERROR_PTR) + goto error_out; + + /* FIXME: This register is pretty undocumented in all publicly available + * documentation from Intel. Let me quote the complete info we have: + * "Flash Control Register: The Flash Control register allows the CPU to + * enable writes to an external Flash. The Flash Control Register is a + * 32-bit field that allows access to an external Flash device." + * Ah yes, we also know where it is, but we have absolutely _no_ idea + * what we should do with it. Write 0x0001 because we have nothing + * better to do with our time. + */ + pci_rmmio_writew(0x0001, nicintel_control_bar + CSR_FCR); + + buses_supported = CHIP_BUSTYPE_PARALLEL; + + max_rom_decode.parallel = NICINTEL_MEMMAP_SIZE; + + return 0; + +error_out: + pci_cleanup(pacc); + release_io_perms(); + return 1; +} + +int nicintel_shutdown(void) +{ + physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); + pci_cleanup(pacc); + release_io_perms(); + return 0; +} + +void nicintel_chip_writeb(uint8_t val, chipaddr addr) +{ + pci_mmio_writeb(val, nicintel_bar + (addr & NICINTEL_MEMMAP_MASK)); +} + +uint8_t nicintel_chip_readb(const chipaddr addr) +{ + return pci_mmio_readb(nicintel_bar + (addr & NICINTEL_MEMMAP_MASK)); +} Modified: trunk/print.c ============================================================================== --- trunk/print.c Sat May 7 21:19:36 2011 (r1296) +++ trunk/print.c Sun May 8 02:24:18 2011 (r1297) @@ -304,6 +304,11 @@ /* FIXME */ printf("RayeR parallel port programmer\n"); #endif +#if CONFIG_NICINTEL == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_NICINTEL].name); + print_supported_pcidevs(nics_intel); +#endif #if CONFIG_NICINTEL_SPI == 1 printf("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICINTEL_SPI].name); Modified: trunk/print_wiki.c ============================================================================== --- trunk/print_wiki.c Sat May 7 21:19:36 2011 (r1296) +++ trunk/print_wiki.c Sun May 8 02:24:18 2011 (r1297) @@ -247,7 +247,7 @@ } /* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 static void print_supported_pcidevs_wiki(const struct pcidev_status *devs) { int i = 0; @@ -298,6 +298,9 @@ #if CONFIG_ATAHPT == 1 print_supported_pcidevs_wiki(ata_hpt); #endif +#if CONFIG_NICINTEL == 1 + print_supported_pcidevs_wiki(nics_intel); +#endif #if CONFIG_NICINTEL_SPI == 1 print_supported_pcidevs_wiki(nics_intel_spi); #endif Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sat May 7 21:19:36 2011 (r1296) +++ trunk/programmer.h Sun May 8 02:24:18 2011 (r1297) @@ -67,6 +67,9 @@ #if CONFIG_RAYER_SPI == 1 PROGRAMMER_RAYER_SPI, #endif +#if CONFIG_NICINTEL == 1 + PROGRAMMER_NICINTEL, +#endif #if CONFIG_NICINTEL_SPI == 1 PROGRAMMER_NICINTEL_SPI, #endif @@ -232,7 +235,7 @@ #endif /* print.c */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 void print_supported_pcidevs(const struct pcidev_status *devs); #endif @@ -420,6 +423,15 @@ extern const struct pcidev_status nics_natsemi[]; #endif +/* nicintel.c */ +#if CONFIG_NICINTEL == 1 +int nicintel_init(void); +int nicintel_shutdown(void); +void nicintel_chip_writeb(uint8_t val, chipaddr addr); +uint8_t nicintel_chip_readb(const chipaddr addr); +extern const struct pcidev_status nics_intel[]; +#endif + /* nicintel_spi.c */ #if CONFIG_NICINTEL_SPI == 1 int nicintel_spi_init(void);

1 0

[PATCH] Fix multiple detection of the same chip
by Carl-Daniel Hailfinger 07 May '11

07 May '11

Fix multiple detection of the same chip. r1293 introduced a bug which caused probing to loop at the first found chip. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> -- http://www.hailfinger.org/

2 2

[commit] r1296 - trunk
by repository service 07 May '11

07 May '11

Author: hailfinger Date: Sat May 7 21:19:36 2011 New Revision: 1296 URL: http://flashrom.org/trac/flashrom/changeset/1296 Log: Fix multiple detection of the same chip. r1293 introduced a bug which caused probing to loop at the first found chip. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/cli_classic.c Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Thu May 5 19:52:07 2011 (r1295) +++ trunk/cli_classic.c Sat May 7 21:19:36 2011 (r1296) @@ -368,6 +368,7 @@ if (startchip == -1) break; chipcount++; + startchip++; } if (chipcount > 1) {

1 0

Re: [flashrom] flashrom log file
by Idwer Vollering 07 May '11

07 May '11

2011/5/7 Alexander <Volosaty(a)i.ua>: >> > Motherboad - AsRock K10N78, chipset GeForce8200 >> flashrom v0.9.2-r1028 on Linux 2.6.35-24-generic (x86_64), built with libpci >> > 3.0.0, GCC 4.4.4, little endian >> > flashrom is free software, get the source code at http://www.flashrom.org >> > >> >> Version 0.9.3 supports your mainboard: >> http://flashrom.org/trac/flashrom/changeset/1113 > Still no go. Updated today via CVS, chipset and flash device detected, but still with quirks. > > Output 'flashrom -V': > > flashrom v0.9.3-r1295 on Linux 2.6.35-24-generic (x86_64), built with libpci 3.1.7, GCC 4.4.5, little endian Can you try r1292 ? Right now, newer revsions have a bug that.. (read on) > flashrom is free software, get the source code at http://www.flashrom.org > > Calibrating delay loop... OS timer resolution is 1 usecs, 933M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 999 us, 10000 myus = 10004 us, 4 myus = 5 us, OK. > Initializing internal programmer > No coreboot table found. > DMI string system-manufacturer: "To Be Filled By O.E.M." > DMI string system-product-name: "To Be Filled By O.E.M." > DMI string system-version: "To Be Filled By O.E.M." > DMI string baseboard-manufacturer: "ASRock" > DMI string baseboard-product-name: "K10N78" > DMI string baseboard-version: " " > DMI string chassis-type: "Desktop" > Found chipset "NVIDIA MCP78S", enabling flash write... chipset PCI ID is 10de:075c, This chipset is not really supported yet. Guesswork... > ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 > Flash bus type is SPI > Found SMBus device 10de:0752 at 00:01:1 > MCP SPI BAR is at 0xf9e80000 > SPI control is 0xc052, req=0, gnt=0 > Please send the output of "flashrom -V" to flashrom(a)flashrom.org with > your board name: flashrom -V as the subject to help us finish support for your > chipset. Thanks. > OK. > This chipset supports the following protocols: SPI. > Probing for AMD Am29F010A/B, 128 KB: skipped. > Probing for AMD Am29F002(N)BB, 256 KB: skipped. > Probing for AMD Am29F002(N)BT, 256 KB: skipped. > Probing for AMD Am29F016D, 2048 KB: skipped. > Probing for AMD Am29F040B, 512 KB: skipped. > Probing for AMD Am29F080B, 1024 KB: skipped. > Probing for AMD Am29LV001BB, 128 KB: skipped. > Probing for AMD Am29LV001BT, 128 KB: skipped. > Probing for AMD Am29LV002BB, 256 KB: skipped. > Probing for AMD Am29LV002BT, 256 KB: skipped. > Probing for AMD Am29LV004BB, 512 KB: skipped. > Probing for AMD Am29LV004BT, 512 KB: skipped. > Probing for AMD Am29LV008BB, 1024 KB: skipped. > Probing for AMD Am29LV008BT, 1024 KB: skipped. > Probing for AMD Am29LV040B, 512 KB: skipped. > Probing for AMD Am29LV081B, 1024 KB: skipped. > Probing for AMIC A25L05PT, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L05PU, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L10PT, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L10PU, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L20PT, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L20PU, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L40PT, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L40PU, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L80P, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L16PT, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L16PU, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L512, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L010, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L020, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L040, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L080, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L016, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25L032, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A25LQ032, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for AMIC A29002B, 256 KB: skipped. > Probing for AMIC A29002T, 256 KB: skipped. > Probing for AMIC A29040B, 512 KB: skipped. > Probing for AMIC A49LF040A, 512 KB: skipped. > Probing for Atmel AT25DF021, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25DF041A, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25DF081, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25DF081A, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25DF161, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25DF321, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25DF321A, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25DF641, 8192 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25DQ161, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25F512B, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25FS010, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT25FS040, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT26DF041, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT26DF081A, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT26DF161, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT26DF161A, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT26F004, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT29C512, 64 KB: skipped. > Probing for Atmel AT29C010A, 128 KB: skipped. > Probing for Atmel AT29C020, 256 KB: skipped. > Probing for Atmel AT29C040A, 512 KB: skipped. > Probing for Atmel AT45CS1282, 16896 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT45DB011D, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT45DB021D, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT45DB041D, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT45DB081D, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT45DB161D, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT45DB321C, 4224 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT45DB321D, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT45DB642D, 8192 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Atmel AT49BV512, 64 KB: skipped. > Probing for Atmel AT49F020, 256 KB: skipped. > Probing for Atmel AT49F002(N), 256 KB: skipped. > Probing for Atmel AT49F002(N)T, 256 KB: skipped. > Probing for Bright BM29F040, 512 KB: skipped. > Probing for EMST F49B002UA, 256 KB: skipped. > Probing for EMST F25L008A, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B05, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B05T, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B10, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B10T, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B20, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B20T, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B40, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B40T, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B80, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B80T, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B16, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B16T, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B32, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B32T, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B64, 8192 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25B64T, 8192 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25D16, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F05, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F10, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F20, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F40, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F80, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F16, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN25F32, 4096 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Eon EN29F010, 128 KB: skipped. > Probing for Eon EN29F002(A)(N)B, 256 KB: skipped. > Probing for Eon EN29F002(A)(N)T, 256 KB: skipped. > Probing for Fujitsu MBM29F004BC, 512 KB: skipped. > Probing for Fujitsu MBM29F004TC, 512 KB: skipped. > Probing for Fujitsu MBM29F400BC, 512 KB: skipped. > Probing for Fujitsu MBM29F400TC, 512 KB: skipped. > Probing for Hyundai HY29F002T, 256 KB: skipped. > Probing for Hyundai HY29F002B, 256 KB: skipped. > Probing for Hyundai HY29F040A, 512 KB: skipped. > Probing for Intel 28F001BN/BX-B, 128 KB: skipped. > Probing for Intel 28F001BN/BX-T, 128 KB: skipped. > Probing for Intel 28F002BC/BL/BV/BX-T, 256 KB: skipped. > Probing for Intel 28F008S3/S5/SC, 512 KB: skipped. > Probing for Intel 28F004B5/BE/BV/BX-B, 512 KB: skipped. > Probing for Intel 28F004B5/BE/BV/BX-T, 512 KB: skipped. > Probing for Intel 28F400BV/BX/CE/CV-B, 512 KB: skipped. > Probing for Intel 28F400BV/BX/CE/CV-T, 512 KB: skipped. > Probing for Intel 82802AB, 512 KB: skipped. > Probing for Intel 82802AC, 1024 KB: skipped. > Probing for Macronix MX25L512, 64 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Macronix MX25L1005, 128 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Macronix MX25L2005, 256 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Macronix MX25L4005, 512 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Probing for Macronix MX25L8005, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Chip status register is 00 > Chip status register: Status Register Write Disable (SRWD) is not set > Chip status register: Bit 6 is not set > Chip status register: Bit 5 / Block Protect 3 (BP3) is not set > Chip status register: Bit 4 / Block Protect 2 (BP2) is not set > Chip status register: Bit 3 / Block Protect 1 (BP1) is not set > Chip status register: Bit 2 / Block Protect 0 (BP0) is not set > Chip status register: Write Enable Latch (WEL) is not set > Chip status register: Write In Progress (WIP/BUSY) is not set > Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. > Probing for Macronix MX25L8005, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Chip status register is 00 > Chip status register: Status Register Write Disable (SRWD) is not set > Chip status register: Bit 6 is not set > Chip status register: Bit 5 / Block Protect 3 (BP3) is not set > Chip status register: Bit 4 / Block Protect 2 (BP2) is not set > Chip status register: Bit 3 / Block Protect 1 (BP1) is not set > Chip status register: Bit 2 / Block Protect 0 (BP0) is not set > Chip status register: Write Enable Latch (WEL) is not set > Chip status register: Write In Progress (WIP/BUSY) is not set > Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. > Probing for Macronix MX25L8005, 1024 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 > Chip status register is 00 > Chip status register: Status Register Write Disable (SRWD) is not set > Chip status register: Bit 6 is not set > Chip status register: Bit 5 / Block Protect 3 (BP3) is not set > Chip status register: Bit 4 / Block Protect 2 (BP2) is not set > Chip status register: Bit 3 / Block Protect 1 (BP1) is not set > Chip status register: Bit 2 / Block Protect 0 (BP0) is not set > Chip status register: Write Enable Latch (WEL) is not set > Chip status register: Write In Progress (WIP/BUSY) is not set Show a chip being present multiple times, even if this is not the case: > Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address 0xfff00000. > Multiple flash chips were detected: MX25L8005 MX25L8005 MX25L8005 > Please specify which chip to use with the -c <chipname> option. > > Best regards. ShuricK > [Меломан][Hard&Heavy Rock][Киголюб] > [Сентиментальный романтик от сурового Hi-Tech] > > -- реклама ----------------------------------------------------------- > Никогда не покупали в интернете? > Лучшее место для покупок онлайн - http://aukro.ua > >

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flashrom log file
by Alexander 07 May '11

07 May '11

Motherboad - AsRock K10N78, chipset GeForce8200 Best regards. ShuricK [Меломан][Hard&Heavy Rock][Киголюб] [Сентиментальный романтик от сурового Hi-Tech] -- реклама ----------------------------------------------------------- Никогда не покупали в интернете? Лучшее место для покупок онлайн - http://aukro.ua

2 3

EN25F40
by Olivier Schonken 07 May '11

07 May '11

Hi Just wanted to let you guys know that the probe, read and write for a EN 25F40 chip worked beautifully with a ft2232H device. Unfortunately didn't work in circuit, but when I removed the EEPROM from its circuit, the programming worked like a charm. Thanks for a very good product. Regards Olivier Schonken

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