flashrom

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[PATCH] Autodetect target processor architecture
by Carl-Daniel Hailfinger 01 Jul '11

01 Jul '11

Autodetect target processor architecture. Enable architecture dependent compilation of individual sub-drivers for the internal programmer. With this patch, you no longer have to edit the Makefile to compile the internal driver on MIPS/ARM/... TODO: arch.h is not suitable for inclusion in a .c/.h file because of its last line. Any ideas how to change that (move arch.h as "here document" into the Makefile, use other trickery like more #ifdefs)? Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-target_arch/Makefile =================================================================== --- flashrom-target_arch/Makefile (Revision 1357) +++ flashrom-target_arch/Makefile (Arbeitskopie) @@ -37,7 +37,10 @@ CFLAGS += -Werror endif -# FIXME We have to differentiate between host and target arch. +# Determine the destination processor architecture +ARCH = $(strip $(shell LC_ALL=C gcc -E arch.h|grep -v '^\#')) + +# FIXME We have to differentiate between host and target OS architecture. OS_ARCH ?= $(shell uname) ifneq ($(OS_ARCH), SunOS) STRIP_ARGS = -s @@ -222,8 +225,10 @@ ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o dmi.o internal.o -# FIXME: The PROGRAMMER_OBJS below should only be included on x86. +ifeq ($(ARCH),"x86") PROGRAMMER_OBJS += it87spi.o it85spi.o ichspi.o sb600spi.o wbsio_spi.o mcp6x_spi.o +else +endif NEED_PCI := yes endif @@ -418,6 +423,9 @@ echo "found." || ( echo "not found."; \ rm -f .test.c .test$(EXEC_SUFFIX); exit 1) @rm -f .test.c .test$(EXEC_SUFFIX) + @printf "ARCH is " + @echo $(ARCH)|wc -l|grep -q ^1$ || ( echo "unknown. Aborting."; exit 1) + @printf "%s\n" '$(ARCH)' ifeq ($(CHECK_LIBPCI), yes) pciutils: compiler Index: flashrom-target_arch/arch.h =================================================================== --- flashrom-target_arch/arch.h (Revision 0) +++ flashrom-target_arch/arch.h (Revision 0) @@ -0,0 +1,31 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2011 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * Header file for CPU architecture checking. + */ + +#if defined (__i386__) || defined (__x86_64__) +#define __FLASHROM_ARCH__ "x86" +#elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips) +#define __FLASHROM_ARCH__ "mips" +#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) +#define __FLASHROM_ARCH__ "ppc" +#endif +__FLASHROM_ARCH__ -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 7/8] ichspi:c add support for Intel Hardware Sequencing
by Carl-Daniel Hailfinger 01 Jul '11

01 Jul '11

Am 28.06.2011 05:33 schrieb Stefan Tauner: > --- a/flashchips.c > +++ b/flashchips.c > @@ -8507,7 +8507,27 @@ const struct flashchip flashchips[] = { > .write = write_jedec_1, > .read = read_memmapped, > }, > - > +#if defined(CONFIG_INTERNAL) && (defined(__i386__) || defined(__x86_64__)) > + { > + .vendor = "Intel", > + .name = "Hardware Sequencing", > + .bustype = CHIP_BUSTYPE_SPI, > + .manufacture_id = INTEL_ID, > + .model_id = INTEL_HWSEQ, > + .total_size = 0, > + .page_size = 256, > + .tested = TEST_OK_PREW, > + .probe = ich_hwseq_probe, > + .block_erasers = > + { > + { /* erase blocks will be set by the probing function */ > + .block_erase = ich_hwseq_block_erase, > + } > + }, > + .write = ich_hwseq_write_256, > + .read = ich_hwseq_read, > + }, > +#endif // defined(CONFIG_INTERNAL) && (defined(__i386__) || defined(__x86_64__)) > { > .vendor = "AMIC", > .name = "unknown AMIC SPI chip", > I consider a chip called "Hardware Sequencing" to be a really evil thing. Hooking up a programmer with the help of a programmer-specific flash chip seems to be quite popular, and it was rejected each time and an alternative solution was found. That said, if probing for the real chip ID is impossible here and you only have read/write/erase primitives without any SPI access, this is essentially not a SPI bus chip, but a programmer-specific bus chip. The struct flashchip should probably look more like this: +#if defined(CONFIG_INTERNAL) && (defined(__i386__) || defined(__x86_64__)) + { + .vendor = "Unknown", + .name = "Abstract opaque chip", + .bustype = CHIP_BUSTYPE_ABSTRACT, + .manufacture_id = ABSTRACT_MANUF_ID, + .model_id = ABSTRACT_MODEL_ID, + .total_size = 0, + .page_size = 0, + .tested = TEST_OK_PREW, + .probe = abstract_probe, //abstract_probe points to programmer->abstract_probe which points to ich_hwseq_probe + .block_erasers = + { + { /* erase blocks will be set by the probing function */ + .block_erase = abstract_erase, // points to programmer->abstract_erase which points to ich_hwseq_block_erase + } + }, + .write = ich_hwseq_write_256, Same abstract_ game as above. + .read = ich_hwseq_read, Dito. + }, +#endif // defined(CONFIG_INTERNAL) && (defined(__i386__) || defined(__x86_64__)) { .vendor = "AMIC", .name = "unknown AMIC SPI chip", Yes, the programmer struct would have to be extended for this, but at least that allows us to drive anything without having to care about the bus if we can't access the bus anyway. Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 3/8] ichspi.c: add FPB (Flash Partition Boundary) macros and init printing
by Carl-Daniel Hailfinger 01 Jul '11

01 Jul '11

Am 28.06.2011 05:33 schrieb Stefan Tauner: > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > I think we really have to introduce a dbg2 level for messages and cut down on printing such stuff for -V. Until that happens, we can use dbg. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 2/8] ichspi.c: simplify ich_set_bbar
by Carl-Daniel Hailfinger 01 Jul '11

01 Jul '11

Am 28.06.2011 05:33 schrieb Stefan Tauner: > less code, documenting better what the differences are (i.e. offset of BBAR only). > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > Good code simplification. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 1/8] ichspi.c: make REGWRITE* macros safer
by Carl-Daniel Hailfinger 01 Jul '11

01 Jul '11

Am 28.06.2011 05:33 schrieb Stefan Tauner: > '+' does have a quite high precedence so "calling" those macros with a term including weaker > operators in the off parameter may have unexpected consequences > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > Good find! Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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[commit] r1362 - trunk
by repository service 01 Jul '11

01 Jul '11

Author: stefanct Date: Fri Jul 1 02:39:23 2011 New Revision: 1362 URL: http://flashrom.org/trac/flashrom/changeset/1362 Log: ichspi.c: preserve reserved bits in address registers Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/ichspi.c Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Fri Jul 1 02:39:16 2011 (r1361) +++ trunk/ichspi.c Fri Jul 1 02:39:23 2011 (r1362) @@ -659,10 +659,11 @@ return 1; } - /* Programm Offset in Flash into FADDR */ - REGWRITE32(ICH7_REG_SPIA, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */ + /* Program offset in flash into SPIA while preserving reserved bits. */ + temp32 = REGREAD32(ICH7_REG_SPIA) & ~0x00FFFFFF; + REGWRITE32(ICH7_REG_SPIA, (offset & 0x00FFFFFF) | temp32); - /* Program data into FDATA0 to N */ + /* Program data into SPID0 to N */ if (write_cmd && (datalength != 0)) { temp32 = 0; for (a = 0; a < datalength; a++) { @@ -803,8 +804,10 @@ return 1; } - /* Programm Offset in Flash into FADDR */ - REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */ + /* Program offset in flash into FADDR while preserve the reserved bits + * and clearing the 25. address bit which is only useable in hwseq. */ + temp32 = REGREAD32(ICH9_REG_FADDR) & ~0x01FFFFFF; + REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF) | temp32); /* Program data into FDATA0 to N */ if (write_cmd && (datalength != 0)) {

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[commit] r1361 - trunk
by repository service 01 Jul '11

01 Jul '11

Author: stefanct Date: Fri Jul 1 02:39:16 2011 New Revision: 1361 URL: http://flashrom.org/trac/flashrom/changeset/1361 Log: ichspi.c: add FPB (Flash Partition Boundary) macros and init printing Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/ichspi.c Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Fri Jul 1 02:39:09 2011 (r1360) +++ trunk/ichspi.c Fri Jul 1 02:39:16 2011 (r1361) @@ -131,6 +131,10 @@ #define ICH9_REG_BBAR 0xA0 /* 32 Bits BIOS Base Address Configuration */ #define BBAR_MASK 0x00ffff00 /* 8-23: Bottom of System Flash */ +#define ICH9_REG_FPB 0xD0 /* 32 Bits Flash Partition Boundary */ +#define FPB_FPBA_OFF 0 /* 0-12: Block/Sector Erase Size */ +#define FPB_FPBA (0x1FFF << FPB_FPBA_OFF) + // ICH9R SPI commands #define SPI_OPCODE_TYPE_READ_NO_ADDRESS 0 #define SPI_OPCODE_TYPE_WRITE_NO_ADDRESS 1 @@ -1324,6 +1328,9 @@ ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR); msg_pdbg("0xA0: 0x%08x (BBAR)\n", ichspi_bbar); + tmp = mmio_readl(ich_spibar + ICH9_REG_FPB); + msg_pdbg("0xD0: 0x%08x (FPB)\n", tmp); + ich_init_opcodes(); break; default:

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[commit] r1360 - trunk
by repository service 01 Jul '11

01 Jul '11

Author: stefanct Date: Fri Jul 1 02:39:09 2011 New Revision: 1360 URL: http://flashrom.org/trac/flashrom/changeset/1360 Log: ichspi.c: simplify ich_set_bbar Less code, documenting better what the differences are (i.e. offset of BBAR only). Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/ichspi.c Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Fri Jul 1 02:39:01 2011 (r1359) +++ trunk/ichspi.c Fri Jul 1 02:39:09 2011 (r1360) @@ -555,43 +555,37 @@ * Try to set BBAR (BIOS Base Address Register), but read back the value in case * it didn't stick. */ -void ich_set_bbar(uint32_t minaddr) +static void ich_set_bbar(uint32_t min_addr) { - minaddr &= BBAR_MASK; + int bbar_off; switch (spi_programmer->type) { case SPI_CONTROLLER_ICH7: case SPI_CONTROLLER_VIA: - ichspi_bbar = mmio_readl(ich_spibar + 0x50) & ~BBAR_MASK; - if (ichspi_bbar) - msg_pdbg("Reserved bits in BBAR not zero: 0x%04x", - ichspi_bbar); - ichspi_bbar |= minaddr; - rmmio_writel(ichspi_bbar, ich_spibar + 0x50); - ichspi_bbar = mmio_readl(ich_spibar + 0x50); - /* We don't have any option except complaining. And if the write - * failed, the restore will fail as well, so no problem there. - */ - if (ichspi_bbar != minaddr) - msg_perr("Setting BBAR failed!\n"); + bbar_off = 0x50; break; case SPI_CONTROLLER_ICH9: - ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR) & ~BBAR_MASK; - if (ichspi_bbar) - msg_pdbg("Reserved bits in BBAR not zero: 0x%04x", - ichspi_bbar); - ichspi_bbar |= minaddr; - rmmio_writel(ichspi_bbar, ich_spibar + ICH9_REG_BBAR); - ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR); - /* We don't have any option except complaining. And if the write - * failed, the restore will fail as well, so no problem there. - */ - if (ichspi_bbar != minaddr) - msg_perr("Setting BBAR failed!\n"); + bbar_off = ICH9_REG_BBAR; break; default: msg_perr("Unknown chipset for BBAR setting!\n"); - break; + return; + } + + ichspi_bbar = mmio_readl(ich_spibar + bbar_off) & ~BBAR_MASK; + if (ichspi_bbar) { + msg_pdbg("Reserved bits in BBAR not zero: 0x%08x\n", + ichspi_bbar); } + min_addr &= BBAR_MASK; + ichspi_bbar |= min_addr; + rmmio_writel(ichspi_bbar, ich_spibar + bbar_off); + ichspi_bbar = mmio_readl(ich_spibar + bbar_off) & BBAR_MASK; + + /* We don't have any option except complaining. And if the write + * failed, the restore will fail as well, so no problem there. + */ + if (ichspi_bbar != min_addr) + msg_perr("Setting BBAR failed!\n"); } /* This function generates OPCODES from or programs OPCODES to ICH according to

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[commit] r1359 - trunk
by repository service 01 Jul '11

01 Jul '11

Author: stefanct Date: Fri Jul 1 02:39:01 2011 New Revision: 1359 URL: http://flashrom.org/trac/flashrom/changeset/1359 Log: ichspi.c: make REGWRITE* macros safer '+' does have a quite high precedence so "calling" those macros with a term including weaker operators in the off parameter may have unexpected consequences. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/ichspi.c Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Fri Jul 1 02:19:12 2011 (r1358) +++ trunk/ichspi.c Fri Jul 1 02:39:01 2011 (r1359) @@ -216,9 +216,9 @@ return mmio_readb(ich_spibar + X); } -#define REGWRITE32(off,val) mmio_writel(val, ich_spibar+off) -#define REGWRITE16(off,val) mmio_writew(val, ich_spibar+off) -#define REGWRITE8(off,val) mmio_writeb(val, ich_spibar+off) +#define REGWRITE32(off, val) mmio_writel(val, ich_spibar+(off)) +#define REGWRITE16(off, val) mmio_writew(val, ich_spibar+(off)) +#define REGWRITE8(off, val) mmio_writeb(val, ich_spibar+(off)) /* Common SPI functions */ static int find_opcode(OPCODES *op, uint8_t opcode);

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Re: [flashrom] [PATCH 2/3] add check_block_erasers which returns the number of well-defined erasers for a chip
by Carl-Daniel Hailfinger 01 Jul '11

01 Jul '11

Am 24.06.2011 16:53 schrieb Stefan Tauner: > This can be used in various situations (including one in the upcoming SFDP patch) and > removes one FIXME in current HEAD. Needed to move check_block_eraser (which checks a > single eraser) up to avoid (upcoming) forward declaration(s). > Since nobody objected to the "forward declarations" RFC, I think we can safely say that moving code around inside a file is a bad idea. Please kill that part. > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > flashrom.c | 70 ++++++++++++++++++++++++++++++++++------------------------- > 1 files changed, 40 insertions(+), 30 deletions(-) > > diff --git a/flashrom.c b/flashrom.c > index 6979d84..aed10aa 100644 > --- a/flashrom.c > +++ b/flashrom.c > @@ @@ > +/* Returns the number of well-defined erasers for a chip. > + * The log parameter controls output. */ > +static int check_block_erasers(const struct flashchip *flash, int log) > Hm. Can you call it count_usable_erasers or count_usable_block_erasers instead? > +{ > + int usable_erasefunctions = 0; > + int k; > + for (k = 0; k < NUM_ERASEFUNCTIONS; k++) { > + if (!check_block_eraser(flash, k, 0)) > + usable_erasefunctions++; > + } > + return usable_erasefunctions; > +} > + > Rest looks good to me. Regards, Carl-Daniel -- http://www.hailfinger.org/

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