flashrom

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[PATCH] add support for SFDP (JESD216)
by Stefan Tauner 29 Jan '12

29 Jan '12

Similar to modules using the opaque programmer framework (e.g. ICH Hardware Sequencing) this uses a generic struct flashchip element in flashchips.c with dummy values and a special probe function that fills the obtained values into that generic struct. Documentation used: http://www.jedec.org/standards-documents/docs/jesd216 (2011-04) W25Q32BV data sheet Revision F (2011-04-01) EN25QH16 data sheet Revision F (2011-06-01) todo: - handle programmers which have a problem with the dummy bytes needed - move sfdp_add_uniform_eraser to flashchips.c? Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- Makefile | 2 +- chipdrivers.h | 4 + flash.h | 2 + flashchips.c | 24 ++++ flashchips.h | 1 + flashrom.c | 28 +++++- sfdp.c | 356 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ spi.h | 5 + spi25.c | 31 +++++ 9 files changed, 451 insertions(+), 2 deletions(-) create mode 100644 sfdp.c diff --git a/Makefile b/Makefile index 83aa038..b890d8a 100644 --- a/Makefile +++ b/Makefile @@ -252,7 +252,7 @@ endif CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o sharplhf00l04.o \ - a25.o at25.o opaque.o + a25.o at25.o opaque.o sfdp.o LIB_OBJS = layout.o diff --git a/chipdrivers.h b/chipdrivers.h index a1d0cd9..bd81098 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -41,6 +41,7 @@ int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int b int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len); @@ -58,6 +59,9 @@ int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, u int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +/* sfdp.c */ +int probe_spi_sfdp(struct flashctx *flash); + /* opaque.c */ int probe_opaque(struct flashctx *flash); int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); diff --git a/flash.h b/flash.h index e51b6d4..6bcae71 100644 --- a/flash.h +++ b/flash.h @@ -174,6 +174,8 @@ struct flashctx { struct registered_programmer *pgm; }; +typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen); + #define TEST_UNTESTED 0 #define TEST_OK_PROBE (1 << 0) diff --git a/flashchips.c b/flashchips.c index ca1c57f..f0fde20 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8872,6 +8872,30 @@ const struct flashchip flashchips[] = { .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program */ }, + + { + .vendor = "Unknown", + .name = "SFDP device", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = SFDP_DEVICE_ID, + /* We present our own "report this" text hence we do not + * want the default "This flash part has status UNTESTED..." + * text to be printed. */ + .tested = TEST_OK_PREW, + .probe = probe_spi_sfdp, + .read = spi_chip_read, + /* FIXME: some vendor extensions define this */ + .voltage = {}, + /* Everything below will be set by the probing function. */ + .page_size = 0, + .write = NULL, + .total_size = 0, + .feature_bits = 0, + .block_erasers = {}, + .unlock = NULL, + .printlock = NULL, + }, { .vendor = "Programmer", diff --git a/flashchips.h b/flashchips.h index 03efb86..1f2a8ca 100644 --- a/flashchips.h +++ b/flashchips.h @@ -36,6 +36,7 @@ #define GENERIC_MANUF_ID 0xffff /* Check if there is a vendor ID */ #define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */ +#define SFDP_DEVICE_ID 0xfffe #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */ #define ALLIANCE_AS29F002B 0x34 diff --git a/flashrom.c b/flashrom.c index ee68344..84fb3fc 100644 --- a/flashrom.c +++ b/flashrom.c @@ -986,7 +986,33 @@ int probe_flash(struct registered_programmer *pgm, int startchip, * probe_flash() is the first one and thus no chip has been * found before. */ - if (startchip == 0 || fill_flash->model_id != GENERIC_DEVICE_ID) + if (startchip == 0 && fill_flash->model_id == SFDP_DEVICE_ID) { + msg_cinfo("===\n" + "SFDP has autodetected a flash chip which is " + "not natively supported by flashrom yet.\n"); + if (count_usable_erasers(fill_flash) == 0) + msg_cinfo("The standard operations read and " + "verify should work, but to support " + "erase, write and all other " + "possible features"); + else + msg_cinfo("All standard operations (read, " + "verify, erase and write) should " + "work, but to support all possible " + "features"); + + msg_cinfo(" we need to add them manually.\nYou " + "can help us by mailing us the output of " + "the following command to flashrom@flashrom." + "org: \n'flashrom -VV [plus the " + "-p/--programmer parameter (if needed)]" + "'\nThanks for your help!\n" + "===\n"); + } + + if (startchip == 0 || + ((fill_flash->model_id != GENERIC_DEVICE_ID) && + (fill_flash->model_id != SFDP_DEVICE_ID))) break; notfound: diff --git a/sfdp.c b/sfdp.c new file mode 100644 index 0000000..4687737 --- /dev/null +++ b/sfdp.c @@ -0,0 +1,356 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2011-2012 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include <stdlib.h> +#include "flash.h" +#include "spi.h" +#include "chipdrivers.h" + +static int spi_sfdp_wrapper(struct flashctx *flash, uint32_t address, uint8_t *buf, int len) +{ + int i, ret; + const unsigned char cmd[JEDEC_SFDP_OUTSIZE] = { + JEDEC_SFDP, + (address >> 16) & 0xff, + (address >> 8) & 0xff, + (address >> 0) & 0xff, + 0 + }; + msg_cspew("spi_sfdp_wrapper: addr=0x%x, len=%d, data:\n", address, len); + ret = spi_send_command(flash, sizeof(cmd), len, cmd, buf); + for (i = 0; i < len; i++) + msg_cspew(" 0x%02x", buf[i]); + msg_cspew("\n"); + return ret; +} + +/* FIXME: eventually something similar like this but more generic should be + * available to split up spi commands. use that then instead */ +static int spi_sfdp(struct flashctx *flash, uint32_t address, uint8_t *buf, int len) +{ + /* FIXME: this is wrong. */ + int maxstep = 8; + int ret = 0; + while (len > 0) { + int step = min(len, maxstep); + ret = spi_sfdp_wrapper(flash, address, buf, step); + if (ret) + return ret; + address += step; + buf += step; + len -= step; + } + return ret; +} + +struct sfdp_tbl_hdr { + uint8_t id; + uint8_t v_minor; + uint8_t v_major; + uint8_t len; + uint32_t ptp; /* 24b pointer */ +}; + +static int sfdp_add_uniform_eraser(struct flashctx *f, uint8_t opcode, uint32_t bsize) +{ + uint32_t total_size = f->total_size * 1024; + int i; + erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode); + if (erasefn == NULL) + return 1; + for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { + struct block_eraser eraser = f->block_erasers[i]; + if (eraser.eraseblocks[0].size != 0) + continue; + eraser.block_erase = erasefn; + eraser.eraseblocks[0].size = bsize; + eraser.eraseblocks[0].count = total_size/bsize; + msg_cdbg2(" Block eraser %d: %d x %d B with opcode " + "0x%02x\n", i, total_size/bsize, bsize, + opcode); + return 0; + } + msg_cinfo("%s: Not enough space to store another eraser (i=%d)." + " Please report this at flashrom(a)flashrom.org\n", + __func__, i); + return 1; +} + +static int sfdp_fill_flash(struct flashctx *f, uint8_t *buf, uint16_t len) +{ + uint32_t tmp32; + uint8_t tmp8; + uint32_t total_size; /* in bytes */ + uint32_t bsize; + uint8_t opcode_4k = 0xFF; + int dw, j; + + msg_cdbg2("Parsing JEDEC SFDP parameter table...\n"); + if (len != 9 * 4 && len != 4 * 4) { + msg_cerr("%s: len out of spec\n", __func__); + return 1; + } + + /* 1. double word */ + dw = 0; + tmp32 = buf[(4 * dw) + 0]; + tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8; + tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16; + tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24; + + tmp8 = (tmp32 >> 17) & 0x3; + switch (tmp8) { + case 0x0: + msg_cdbg2(" 3-Byte only addressing.\n"); + break; + case 0x1: + msg_cdbg2(" 3-Byte (and optionally 4-Byte) addressing.\n"); + break; + case 0x2: + msg_cdbg(" 4-Byte only addressing not supported.\n"); + return 1; + default: + msg_cdbg(" Required addressing mode (0x%x) not supported.\n", + tmp8); + return 1; + } + + msg_cdbg2(" Writes to the status register have "); + if (tmp32 & (1 << 3)) { + f->unlock = spi_disable_blockprotect; + msg_cdbg2("to be enabled with "); + if (tmp32 & (1 << 4)) { + f->feature_bits = FEATURE_WRSR_WREN; + msg_cdbg2("WREN (0x06).\n"); + } else { + f->feature_bits = FEATURE_WRSR_EWSR; + msg_cdbg2("EWSR (0x50).\n"); + } + } else + msg_cdbg2("not to be especially enabled.\n"); + + msg_cdbg2(" Write granularity is "); + if (tmp32 & (1 << 2)) { + msg_cdbg2(" at least 64 B.\n"); + f->page_size = 64; + f->write = spi_chip_write_256; + } else { + msg_cdbg2(" 1 B only.\n"); + f->page_size = 256; /* ? */ + f->write = spi_chip_write_1; + } + + if ((tmp32 & 0x3) == 0x1) { + opcode_4k = (tmp32 >> 8) & 0xFF; /* will be dealt with later */ + } + + /* 2. double word */ + dw = 1; + tmp32 = buf[(4 * dw) + 0]; + tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8; + tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16; + tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24; + + if (tmp32 & (1 << 31)) { + msg_cerr(" Flash chip size >= 4 Gb/500 MB not supported.\n"); + return 1; + } + total_size = (tmp32 & 0x7FFFFFFF) / 8; + f->total_size = total_size / 1024; + msg_cdbg2(" Flash chip size is %d kB.\n", f->total_size); + + /* FIXME: double words 3-7 contain unused fast read information */ + + if (len == 4 * 4) { + msg_cdbg("It seems like this chip supports the preliminary " + "Intel version of SFDP, skipping processing of double " + "words 3-9.\n"); + goto proc_4k; + } + + dw = 8; + for (j = 0; j < 4; j++) { + /* 8 double words from the start + 2 words for every eraser */ + tmp32 = buf[(4 * dw) + (2 * j)]; + if (tmp32 == 0) { + msg_cdbg2(" Block eraser %d is unused.\n", j); + continue; + } + if (tmp32 >= 31) { + msg_cdbg2(" Block size of eraser %d (2^%d) is too big." + "\n", j, tmp32); + continue; + } + bsize = 1 << (tmp32); /* bsize = 2 ^ field */ + + tmp8 = buf[(4 * dw) + (2 * j) + 1]; + if(sfdp_add_uniform_eraser(f, tmp8, bsize)) + continue; + /* If there is a valid 4k value in the last double words, + * we want to override the value from double word 1, hence force + * skipping its processing: */ + if (bsize == 4 * 1024) + opcode_4k = 0xFF; + } + +proc_4k: + if (opcode_4k != 0xFF) { + sfdp_add_uniform_eraser(f, opcode_4k, 4 * 1024); + } + return 0; +} + +static int sfdp_fetch_pt(struct flashctx *flash, uint32_t addr, uint8_t *buf, uint16_t len) +{ + uint16_t i; + if (spi_sfdp(flash, addr, buf, len)) { + msg_cerr("Receiving SFDP parameter table failed.\n"); + return 1; + } + msg_cspew(" Parameter table contents:\n"); + for(i = 0; i < len; i++) { + if ((i % 8) == 0) { + msg_cspew(" 0x%03x: ", i); + } + msg_cspew(" 0x%02x", buf[i]); + if ((i % 8) == 7) { + msg_cspew("\n"); + continue; + } + if ((i % 8) == 3) { + msg_cspew(" "); + continue; + } + } + msg_cspew("\n"); + return 0; +} + +int probe_spi_sfdp(struct flashctx *flash) +{ + int ret = 0; + uint8_t buf[8]; + uint32_t tmp32; + uint8_t nph; + /* need to limit the table loop by comparing i to uint8_t nph hence: */ + uint16_t i; + struct sfdp_tbl_hdr *hdrs; + uint8_t *hbuf; + uint8_t *tbuf; + + if (spi_sfdp(flash, 0x00, buf, 4)) { + msg_cerr("Receiving SFDP signature failed.\n"); + return 0; + } + tmp32 = buf[0]; + tmp32 |= ((unsigned int)buf[1]) << 8; + tmp32 |= ((unsigned int)buf[2]) << 16; + tmp32 |= ((unsigned int)buf[3]) << 24; + + msg_cdbg2("SFDP signature = 0x%08x (should be 0x50444653)\n", tmp32); + if (tmp32 != 0x50444653) { + msg_cdbg("No SFDP signature found.\n"); + return 0; + } + if (spi_sfdp(flash, 0x04, buf, 3)) { + msg_cerr("Receiving SFDP revision and number of parameter " + "headers (NPH) failed. "); + return 0; + } + msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]); + nph = buf[2]; + msg_cdbg2("SFDP number of parameter headers (NPH) = %d (+ 1 mandatory)" + "\n", nph); + + /* Fetch all parameter headers, even if we don't use them all (yet). */ + hbuf = malloc(sizeof(struct sfdp_tbl_hdr) * (nph + 1)); + hdrs = malloc((nph + 1) * 8); + if (hbuf == NULL || hdrs == NULL ) { + msg_gerr("Out of memory!\n"); + exit(1); /* FIXME: shutdown gracefully */ + } + if (spi_sfdp(flash, 0x08, hbuf, (nph + 1) * 8)) { + msg_cerr("Receiving SFDP parameter table headers failed.\n"); + goto cleanup_hdrs; + } + + i = 0; + do { + uint16_t len; + hdrs[i].id = hbuf[(8 * i) + 0]; + hdrs[i].v_minor = hbuf[(8 * i) + 1]; + hdrs[i].v_major = hbuf[(8 * i) + 2]; + hdrs[i].len = hbuf[(8 * i) + 3]; + hdrs[i].ptp = hbuf[(8 * i) + 4]; + hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 5]) << 8; + hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 6]) << 16; + msg_cdbg2("SFDP parameter table header %d/%d:\n", i, nph); + msg_cdbg2(" ID 0x%02x, version %d.%d\n", hdrs[i].id, + hdrs[i].v_major, hdrs[i].v_minor); + len = hdrs[i].len * 4; + tmp32 = hdrs[i].ptp; + msg_cdbg2(" Length %d B, Parameter Table Pointer 0x%06x\n", + len, tmp32); + + if (len + tmp32 > UINT16_MAX) { + msg_cerr("SFDP Parameter Table %d supposedly " + "overflows addressable SFDP area. This most\n" + "probably indicates a corrupt SFDP parameter " + "table header. Aborting SFDP probe!\n", i); + ret = 0; + goto cleanup_hdrs; + } + + tbuf = malloc(len); + if (tbuf == NULL) { + msg_gerr("Out of memory!\n"); + exit(1); /* FIXME: shutdown gracefully */ + } + if (sfdp_fetch_pt(flash, tmp32, tbuf, len)){ + msg_cerr("Fetching SFDP parameter table %d failed.\n", + i); + free(tbuf); + break; + } + if (i == 0) { /* Mandatory JEDEC SFDP parameter table */ + if (hdrs[i].id != 0) + msg_cdbg("ID of the mandatory JEDEC SFDP " + "parameter table is not 0 as demanded " + "by JESD216 (warning only).\n"); + + if (len != 9 * 4 && len != 4 * 4) { + msg_cdbg("Length of the mandatory JEDEC SFDP " + "parameter table is %d B instead of " + "36 B (i.e. 9 double words) as " + "demanded by JESD216, skipping " + "parsing.\n", len); + } else if (sfdp_fill_flash(flash, tbuf, len) == 0) + ret = 1; + } + + free(tbuf); + i++; + } while(i <= nph); + +cleanup_hdrs: + free(hdrs); + free(hbuf); + return ret; +} diff --git a/spi.h b/spi.h index b908603..5f07eae 100644 --- a/spi.h +++ b/spi.h @@ -40,6 +40,11 @@ #define JEDEC_REMS_OUTSIZE 0x04 #define JEDEC_REMS_INSIZE 0x02 +/* Read Serial Flash Discoverable Parameters (SFDP) */ +#define JEDEC_SFDP 0x5a +#define JEDEC_SFDP_OUTSIZE 0x05 /* 8b op, 24b addr, 8b dummy */ +/* JEDEC_SFDP_INSIZE : any length */ + /* Read Electronic Signature */ #define JEDEC_RES 0xab #define JEDEC_RES_OUTSIZE 0x04 diff --git a/spi25.c b/spi25.c index 3ce7f08..15ec300 100644 --- a/spi25.c +++ b/spi25.c @@ -720,6 +720,37 @@ int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, return spi_chip_erase_c7(flash); } +erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode) +{ + switch(opcode){ + case 0x00: + case 0xff: + /* Not specified, assuming "not supported". */ + return NULL; + case 0x20: + return &spi_block_erase_20; + break; + case 0x52: + return &spi_block_erase_52; + break; + case 0x60: + return &spi_block_erase_60; + break; + case 0xc7: + return &spi_block_erase_c7; + break; + case 0xd7: + return &spi_block_erase_d7; + break; + case 0xd8: + return &spi_block_erase_d8; + default: + msg_cinfo("%s: unknown erase opcode (0x%02x). Please report " + "this at flashrom(a)flashrom.org\n", __func__, opcode); + return NULL; + } +} + int spi_write_status_enable(struct flashctx *flash) { static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; -- 1.7.1

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[PATCH] SFDP 3.0
by Stefan Tauner 29 Jan '12

29 Jan '12

after fixing an embarrassing off-by-one error and a few other mistakes, i refactored the setting of erasers and (hopefully) added support for the preliminary SFDP version by intel. Stefan Tauner (1): add support for SFDP (JESD216) Makefile | 2 +- chipdrivers.h | 4 + flash.h | 2 + flashchips.c | 24 ++++ flashchips.h | 1 + flashrom.c | 28 +++++- sfdp.c | 356 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ spi.h | 5 + spi25.c | 31 +++++ 9 files changed, 451 insertions(+), 2 deletions(-) create mode 100644 sfdp.c

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Re: [flashrom] Board identification patch for the MSC Q7 Tunnel Creek board
by Carl-Daniel Hailfinger 29 Jan '12

29 Jan '12

Hi, thanks for this patch. Am 27.01.2012 18:11 schrieb Idwer Vollering: > From: "Feldschmid, Ingo" <ifel(a)msc-ge.com> > Date: Fri, 27 Jan 2012 15:05:22 +0100 > > When trying to flash the bios chip on our Tunnel Creek module, there always > is the “you may be running flashrom on an unsupported laptop” warning. > Since our board is neither unsupported nor a laptop, I would love to patch > that. > > Basically, I added identification for our module to the board_matches list > for phase P2, which is just before the laptop / laptop ok check. In the > board function that is called from this list, I just set the global > variable “is_laptop” to zero. This will prevent the laptop warning for > tunnel creek boards which have the dmi string “Q7-TCTC”. > > I am not sure if this mechanism is the correct way to do this, since > entries in this lists are normally used to execute board-specific > flash-chip-enable functions. This is exactly what phase 2 board enables are designed for. I'm happy it works as designed. > Of course, an easier path would be to just set the chassis information to > something like “Desktop”, but we are not building complete boards, just a > COM (Computer-On-Module). Therefore, the module could be used in all > different kinds of chassis, but the flash chip update mechanism would > always work, since everything relevant is on the module. Is there a chassis type which is called Computer-On-Module or something like that? Then again, the situation here is complicated because even if such a chassis type can be encoded in DMI data, flashrom can't really know if flashing can be done safely. > The attached patch has been built against flashrom trunk version 1486. > > I have also included two flashrom logs, just to prove that we can > flawlessly read and write the bios flash chip on our module. > > Signed-off-by: Ingo Feldschmid <ifel(a)msc-ge.com> > > Index: board_enable.c > =================================================================== > --- board_enable.c (revision 1486) > +++ board_enable.c (working copy) > @@ -2045,6 +2045,17 @@ > return it87_gpio_set(63, 1); > } > > +/* > + * Suited for: > + * - MSC Q7 Tunnel Creek Module, phase 2 detection patch > + */ > +static int msc_q7tctc_p2(void) > +{ > + /* we are a computer-on-module, not a laptop */ > + is_laptop = 0; > + return 1; > +} > + > #endif > > /* > @@ -2220,6 +2231,7 @@ > {0x1106, 0x0259, 0x1106, 0xAA07, 0x1106, 0x3227, 0x1106, 0xAA07, NULL, NULL, NULL, P3, "VIA", "EPIA EK", 0, NT, via_vt823x_gpio9_raise}, > {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, P3, "VIA", "EPIA M/MII/...", 0, OK, via_vt823x_gpio15_raise}, > {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, P3, "VIA", "EPIA-N/NL", 0, OK, via_vt823x_gpio9_raise}, > + {0x8086, 0x8186, 0x8086, 0x8186, 0x0000, 0x0000, 0x0000, 0x0000, "^Q7-TCTC", NULL, NULL, P2, "MSC", "Q7-TCTC", 0, OK, msc_q7tctc_p2}, > #endif > { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, P3, NULL, NULL, 0, NT, NULL}, /* end marker */ > }; The only question I have is whether we can make the match more specific: - Second set of PCI IDs, preferably one which has a vendor ID of MSC-GE - Use "^Q7-TCTC$" instead Otherwise it looks good. Once the question above is answered, this patch is Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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FOSDEM 2012
by Carl-Daniel Hailfinger 28 Jan '12

28 Jan '12

Hey, it seems we forgot to apply for a devroom (well, at least I didn't see anything on the mailing list). Should we submit talks to the individual devrooms? Should we ask for a coreboot/flashrom booth/table? Regards, Carl-Daniel

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board inspection results
by Nick O'Neill 28 Jan '12

28 Jan '12

Hi, I'm trying to write to a Macronix MX25L3205 on a Samsung Series 5 laptop, I backed up the original contents and attempted to flash a new one which always fails at the same spot. Erasing fails at that spot, but succeeds up to then. I'm happy to do some work to get this working, here's the requested information: bin (http://paste.flashrom.org/view.php?id=1032) for unknown by nickoneill superio (http://paste.flashrom.org/view.php?id=1031) for unknown by nickoneill lspci (http://paste.flashrom.org/view.php?id=1030) for unknown by nickoneill flash (http://paste.flashrom.org/view.php?id=1029) for unknown by nickoneill Thanks, Nick

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Board identification patch for the MSC Q7 Tunnel Creek board
by Idwer Vollering 27 Jan '12

27 Jan '12

I have stripped the "embedded world 2012" banner. -- From: "Feldschmid, Ingo" <ifel(a)msc-ge.com> To: <flashrom(a)flashrom.org> Cc: Date: Fri, 27 Jan 2012 15:05:22 +0100 Subject: [flashrom] Board identification patch for the MSC Q7 Tunnel Creek board Hi, **** ** ** When trying to flash the bios chip on our Tunnel Creek module, there always is the “you may be running flashrom on an unsupported laptop” warning. Since our board is neither unsupported nor a laptop, I would love to patch that. **** ** ** Basically, I added identification for our module to the board_matches list for phase P2, which is just before the laptop / laptop ok check. In the board function that is called from this list, I just set the global variable “is_laptop” to zero. This will prevent the laptop warning for tunnel creek boards which have the dmi string “Q7-TCTC”. **** ** ** I am not sure if this mechanism is the correct way to do this, since entries in this lists are normally used to execute board-specific flash-chip-enable functions. **** ** ** Of course, an easier path would be to just set the chassis information to something like “Desktop”, but we are not building complete boards, just a COM (Computer-On-Module). Therefore, the module could be used in all different kinds of chassis, but the flash chip update mechanism would always work, since everything relevant is on the module. **** ** ** The attached patch has been built against flashrom trunk version 1486. **** I have also included two flashrom logs, just to prove that we can flawlessly read and write the bios flash chip on our module. **** ** ** Signed-off-by: Ingo Feldschmid <ifel(a)msc-ge.com>**** ** ** Best regards,**** Ingo**** ** ** Es gelten unsere Allgemeinen Leistungsbedingungen die unter http://www.msc-ge.com/alb abrufbar sind. Our standard terms and conditions apply which are available under http://www.msc-ge.com/alb. MSC Vertriebs GmbH Sitz der Gesellschaft: Industriestrasse 16, 76297 Stutensee Handelsregister: Mannheim, Germany, HRB No. 10 3631 Geschaftsfuhrung: Manfred Schwarztrauber, Lothar Kummerlin, Rudiger Kuhn, Silvano Geissler Umsatzsteuer ID Nr.: DE 143 585 507 WEEE Reg. Nr.: DE 31011852 Gleichmann & Co. Electronics GmbH Sitz der Gesellschaft: Schraderstrasse 44, 67227 Frankenthal Handelsregister: Ludwigshafen, Germany, HRB No. 21305 Geschaftsfuhrung: Manfred Schwarztrauber, Thomas Klein Umsatzsteuer ID Nr.: DE 148 421 329 WEEE Reg. Nr.: DE 72277043 ------------------------------ Diese E-Mail enthalt vertrauliche und/ oder rechtlich geschutzte Informationen. Wenn Sie nicht der beabsichtigte Empfanger sind, informieren Sie bitte sofort den Absender und loschen Sie diese E-Mail. The information contained in this message is confidential and/ or protected by law. If you are not the intended recipient, please contact the sender and delete this message.

1 0

[PATCH] TunnelCreek uses ICH7 SPI instead of poulsbo
by Markus Pietrek 27 Jan '12

27 Jan '12

While LPC/FHW is not supported on TunnelCreek, SPI is (see TunnelCreek's HW ref manual 2.13) The SPI controller is compatible to ICH7 Reading has been tested on Q7_TCTC using the command "flashrom -p internal:laptop=force_I_want_a_brick -r /tmp/test.bin" Writing has not been verified! --- chipset_enable.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 21990f6..dc97703 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1217,7 +1217,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo", enable_flash_poulsbo}, - {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_poulsbo}, + {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_ich7}, #endif {}, }; -- 1.7.4.1 Es gelten unsere Allgemeinen Leistungsbedingungen die unter http://www.msc-ge.com/alb abrufbar sind. Our standard terms and conditions apply which are available under http://www.msc-ge.com/alb . MSC Vertriebs GmbH Sitz der Gesellschaft: Industriestrasse 16, 76297 Stutensee Handelsregister: Mannheim, HRB Nr. 10 3631 Geschäftsführung: Manfred Schwarztrauber, Lothar Kümmerlin, Rüdiger Kuhn, Silvano Geissler Umsatzsteuer ID Nr.: DE 143 585 507 WEEE Reg. Nr. : DE 31011852 Gleichmann & Co. Electronics GmbH Sitz der Gesellschaft: Schraderstrasse 44, 67227 Frankenthal Handelsregister: Ludwigshafen, HRB Nr. 21305 Geschäftsführung: Manfred Schwarztrauber, Thomas Klein Umsatzsteuer ID Nr. : DE 148 421 329 WEEE Reg. Nr.: DE 72277043 Diese E-Mail enthält vertrauliche und/ oder rechtlich geschützte Informationen. Wenn Sie nicht der beabsichtigte Empfänger sind, informieren Sie bitte sofort den Absender und löschen Sie diese E-Mail. The information contained in this message is confidential and/ or protected by law. If you are not the intended recipient, please contact the sender and delete this message.

4 3

Intel D425KT write not working
by Marek Zakrzewski 27 Jan '12

27 Jan '12

Write is not working, module is 1024kB, ROM is 2048kB. flashrom flashrom v0.9.4-r1486 on Linux 2.6.38.2-xxxx-std-ipv6-64 (x86_64), built with libpci 3.1.7, GCC 4.1.2 20080704 (Red Hat 4.1.2-51), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... delay loop is unreliable, trying to continue OK. -s: No such file or directory dmidecode execution unsuccessful - continuing without DMI info Found chipset "Intel NM10". Enabling flash write... WARNING: Setting 0xdc from 0xa to 0xb on NM10 failed. New value is 0xa. WARNING: SPI Configuration Lockdown activated. PROBLEMS, continuing anyway Found Winbond flash chip "W25Q80" (1024 kB, SPI) at physical address 0xfff00000. No operations were specified. flashrom -Vw flashrom v0.9.4-r1486 on Linux 2.6.38.2-xxxx-std-ipv6-64 (x86_64), built with libpci 3.1.7, GCC 4.1.2 20080704 (Red Hat 4.1.2-51), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 372M loops per second, delay more than 10% too short (got 82% of expected delay), recalculating... 363M loops per second, delay more than 10% too short (got 80% of expected delay), recalculating... 373M loops per second, delay more than 10% too short (got 83% of expected delay), recalculating... 364M loops per second, delay more than 10% too short (got 82% of expected delay), recalculating... 359M loops per second, 10 myus = 8 us, 100 myus = 80 us, 1000 myus = 798 us, 10000 myus = 9481 us, 4 myus = 3 us, OK. Initializing internal programmer No coreboot table found. dmidecode execution unsuccessful - continuing without DMI info Found chipset "Intel NM10" with PCI ID 8086:27bc. Enabling flash write... 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x2 0x7fffffff/0x7fffffff FWH IDSEL: 0x2 0x7fffffff/0x7fffffff FWH IDSEL: 0x3 0x7fffffff/0x7fffffff FWH IDSEL: 0x3 0x7fffffff/0x7fffffff FWH IDSEL: 0x4 0x7fffffff/0x7fffffff FWH IDSEL: 0x5 0x7fffffff/0x7fffffff FWH IDSEL: 0x6 0x7fffffff/0x7fffffff FWH IDSEL: 0x7 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is 0xa WARNING: Setting 0xdc from 0xa to 0xb on NM10 failed. New value is 0xa. Root Complex Register Block address = 0xfed1c000 GCS = 0x200465: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3020 0x00: 0x8004 (SPIS) 0x02: 0x4130 (SPIC) 0x04: 0x00000000 (SPIA) 0x08: 0x00140000 (SPID0) 0x0c: 0x00000000 (SPID0+4) 0x10: 0x00000000 (SPID1) 0x14: 0x00000000 (SPID1+4) 0x18: 0xeb4150bf (SPID2) 0x1c: 0x0000001d (SPID2+4) 0x20: 0x00000000 (SPID3) 0x24: 0x00000000 (SPID3+4) 0x28: 0xffff0434 (SPID4) 0x2c: 0xffffff50 (SPID4+4) 0x30: 0x00000000 (SPID5) 0x34: 0x00000000 (SPID5+4) 0x38: 0x8be9090f (SPID6) 0x3c: 0x000000f8 (SPID6+4) 0x40: 0x00000000 (SPID7) 0x44: 0xffff0000 (SPID7+4) 0x50: 0x00000000 (BBAR) 0x54: 0x0006 (PREOP) 0x56: 0x103b (OPTYPE) 0x58: 0x05200302 (OPMENU) 0x5c: 0x0001009f (OPMENU+4) 0x60: 0x00000000 (PBR0) 0x64: 0x00000000 (PBR1) 0x68: 0x00000000 (PBR2) WARNING: SPI Configuration Lockdown activated. Reading OPCODES... done SPI Read Configuration: prefetching enabled, caching enabled, PROBLEMS, continuing anyway The following protocols are supported: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25LF040A, 512 kB: Invalid OPCODE 0xab, will not execute. Probing for SST SST25LF080A, 1024 kB: Invalid OPCODE 0xab, will not execute. Probing for SST SST25VF010, 128 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Chip status register is 00 Found Winbond flash chip "W25Q80" (1024 kB, SPI) at physical address 0xfff00000. Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, will not execute. Found Winbond flash chip "W25Q80" (1024 kB, SPI). Restoring MMIO space at 0x7fb1c2a0a070 Restoring PCI config space for 00:1f:0 reg 0xdc Found chipset "Intel NM10". Enabling flash write... WARNING: Setting 0xdc from 0xa to 0xb on NM10 failed. New value is 0xa. WARNING: SPI Configuration Lockdown activated. PROBLEMS, continuing anyway Found Winbond flash chip "W25Q80" (1024 kB, SPI) at physical address 0xfff00000. Error: Image size doesn't match

2 4

Support MB Gigabyte GA-EP31-DS3L
by Vít Škaban 26 Jan '12

26 Jan '12

Chips: W28X80 and SST25VF080B Vendor: Gigabyte Mainboard: GA-EP31-DS3L Required option: none Status: OK Thank you for this program. It was very helful for me in reparing laptop BIOS via this mainboard. Vit Skraban Czech Republic EU

2 3

ASUS M4N78 PRO -- flashrom -V
by Pavel Stehlík 23 Jan '12

23 Jan '12

Bios written and read sueccessfully. (On Xubuntu 11.10 Oneiric) Thanks for your work on this utility, Pavel Stehlik. P.S. : Possibility to rewrite Macronix_MX25L8005 status register (user value, 00->FF or something like that) would be welcome. I wont to write-protect my BIOS and besides connecting pin 3(!WP) to gnd, setting of some bits of SR is neccessary.

2 1

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