[PATCH] TunnelCreek uses ICH7 SPI instead of poulsbo

[Markus Pietrek]

While LPC/FHW is not supported on TunnelCreek, SPI is (see TunnelCreek's 
HW ref manual 2.13)
The SPI controller is compatible to ICH7

Reading has been tested on Q7_TCTC using the command "flashrom -p 
internal:laptop=force_I_want_a_brick -r /tmp/test.bin"
Writing has not been verified!

---
  chipset_enable.c |    2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/chipset_enable.c b/chipset_enable.c
index 21990f6..dc97703 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1217,7 +1217,7 @@ const struct penable chipset_enables[] = {
      {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M",    enable_flash_piix4},
      {0x8086, 0x7198, OK, "Intel", "440MX",        enable_flash_piix4},
      {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo",    enable_flash_poulsbo},
-    {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", 
enable_flash_poulsbo},
+    {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", 
enable_flash_ich7},
  #endif
      {},
  };

[Paul Menzel]

Dear Markus,

thank you for the patch.

Am Freitag, den 27.01.2012, 10:14 +0100 schrieb Markus Pietrek:
> While LPC/FHW is not supported on TunnelCreek, SPI is (see TunnelCreek's 
> HW ref manual 2.13)
> The SPI controller is compatible to ICH7
>
> Reading has been tested on Q7_TCTC using the command "flashrom -p 
> internal:laptop=force_I_want_a_brick -r /tmp/test.bin"
> Writing has not been verified!

Before the patch can be submitted could you please send the output of
the command above (with `-V` added) to the list, put the URL to the
archive entry to the commit message and add your Signed-off-by line [1]?
That would be awesome.

Since you have tested it, please add

Acked-by: Paul Menzel

to the commit message, although I am puzzled why this entry has been
added in the first place.

And last but not least, your MUA Thunderbird mangled the patch by adding
automatic line breaks. So please turn those of when resending the patch.
> chipset_enable.c |    2 +-
>   1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/chipset_enable.c b/chipset_enable.c
> index 21990f6..dc97703 100644
> --- a/chipset_enable.c
> +++ b/chipset_enable.c
> @@ -1217,7 +1217,7 @@ const struct penable chipset_enables[] = {
>       {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M",    enable_flash_piix4},
>       {0x8086, 0x7198, OK, "Intel", "440MX",        enable_flash_piix4},
>       {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo",    enable_flash_poulsbo},
> {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_poulsbo},
> {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_ich7},
> #endif
>  {},
> };

Thanks,

Paul

[1] http://flashrom.org/Development_Guidelines

[Stefan Tauner]

On Fri, 27 Jan 2012 10:14:21 +0100
"Markus Pietrek"  wrote:
> While LPC/FHW is not supported on TunnelCreek, SPI is (see TunnelCreek's 
> HW ref manual 2.13)
> The SPI controller is compatible to ICH7
>
> Reading has been tested on Q7_TCTC using the command "flashrom -p 
> internal:laptop=force_I_want_a_brick -r /tmp/test.bin"
> Writing has not been verified!

i beg to differ about tunnelcreek's lpc capabilities:
"The Intel® AtomTM Processor E6xx Series implements an LPC interface as
described in the LPC1.1 Specification."
(from Intel® AtomTM Processor E6xx Series Datasheet (324208-003US),
1.3.8)

more interestingly is that there was already code added to flashrom to
support tunnelcreek. and most interestingly this was done
by one of your colleagues ;) i have CCed ingo this email.
please see commit r1430 and
http://www.flashrom.org/pipermail/flashrom/2011-September/007823.html

i have not checked the datasheet and/or the code of r1430 yet. it
certainly can be simplified/unified with the other init functions and i
have it on my todo list (at the end of it though).

[Feldschmid, Ingo]

Yeah, scattered development centers :-)

We already had an internal discussion, and would like to keep my (older) submitted fix, since the Tunnel Creek and the ICH7 have different bit mapping for the flash boot configuration.

Best regards,
Ingo

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-----Ursprüngliche Nachricht-----
Von: Stefan Tauner [mailto:[e-mail]] 
Gesendet: Freitag, 27. Januar 2012 14:02
An: Pietrek, Markus
Cc: [e-mail]; Feldschmid, Ingo
Betreff: Re: [flashrom] [PATCH] TunnelCreek uses ICH7 SPI instead of poulsbo

On Fri, 27 Jan 2012 10:14:21 +0100
"Markus Pietrek"  wrote:
> While LPC/FHW is not supported on TunnelCreek, SPI is (see 
> TunnelCreek's HW ref manual 2.13) The SPI controller is compatible to 
> ICH7
>
> Reading has been tested on Q7_TCTC using the command "flashrom -p 
> internal:laptop=force_I_want_a_brick -r /tmp/test.bin"
> Writing has not been verified!

i beg to differ about tunnelcreek's lpc capabilities:
"The Intel® AtomTM Processor E6xx Series implements an LPC interface as described in the LPC1.1 Specification."
(from Intel® AtomTM Processor E6xx Series Datasheet (324208-003US),
1.3.8)

more interestingly is that there was already code added to flashrom to support tunnelcreek. and most interestingly this was done by one of your colleagues ;) i have CCed ingo this email.
please see commit r1430 and
http://www.flashrom.org/pipermail/flashrom/2011-September/007823.html

i have not checked the datasheet and/or the code of r1430 yet. it certainly can be simplified/unified with the other init functions and i have it on my todo list (at the end of it though).
--
Kind regards/Mit freundlichen Grüßen, Stefan Tauner