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Re: [flashrom] [PATCH] ARM support
by Carl-Daniel Hailfinger 12 Feb '12

12 Feb '12

Am 13.02.2012 01:18 schrieb David Hendricks: > It's a step in the right direction, and compiles for (and runs) on my > Tegra2 test platform, so: > > Acked-by: David Hendricks <dhendrix(a)google.com> The other tests done by lindi- were reported on IRC in #debian-arm. >>> David: This is mostly your code (I only extracted it from the chromium >>> branch of flashrom), could you sign off on it? > All code in this patch ported from chromium.org is: > Signed-off-by: David Hendricks <dhendrix(a)google.com> The other tests done by lindi- were reported on IRC in #debian-arm. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> A small (almost trivial) addition to the chromium patch in hwaccess.h was done by me, for which I state Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Committed in r1492. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[commit] r1492 - trunk
by repository service 12 Feb '12

12 Feb '12

Author: hailfinger Date: Mon Feb 13 01:35:35 2012 New Revision: 1492 URL: http://flashrom.org/trac/flashrom/changeset/1492 Log: Support compilation for the ARM architecture (little-endian only). Note: The internal programmer will abort during processor check. This is intentional. The other hardware drivers (except those using port I/O) should work. Signed-off-by: David Hendricks <dhendrix(a)google.com> Acked-by: David Hendricks <dhendrix(a)google.com> Tested-by: Timo Juhani Lindfors <timo.lindfors(a)iki.fi> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile trunk/arch.h trunk/hwaccess.c trunk/hwaccess.h trunk/programmer.h Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sun Feb 12 01:13:14 2012 (r1491) +++ trunk/Makefile Mon Feb 13 01:35:35 2012 (r1492) @@ -215,8 +215,9 @@ # below uses CC itself. override ARCH := $(strip $(shell LC_ALL=C $(CC) $(CPPFLAGS) -E arch.h 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"')) -ifeq ($(ARCH), ppc) -# There's no PCI port I/O support on PPC/PowerPC, yet. +# PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. +# Right now this means the drivers below only work on x86. +ifneq ($(ARCH), x86) ifeq ($(CONFIG_NIC3COM), yes) UNSUPPORTED_FEATURES += CONFIG_NIC3COM=yes else Modified: trunk/arch.h ============================================================================== --- trunk/arch.h Sun Feb 12 01:13:14 2012 (r1491) +++ trunk/arch.h Mon Feb 13 01:35:35 2012 (r1492) @@ -27,5 +27,7 @@ #define __FLASHROM_ARCH__ "mips" #elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) #define __FLASHROM_ARCH__ "ppc" +#elif defined(__arm__) +#define __FLASHROM_ARCH__ "arm" #endif __FLASHROM_ARCH__ Modified: trunk/hwaccess.c ============================================================================== --- trunk/hwaccess.c Sun Feb 12 01:13:14 2012 (r1491) +++ trunk/hwaccess.c Mon Feb 13 01:35:35 2012 (r1492) @@ -116,6 +116,20 @@ { } +#elif defined (__arm__) + +static inline void sync_primitive(void) +{ +} + +void get_io_perms(void) +{ +} + +void release_io_perms(void) +{ +} + #else #error Unknown architecture Modified: trunk/hwaccess.h ============================================================================== --- trunk/hwaccess.h Sun Feb 12 01:13:14 2012 (r1491) +++ trunk/hwaccess.h Mon Feb 13 01:35:35 2012 (r1492) @@ -68,6 +68,13 @@ #error Little-endian PowerPC #defines are unknown #endif +#elif defined (__arm__) +#if defined (__ARMEL__) +#define __FLASHROM_LITTLE_ENDIAN__ 1 +#else +#error Big-endian ARM #defines are unknown +#endif + #endif #if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__) @@ -326,6 +333,10 @@ /* PCI port I/O is not yet implemented on MIPS. */ +#elif defined(__arm__) + +/* Non memory mapped I/O is not supported on ARM. */ + #else #error Unknown architecture, please check if it supports PCI port IO. Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sun Feb 12 01:13:14 2012 (r1491) +++ trunk/programmer.h Mon Feb 13 01:35:35 2012 (r1492) @@ -527,6 +527,7 @@ int register_spi_programmer(const struct spi_programmer *programmer); /* ichspi.c */ +#if CONFIG_INTERNAL == 1 enum ich_chipset { CHIPSET_ICH_UNKNOWN, CHIPSET_ICH7 = 7, @@ -538,7 +539,6 @@ CHIPSET_7_SERIES_PANTHER_POINT }; -#if CONFIG_INTERNAL == 1 extern uint32_t ichspi_bbar; int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, enum ich_chipset ich_generation);

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[PATCH] ARM support
by Carl-Daniel Hailfinger 12 Feb '12

12 Feb '12

Add the ability to compile for the ARM architecture. Note: The internal programmer will abort during processor check. This is intentional. The other hardware drivers (except those using port I/O) should work, though. My hope is to get this in before 0.9.5 so we can get a release with at least some ARM support. Compile and run tests appreciated. If you're afraid, you can just run dummy. That would at least prove that flashrom compiles and works somehow. David: This is mostly your code (I only extracted it from the chromium branch of flashrom), could you sign off on it? Regards, Carl-Daniel Index: flashrom-arm/hwaccess.c =================================================================== --- flashrom-arm/hwaccess.c (Revision 1491) +++ flashrom-arm/hwaccess.c (Arbeitskopie) @@ -116,6 +116,20 @@ { } +#elif defined (__arm__) + +static inline void sync_primitive(void) +{ +} + +void get_io_perms(void) +{ +} + +void release_io_perms(void) +{ +} + #else #error Unknown architecture Index: flashrom-arm/hwaccess.h =================================================================== --- flashrom-arm/hwaccess.h (Revision 1491) +++ flashrom-arm/hwaccess.h (Arbeitskopie) @@ -68,8 +68,15 @@ #error Little-endian PowerPC #defines are unknown #endif +#elif defined (__arm__) +#if defined (__ARMEL__) +#define __FLASHROM_LITTLE_ENDIAN__ 1 +#else +#error Big-endian ARM #defines are unknown #endif +#endif + #if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__) /* Nonstandard libc-specific macros for determining endianness. */ #if defined(__GLIBC__) @@ -326,6 +333,10 @@ /* PCI port I/O is not yet implemented on MIPS. */ +#elif defined(__arm__) + +/* Non memory mapped I/O is not supported on ARM. */ + #else #error Unknown architecture, please check if it supports PCI port IO. Index: flashrom-arm/Makefile =================================================================== --- flashrom-arm/Makefile (Revision 1491) +++ flashrom-arm/Makefile (Arbeitskopie) @@ -215,8 +215,9 @@ # below uses CC itself. override ARCH := $(strip $(shell LC_ALL=C $(CC) $(CPPFLAGS) -E arch.h 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"')) -ifeq ($(ARCH), ppc) -# There's no PCI port I/O support on PPC/PowerPC, yet. +# PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. +# Right now this means the drivers below only work on x86. +ifneq ($(ARCH), x86) ifeq ($(CONFIG_NIC3COM), yes) UNSUPPORTED_FEATURES += CONFIG_NIC3COM=yes else Index: flashrom-arm/arch.h =================================================================== --- flashrom-arm/arch.h (Revision 1491) +++ flashrom-arm/arch.h (Arbeitskopie) @@ -27,5 +27,7 @@ #define __FLASHROM_ARCH__ "mips" #elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) #define __FLASHROM_ARCH__ "ppc" +#elif defined(__arm__) +#define __FLASHROM_ARCH__ "arm" #endif __FLASHROM_ARCH__ Index: flashrom-arm/programmer.h =================================================================== --- flashrom-arm/programmer.h (Revision 1491) +++ flashrom-arm/programmer.h (Arbeitskopie) @@ -527,6 +527,7 @@ int register_spi_programmer(const struct spi_programmer *programmer); /* ichspi.c */ +#if CONFIG_INTERNAL == 1 enum ich_chipset { CHIPSET_ICH_UNKNOWN, CHIPSET_ICH7 = 7, @@ -538,7 +539,6 @@ CHIPSET_7_SERIES_PANTHER_POINT }; -#if CONFIG_INTERNAL == 1 extern uint32_t ichspi_bbar; int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, enum ich_chipset ich_generation); -- http://www.hailfinger.org/

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[PATCH] Add a bunch of new/tested stuff and various small changes 10
by Stefan Tauner 12 Feb '12

12 Feb '12

Tested mainboards: OK: - ABIT A-S78H http://www.flashrom.org/pipermail/flashrom/2012-January/008603.html - ASRock AM2NF6G-VSTA http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html - ASUS M2A-VM (HDMI variant) http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html - ASUS M4N78 PRO http://www.flashrom.org/pipermail/flashrom/2012-January/008598.html - ASUS P5N7A-VM http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html - ASUS P5KPL-CM http://www.flashrom.org/pipermail/flashrom/2012-January/008522.html - ASUS P5QPL-AM http://www.flashrom.org/pipermail/flashrom/2012-January/008557.html - ECS GF7100PVT-M3 http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html - ECS K7SEM http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html - ECS P4M800PRO-M V2.0 http://www.flashrom.org/pipermail/flashrom/2012-January/008478.html - Gigabyte GA-EP31-DS3L http://www.flashrom.org/pipermail/flashrom/2012-January/008601.html - Gigabyte GA-X58A-UDR3 http://www.flashrom.org/pipermail/flashrom/2012-January/008572.html - Gigabyte GA-Z68XP-UD3 http://paste.flashrom.org/view.php?id=1058 - HP ProLiant N40L http://www.flashrom.org/pipermail/flashrom/2012-February/008650.html - MSI MS-7309 (K9N6PGM2-V2) http://www.flashrom.org/pipermail/flashrom/2011-December/008441.html - MSI MS-7548 (Aspen-GL8E used in HP Pavilion a6750f) http://www.flashrom.org/pipermail/flashrom/2012-February/008666.html - MSI MS-7676 (H67MA-ED55(B3)) http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html - PC Engines Alix.6f2 Reported by Philip Prindeville on IRC - Shuttle AV18E2 http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html - Supermicro X8DTE-F http://www.flashrom.org/pipermail/flashrom/2011-November/008304.html - Supermicro X8DTT-HIBQF http://www.flashrom.org/pipermail/flashrom/2012-January/008520.html NOT OK: - ASUS P8H61-M LE/USB3 http://www.flashrom.org/pipermail/flashrom/2012-January/008491.html - ASUS P8H67-M PRO http://www.flashrom.org/pipermail/flashrom/2011-December/008321.html - ASUS P8Z68-V PRO http://www.flashrom.org/pipermail/flashrom/2012-January/008469.html - Intel D425KT http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html - Supermicro X9SCA-F http://www.flashrom.org/pipermail/flashrom/2011-December/008313.html Tested flash chips: - mark AT29C512 as TEST_OK_PREW http://paste.flashrom.org/view.php?id=977 - mark M25P40 as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2011-December/008351.html - mark M25PE80 as TEST_OK_PREW http://paste.flashrom.org/view.php?id=1061 - mark MX25L6405 as TEST_OK_PREW tested myself with an MX25L6436E variant on serprog - mark W39V080A as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html Tested chipsets: - SiS 730 (:0730) http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html - NVIDIA MCP61 (:03e0) http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html - NVIDIA MCP73 (:07d7) http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html - NVIDIA MCP79 (:0aac) http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html - VIA VT82C69x (0691) and VT82C686A/B (:0686) http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html - AMD's SB950 (and presumably also SB920) have the same PCI ID as previous generations, hence change the chipset enable device string. Thanks to Christian Ruppert for the suggestion. - Fix the board enable of the abit NF-M2 nView which had the IDs of its onboard graphics card in its pattern. Change this to the LPC controller. - Intel X79 SPI registers are identical to 6 Series', so use the chipsetenable wrapper of it (enable_flash_pch6). - Fix two paranoid checks for address < 0 in ichspi.c which became futile (and generate clang warnings) with the unsignify patch committed in r1470. - Rename AT25DF641 to AT25DF641(A). They are almost idencical, but could be distinguished by an extended RDID probe (Atmel's patented EDI procedure), which we do not support yet, hence handle them as one model for now. - Remove trac reference from man page - Source format fixes and typos the addition of the ASRock AM2NF6G-VSTA to print.c is Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> everything else is Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- board_enable.c | 4 ++-- chipset_enable.c | 18 +++++++++--------- dediprog.c | 2 +- flashchips.c | 14 +++++++------- flashchips.h | 2 +- flashrom.8 | 8 +++----- ichspi.c | 4 ++-- print.c | 32 ++++++++++++++++++++++++++++---- 8 files changed, 53 insertions(+), 31 deletions(-) diff --git a/board_enable.c b/board_enable.c index 1c5024f..d4f14bb 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1562,7 +1562,7 @@ static int intel_ich_gpio34_raise(void) /* * Suited for: * - AOpen i945GMx-VFX: Intel 945GM + ICH7-M used in ... - * - FCS ESPRIMO Q5010 (SMBIOS: D2544-B1) + * - FSC ESPRIMO Q5010 (SMBIOS: D2544-B1) */ static int intel_ich_gpio38_raise(void) { @@ -2114,7 +2114,7 @@ const struct board_match board_matches[] = { {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, P3, "abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, P3, "abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, {0x10de, 0x01e0, 0x147b, 0x1c00, 0x10de, 0x0060, 0x147B, 0x1c00, NULL, NULL, NULL, P3, "abit", "NF7-S", 0, OK, nvidia_mcp_gpio8_raise}, - {0x10de, 0x02f0, 0x147b, 0x1c26, 0x10de, 0x0240, 0x10de, 0x0222, NULL, NULL, NULL, P3, "abit", "NF-M2 nView", 0, OK, nvidia_mcp_gpio4_lower}, + {0x10de, 0x02f0, 0x147b, 0x1c26, 0x10de, 0x0260, 0x147b, 0x1c26, NULL, NULL, NULL, P3, "abit", "NF-M2 nView", 0, OK, nvidia_mcp_gpio4_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, "(VA6)$", NULL, NULL, P3, "abit", "VA6", 0, OK, via_apollo_gpo4_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", P3, "abit", "VT6X4", 0, OK, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, P3, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, diff --git a/chipset_enable.c b/chipset_enable.c index 33b32ef..0aba1e0 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1155,7 +1155,7 @@ const struct penable chipset_enables[] = { #if defined(__i386__) || defined(__x86_64__) {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, {0x1002, 0x438d, OK, "AMD", "SB600", enable_flash_sb600}, - {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600}, + {0x1002, 0x439d, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_sb600}, {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, @@ -1178,7 +1178,7 @@ const struct penable chipset_enables[] = { {0x1039, 0x0651, OK, "SiS", "651", enable_flash_sis540}, {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, {0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540}, - {0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis540}, + {0x1039, 0x0730, OK, "SiS", "730", enable_flash_sis540}, {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, @@ -1222,7 +1222,7 @@ const struct penable chipset_enables[] = { {0x10de, 0x0365, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ - {0x10de, 0x03e0, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, + {0x10de, 0x03e0, OK, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, {0x10de, 0x03e1, OK, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, {0x10de, 0x03e2, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, {0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x}, @@ -1233,8 +1233,8 @@ const struct penable chipset_enables[] = { {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp6x_7x}, {0x10de, 0x075c, NT, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, {0x10de, 0x075d, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, - {0x10de, 0x07d7, NT, "NVIDIA", "MCP73", enable_flash_mcp6x_7x}, - {0x10de, 0x0aac, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, + {0x10de, 0x07d7, OK, "NVIDIA", "MCP73", enable_flash_mcp6x_7x}, + {0x10de, 0x0aac, OK, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, @@ -1243,12 +1243,12 @@ const struct penable chipset_enables[] = { {0x1106, 0x0595, NT, "VIA", "VT82C595", via_no_byte_merge}, {0x1106, 0x0597, NT, "VIA", "VT82C597", via_no_byte_merge}, {0x1106, 0x0601, NT, "VIA", "VT8601/VT8601A", via_no_byte_merge}, - {0x1106, 0x0691, NT, "VIA", "VT82C69x", via_no_byte_merge}, /* 691, 693a, 694t, 694x checked */ + {0x1106, 0x0691, OK, "VIA", "VT82C69x", via_no_byte_merge}, {0x1106, 0x8601, NT, "VIA", "VT8601T", via_no_byte_merge}, /* VIA southbridges */ {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, - {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, + {0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_amd8111}, {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x}, {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, @@ -1279,8 +1279,8 @@ const struct penable chipset_enables[] = { {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_pch6}, {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_pch6}, {0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_pch6}, - {0x8086, 0x1d40, OK, "Intel", "X79", enable_flash_ich10}, /* FIXME: when datasheet is available */ - {0x8086, 0x1d41, NT, "Intel", "X79", enable_flash_ich10}, /* FIXME: when datasheet is available */ + {0x8086, 0x1d40, OK, "Intel", "X79", enable_flash_pch6}, + {0x8086, 0x1d41, NT, "Intel", "X79", enable_flash_pch6}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, diff --git a/dediprog.c b/dediprog.c index f5d08ff..a730e4b 100644 --- a/dediprog.c +++ b/dediprog.c @@ -299,7 +299,7 @@ static int dediprog_spi_read(struct flashctx *flash, uint8_t *buf, return 0; } -/* Bulk write interface, will read multiple page_size byte chunks aligned to page_size bytes. +/* Bulk write interface, will write multiple page_size byte chunks aligned to page_size bytes. * @start start address * @len length * @return 0 on success, 1 on failure diff --git a/flashchips.c b/flashchips.c index ca1c57f..6f5b6f4 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1575,7 +1575,7 @@ const struct flashchip flashchips[] = { { .vendor = "Atmel", - .name = "AT25DF641", + .name = "AT25DF641(A)", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT25DF641, @@ -1961,7 +1961,7 @@ const struct flashchip flashchips[] = { .total_size = 64, .page_size = 128, .feature_bits = FEATURE_LONG_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 10000, /* 10mS, Enter=Exec */ .block_erasers = @@ -4421,7 +4421,7 @@ const struct flashchip flashchips[] = { .total_size = 8192, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_OK_PROBE, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -4951,7 +4951,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25PE80, .total_size = 1024, .page_size = 256, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -6904,7 +6904,7 @@ const struct flashchip flashchips[] = { .model_id = ST_M25P40, .total_size = 512, .page_size = 256, - .tested = TEST_OK_PR, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -8677,9 +8677,9 @@ const struct flashchip flashchips[] = { .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_jedec, - .probe_timing = 10, + .probe_timing = 10, .block_erasers = { { diff --git a/flashchips.h b/flashchips.h index 03efb86..8587ce9 100644 --- a/flashchips.h +++ b/flashchips.h @@ -364,7 +364,7 @@ #define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005 */ #define MACRONIX_MX25L1605 0x2015 /* MX25L1605{,A,D} */ #define MACRONIX_MX25L3205 0x2016 /* MX25L3205{,A} */ -#define MACRONIX_MX25L6405 0x2017 /* MX25L3205{,D} */ +#define MACRONIX_MX25L6405 0x2017 /* MX25L6405{,D}, MX25L6406E, MX25L6436E */ #define MACRONIX_MX25L12805 0x2018 /* MX25L12805 */ #define MACRONIX_MX25L1635D 0x2415 #define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */ diff --git a/flashrom.8 b/flashrom.8 index 2f23cb8..9ffd788 100644 --- a/flashrom.8 +++ b/flashrom.8 @@ -650,17 +650,15 @@ in .B "/etc/rc.securelevel" and rebooting, or rebooting into single user mode. .SH BUGS -Please report any bugs at -.sp -.B " http://www.flashrom.org/trac/flashrom/newticket" -.sp -or on the flashrom mailing list at +Please report any bugs to the flashrom mailing list at .B "<flashrom(a)flashrom.org>" .sp We recommend to subscribe first at .sp .B " http://www.flashrom.org/mailman/listinfo/flashrom" .sp +Laptops +.RS Using flashrom on laptops is dangerous and may easily make your hardware unusable unless you can desolder the flash chip and have a full flash chip backup. This is caused by the embedded controller (EC) present in many laptops, diff --git a/ichspi.c b/ichspi.c index 163ecf1..66b05a0 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1286,7 +1286,7 @@ static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf, uint16_t timeout = 100 * 60; uint8_t block_len; - if (addr < 0 || addr + len > flash->total_size * 1024) { + if (addr + len > flash->total_size * 1024) { msg_perr("Request to read from an inaccessible memory address " "(addr=0x%x, len=%d).\n", addr, len); return -1; @@ -1324,7 +1324,7 @@ static int ich_hwseq_write(struct flashctx *flash, uint8_t *buf, uint16_t timeout = 100 * 60; uint8_t block_len; - if (addr < 0 || addr + len > flash->total_size * 1024) { + if (addr + len > flash->total_size * 1024) { msg_perr("Request to write to an inaccessible memory address " "(addr=0x%x, len=%d).\n", addr, len); return -1; diff --git a/print.c b/print.c index b4900c3..2dece32 100644 --- a/print.c +++ b/print.c @@ -541,6 +541,7 @@ void print_supported(void) const struct board_info boards_known[] = { #if defined(__i386__) || defined(__x86_64__) B("A-Trend", "ATC-6220", 1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL), + B("abit", "A-S78H", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA…", NULL), B("abit", "AN-M2", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=…", NULL), B("abit", "AV8", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=…", NULL), B("abit", "AX8", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=…", NULL), @@ -560,7 +561,7 @@ const struct board_info boards_known[] = { B("Advantech", "PCM-5820", 1, "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL), B("agami", "Aruma", 1, "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-600…", NULL), B("Albatron", "PM266A Pro", 1, "http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview…", NULL), /* FIXME */ - B("AOpen", "i945GMx-VFX", 1, NULL, "This is (also?) an OEM board from FCS (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."), + B("AOpen", "i945GMx-VFX", 1, NULL, "This is (also?) an OEM board from FSC (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."), B("AOpen", "vKM400Am-S", 1, "http://usa.aopen.com/products_detail.aspx?Auno=824", NULL), B("Artec Group","DBE61", 1, "http://wiki.thincan.org/DBE61", NULL), B("Artec Group","DBE62", 1, "http://wiki.thincan.org/DBE62", NULL), @@ -571,6 +572,7 @@ const struct board_info boards_known[] = { B("ASRock", "A330GC", 1, "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL), B("ASRock", "A770CrossFire", 1, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL), B("ASRock", "ALiveNF6G-DVI", 1, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL), + B("ASRock", "AM2NF6G-VSTA", 1, "http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL), B("ASRock", "ConRoeXFire-eSATA2", 1, "http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL), B("ASRock", "K7S41", 1, "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL), B("ASRock", "K7S41GX", 1, "http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL), @@ -610,7 +612,7 @@ const struct board_info boards_known[] = { B("ASUS", "K8V-X", 1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL), B("ASUS", "K8V-X SE", 1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL), B("ASUS", "M2A-MX", 1, "http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL), - B("ASUS", "M2A-VM", 1, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", "See http://www.coreboot.org/pipermail/coreboot/2007-September/025281.html"), + B("ASUS", "M2A-VM (HDMI)", 1, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL), B("ASUS", "M2N32-SLI Deluxe", 1, "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL), B("ASUS", "M2N-E", 1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"), B("ASUS", "M2N-E SLI", 1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL), @@ -624,12 +626,13 @@ const struct board_info boards_known[] = { B("ASUS", "M3A78-EM", 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL), B("ASUS", "M3N78-VM", 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL), B("ASUS", "M4A78-EM", 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL), - B("ASUS", "M4A785TD-V EVO", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL), B("ASUS", "M4A785TD-M EVO", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL), + B("ASUS", "M4A785TD-V EVO", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL), B("ASUS", "M4A78LT-M LE", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL), B("ASUS", "M4A79T Deluxe", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL), B("ASUS", "M4A87TD/USB3", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL), B("ASUS", "M4A89GTD PRO", 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL), + B("ASUS", "M4N78 PRO", 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL), B("ASUS", "M5A99X EVO", 1, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL), B("ASUS", "MEW-AM", 0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), B("ASUS", "MEW-VM", 0, "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), @@ -667,6 +670,7 @@ const struct board_info boards_known[] = { B("ASUS", "P5GD2/C variants", 0, NULL, "Untested board enable."), B("ASUS", "P5K-VM", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL), B("ASUS", "P5KC", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL), + B("ASUS", "P5KPL-CM", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL), B("ASUS", "P5L-MX", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL), B("ASUS", "P5L-VM 1394", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL), B("ASUS", "P5LD2", 0, NULL, "Untested board enable."), @@ -677,8 +681,10 @@ const struct board_info boards_known[] = { B("ASUS", "P5N-D", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL), B("ASUS", "P5N-E SLI", 0, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."), B("ASUS", "P5N32-E SLI", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL), + B("ASUS", "P5N7A-VM", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL), B("ASUS", "P5ND2-SLI Deluxe", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL), B("ASUS", "P5PE-VM", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL), + B("ASUS", "P5QPL-AM", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL), B("ASUS", "P5VD1-X", 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL), B("ASUS", "P6T SE", 1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL), B("ASUS", "P6T Deluxe", 1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL), @@ -688,7 +694,10 @@ const struct board_info boards_known[] = { B("ASUS", "P8B-E/4L", 0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8B WS", 0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8H61 PRO", 0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), + B("ASUS", "P8H61-M LE/USB3", 0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), + B("ASUS", "P8H67-M PRO", 0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8P67 (rev. 3.1)", 0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), + B("ASUS", "P8Z68-V PRO", 0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "Z8NA-D6C", 1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL), B("ASUS", "Z8PE-D12", 1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL), B("BCOM", "WinNET100", 1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."), @@ -705,10 +714,12 @@ const struct board_info boards_known[] = { B("DFI", "855GME-MGF", 0, "http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?…", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"), B("DFI", "Blood-Iron P35 T2RL", 1, "http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWin…", NULL), B("Elitegroup", "GeForce6100SM-M ", 1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&M…", NULL), + B("Elitegroup", "GF7100PVT-M3 (V1.0)", 1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&C…", NULL), B("Elitegroup", "K7S5A", 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&…", NULL), B("Elitegroup", "K7S6A", 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&C…", NULL), + B("Elitegroup", "K7SEM (V1.0A)", 1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&C…", NULL), B("Elitegroup", "K7VTA3", 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&…", NULL), - B("Elitegroup", "P4M800PRO-M (V1.0A)", 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?Category…", NULL), + B("Elitegroup", "P4M800PRO-M (V1.0A, V2.0)", 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?Category…", NULL), B("Elitegroup", "P4VXMS (V1.0A)", 1, NULL, NULL), B("Elitegroup", "P6IWP-Fe", 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?Category…", NULL), B("Elitegroup", "P6VAP-A+", 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&…", NULL), @@ -746,6 +757,7 @@ const struct board_info boards_known[] = { B("GIGABYTE", "GA-945PL-S3P (rev. 6.6)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL), B("GIGABYTE", "GA-965GM-S2 (rev. 2.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL), B("GIGABYTE", "GA-965P-DS4", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL), + B("GIGABYTE", "GA-EP31-DS3L (rev. 2.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL), B("GIGABYTE", "GA-EP35-DS3L", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL), B("GIGABYTE", "GA-EX58-UD4P", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL), B("GIGABYTE", "GA-K8N-SLI", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL), @@ -769,10 +781,13 @@ const struct board_info boards_known[] = { B("GIGABYTE", "GA-P55A-UD4 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL), B("GIGABYTE", "GA-P67A-UD3P", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL), B("GIGABYTE", "GA-X58A-UD7 (rev. 2.0)", 1, NULL, NULL), + B("GIGABYTE", "GA-X58A-UDR3 (rev. 2.0)", 1, NULL, NULL), B("GIGABYTE", "GA-Z68MX-UD2H-B (rev. 1.3)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL), + B("GIGABYTE", "GA-Z68XP-UD3 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL), B("HP", "e-Vectra P2706T", 1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&pro…", NULL), B("HP", "ProLiant DL145 G3", 1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c008…", NULL), B("HP", "ProLiant DL165 G6", 1, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-33…", NULL), + B("HP", "ProLiant N40L", 1, NULL, NULL), B("HP", "Puffer2-UL8E", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023", NULL), B("HP", "Vectra VL400", 1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c000…", NULL), B("HP", "Vectra VL420 SFF", 1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c000…", NULL), @@ -782,6 +797,7 @@ const struct board_info boards_known[] = { B("IBM", "x3455", 1, "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL), B("IEI", "PICOe-9452", 1, "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&…", NULL), B("Intel", "D201GLY", 1, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL), + B("Intel", "D425KT", 0, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/de…", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"), B("Intel", "D865GLC", 0, NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"), B("Intel", "DG45ID", 0, "http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.h…", "Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), B("Intel", "DH67CF", 0, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"), @@ -825,6 +841,7 @@ const struct board_info boards_known[] = { B("MSI", "MS-7253 (K9VGM-V)", 1, "http://www.msi.com/product/mb/K9VGM-V.html", NULL), B("MSI", "MS-7255 (P4M890M)", 1, "http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL), B("MSI", "MS-7260 (K9N Neo PCB 1.0)", 0, "http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>."), + B("MSI", "MS-7309 (K9N6PGM2-V2)", 1, "http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL), B("MSI", "MS-7312 (K9MM-V)", 1, "http://www.msi.com/product/mb/K9MM-V.html", NULL), B("MSI", "MS-7345 (P35 Neo2-FIR)", 1, "http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL), B("MSI", "MS-7368 (K9AG Neo2-Digital)", 1, "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL), @@ -832,12 +849,14 @@ const struct board_info boards_known[] = { B("MSI", "MS-7376 (K9A2 Platinum V1)", 1, "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL), B("MSI", "MS-7529 (G31M3-L(S) V2)", 1, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL), B("MSI", "MS-7529 (G31TM-P21)", 1, "http://www.msi.com/product/mb/G31TM-P21.html", NULL), + B("MSI", "MS-7548 (Aspen-GL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&d…", NULL), B("MSI", "MS-7596 (785GM-E51)", 1, "http://www.msi.com/product/mb/785GM-E51.html", NULL), B("MSI", "MS-7599 (870-C45)", 1, "http://www.msi.com/product/mb/870-C45.html", NULL), B("MSI", "MS-7613 (Iona-GL8E)", 0, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&d…", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("MSI", "MS-7635 (H55M-ED55)", 0, "http://www.msi.com/product/mb/H55M-ED55.html", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("MSI", "MS-7640 (890FXA-GD70)",1, "http://www.msi.com/product/mb/890FXA-GD70.html", NULL), B("MSI", "MS-7642 (890GXM-G65)", 1, "http://www.msi.com/product/mb/890GXM-G65.html", NULL), + B("MSI", "MS-7676 (H67MA-ED55(B3))", 1, "http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work fine basically, but user reported (hopefully unrelated) buggy behavior of the board after a firmware upgrade. See http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"), B("MSI", "MS-7696 (A75MA-G55)", 1, "http://www.msi.com/product/mb/A75MA-G55.html", NULL), B("MSI", "MS-7698 (E350IA-E45)", 1, "http://www.msi.com/product/mb/E350IA-E45.html", NULL), B("NEC", "PowerMate 2000", 1, "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL), @@ -850,6 +869,7 @@ const struct board_info boards_known[] = { B("PC Engines", "Alix.2d3", 1, "http://pcengines.ch/alix2d3.htm", NULL), B("PC Engines", "Alix.3c3", 1, "http://pcengines.ch/alix3c3.htm", NULL), B("PC Engines", "Alix.3d3", 1, "http://pcengines.ch/alix3d3.htm", NULL), + B("PC Engines", "Alix.6f2", 1, "http://pcengines.ch/alix6f2.htm", NULL), B("PC Engines", "WRAP.2E", 1, "http://pcengines.ch/wrap2e1.htm", NULL), B("Portwell", "PEB-4700VLA", 1, "http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA", NULL), B("RCA", "RM4100", 1, "http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL), @@ -857,6 +877,7 @@ const struct board_info boards_known[] = { B("Shuttle", "AK31", 1, "http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL), B("Shuttle", "AK38N", 1, "http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/", NULL), B("Shuttle", "AV11V30", 1, NULL, NULL), + B("Shuttle", "AV18E2", 1, "http://www.shuttle.eu/_archive/older/de/av18.htm", NULL), B("Shuttle", "FD37", 1, "http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL), B("Shuttle", "FH67", 1, "http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL), B("Shuttle", "FN25", 1, "http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=", NULL), @@ -875,12 +896,15 @@ const struct board_info boards_known[] = { B("Supermicro", "X7DBT-INF", 1, "http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm", NULL), B("Supermicro", "X7SPA-HF", 1, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IP…", NULL), B("Supermicro", "X8DT3", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL), + B("Supermicro", "X8DTE-F", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&…", NULL), B("Supermicro", "X8DTH-6F", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL), B("Supermicro", "X8DTT-F", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm", NULL), + B("Supermicro", "X8DTT-HIBQF", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL), B("Supermicro", "X8DTU-6TF+", 0, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&…", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Supermicro", "X8DTU-F", 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL), B("Supermicro", "X8SIE(-F)", 0, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI…", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."), B("Supermicro", "X8STi", 1, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL), + B("Supermicro", "X9SCA-F", 0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Supermicro", "X9SCL", 0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("T-Online", "S-100", 1, "http://wiki.freifunk-hannover.de/T-Online_S_100", NULL), B("Tekram", "P6Pro-A5", 1, "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL), -- 1.7.1

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Re: [flashrom] [PATCH] Board enable for TriGem Anaheim-3
by Michael Karcher 11 Feb '12

11 Feb '12

Am Samstag, den 11.02.2012, 21:14 +0100 schrieb Michael Karcher: > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> (ack via IRC Feb 11, 23:14 GMT) Stefan: Thanks for the ack! > + {0x8086, 0x7120, 0x109f, 0x3157, 0x8086, 0x7121, 0x109f, 0x3157, NULL, NULL, NULL, P3, "TriGem", "Anaheim-3", 0, OK, intel_ich_gpio22_raise}, This is north bridge + GFX. Adjusted to north bridge + south bridge to be independent of the internal graphics being used or not. And committed in r1491 Regards, Michael Karcher

1 0

[commit] r1491 - trunk
by repository service 11 Feb '12

11 Feb '12

Author: mkarcher Date: Sun Feb 12 01:13:14 2012 New Revision: 1491 URL: http://flashrom.org/trac/flashrom/changeset/1491 Log: Board enable for TriGem Anaheim-3 lspci: http://paste.flashrom.org/view.php?id=1069 flashrom -V: http://paste.flashrom.org/view.php?id=1072 flashrom -w: http://paste.flashrom.org/view.php?id=1073 Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> (ack via IRC Feb 11, 23:14 GMT) Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Thu Feb 9 00:28:54 2012 (r1490) +++ trunk/board_enable.c Sun Feb 12 01:13:14 2012 (r1491) @@ -1540,6 +1540,7 @@ * - ASUS P4B266: socket478 + Intel 845D + ICH2 * - ASUS P4B533-E: socket478 + 845E + ICH4 * - ASUS P4B-MX variant in HP Vectra VL420 SFF: socket478 + 845D + ICH2 + * - TriGem Anaheim-3: socket370 + Intel 810 + ICH */ static int intel_ich_gpio22_raise(void) { @@ -2230,6 +2231,7 @@ {0x10de, 0x0364, 0x108e, 0x6676, 0x10de, 0x0369, 0x108e, 0x6676, "^Sun Ultra 40 M2", NULL, NULL, P3, "Sun", "Ultra 40 M2", 0, OK, board_sun_ultra_40_m2}, {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x0596, 0x1106, 0, NULL, NULL, NULL, P3, "Tekram", "P6Pro-A5", 256, OK, NULL}, {0x1106, 0x3123, 0x1106, 0x3123, 0x1106, 0x3059, 0x1106, 0x4161, NULL, NULL, NULL, P3, "Termtek", "TK-3370 (Rev:2.5B)", 0, OK, w836xx_memw_enable_4e}, + {0x8086, 0x7120, 0x109f, 0x3157, 0x8086, 0x2410, 0, 0, NULL, NULL, NULL, P3, "TriGem", "Anaheim-3", 0, OK, intel_ich_gpio22_raise}, {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, P3, "Tyan", "S2498 (Tomcat K7M)", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x0259, 0x1106, 0xAA07, 0x1106, 0x3227, 0x1106, 0xAA07, NULL, NULL, NULL, P3, "VIA", "EPIA EK", 0, NT, via_vt823x_gpio9_raise}, {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, P3, "VIA", "EPIA M/MII/...", 0, OK, via_vt823x_gpio15_raise}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Thu Feb 9 00:28:54 2012 (r1490) +++ trunk/print.c Sun Feb 12 01:13:14 2012 (r1491) @@ -886,6 +886,7 @@ B("Tekram", "P6Pro-A5", 1, "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL), B("Termtek", "TK-3370 (Rev:2.5B)", 1, NULL, NULL), B("Thomson", "IP1000", 1, "http://www.settoplinux.org/index.php?title=Thomson_IP1000", NULL), + B("TriGem", "Anaheim-3", 1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/anaheim3.shtml", NULL), B("TriGem", "Lomita", 1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml", NULL), B("Tyan", "S5375-1U (Tempest i5100X)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=610", NULL), B("Tyan", "S1846 (Tsunami ATX)", 1, "http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL),

1 0

[PATCH] Board enable for TriGem Anaheim-3
by Michael Karcher 11 Feb '12

11 Feb '12

Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- board_enable.c | 2 ++ print.c | 1 + 2 files changed, 3 insertions(+), 0 deletions(-) diff --git a/board_enable.c b/board_enable.c index 06bbd70..2b682ea 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1540,6 +1540,7 @@ static int intel_ich_gpio21_raise(void) * - ASUS P4B266: socket478 + Intel 845D + ICH2 * - ASUS P4B533-E: socket478 + 845E + ICH4 * - ASUS P4B-MX variant in HP Vectra VL420 SFF: socket478 + 845D + ICH2 + * - TriGem Anaheim-3: socket370 + Intel 810 + ICH */ static int intel_ich_gpio22_raise(void) { @@ -2230,6 +2231,7 @@ const struct board_match board_matches[] = { {0x10de, 0x0364, 0x108e, 0x6676, 0x10de, 0x0369, 0x108e, 0x6676, "^Sun Ultra 40 M2", NULL, NULL, P3, "Sun", "Ultra 40 M2", 0, OK, board_sun_ultra_40_m2}, {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x0596, 0x1106, 0, NULL, NULL, NULL, P3, "Tekram", "P6Pro-A5", 256, OK, NULL}, {0x1106, 0x3123, 0x1106, 0x3123, 0x1106, 0x3059, 0x1106, 0x4161, NULL, NULL, NULL, P3, "Termtek", "TK-3370 (Rev:2.5B)", 0, OK, w836xx_memw_enable_4e}, + {0x8086, 0x7120, 0x109f, 0x3157, 0x8086, 0x7121, 0x109f, 0x3157, NULL, NULL, NULL, P3, "TriGem", "Anaheim-3", 0, OK, intel_ich_gpio22_raise}, {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, P3, "Tyan", "S2498 (Tomcat K7M)", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x0259, 0x1106, 0xAA07, 0x1106, 0x3227, 0x1106, 0xAA07, NULL, NULL, NULL, P3, "VIA", "EPIA EK", 0, NT, via_vt823x_gpio9_raise}, {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, P3, "VIA", "EPIA M/MII/...", 0, OK, via_vt823x_gpio15_raise}, diff --git a/print.c b/print.c index f4957b1..b4900c3 100644 --- a/print.c +++ b/print.c @@ -886,6 +886,7 @@ const struct board_info boards_known[] = { B("Tekram", "P6Pro-A5", 1, "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL), B("Termtek", "TK-3370 (Rev:2.5B)", 1, NULL, NULL), B("Thomson", "IP1000", 1, "http://www.settoplinux.org/index.php?title=Thomson_IP1000", NULL), + B("TriGem", "Anaheim-3", 1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/anaheim3.shtml", NULL), B("TriGem", "Lomita", 1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml", NULL), B("Tyan", "S5375-1U (Tempest i5100X)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=610", NULL), B("Tyan", "S1846 (Tsunami ATX)", 1, "http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL), -- 1.7.7.3

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flashrom(8): HTML preview using ManPageRenderer failed
by Ivan Shmakov 10 Feb '12

10 Feb '12

The flashrom(8) revision currently in trunk fails HTML conversion: --cut: http://www.flashrom.org/trac/flashrom/browser/trunk/flashrom.8 -- Warning: HTML preview using ManPageRenderer failed (Exception: Running (/usr/bin/groff -Thtml -P -r -P -l -mandoc ) failed: 0, <standard input>:566: warning [p 1, 86.8i]: cannot adjust line .) --cut: http://www.flashrom.org/trac/flashrom/browser/trunk/flashrom.8 -- It seems that the regression is due to r1437 [1], as r1412 [2] renders without an error. [1] http://www.flashrom.org/trac/flashrom/browser/trunk/flashrom.8?rev=1437 [2] http://www.flashrom.org/trac/flashrom/browser/trunk/flashrom.8?rev=1412 -- FSF associate member #7257

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Re: [flashrom] FAILED : mcp61sm -am
by Idwer Vollering 09 Feb '12

09 Feb '12

2012/2/9 Vince S <vince06fr(a)gmail.com>: > good evening > Good news I realized what was happening and managed to flash my bios. > > The bios I was cleanliness was set to "boot block protection" > > there is no pin on the mainboard but the parameter is adjustable from the > interface of the bios, so I changed this parameter in the bios, boot from my > linux session, then I share them with the bios mine I flashed with flashrom > and that's ok I would like to see the output of "lspci -nnvvvxxx" and "superiotool -deV" (run both commands as root) before and after changing this parameter, so we can look into adding board enabling code. > > Thanks for your work > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > http://www.flashrom.org/mailman/listinfo/flashrom

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Re: [flashrom] FAILED : mcp61sm -am
by Vince S 09 Feb '12

09 Feb '12

good evening Good news I realized what was happening and managed to flash my bios. The bios I was cleanliness was set to "boot block protection" there is no pin on the mainboard but the parameter is adjustable from the interface of the bios, so I changed this parameter in the bios, boot from my linux session, then I share them with the bios mine I flashed with flashrom and that's ok Thanks for your work

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