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[PATCH] Return code for spi_read_status_register
by Carl-Daniel Hailfinger 28 Aug '12

28 Aug '12

spi_read_status_register now returns success/failure and stores the status register value via call-by-reference. That way, status register reading failure (only possible if the programmer couldn't run RDSR) can be detected and acted upon in the future. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_rdsr_errorcheck/it87spi.c =================================================================== --- flashrom-spi_rdsr_errorcheck/it87spi.c (Revision 1539) +++ flashrom-spi_rdsr_errorcheck/it87spi.c (Arbeitskopie) @@ -321,6 +321,7 @@ { unsigned int i; int result; + uint8_t status; chipaddr bios = flash->virtual_memory; result = spi_write_enable(flash); @@ -335,7 +336,7 @@ /* Wait until the Write-In-Progress bit is cleared. * This usually takes 1-10 ms, so wait in 1 ms steps. */ - while (spi_read_status_register(flash) & SPI_SR_WIP) + while (spi_read_status_register(flash, &status), status & SPI_SR_WIP) programmer_delay(1000); return 0; } Index: flashrom-spi_rdsr_errorcheck/a25.c =================================================================== --- flashrom-spi_rdsr_errorcheck/a25.c (Revision 1539) +++ flashrom-spi_rdsr_errorcheck/a25.c (Arbeitskopie) @@ -33,7 +33,7 @@ { uint8_t status; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_amic_a25_srwd(status); @@ -49,7 +49,7 @@ { uint8_t status; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_amic_a25_srwd(status); @@ -64,7 +64,7 @@ { uint8_t status; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_amic_a25_srwd(status); @@ -82,7 +82,7 @@ { uint8_t status; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_amic_a25_srwd(status); Index: flashrom-spi_rdsr_errorcheck/at25.c =================================================================== --- flashrom-spi_rdsr_errorcheck/at25.c (Revision 1539) +++ flashrom-spi_rdsr_errorcheck/at25.c (Arbeitskopie) @@ -61,7 +61,7 @@ { uint8_t status; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_atmel_at25_srpl(status); @@ -84,7 +84,7 @@ { uint8_t status; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_atmel_at25_srpl(status); @@ -103,7 +103,7 @@ { uint8_t status; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); msg_cdbg("Chip status register is %02x\n", status); msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " @@ -127,7 +127,7 @@ { uint8_t status; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); msg_cdbg("Chip status register is %02x\n", status); msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " @@ -151,7 +151,7 @@ { uint8_t status; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); msg_cdbg("Chip status register is %02x\n", status); spi_prettyprint_status_register_atmel_at25_srpl(status); @@ -168,7 +168,7 @@ uint8_t status; int result; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); /* If block protection is disabled, stop here. */ if ((status & (3 << 2)) == 0) return 0; @@ -195,7 +195,7 @@ msg_cerr("spi_write_status_register failed\n"); return result; } - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); if ((status & (3 << 2)) != 0) { msg_cerr("Block protection could not be disabled!\n"); return 1; @@ -223,7 +223,7 @@ uint8_t status; int result; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); /* If block protection is disabled, stop here. */ if ((status & 0x6c) == 0) return 0; @@ -244,7 +244,7 @@ msg_cerr("spi_write_status_register failed\n"); return result; } - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); if ((status & 0x6c) != 0) { msg_cerr("Block protection could not be disabled!\n"); return 1; @@ -257,7 +257,7 @@ uint8_t status; int result; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); /* If block protection is disabled, stop here. */ if ((status & 0x7c) == 0) return 0; @@ -278,7 +278,7 @@ msg_cerr("spi_write_status_register failed\n"); return result; } - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); if ((status & 0x7c) != 0) { msg_cerr("Block protection could not be disabled!\n"); return 1; Index: flashrom-spi_rdsr_errorcheck/spi25.c =================================================================== --- flashrom-spi_rdsr_errorcheck/spi25.c (Revision 1539) +++ flashrom-spi_rdsr_errorcheck/spi25.c (Arbeitskopie) @@ -301,7 +301,7 @@ return 1; } -uint8_t spi_read_status_register(struct flashctx *flash) +int spi_read_status_register(struct flashctx *flash, uint8_t *status) { static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR }; /* FIXME: No workarounds for driver/hardware bugs in generic code. */ @@ -311,10 +311,14 @@ /* Read Status Register */ ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr); - if (ret) + if (ret) { msg_cerr("RDSR failed!\n"); + *status = 0xff; + return ret; + } - return readarr[0]; + *status = readarr[0]; + return 0; } /* Prettyprint the status register. Common definitions. */ @@ -418,7 +422,7 @@ { uint8_t status; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); msg_cdbg("Chip status register is %02x\n", status); switch (flash->manufacture_id) { case ST_ID: @@ -451,6 +455,7 @@ int spi_chip_erase_60(struct flashctx *flash) { int result; + uint8_t status; struct spi_command cmds[] = { { .writecnt = JEDEC_WREN_OUTSIZE, @@ -479,7 +484,7 @@ * This usually takes 1-85 s, so wait in 1 s steps. */ /* FIXME: We assume spi_read_status_register will never fail. */ - while (spi_read_status_register(flash) & SPI_SR_WIP) + while (spi_read_status_register(flash, &status), status & SPI_SR_WIP) programmer_delay(1000 * 1000); /* FIXME: Check the status register for errors. */ return 0; @@ -488,6 +493,7 @@ int spi_chip_erase_c7(struct flashctx *flash) { int result; + uint8_t status; struct spi_command cmds[] = { { .writecnt = JEDEC_WREN_OUTSIZE, @@ -515,7 +521,7 @@ * This usually takes 1-85 s, so wait in 1 s steps. */ /* FIXME: We assume spi_read_status_register will never fail. */ - while (spi_read_status_register(flash) & SPI_SR_WIP) + while (spi_read_status_register(flash, &status), status & SPI_SR_WIP) programmer_delay(1000 * 1000); /* FIXME: Check the status register for errors. */ return 0; @@ -525,6 +531,7 @@ unsigned int blocklen) { int result; + uint8_t status; struct spi_command cmds[] = { { .writecnt = JEDEC_WREN_OUTSIZE, @@ -557,7 +564,7 @@ /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ - while (spi_read_status_register(flash) & SPI_SR_WIP) + while (spi_read_status_register(flash, &status), status & SPI_SR_WIP) programmer_delay(100 * 1000); /* FIXME: Check the status register for errors. */ return 0; @@ -572,6 +579,7 @@ unsigned int blocklen) { int result; + uint8_t status; struct spi_command cmds[] = { { .writecnt = JEDEC_WREN_OUTSIZE, @@ -604,7 +612,7 @@ /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ - while (spi_read_status_register(flash) & SPI_SR_WIP) + while (spi_read_status_register(flash, &status), status & SPI_SR_WIP) programmer_delay(100 * 1000); /* FIXME: Check the status register for errors. */ return 0; @@ -617,6 +625,7 @@ unsigned int blocklen) { int result; + uint8_t status; struct spi_command cmds[] = { { .writecnt = JEDEC_WREN_OUTSIZE, @@ -649,7 +658,7 @@ /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ - while (spi_read_status_register(flash) & SPI_SR_WIP) + while (spi_read_status_register(flash, &status), status & SPI_SR_WIP) programmer_delay(100 * 1000); /* FIXME: Check the status register for errors. */ return 0; @@ -660,6 +669,7 @@ unsigned int blocklen) { int result; + uint8_t status; struct spi_command cmds[] = { { .writecnt = JEDEC_WREN_OUTSIZE, @@ -692,7 +702,7 @@ /* Wait until the Write-In-Progress bit is cleared. * This usually takes 15-800 ms, so wait in 10 ms steps. */ - while (spi_read_status_register(flash) & SPI_SR_WIP) + while (spi_read_status_register(flash, &status), status & SPI_SR_WIP) programmer_delay(10 * 1000); /* FIXME: Check the status register for errors. */ return 0; @@ -764,7 +774,8 @@ * This is according the SST25VF016 datasheet, who knows it is more * generic that this... */ -static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode) +static int spi_write_status_register_flag(struct flashctx *flash, uint8_t status, + const unsigned char enable_opcode) { int result; int i = 0; @@ -781,7 +792,7 @@ .readarr = NULL, }, { .writecnt = JEDEC_WRSR_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, + .writearr = (const unsigned char[]){ JEDEC_WRSR, status }, .readcnt = 0, .readarr = NULL, }, { @@ -805,7 +816,7 @@ * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. */ programmer_delay(100 * 1000); - while (spi_read_status_register(flash) & SPI_SR_WIP) { + while (spi_read_status_register(flash, &status), status & SPI_SR_WIP) { if (++i > 490) { msg_cerr("Error: WIP bit after WRSR never cleared\n"); return TIMEOUT_ERROR; @@ -925,7 +936,7 @@ uint8_t status; int result; - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); /* If block protection is disabled, stop here. */ if ((status & 0x3c) == 0) return 0; @@ -936,7 +947,7 @@ msg_cerr("spi_write_status_register failed\n"); return result; } - status = spi_read_status_register(flash); + spi_read_status_register(flash, &status); if ((status & 0x3c) != 0) { msg_cerr("Block protection could not be disabled!\n"); return 1; @@ -1007,6 +1018,7 @@ unsigned int len, unsigned int chunksize) { int rc = 0; + uint8_t status; unsigned int i, j, starthere, lenhere, towrite; /* FIXME: page_size is the wrong variable. We need max_writechunk_size * in struct flashctx to do this properly. All chips using @@ -1035,7 +1047,7 @@ rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite); if (rc) break; - while (spi_read_status_register(flash) & SPI_SR_WIP) + while (spi_read_status_register(flash, &status), status & SPI_SR_WIP) programmer_delay(10); } if (rc) @@ -1056,13 +1068,14 @@ unsigned int len) { unsigned int i; + uint8_t status; int result = 0; for (i = start; i < start + len; i++) { result = spi_byte_program(flash, i, buf[i - start]); if (result) return 1; - while (spi_read_status_register(flash) & SPI_SR_WIP) + while (spi_read_status_register(flash, &status), status & SPI_SR_WIP) programmer_delay(10); } @@ -1074,6 +1087,7 @@ { uint32_t pos = start; int result; + uint8_t status; unsigned char cmd[JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE] = { JEDEC_AAI_WORD_PROGRAM, }; @@ -1157,7 +1171,7 @@ */ return result; } - while (spi_read_status_register(flash) & SPI_SR_WIP) + while (spi_read_status_register(flash, &status), status & SPI_SR_WIP) programmer_delay(10); /* We already wrote 2 bytes in the multicommand step. */ @@ -1169,7 +1183,7 @@ cmd[2] = buf[pos++ - start]; spi_send_command(flash, JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, cmd, NULL); - while (spi_read_status_register(flash) & SPI_SR_WIP) + while (spi_read_status_register(flash, &status), status & SPI_SR_WIP) programmer_delay(10); } Index: flashrom-spi_rdsr_errorcheck/chipdrivers.h =================================================================== --- flashrom-spi_rdsr_errorcheck/chipdrivers.h (Revision 1539) +++ flashrom-spi_rdsr_errorcheck/chipdrivers.h (Arbeitskopie) @@ -45,7 +45,7 @@ int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len); -uint8_t spi_read_status_register(struct flashctx *flash); +int spi_read_status_register(struct flashctx *flash, uint8_t *status); int spi_write_status_register(struct flashctx *flash, int status); void spi_prettyprint_status_register_bit(uint8_t status, int bit); void spi_prettyprint_status_register_bp3210(uint8_t status, int bp); -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH/WIP] AT45DB011D flashing support
by Aidan Thornton 28 Aug '12

28 Aug '12

On Fri, Aug 17, 2012 at 6:12 PM, Aidan Thornton <makosoft(a)gmail.com> wrote: > Let's try that again, this time remembering to svn add the new file. > Sorry about that Also, forgot the Signed-Off-By line: Signed-off-by: Aidan Thornton <makosoft(a)gmail.com> Again, sorry, not sure how I missed that. Aidan

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Re: [flashrom] User test report: Gigabyte GA-X79-UD5
by Stefan Tauner 27 Aug '12

27 Aug '12

On Mon, 27 Aug 2012 22:29:39 +0800 Andrew Cooks <acooks(a)gmail.com> wrote: > I'm reporting that flashrom can read and write the firmware on my > Gigabyte GA-X79-UD5 motherboard. > The board has an ITE 0x8728 Super IO, which is confusingly "not > found" by superiotool. Hello Andrew, thanks for your report! I have added your board to our list of supported hardware, marked the chipset as tested and will commit that later together with other small changes. superiotool does not share its sourcecode with flashrom resulting in what you described above. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH] ichspi: ignore bogus FREGs.
by Stefan Tauner 27 Aug '12

27 Aug '12

On Fri, 27 Jul 2012 17:36:53 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > Some vendors forget to disable regions properly and set their FRAP bits > and FREG to 0. While not documented publicly this is being ignored by the > chipset(s)[1] and hence flashrom should do so too. Without this patch > flashrom prints a warning and disables writes. > The check for i (region index) excludes the descriptor region which should > not be becessary because specs suggest that the descriptor region should not > be locked, but if vendors would follow the specs this patch would not have > been necessary in the first place. > > [1]: http://www.flashrom.org/pipermail/flashrom/2012-May/009303.html > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> committed in r1587. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1587 - trunk
by repository service 27 Aug '12

27 Aug '12

Author: stefanct Date: Mon Aug 27 17:12:36 2012 New Revision: 1587 URL: http://flashrom.org/trac/flashrom/changeset/1587 Log: ichspi: ignore bogus FREGs. Some vendors forget to disable regions properly and set their FRAP bits and FREG to 0. While not documented publicly this is being ignored by the chipset(s)[1] and hence flashrom should do so too. Without this patch flashrom prints a warning and disables writes. The check for i (region index) excludes the descriptor region which should not be becessary because specs suggest that the descriptor region should not be locked, but if vendors would follow the specs this patch would not have been necessary in the first place. [1]: http://www.flashrom.org/pipermail/flashrom/2012-May/009303.html Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/ichspi.c Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Mon Aug 27 03:24:15 2012 (r1586) +++ trunk/ichspi.c Mon Aug 27 17:12:36 2012 (r1587) @@ -1441,7 +1441,7 @@ base = ICH_FREG_BASE(freg); limit = ICH_FREG_LIMIT(freg); - if (base > limit) { + if (base > limit || (freg == 0 && i > 0)) { /* this FREG is disabled */ msg_pdbg2("0x%02X: 0x%08x FREG%i: %s region is unused.\n", offset, freg, i, region_names[i]);

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User test report: Gigabyte GA-X79-UD5
by Andrew Cooks 27 Aug '12

27 Aug '12

Hi Newbie here; thanks for the great work. I'm reporting that flashrom can read and write the firmware on my Gigabyte GA-X79-UD5 motherboard. The board has an ITE 0x8728 Super IO, which is confusingly "not found" by superiotool. Detailed output follows... ------------------------------------------ flashrom v0.9.6.1-r1564 on Linux 3.5.2with-raid (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.4, GCC 4.4.6 20120305 (Red Hat 4.4.6-4), little endian Command line (2 args): ./flashrom --programmer=internal -V Calibrating delay loop... OS timer resolution is 2 usecs, 3688M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10025 us, 8 myus = 11 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Gigabyte Technology Co., Ltd." DMI string system-product-name: "To be filled by O.E.M." DMI string system-version: "To be filled by O.E.M." DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd." DMI string baseboard-product-name: "X79-UD5" DMI string baseboard-version: "To be filled by O.E.M." DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8728 on port 0x2e Found chipset "Intel X79" with PCI ID 8086:1d41. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is 0xa Root Complex Register Block address = 0xfed1c000 GCS = 0xc05: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0x6008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0 Programming OPCODES... done 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x0000ffc0 (FADDR) 0x50: 0x0000ffff (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. 0x58: 0x07ff0000 FREG1: BIOS region (0x00000000-0x007fffff) is read-write. 0x5C: 0x03ff0003 FREG2: Management Engine region (0x00003000-0x003fffff) is read-write. 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) is read-write. 0x90: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0x91: 0xf97f10 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=1 0x94: 0x5006 (PREOP) 0x96: 0x463b (OPTYPE) 0x98: 0x05d80302 (OPMENU) 0x9C: 0xc79f0190 (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00002005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) SPI Read Configuration: prefetching enabled, caching enabled, OK. Super I/O ID 0x8728 is not on the list of flash capable controllers. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found Macronix flash chip "MX25L6405" (8192 kB, SPI) at physical address 0xff800000. Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x16, id2 0x16 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x16, id2 0x16 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xc2, id2 0x16 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xc2, id2 0x16 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x16 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Unknown SFDP-capable chip, 0 kB: Parsing JEDEC flash parameter table... done. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 0x16 Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xfe, id2 0x45, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xfe, id2 0x45, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xfe, id2 0x45, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xfe, id2 0x45, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x8d, id2 0xef, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xfe, id2 0x45, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xfe, id2 0x45, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x8d, id2 0xef, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xfe, id2 0x45, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xfe, id2 0x45, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xfe, id2 0x45, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xfe, id2 0x45, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xfe, id2 0x45, id1 is normal flash content, id2 is normal flash content Found Macronix flash chip "MX25L6405" (8192 kB, SPI). No operations were specified. Restoring MMIO space at 0x7f92813bb8a0 Restoring MMIO space at 0x7f92813bb89c Restoring MMIO space at 0x7f92813bb898 Restoring MMIO space at 0x7f92813bb896 Restoring MMIO space at 0x7f92813bb894 Restoring PCI config space for 00:1f:0 reg 0xdc ---------------------------------------- vmserver.localdomain description: Desktop Computer product: To be filled by O.E.M. vendor: Gigabyte Technology Co., Ltd. version: To be filled by O.E.M. serial: To be filled by O.E.M. width: 64 bits capabilities: smbios-2.7 dmi-2.7 vsyscall32 configuration: chassis=desktop uuid=00020003-0004-0005-0006-000700080009 *-core description: Motherboard product: X79-UD5 vendor: Gigabyte Technology Co., Ltd. physical id: 0 version: To be filled by O.E.M. serial: To be filled by O.E.M. slot: To be filled by O.E.M. *-firmware description: BIOS vendor: American Megatrends Inc. physical id: 0 version: F12 (07/05/2012) size: 64KiB capacity: 4032KiB capabilities: pci upgrade shadowing cdboot bootselect socketedrom edd int13floppy1200 int13floppy720 int13floppy2880 int5printscreen int9keyboard int14serial int17printer acpi usb biosbootspecification *-cache:0 description: L1 cache physical id: 4 slot: CPU Internal L1 size: 256KiB capacity: 256KiB capabilities: internal varies *-cache:1 description: L2 cache physical id: 5 slot: CPU Internal L2 size: 1MiB capacity: 1MiB capabilities: internal varies unified *-cache:2 description: L3 cache physical id: 6 slot: CPU Internal L3 size: 10MiB capacity: 10MiB capabilities: internal varies unified *-memory description: System Memory physical id: 29 slot: System board or motherboard size: 32GiB *-bank:0 description: DIMM Synchronous 1333 MHz (0.8 ns) product: CL9-9-9 D3-13 vendor: Undefined physical id: 0 serial: 00000000 slot: Node0_Dimm0 size: 8GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:1 description: DIMM Synchronous [empty] product: Dimm1_PartNum vendor: Dimm1_Manufacturer physical id: 1 serial: Dimm1_SerNum slot: Node0_Dimm1 *-bank:2 description: DIMM Fast-paged 1333 MHz (0.8 ns) product: CL9-9-9 D3-13 vendor: Undefined physical id: 2 serial: 00000000 slot: Node0_Dimm2 size: 8GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:3 description: DIMM Synchronous [empty] product: Dimm3_PartNum vendor: Dimm3_Manufacturer physical id: 3 serial: Dimm3_SerNum slot: Node0_Dimm3 *-bank:4 description: DIMM Fast-paged Static column Pseudo-static 1333 MHz (0.8 ns) product: CL9-9-9 D3-13 vendor: Undefined physical id: 4 serial: 00000000 slot: Node0_Dimm4 size: 8GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:5 description: DIMM Synchronous [empty] product: Dimm5_PartNum vendor: Dimm5_Manufacturer physical id: 5 serial: Dimm5_SerNum slot: Node0_Dimm5 *-bank:6 description: DIMM Static column RAMBUS 1333 MHz (0.8 ns) product: CL9-9-9 D3-13 vendor: Undefined physical id: 6 serial: 00000000 slot: Node0_Dimm6 size: 8GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:7 description: DIMM Synchronous [empty] product: Dimm7_PartNum vendor: Dimm7_Manufacturer physical id: 7 serial: Dimm7_SerNum slot: Node0_Dimm7 *-cpu description: CPU product: Intel(R) Core(TM) i7-3820 CPU @ 3.60GHz vendor: Intel Corp. physical id: 3f bus info: cpu@0 version: Intel(R) Core(TM) i7-3820 CPU @ 3.60GHz slot: SOCKET 0 size: 1200MHz capacity: 1200MHz width: 64 bits clock: 100MHz capabilities: fpu fpu_exception wp vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp x86-64 constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes xsave avx lahf_lm ida arat xsaveopt pln pts dtherm tpr_shadow vnmi flexpriority ept vpid cpufreq *-pci description: Host bridge product: Xeon E5/Core i7 DMI2 vendor: Intel Corporation physical id: 100 bus info: pci@0000:00:00.0 version: 07 width: 32 bits clock: 33MHz *-pci:0 description: PCI bridge product: Xeon E5/Core i7 IIO PCI Express Root Port 1a vendor: Intel Corporation physical id: 1 bus info: pci@0000:00:01.0 version: 07 width: 32 bits clock: 33MHz capabilities: pci msi pciexpress pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:41 ioport:e000(size=4096) memory:fbe00000-fbefffff ioport:d0000000(size=268435456) *-display UNCLAIMED description: VGA compatible controller product: Cedar PRO [Radeon HD 5450] vendor: Advanced Micro Devices [AMD] nee ATI physical id: 0 bus info: pci@0000:01:00.0 version: 00 width: 64 bits clock: 33MHz capabilities: pm pciexpress msi vga_controller bus_master cap_list configuration: latency=0 resources: memory:d0000000-dfffffff memory:fbe20000-fbe3ffff ioport:e000(size=256) memory:fbe00000-fbe1ffff *-multimedia UNCLAIMED description: Audio device product: Cedar HDMI Audio [Radeon HD 5400/6300 Series] vendor: Advanced Micro Devices [AMD] nee ATI physical id: 0.1 bus info: pci@0000:01:00.1 version: 00 width: 64 bits clock: 33MHz capabilities: pm pciexpress msi bus_master cap_list configuration: latency=0 resources: memory:fbe40000-fbe43fff *-pci:1 description: PCI bridge product: Xeon E5/Core i7 IIO PCI Express Root Port 2a vendor: Intel Corporation physical id: 2 bus info: pci@0000:00:02.0 version: 07 width: 32 bits clock: 33MHz capabilities: pci msi pciexpress pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:42 ioport:d000(size=4096) memory:fbd00000-fbdfffff ioport:c0000000(size=268435456) *-display UNCLAIMED description: VGA compatible controller product: Caicos [Radeon HD 6450] vendor: Advanced Micro Devices [AMD] nee ATI physical id: 0 bus info: pci@0000:02:00.0 version: 00 width: 64 bits clock: 33MHz capabilities: pm pciexpress msi vga_controller cap_list configuration: latency=0 resources: memory:c0000000-cfffffff memory:fbd20000-fbd3ffff ioport:d000(size=256) memory:fbd00000-fbd1ffff *-multimedia UNCLAIMED description: Audio device product: Caicos HDMI Audio [Radeon HD 6400 Series] vendor: Advanced Micro Devices [AMD] nee ATI physical id: 0.1 bus info: pci@0000:02:00.1 version: 00 width: 64 bits clock: 33MHz capabilities: pm pciexpress msi bus_master cap_list configuration: latency=0 resources: memory:fbd40000-fbd43fff *-pci:2 description: PCI bridge product: Xeon E5/Core i7 IIO PCI Express Root Port 3a in PCI Express Mode vendor: Intel Corporation physical id: 3 bus info: pci@0000:00:03.0 version: 07 width: 32 bits clock: 33MHz capabilities: pci msi pciexpress pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:43 *-generic:0 description: System peripheral product: Xeon E5/Core i7 DMA Channel 0 vendor: Intel Corporation physical id: 4 bus info: pci@0000:00:04.0 version: 07 width: 64 bits clock: 33MHz capabilities: msix pciexpress pm bus_master cap_list configuration: driver=ioatdma latency=0 resources: irq:255 memory:fbf3c000-fbf3ffff *-generic:1 description: System peripheral product: Xeon E5/Core i7 DMA Channel 1 vendor: Intel Corporation physical id: 4.1 bus info: pci@0000:00:04.1 version: 07 width: 64 bits clock: 33MHz capabilities: msix pciexpress pm bus_master cap_list configuration: driver=ioatdma latency=0 resources: irq:255 memory:fbf38000-fbf3bfff *-generic:2 description: System peripheral product: Xeon E5/Core i7 DMA Channel 2 vendor: Intel Corporation physical id: 4.2 bus info: pci@0000:00:04.2 version: 07 width: 64 bits clock: 33MHz capabilities: msix pciexpress pm bus_master cap_list configuration: driver=ioatdma latency=0 resources: irq:255 memory:fbf34000-fbf37fff *-generic:3 description: System peripheral product: Xeon E5/Core i7 DMA Channel 3 vendor: Intel Corporation physical id: 4.3 bus info: pci@0000:00:04.3 version: 07 width: 64 bits clock: 33MHz capabilities: msix pciexpress pm bus_master cap_list configuration: driver=ioatdma latency=0 resources: irq:255 memory:fbf30000-fbf33fff *-generic:4 description: System peripheral product: Xeon E5/Core i7 DMA Channel 4 vendor: Intel Corporation physical id: 4.4 bus info: pci@0000:00:04.4 version: 07 width: 64 bits clock: 33MHz capabilities: msix pciexpress pm bus_master cap_list configuration: driver=ioatdma latency=0 resources: irq:255 memory:fbf2c000-fbf2ffff *-generic:5 description: System peripheral product: Xeon E5/Core i7 DMA Channel 5 vendor: Intel Corporation physical id: 4.5 bus info: pci@0000:00:04.5 version: 07 width: 64 bits clock: 33MHz capabilities: msix pciexpress pm bus_master cap_list configuration: driver=ioatdma latency=0 resources: irq:255 memory:fbf28000-fbf2bfff *-generic:6 description: System peripheral product: Xeon E5/Core i7 DMA Channel 6 vendor: Intel Corporation physical id: 4.6 bus info: pci@0000:00:04.6 version: 07 width: 64 bits clock: 33MHz capabilities: msix pciexpress pm bus_master cap_list configuration: driver=ioatdma latency=0 resources: irq:255 memory:fbf24000-fbf27fff *-generic:7 description: System peripheral product: Xeon E5/Core i7 DMA Channel 7 vendor: Intel Corporation physical id: 4.7 bus info: pci@0000:00:04.7 version: 07 width: 64 bits clock: 33MHz capabilities: msix pciexpress pm bus_master cap_list configuration: driver=ioatdma latency=0 resources: irq:255 memory:fbf20000-fbf23fff *-generic:8 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Address Map, VTd_Misc, System Management vendor: Intel Corporation physical id: 5 bus info: pci@0000:00:05.0 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:9 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Control Status and Global Errors vendor: Intel Corporation physical id: 5.2 bus info: pci@0000:00:05.2 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:10 UNCLAIMED description: PIC product: Xeon E5/Core i7 I/O APIC vendor: Intel Corporation physical id: 5.4 bus info: pci@0000:00:05.4 version: 07 width: 32 bits clock: 33MHz capabilities: pm io_x_-apic bus_master cap_list configuration: latency=0 resources: memory:fbf46000-fbf46fff *-pci:3 description: PCI bridge product: C600/X79 series chipset PCI Express Virtual Root Port vendor: Intel Corporation physical id: 11 bus info: pci@0000:00:11.0 version: 05 width: 32 bits clock: 33MHz capabilities: pci pciexpress pm msi normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:44 *-communication description: Communication controller product: C600/X79 series chipset MEI Controller #1 vendor: Intel Corporation physical id: 16 bus info: pci@0000:00:16.0 version: 05 width: 64 bits clock: 33MHz capabilities: pm msi bus_master cap_list configuration: driver=mei latency=0 resources: irq:60 memory:fbf45000-fbf4500f *-network description: Ethernet interface product: 82579V Gigabit Network Connection vendor: Intel Corporation physical id: 19 bus info: pci@0000:00:19.0 logical name: eth0 version: 05 serial: 50:e5:49:e6:88:1d size: 1GB/s capacity: 1GB/s width: 32 bits clock: 33MHz capabilities: pm msi bus_master cap_list ethernet physical tp 10bt 10bt-fd 100bt 100bt-fd 1000bt-fd autonegotiation configuration: autonegotiation=on broadcast=yes driver=e1000e driverversion=2.0.0-k duplex=full firmware=0.13-4 ip=10.1.1.7 latency=0 link=yes multicast=yes port=twisted pair speed=1GB/s resources: irq:65 memory:fbf00000-fbf1ffff memory:fbf44000-fbf44fff ioport:f040(size=32) *-usb:0 description: USB controller product: C600/X79 series chipset USB2 Enhanced Host Controller #2 vendor: Intel Corporation physical id: 1a bus info: pci@0000:00:1a.0 version: 05 width: 32 bits clock: 33MHz capabilities: pm debug ehci bus_master cap_list configuration: driver=ehci_hcd latency=0 resources: irq:16 memory:fbf43000-fbf433ff *-pci:4 description: PCI bridge product: C600/X79 series chipset PCI Express Root Port 1 vendor: Intel Corporation physical id: 1c bus info: pci@0000:00:1c.0 version: b5 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:45 ioport:c000(size=4096) memory:fbc00000-fbcfffff *-storage description: SATA controller product: 88SE9172 SATA 6Gb/s Controller vendor: Marvell Technology Group Ltd. physical id: 0 bus info: pci@0000:05:00.0 version: 11 width: 32 bits clock: 33MHz capabilities: storage pm msi pciexpress ahci_1.0 bus_master cap_list rom configuration: driver=ahci latency=0 resources: irq:62 ioport:c040(size=8) ioport:c030(size=4) ioport:c020(size=8) ioport:c010(size=4) ioport:c000(size=16) memory:fbc10000-fbc101ff memory:fbc00000-fbc0ffff *-pci:5 description: PCI bridge product: C600/X79 series chipset PCI Express Root Port 2 vendor: Intel Corporation physical id: 1c.1 bus info: pci@0000:00:1c.1 version: b5 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:46 ioport:b000(size=4096) memory:fbb00000-fbbfffff *-storage description: SATA controller product: 88SE9172 SATA 6Gb/s Controller vendor: Marvell Technology Group Ltd. physical id: 0 bus info: pci@0000:06:00.0 version: 11 width: 32 bits clock: 33MHz capabilities: storage pm msi pciexpress ahci_1.0 bus_master cap_list rom configuration: driver=ahci latency=0 resources: irq:63 ioport:b040(size=8) ioport:b030(size=4) ioport:b020(size=8) ioport:b010(size=4) ioport:b000(size=16) memory:fbb10000-fbb101ff memory:fbb00000-fbb0ffff *-pci:6 description: PCI bridge product: C600/X79 series chipset PCI Express Root Port 3 vendor: Intel Corporation physical id: 1c.2 bus info: pci@0000:00:1c.2 version: b5 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:47 *-pci:7 description: PCI bridge product: C600/X79 series chipset PCI Express Root Port 4 vendor: Intel Corporation physical id: 1c.3 bus info: pci@0000:00:1c.3 version: b5 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:48 *-pci:8 description: PCI bridge product: C600/X79 series chipset PCI Express Root Port 6 vendor: Intel Corporation physical id: 1c.5 bus info: pci@0000:00:1c.5 version: b5 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:49 memory:fba00000-fbafffff *-usb description: USB controller product: Fresco Logic vendor: Fresco Logic physical id: 0 bus info: pci@0000:09:00.0 version: 02 width: 64 bits clock: 33MHz capabilities: pm msi pciexpress msix xhci bus_master cap_list configuration: driver=xhci_hcd latency=0 resources: irq:17 memory:fba00000-fba0ffff memory:fba11000-fba11fff memory:fba10000-fba10fff *-pci:9 description: PCI bridge product: C600/X79 series chipset PCI Express Root Port 7 vendor: Intel Corporation physical id: 1c.6 bus info: pci@0000:00:1c.6 version: b5 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:50 memory:fb900000-fb9fffff *-usb description: USB controller product: Fresco Logic vendor: Fresco Logic physical id: 0 bus info: pci@0000:0a:00.0 version: 02 width: 64 bits clock: 33MHz capabilities: pm msi pciexpress msix xhci bus_master cap_list configuration: driver=xhci_hcd latency=0 resources: irq:18 memory:fb900000-fb90ffff memory:fb911000-fb911fff memory:fb910000-fb910fff *-pci:10 description: PCI bridge product: C600/X79 series chipset PCI Express Root Port 8 vendor: Intel Corporation physical id: 1c.7 bus info: pci@0000:00:1c.7 version: b5 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:51 ioport:a000(size=4096) memory:fb800000-fb8fffff *-storage description: SATA controller product: 88SE9172 SATA 6Gb/s Controller vendor: Marvell Technology Group Ltd. physical id: 0 bus info: pci@0000:0b:00.0 version: 11 width: 32 bits clock: 33MHz capabilities: storage pm msi pciexpress ahci_1.0 bus_master cap_list rom configuration: driver=ahci latency=0 resources: irq:64 ioport:a040(size=8) ioport:a030(size=4) ioport:a020(size=8) ioport:a010(size=4) ioport:a000(size=16) memory:fb810000-fb8101ff memory:fb800000-fb80ffff *-usb:1 description: USB controller product: C600/X79 series chipset USB2 Enhanced Host Controller #1 vendor: Intel Corporation physical id: 1d bus info: pci@0000:00:1d.0 version: 05 width: 32 bits clock: 33MHz capabilities: pm debug ehci bus_master cap_list configuration: driver=ehci_hcd latency=0 resources: irq:23 memory:fbf42000-fbf423ff *-pci:11 description: PCI bridge product: 82801 PCI Bridge vendor: Intel Corporation physical id: 1e bus info: pci@0000:00:1e.0 version: a5 width: 32 bits clock: 33MHz capabilities: pci subtractive_decode bus_master cap_list resources: ioport:9000(size=4096) memory:fb700000-fb7fffff *-firewire description: FireWire (IEEE 1394) product: VT6306/7/8 [Fire II(M)] IEEE 1394 OHCI Controller vendor: VIA Technologies, Inc. physical id: 3 bus info: pci@0000:0c:03.0 version: c0 width: 32 bits clock: 33MHz capabilities: pm ohci bus_master cap_list configuration: driver=firewire_ohci latency=32 maxlatency=32 resources: irq:19 memory:fb700000-fb7007ff ioport:9000(size=128) *-isa description: ISA bridge product: C600/X79 series chipset LPC Controller vendor: Intel Corporation physical id: 1f bus info: pci@0000:00:1f.0 version: 05 width: 32 bits clock: 33MHz capabilities: isa bus_master cap_list configuration: latency=0 *-storage description: SATA controller product: C600/X79 series chipset 6-Port SATA AHCI Controller vendor: Intel Corporation physical id: 1f.2 bus info: pci@0000:00:1f.2 version: 05 width: 32 bits clock: 66MHz capabilities: storage msi pm ahci_1.0 bus_master cap_list configuration: driver=ahci latency=0 resources: irq:61 ioport:f090(size=8) ioport:f080(size=4) ioport:f070(size=8) ioport:f060(size=4) ioport:f020(size=32) memory:fbf41000-fbf417ff *-serial description: SMBus product: C600/X79 series chipset SMBus Host Controller vendor: Intel Corporation physical id: 1f.3 bus info: pci@0000:00:1f.3 version: 05 width: 64 bits clock: 33MHz configuration: driver=i801_smbus latency=0 resources: irq:18 memory:fbf40000-fbf400ff ioport:f000(size=32) *-generic:0 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 QPI Link 0 vendor: Intel Corporation physical id: 8 bus info: pci@0000:ff:08.0 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:1 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 QPI Link Reut 0 vendor: Intel Corporation physical id: 8.3 bus info: pci@0000:ff:08.3 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:2 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 QPI Link Reut 0 vendor: Intel Corporation physical id: 8.4 bus info: pci@0000:ff:08.4 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:3 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 QPI Link 1 vendor: Intel Corporation physical id: 9 bus info: pci@0000:ff:09.0 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:4 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 QPI Link Reut 1 vendor: Intel Corporation physical id: 9.3 bus info: pci@0000:ff:09.3 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:5 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 QPI Link Reut 1 vendor: Intel Corporation physical id: 9.4 bus info: pci@0000:ff:09.4 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:6 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Power Control Unit 0 vendor: Intel Corporation physical id: a bus info: pci@0000:ff:0a.0 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:7 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Power Control Unit 1 vendor: Intel Corporation physical id: a.1 bus info: pci@0000:ff:0a.1 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:8 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Power Control Unit 2 vendor: Intel Corporation physical id: a.2 bus info: pci@0000:ff:0a.2 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:9 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Power Control Unit 3 vendor: Intel Corporation physical id: a.3 bus info: pci@0000:ff:0a.3 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:10 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Interrupt Control Registers vendor: Intel Corporation physical id: b bus info: pci@0000:ff:0b.0 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:11 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Semaphore and Scratchpad Configuration Registers vendor: Intel Corporation physical id: b.3 bus info: pci@0000:ff:0b.3 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:12 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Unicast Register 0 vendor: Intel Corporation physical id: c bus info: pci@0000:ff:0c.0 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:13 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Unicast Register 0 vendor: Intel Corporation physical id: c.1 bus info: pci@0000:ff:0c.1 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:14 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller System Address Decoder 0 vendor: Intel Corporation physical id: c.6 bus info: pci@0000:ff:0c.6 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:15 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 System Address Decoder vendor: Intel Corporation physical id: c.7 bus info: pci@0000:ff:0c.7 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:16 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Unicast Register 0 vendor: Intel Corporation physical id: d bus info: pci@0000:ff:0d.0 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:17 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Unicast Register 0 vendor: Intel Corporation physical id: d.1 bus info: pci@0000:ff:0d.1 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:18 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller System Address Decoder 1 vendor: Intel Corporation physical id: d.6 bus info: pci@0000:ff:0d.6 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:19 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Processor Home Agent vendor: Intel Corporation physical id: e bus info: pci@0000:ff:0e.0 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:20 UNCLAIMED description: Performance counters product: Xeon E5/Core i7 Processor Home Agent Performance Monitoring vendor: Intel Corporation physical id: e.1 bus info: pci@0000:ff:0e.1 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:21 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller Registers vendor: Intel Corporation physical id: f bus info: pci@0000:ff:0f.0 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:22 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller RAS Registers vendor: Intel Corporation physical id: f.1 bus info: pci@0000:ff:0f.1 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:23 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller Target Address Decoder 0 vendor: Intel Corporation physical id: f.2 bus info: pci@0000:ff:0f.2 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:24 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller Target Address Decoder 1 vendor: Intel Corporation physical id: f.3 bus info: pci@0000:ff:0f.3 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:25 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller Target Address Decoder 2 vendor: Intel Corporation physical id: f.4 bus info: pci@0000:ff:0f.4 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:26 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller Target Address Decoder 3 vendor: Intel Corporation physical id: f.5 bus info: pci@0000:ff:0f.5 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:27 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller Target Address Decoder 4 vendor: Intel Corporation physical id: f.6 bus info: pci@0000:ff:0f.6 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress configuration: latency=0 *-generic:28 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller Channel 0-3 Thermal Control 0 vendor: Intel Corporation physical id: 10 bus info: pci@0000:ff:10.0 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:29 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller Channel 0-3 Thermal Control 1 vendor: Intel Corporation physical id: 10.1 bus info: pci@0000:ff:10.1 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:30 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller ERROR Registers 0 vendor: Intel Corporation physical id: 10.2 bus info: pci@0000:ff:10.2 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:31 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller ERROR Registers 1 vendor: Intel Corporation physical id: 10.3 bus info: pci@0000:ff:10.3 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:32 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller Channel 0-3 Thermal Control 2 vendor: Intel Corporation physical id: 10.4 bus info: pci@0000:ff:10.4 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:33 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller Channel 0-3 Thermal Control 3 vendor: Intel Corporation physical id: 10.5 bus info: pci@0000:ff:10.5 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:34 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller ERROR Registers 2 vendor: Intel Corporation physical id: 10.6 bus info: pci@0000:ff:10.6 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:35 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Integrated Memory Controller ERROR Registers 3 vendor: Intel Corporation physical id: 10.7 bus info: pci@0000:ff:10.7 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:36 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 DDRIO vendor: Intel Corporation physical id: 11 bus info: pci@0000:ff:11.0 version: 07 width: 32 bits clock: 33MHz capabilities: pciexpress configuration: latency=0 *-generic:37 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 R2PCIe vendor: Intel Corporation physical id: 13 bus info: pci@0000:ff:13.0 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:38 UNCLAIMED description: Performance counters product: Xeon E5/Core i7 Ring to PCI Express Performance Monitor vendor: Intel Corporation physical id: 13.1 bus info: pci@0000:ff:13.1 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:39 UNCLAIMED description: Performance counters product: Xeon E5/Core i7 QuickPath Interconnect Agent Ring Registers vendor: Intel Corporation physical id: 13.4 bus info: pci@0000:ff:13.4 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:40 UNCLAIMED description: Performance counters product: Xeon E5/Core i7 Ring to QuickPath Interconnect Link 0 Performance Monitor vendor: Intel Corporation physical id: 13.5 bus info: pci@0000:ff:13.5 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:41 UNCLAIMED description: System peripheral product: Xeon E5/Core i7 Ring to QuickPath Interconnect Link 1 Performance Monitor vendor: Intel Corporation physical id: 13.6 bus info: pci@0000:ff:13.6 version: 07 width: 32 bits clock: 33MHz configuration: latency=0 *-scsi:0 physical id: 1 logical name: scsi0 capabilities: emulated *-disk description: ATA Disk product: INTEL SSDSC2CW06 physical id: 0.0.0 bus info: scsi@0:0.0.0 logical name: /dev/sda version: 400i serial: CVCV203005QT060AGN size: 55GiB (60GB) capabilities: partitioned partitioned:dos configuration: ansiversion=5 signature=00068b12 *-volume:0 description: EXT4 volume vendor: Linux physical id: 1 bus info: scsi@0:0.0.0,1 logical name: /dev/sda1 logical name: /boot version: 1.0 serial: 1cae7537-8477-41a0-9be5-0226b32ff871 size: 500MiB capacity: 500MiB capabilities: primary bootable journaled extended_attributes huge_files dir_nlink extents ext4 ext2 initialized configuration: created=2012-04-01 00:09:43 filesystem=ext4 lastmountpoint=/bootï¿oeï¿oeSï¿oeï¿oeï¿oeï¿oeï¿oeïï¿oeï¿oewwï¿oeï¿oeï¿oeï¿oeï¿oeÆ ï¿oeï¿oeï¿oeï¿oeSï¿oeï¿oeï¿oeï¿oeï¿oe:Sï¿oeï¿oeï¿oeï¿oeï¿oeï¿oeï¿oeï¿oeï¿oe modified=2012-08-12 14:20:46 mount.fstype=ext4 mount.options=rw,relatime,data=ordered mounted=2012-08-12 14:19:50 state=mounted *-volume:1 description: Linux LVM Physical Volume partition physical id: 2 bus info: scsi@0:0.0.0,2 logical name: /dev/sda2 serial: bOlaga-agRz-yNok-0eIk-spCW-u9Nw-3dywdy size: 55GiB capacity: 55GiB capabilities: primary multi lvm2 *-scsi:1 physical id: 2 logical name: scsi2 capabilities: emulated *-disk description: ATA Disk product: WDC WD5003ABYX-3 vendor: Western Digital physical id: 0.0.0 bus info: scsi@2:0.0.0 logical name: /dev/sdb version: 01.0 serial: WD-WMAYP3047060 size: 465GiB (500GB) configuration: ansiversion=5 signature=000acc06 *-scsi:2 physical id: 3 logical name: scsi3 capabilities: emulated *-cdrom description: DVD-RAM writer product: BDDVDRW CH12LS28 vendor: HL-DT-ST physical id: 0.0.0 bus info: scsi@3:0.0.0 logical name: /dev/cdrom1 logical name: /dev/cdrw1 logical name: /dev/dvd1 logical name: /dev/dvdrw1 logical name: /dev/scd0 logical name: /dev/sr0 version: 1.00 capabilities: removable audio cd-r cd-rw dvd dvd-r dvd-ram configuration: ansiversion=5 status=nodisc *-scsi:3 physical id: 7 logical name: scsi4 capabilities: emulated *-disk description: ATA Disk product: WDC WD5003ABYX-3 vendor: Western Digital physical id: 0.0.0 bus info: scsi@4:0.0.0 logical name: /dev/sdc version: 01.0 serial: WD-WMAYP3015607 size: 465GiB (500GB) configuration: ansiversion=5 signature=00021201 *-scsi:4 physical id: 12 logical name: scsi6 capabilities: emulated *-disk description: ATA Disk product: WDC WD5003ABYX-3 vendor: Western Digital physical id: 0.0.0 bus info: scsi@6:0.0.0 logical name: /dev/sdd version: 01.0 serial: WD-WMAYP3118946 size: 465GiB (500GB) configuration: ansiversion=5 signature=00057a0a *-scsi:5 physical id: 14 logical name: scsi7 capabilities: emulated *-disk description: ATA Disk product: WDC WD5003ABYX-3 vendor: Western Digital physical id: 0.0.0 bus info: scsi@7:0.0.0 logical name: /dev/sde version: 01.0 serial: WD-WMAYP3121001 size: 465GiB (500GB) configuration: ansiversion=5 signature=00091031 *-scsi:6 physical id: 15 logical name: scsi8 capabilities: emulated *-disk description: ATA Disk product: WDC WD5003ABYX-3 vendor: Western Digital physical id: 0.0.0 bus info: scsi@8:0.0.0 logical name: /dev/sdf version: 01.0 serial: WD-WMAYP3120517 size: 465GiB (500GB) configuration: ansiversion=5 signature=0003c531 *-scsi:7 physical id: 16 logical name: scsi9 capabilities: emulated *-disk description: ATA Disk product: WDC WD5003ABYX-3 vendor: Western Digital physical id: 0.0.0 bus info: scsi@9:0.0.0 logical name: /dev/sdg version: 01.0 serial: WD-WMAYP3042397 size: 465GiB (500GB) configuration: ansiversion=5 signature=0007470e *-network:0 DISABLED description: Ethernet interface physical id: 1 logical name: virbr1-nic serial: 52:54:00:4f:78:21 size: 10MB/s capabilities: ethernet physical configuration: autonegotiation=off broadcast=yes driver=tun driverversion=1.6 duplex=full link=no multicast=yes port=twisted pair speed=10MB/s *-network:1 DISABLED description: Ethernet interface physical id: 2 logical name: virbr0-nic serial: 52:54:00:c9:ca:e9 size: 10MB/s capabilities: ethernet physical configuration: autonegotiation=off broadcast=yes driver=tun driverversion=1.6 duplex=full link=no multicast=yes port=twisted pair speed=10MB/s ------------------------------------------------------------------- superiotool r4.0-2752-g8c02790 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=standard) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x2e... Failed. Returned data: id=0x8728, rev=0x1 Probing for ITE Super I/O (init=it8502e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x164e... Failed. Returned data: port=0xff, port+1=0xff Probing for Nuvoton Super I/O at 0x164e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x164e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for Nuvoton Super I/O at 0x2e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x2e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for Nuvoton Super I/O at 0x4e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x4e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for VIA Super I/O at 0x3f0... PCI device 1106:0686 not found. Probing for AMD EC Super I/O at 0xaa... Probing for Server Engines Super I/O at 0x2e... Failed. Returned data: id=0xffff, rev=0xff Probing for Infineon Super I/O at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for Infineon Super I/O at 0x4e... Failed. Returned data: id=0xff, rev=0xff No Super I/O found --------------------------------------------- Cheers! a.

1 0

(help me to get better) flashrom support for thinkpads with locked down opcodes
by Stefan Tauner 27 Aug '12

27 Aug '12

Hi there! As you probably all know the procedure to relieve the coreboot- supported thinkpads from their proprietary firmware is not completely trivial[1]. The main problem is that the vendor has locked down the available SPI opcodes that we are allowed to use and this hinders current flashrom to identify the flash chip. Carl-Daniel has started to work on a patch that allows flashrom to use a lower-quality identifying opcode (RES) on such locked down computers without spoiling flashrom use on other devices. I have continued that and we now have a patch that allows probing and reading on the thinkpads. Erase (and hence write in practice) does not work yet, because the available erase opcodes are also limited, but that will be dealt with shortly(-ish :). The current version of the patch can be found here: http://patchwork.coreboot.org/patch/3726/ I would like to request the help of at least one volunteer who is able to recover from failed flash attempts and is willing to revert to the vendor firmware temporarily and spend some time testing patches we sent him. This will of course not make the coreboot conversion foolproof and is quite late... but i am pretty sure it will still be welcomed by newbies :) Also, i would like to see a flashrom -V log of any affected machine that is not a T60 (2007-GCG)[2] and is running the vendor firmware. [1]: http://www.coreboot.org/Lenovo_x60x [2]: http://paste.flashrom.org/view.php?id=635 -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 2

Re: [flashrom] [PATCH] Add support for Realtek RTL8169.
by Carl-Daniel Hailfinger 27 Aug '12

27 Aug '12

Am 25.08.2012 19:00 schrieb Stefan Tauner: > And some cleanups including the removal of any left traces of the > nicsmc1211 programmer. The RTL8169 still needs someone to test it, > but it's good enough to be in the tree now. > > Signed-off-by: Sergey Lichack <shadowpilot34(a)gmail.com> > Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > Acked-by: Mathias Krause <mathias.krause(a)secunet.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> The SMC2->SMC changes in the latest patch need to be undone. That odd name was there for a reason. The man page cleanup needs similar care. Regards, Carl-Daniel -- http://www.hailfinger.org/

2 3

[commit] r1586 - trunk
by repository service 27 Aug '12

27 Aug '12

Author: stefanct Date: Mon Aug 27 03:24:15 2012 New Revision: 1586 URL: http://flashrom.org/trac/flashrom/changeset/1586 Log: Add support for Realtek RTL8169. And some cleanups including the removal of any left traces of the nicsmc1211 programmer. The RTL8169 still needs someone to test it, but it's good enough to be in the tree now. Signed-off-by: Sergey Lichack <shadowpilot34(a)gmail.com> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Mathias Krause <mathias.krause(a)secunet.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashrom.8 trunk/flashrom.c trunk/nicrealtek.c Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Mon Aug 27 02:44:42 2012 (r1585) +++ trunk/flashrom.8 Mon Aug 27 03:24:15 2012 (r1586) @@ -172,9 +172,7 @@ .sp .BR "* nic3com" " (for flash ROMs on 3COM network cards)" .sp -.BR "* nicrealtek" " (for flash ROMs on Realtek network cards)" -.sp -.BR "* nicsmc1211" " (for flash ROMs on RTL8139-compatible SMC2 network cards)" +.BR "* nicrealtek" " (for flash ROMs on Realtek and SMC 1211 network cards)" .sp .BR "* nicnatsemi" " (for flash ROMs on National Semiconductor DP838* network \ cards)" @@ -532,7 +530,7 @@ .B content is an 8-bit hexadecimal value. .SS -.BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " nicintel\ +.BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel\ " , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\ " , " satamv" ", and " atahpt " programmers These programmers have an option to specify the PCI address of the card @@ -761,7 +759,7 @@ needs raw memory access, PCI configuration space access, raw I/O port access (x86) and MSR access (x86). .sp -.BR nic3com ", " nicrealtek ", " nicsmc1211 " and " nicnatsemi " +.BR nic3com ", " nicrealtek " and " nicnatsemi " need PCI configuration space read access and raw I/O port access. .sp .B atahpt @@ -792,7 +790,7 @@ .B dummy needs no access permissions at all. .sp -.BR internal ", " nic3com ", " nicrealtek ", " nicsmc1211 ", " nicnatsemi ", " +.BR internal ", " nic3com ", " nicrealtek ", " nicnatsemi ", " .BR gfxnvidia ", " drkaiser ", " satasii ", " satamv " and " atahpt have to be run as superuser/root, and need additional raw access permission. .sp Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Mon Aug 27 02:44:42 2012 (r1585) +++ trunk/flashrom.c Mon Aug 27 03:24:15 2012 (r1586) @@ -95,7 +95,6 @@ { /* This programmer works for Realtek RTL8139 and SMC 1211. */ .name = "nicrealtek", - //.name = "nicsmc1211", .init = nicrealtek_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, Modified: trunk/nicrealtek.c ============================================================================== --- trunk/nicrealtek.c Mon Aug 27 02:44:42 2012 (r1585) +++ trunk/nicrealtek.c Mon Aug 27 03:24:15 2012 (r1586) @@ -28,20 +28,18 @@ #define PCI_VENDOR_ID_REALTEK 0x10ec #define PCI_VENDOR_ID_SMC1211 0x1113 -#define BIOS_ROM_ADDR 0xD4 -#define BIOS_ROM_DATA 0xD7 +static int bios_rom_addr, bios_rom_data; const struct pcidev_status nics_realtek[] = { {0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"}, - {0x1113, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */ + {0x10ec, 0x8169, NT, "Realtek", "RTL8169"}, + {0x1113, 0x1211, OK, "SMC", "1211TX"}, /* RTL8139 clone */ {0}, }; -static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val, - chipaddr addr); -static uint8_t nicrealtek_chip_readb(const struct flashctx *flash, - const chipaddr addr); +static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); +static uint8_t nicrealtek_chip_readb(const struct flashctx *flash, const chipaddr addr); static const struct par_programmer par_programmer_nicrealtek = { .chip_readb = nicrealtek_chip_readb, .chip_readw = fallback_chip_readw, @@ -62,6 +60,20 @@ int nicrealtek_init(void) { + /* Beware, this ignores the vendor ID! */ + switch (pcidev_dev->device_id) { + case 0x8139: /* RTL8139 */ + case 0x1211: /* SMC 1211TX */ + default: + bios_rom_addr = 0xD4; + bios_rom_data = 0xD7; + break; + case 0x8169: /* RTL8169 */ + bios_rom_addr = 0x30; + bios_rom_data = 0x33; + break; + } + if (rget_io_perms()) return 1; @@ -75,42 +87,40 @@ return 0; } -static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val, - chipaddr addr) +static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) { /* Output addr and data, set WE to 0, set OE to 1, set CS to 0, * enable software access. */ OUTL(((uint32_t)addr & 0x01FFFF) | 0x0A0000 | (val << 24), - io_base_addr + BIOS_ROM_ADDR); + io_base_addr + bios_rom_addr); /* Output addr and data, set WE to 1, set OE to 1, set CS to 1, * enable software access. */ OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24), - io_base_addr + BIOS_ROM_ADDR); + io_base_addr + bios_rom_addr); } -static uint8_t nicrealtek_chip_readb(const struct flashctx *flash, - const chipaddr addr) +static uint8_t nicrealtek_chip_readb(const struct flashctx *flash, const chipaddr addr) { uint8_t val; /* FIXME: Can we skip reading the old data and simply use 0? */ /* Read old data. */ - val = INB(io_base_addr + BIOS_ROM_DATA); + val = INB(io_base_addr + bios_rom_data); /* Output new addr and old data, set WE to 1, set OE to 0, set CS to 0, * enable software access. */ OUTL(((uint32_t)addr & 0x01FFFF) | 0x060000 | (val << 24), - io_base_addr + BIOS_ROM_ADDR); + io_base_addr + bios_rom_addr); /* Read new data. */ - val = INB(io_base_addr + BIOS_ROM_DATA); + val = INB(io_base_addr + bios_rom_data); /* Output addr and new data, set WE to 1, set OE to 1, set CS to 1, * enable software access. */ OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24), - io_base_addr + BIOS_ROM_ADDR); + io_base_addr + bios_rom_addr); return val; }

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Re: [flashrom] [PATCH] Some c99 fixes.
by Carl-Daniel Hailfinger 27 Aug '12

27 Aug '12

Am 27.08.2012 01:34 schrieb Stefan Tauner: > This patch just fixes a limited number of bits not conforming to c99 by using > - __asm__ instead of just asm > - {0} instead of {} for struct initialization > - h_addr_list[0] instead of h_addr to access the host address in > struct hostent > - #include <strings.h> where needed (for ffs and strcasecmp) > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Cross-compilation with mingw64 and djgpp tested, works as well as without the patch. You might want to call the patch "C11 fixes" instead because some complaints disappear in C11 mode. Your choice. Regards, Carl-Daniel -- http://www.hailfinger.org/

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