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9164 discussions

Re: [flashrom] Asrock E350M1 - flashrom erase failed
by Ross Amans 02 Jul '13

02 Jul '13

Rich - Please support Stefaan (Amplidata) at HDS. He has flashrom questions. I have to leave for an appointment. Ross On Tue, Jul 2, 2013 at 3:17 PM, Ross Amans <ross.amans(a)sanmina.com> wrote: > Oh, crap. > I do not know how much we have tested with ubuntu. What verssion of ubuntu > do you run? > I know our flashrom owner favors ubuntu. > Oh, wait a minute. > su - > (change to root) > Ross > > On Tue, Jul 2, 2013 at 3:15 PM, Stefan Tauner < > stefan.tauner(a)student.tuwien.ac.at> wrote: > >> On Mon, 01 Jul 2013 22:17:28 +0200 >> Reiner Luett <diffusae(a)yahoo.se> wrote: >> >> > Hi, >> > >> > with the developer version I get the following error: >> > >> > Can't mmap memory using /dev/mem: Operation not permitted >> > >> > Any suggestion? >> >> Please always post the complete log with at least -V verbosity (in this >> case I would prefer -VVV). You can create a log file with the -o >> parameter, if you like. >> >> -- >> Kind regards/Mit freundlichen Grüßen, Stefan Tauner >> >> _______________________________________________ >> flashrom mailing list >> flashrom(a)flashrom.org >> http://www.flashrom.org/mailman/listinfo/flashrom > > > > > -- > Ross Amans > Systems Engineer > Newisys div of Sanmina > 5385 Mark Dabling blvd > Colorado Springs, CO 80918 > 719-884-8714 (work) > 719-287-4446 (cell) > -- Ross Amans Systems Engineer Newisys div of Sanmina 5385 Mark Dabling blvd Colorado Springs, CO 80918 719-884-8714 (work) 719-287-4446 (cell) CONFIDENTIALITY This e-mail message and any attachments thereto, is intended only for use by the addressee(s) named herein and may contain legally privileged and/or confidential information. If you are not the intended recipient of this e-mail message, you are hereby notified that any dissemination, distribution or copying of this e-mail message, and any attachments thereto, is strictly prohibited. If you have received this e-mail message in error, please immediately notify the sender and permanently delete the original and any copies of this email and any prints thereof. ABSENT AN EXPRESS STATEMENT TO THE CONTRARY HEREINABOVE, THIS E-MAIL IS NOT INTENDED AS A SUBSTITUTE FOR A WRITING. Notwithstanding the Uniform Electronic Transactions Act or the applicability of any other law of similar substance and effect, absent an express statement to the contrary hereinabove, this e-mail message its contents, and any attachments hereto are not intended to represent an offer or acceptance to enter into a contract and are not otherwise intended to bind the sender, Sanmina Corporation (or any of its subsidiaries), or any other person or entity.

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Enabling Dediprog by default in flashrom
by Stefan Tauner 01 Jul '13

01 Jul '13

Hi, the release of flashrom 0.9.7 is imminent and I would really like to enable the Dediprog programmer by default. Carl-Daniel informed me that the only problem is that we do not know which opcode is actually used for reading on the SPI bus. It could be that we initiate a fast read (0x0b) instead of a normal read (0x03). This would work with the majority of flash chips but would not with others where flashrom should normally work. Since we are not sure we don't want to enable it without further consideration/testing/warning messages. Furthermore not all chips supporting fast read have this fact noted in their datashets. So testing any apparently non-fast read chip does not suffice. We would rather be able to check the opcode on the SPI bus with a logic analyzer directly. Are there any Dediprog users who can help us with that please? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Asrock E350M1 - flashrom erase failed
by Reiner Luett 30 Jun '13

30 Jun '13

Hi, does anybody have a working flashrom version or could supply patches. I always get the Erase failed message, but flashing seems to work. Best regards, Reiner --

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Re: [flashrom] [x60s] flashrom compilation failing upon patching
by Stefan Tauner 29 Jun '13

29 Jun '13

On Sat, 29 Jun 2013 10:27:38 +0200 Tomasz Ostaszewski <tomasz.ostaszewski(a)interia.pl> wrote: > > This is wrong. Neither -c ... nor -f is required if you follow the guide > > in the wiki (http://www.coreboot.org/Lenovo_x60x). > > Those did not work for me, at least with stock BIOS. Agreed though, it > will works if coreboot is installed. With coreboot installed you no longer need to modify flashrom or use bucts. Actually the modified version of flashrom does not even work on coreboot. That is also the reason why step 9 undoes the changes. > On the minor side, the step 2, > i.e. flashing coreboot once it has been flashed to get the last 64k > right, require stock flashrom with no modifications/patches > whatsoever. I think you are confusing step 2 with 10 here. Then you are right and that was actually not mentioned in the tutorial until I added it (see step 9) a few days ago. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [x60s] flashrom compilation failing upon patching
by Stefan Tauner 29 Jun '13

29 Jun '13

On Wed, 26 Jun 2013 09:07:34 +0200 Tomasz Ostaszewski <tomasz.ostaszewski(a)interia.pl> wrote: > What the coreboot TWIKI does not tell you is that you need '-f' > (force) and '-c' (flashchip) options enabled. Also '-p > internal:laptop=force_I_want_ > a_brick' may be necessary. This is wrong. Neither -c ... nor -f is required if you follow the guide in the wiki (http://www.coreboot.org/Lenovo_x60x). I agree with the rest of the mail though. One better has an external programmer handy when doing this and so using that in the first place might be a better option. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH 00/12] Flashchip galore
by Stefan Tauner 28 Jun '13

28 Jun '13

most of them self-acked and all committed in r1681-r1693. thanks everyone involved! -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1693 - trunk
by repository service 28 Jun '13

28 Jun '13

Author: stefanct Date: Fri Jun 28 23:29:51 2013 New Revision: 1693 URL: http://flashrom.org/trac/flashrom/changeset/1693 Log: Add support for remaining Numonyx (Micron) N25Q chips. Add... - N25Q128..3E - N25Q128..1E - N25Q256..1E (defunct due to addressing) - N25Q256..3E (defunct due to addressing) - N25Q512..1E (defunct due to addressing) - N25Q512..3E (defunct due to addressing) - N25Q00A..3G (defunct due to addressing) Also, refine existing family members. Signed-off-by: Nikolay Nikolaev <evrinoma(a)gmail.com> Reviewed-by: Steven Zakulec <spzakulec(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h trunk/spi.h trunk/spi25.c trunk/spi25_statusreg.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Fri Jun 28 23:29:44 2013 (r1692) +++ trunk/chipdrivers.h Fri Jun 28 23:29:51 2013 (r1693) @@ -48,6 +48,7 @@ int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_c4(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen); @@ -91,6 +92,8 @@ int spi_disable_blockprotect_at25fs010(struct flashctx *flash); int spi_disable_blockprotect_at25fs040(struct flashctx *flash); int spi_prettyprint_status_register_en25s_wp(struct flashctx *flash); +int spi_prettyprint_status_register_n25q(struct flashctx *flash); +int spi_disable_blockprotect_n25q(struct flashctx *flash); int spi_prettyprint_status_register_bp2_ep_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash); int spi_prettyprint_status_register_sst25(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri Jun 28 23:29:44 2013 (r1692) +++ trunk/flashchips.c Fri Jun 28 23:29:51 2013 (r1693) @@ -7308,8 +7308,9 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, - .write = spi_chip_write_256, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1700, 2000}, }, @@ -7341,8 +7342,9 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, - .write = spi_chip_write_256, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1700, 2000}, }, @@ -7374,8 +7376,9 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, - .write = spi_chip_write_256, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, }, @@ -7407,8 +7410,9 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, - .write = spi_chip_write_256, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1700, 2000}, }, @@ -7440,9 +7444,246 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, - .write = spi_chip_write_256, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Numonyx", + .name = "N25Q128..1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q128__1E, + .total_size = 16384, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 4096 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16384 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Numonyx", + .name = "N25Q128..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q128__3E, + .total_size = 16384, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 4096 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16384 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Numonyx", + .name = "N25Q256..1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q256__1E, + .total_size = 32768, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_BAD_REW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 8192 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32768 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Numonyx", + .name = "N25Q256..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q256__3E, + .total_size = 32768, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_BAD_REW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 8192 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32768 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Numonyx", + .name = "N25Q512..1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q512__1E, + .total_size = 65536, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_BAD_REW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 16384 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 1024 } }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32 * 1024 * 1024, 2 } }, + .block_erase = spi_block_erase_c4, + }, { /* Some models have a bulk erase command too. */ + .eraseblocks = { {64 * 1024 * 1024, 1 } }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Numonyx", + .name = "N25Q512..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q512__3E, + .total_size = 65536, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_BAD_REW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 16384 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 1024 } }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32 * 1024 * 1024, 2 } }, + .block_erase = spi_block_erase_c4, + }, { /* Some models have a bulk erase command too. */ + .eraseblocks = { {64 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Numonyx", + .name = "N25Q00A..3G", /* ..3G = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q00A__3E, + .total_size = 131072, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_BAD_REW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 32768 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 2048 } }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32 * 1024 * 1024, 4 } }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, }, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Fri Jun 28 23:29:44 2013 (r1692) +++ trunk/flashchips.h Fri Jun 28 23:29:51 2013 (r1693) @@ -663,11 +663,18 @@ #define ST_M29W010B 0x23 #define ST_M29W040B 0xE3 #define ST_M29W512B 0x27 -#define ST_N25Q016__1E 0xBB15 /* N25Q016, 1.8V, (uniform sectors expected) */ -#define ST_N25Q032__3E 0xBA16 /* N25Q032, 3.0V, (uniform sectors expected) */ -#define ST_N25Q032__1E 0xBB16 /* N25Q032, 1.8V, (uniform sectors expected) */ -#define ST_N25Q064__3E 0xBA17 /* N25Q064, 3.0V, (uniform sectors expected) */ -#define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, (uniform sectors expected) */ +#define ST_N25Q016__1E 0xBB15 /* N25Q016, 1.8V, (uniform sectors expected) */ +#define ST_N25Q032__3E 0xBA16 /* N25Q032, 3.0V, (uniform sectors expected) */ +#define ST_N25Q032__1E 0xBB16 /* N25Q032, 1.8V, (uniform sectors expected) */ +#define ST_N25Q064__3E 0xBA17 /* N25Q064, 3.0V, (uniform sectors expected) */ +#define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, (uniform sectors expected) */ +#define ST_N25Q128__3E 0xBA18 /* N25Q128, 3.0V, (uniform sectors expected) */ +#define ST_N25Q128__1E 0xBB18 /* N25Q128, 1.8V, (uniform sectors expected) */ +#define ST_N25Q256__3E 0xBA19 /* N25Q256, 3.0V, (uniform sectors expected) */ +#define ST_N25Q256__1E 0xBB19 /* N25Q256, 1.8V, (uniform sectors expected) */ +#define ST_N25Q512__3E 0xBA20 /* N25Q512, 3.0V, (uniform sectors expected) */ +#define ST_N25Q512__1E 0xBB20 /* N25Q512, 1.8V, (uniform sectors expected) */ +#define ST_N25Q00A__3E 0xBA21 /* N25Q00A, 3.0V, (uniform sectors expected) */ #define SYNCMOS_MVC_ID 0x40 /* SyncMOS (SM) and Mosel Vitelic Corporation (MVC) */ #define MVC_V29C51000T 0x00 Modified: trunk/spi.h ============================================================================== --- trunk/spi.h Fri Jun 28 23:29:44 2013 (r1692) +++ trunk/spi.h Fri Jun 28 23:29:51 2013 (r1693) @@ -91,6 +91,11 @@ #define JEDEC_BE_81_OUTSIZE 0x04 #define JEDEC_BE_81_INSIZE 0x00 +/* Block Erase 0xc4 is supported by Micron chips. */ +#define JEDEC_BE_C4 0xc4 +#define JEDEC_BE_C4_OUTSIZE 0x04 +#define JEDEC_BE_C4_INSIZE 0x00 + /* Block Erase 0xd8 is supported by EON/Macronix chips. */ #define JEDEC_BE_D8 0xd8 #define JEDEC_BE_D8_OUTSIZE 0x04 Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Fri Jun 28 23:29:44 2013 (r1692) +++ trunk/spi25.c Fri Jun 28 23:29:51 2013 (r1693) @@ -474,6 +474,49 @@ } /* Block size is usually + * 32M (one die) for Micron + */ +int spi_block_erase_c4(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + int result; + struct spi_command cmds[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BE_C4_OUTSIZE, + .writearr = (const unsigned char[]){ + JEDEC_BE_C4, + (addr >> 16) & 0xff, + (addr >> 8) & 0xff, + (addr & 0xff) + }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + result = spi_send_multicommand(flash, cmds); + if (result) { + msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); + return result; + } + /* Wait until the Write-In-Progress bit is cleared. + * This usually takes 240-480 s, so wait in 500 ms steps. + */ + while (spi_read_status_register(flash) & SPI_SR_WIP) + programmer_delay(500 * 1000 * 1000); + /* FIXME: Check the status register for errors. */ + return 0; +} + +/* Block size is usually * 64k for Macronix * 32k for SST * 4-32k non-uniform for EON @@ -780,6 +823,8 @@ return &spi_block_erase_62; case 0x81: return &spi_block_erase_81; + case 0xc4: + return &spi_block_erase_c4; case 0xc7: return &spi_block_erase_c7; case 0xd7: Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Fri Jun 28 23:29:44 2013 (r1692) +++ trunk/spi25_statusreg.c Fri Jun 28 23:29:51 2013 (r1693) @@ -607,6 +607,28 @@ /* === Intel/Numonyx/Micron - Spansion === */ +int spi_disable_blockprotect_n25q(struct flashctx *flash) +{ + return spi_disable_blockprotect_generic(flash, 0x5C, 1 << 7, 0, 0xFF); +} + +int spi_prettyprint_status_register_n25q(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_srwd(status); + if (flash->chip->total_size <= 32 / 8 * 1024) /* N25Q16 and N25Q32: reserved */ + spi_prettyprint_status_register_bit(status, 6); + else + msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n", + (status & (1 << 6)) ? "" : "not "); + msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top"); + spi_prettyprint_status_register_bp(status, 2); + spi_prettyprint_status_register_welwip(status); + return 0; +} + /* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */ /* TODO: Clear P_FAIL and E_FAIL with Clear SR Fail Flags Command (30h) here? */ int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash)

1 0

[commit] r1692 - trunk
by repository service 28 Jun '13

28 Jun '13

Author: stefanct Date: Fri Jun 28 23:29:44 2013 New Revision: 1692 URL: http://flashrom.org/trac/flashrom/changeset/1692 Log: Add support for Spansion S25FL...S chips. Add... - S25FL128S - S25FL256S uniform version (defunct due to addressing) - S25FL512S uniform version (defunct due to addressing) Merge Intel S33 status register functions with this one's. Signed-off-by: Nikolay Nikolaev <evrinoma(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h trunk/spi25_statusreg.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Fri Jun 28 23:29:36 2013 (r1691) +++ trunk/chipdrivers.h Fri Jun 28 23:29:44 2013 (r1692) @@ -91,8 +91,8 @@ int spi_disable_blockprotect_at25fs010(struct flashctx *flash); int spi_disable_blockprotect_at25fs040(struct flashctx *flash); int spi_prettyprint_status_register_en25s_wp(struct flashctx *flash); -int spi_prettyprint_status_register_s33(struct flashctx *flash); -int spi_disable_blockprotect_s33(struct flashctx *flash); +int spi_prettyprint_status_register_bp2_ep_srwd(struct flashctx *flash); +int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash); int spi_prettyprint_status_register_sst25(struct flashctx *flash); int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash); int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri Jun 28 23:29:36 2013 (r1691) +++ trunk/flashchips.c Fri Jun 28 23:29:44 2013 (r1692) @@ -5159,8 +5159,8 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_s33, - .unlock = spi_disable_blockprotect_s33, + .printlock = spi_prettyprint_status_register_bp2_ep_srwd, + .unlock = spi_disable_blockprotect_bp2_ep_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* also fast read 0x0B */ .voltage = {2700, 3600}, @@ -5198,8 +5198,8 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_s33, - .unlock = spi_disable_blockprotect_s33, + .printlock = spi_prettyprint_status_register_bp2_ep_srwd, + .unlock = spi_disable_blockprotect_bp2_ep_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* also fast read 0x0B */ .voltage = {2700, 3600}, @@ -5237,8 +5237,8 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_s33, - .unlock = spi_disable_blockprotect_s33, + .printlock = spi_prettyprint_status_register_bp2_ep_srwd, + .unlock = spi_disable_blockprotect_bp2_ep_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* also fast read 0x0B */ .voltage = {2700, 3600}, @@ -5276,8 +5276,8 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_s33, - .unlock = spi_disable_blockprotect_s33, + .printlock = spi_prettyprint_status_register_bp2_ep_srwd, + .unlock = spi_disable_blockprotect_bp2_ep_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* also fast read 0x0B */ .voltage = {2700, 3600}, @@ -5315,8 +5315,8 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_s33, - .unlock = spi_disable_blockprotect_s33, + .printlock = spi_prettyprint_status_register_bp2_ep_srwd, + .unlock = spi_disable_blockprotect_bp2_ep_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* also fast read 0x0B */ .voltage = {2700, 3600}, @@ -5354,8 +5354,8 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_s33, - .unlock = spi_disable_blockprotect_s33, + .printlock = spi_prettyprint_status_register_bp2_ep_srwd, + .unlock = spi_disable_blockprotect_bp2_ep_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* also fast read 0x0B */ .voltage = {2700, 3600}, @@ -8586,6 +8586,112 @@ .voltage = {2700, 3600}, }, + { + .vendor = "Spansion", + .name = "S25FL128S......0", /* uniform 256kB sectors */ + .bustype = BUS_SPI, + .manufacture_id = SPANSION_ID, + .model_id = SPANSION_S25FL128, + .total_size = 16384, + .page_size = 256, + /* supports 4B addressing */ + /* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {256 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 16384 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { { 16384 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: SR2 and many others */ + .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: various other locks */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Spansion", + .name = "S25FL256S......0", /* uniform 256kB sectors */ + .bustype = BUS_SPI, + .manufacture_id = SPANSION_ID, + .model_id = SPANSION_S25FL256, + .total_size = 32768, + .page_size = 256, + /* supports 4B addressing */ + /* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_BAD_REW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {256 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 32768 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { { 32768 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: SR2 and many others */ + .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: various other locks */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Spansion", + .name = "S25FL512S", + .bustype = BUS_SPI, + .manufacture_id = SPANSION_ID, + .model_id = SPANSION_S25FL512, + .total_size = 65536, + .page_size = 256, + /* supports 4B addressing */ + /* supports SFDP */ + /* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_BAD_REW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {256 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 65536 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { { 65536 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: SR2 and many others */ + .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: various other locks */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + { .vendor = "SST", .name = "SST25LF040A", Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Fri Jun 28 23:29:36 2013 (r1691) +++ trunk/flashchips.h Fri Jun 28 23:29:44 2013 (r1692) @@ -540,6 +540,9 @@ #define SPANSION_S25FL016A 0x0214 #define SPANSION_S25FL032A 0x0215 /* Same as S25FL032P, but the latter supports EDI and CFI */ #define SPANSION_S25FL064A 0x0216 /* Same as S25FL064P, but the latter supports EDI and CFI */ +#define SPANSION_S25FL128 0x2018 +#define SPANSION_S25FL256 0x0219 +#define SPANSION_S25FL512 0x0220 #define SPANSION_S25FL204 0x4013 #define SPANSION_S25FL208 0x4014 #define SPANSION_S25FL216 0x4015 /* Same as S25FL216K, but the latter supports OTP, 3 status regs, quad I/O, SFDP etc. */ Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Fri Jun 28 23:29:36 2013 (r1691) +++ trunk/spi25_statusreg.c Fri Jun 28 23:29:44 2013 (r1692) @@ -605,15 +605,17 @@ return 0; } -/* === Intel === */ +/* === Intel/Numonyx/Micron - Spansion === */ +/* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */ /* TODO: Clear P_FAIL and E_FAIL with Clear SR Fail Flags Command (30h) here? */ -int spi_disable_blockprotect_s33(struct flashctx *flash) +int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash) { return spi_disable_blockprotect_bp2_srwd(flash); } -int spi_prettyprint_status_register_s33(struct flashctx *flash) +/* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */ +int spi_prettyprint_status_register_bp2_ep_srwd(struct flashctx *flash) { uint8_t status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status);

1 0

[commit] r1691 - trunk
by repository service 28 Jun '13

28 Jun '13

Author: stefanct Date: Fri Jun 28 23:29:36 2013 New Revision: 1691 URL: http://flashrom.org/trac/flashrom/changeset/1691 Log: Add support for Spansion S25FL2 chips. Add... - S25FL204K - S25FL208K - S25FL216K (same ID as S25FL116K) Signed-off-by: Nikolay Nikolaev <evrinoma(a)gmail.com> Reviewed-by: Steven Zakulec <spzakulec(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri Jun 28 23:29:27 2013 (r1690) +++ trunk/flashchips.c Fri Jun 28 23:29:36 2013 (r1691) @@ -8484,6 +8484,109 @@ }, { + .vendor = "Spansion", + .name = "S25FL204K", + .bustype = BUS_SPI, + .manufacture_id = SPANSION_ID, + .model_id = SPANSION_S25FL204, + .total_size = 512, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 512 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { { 512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp3, + .unlock = spi_disable_blockprotect_bp3_srwd, /* #WP pin write-protects SRWP bit. */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Spansion", + .name = "S25FL208K", + .bustype = BUS_SPI, + .manufacture_id = SPANSION_ID, + .model_id = SPANSION_S25FL208, + .total_size = 1024, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { { 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp3, + .unlock = spi_disable_blockprotect_bp3_srwd, /* #WP pin write-protects SRWP bit. */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Spansion", + .name = "S25FL116K/S25FL216K", + .bustype = BUS_SPI, + .manufacture_id = SPANSION_ID, + .model_id = SPANSION_S25FL216, + .total_size = 2048, + .page_size = 256, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 (S25FL116K only) */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 2048 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { { 2048 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp3, + .unlock = spi_disable_blockprotect_bp3_srwd, /* #WP pin write-protects SRWP bit. */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */ + .voltage = {2700, 3600}, + }, + + { .vendor = "SST", .name = "SST25LF040A", .bustype = BUS_SPI, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Fri Jun 28 23:29:27 2013 (r1690) +++ trunk/flashchips.h Fri Jun 28 23:29:36 2013 (r1691) @@ -540,7 +540,9 @@ #define SPANSION_S25FL016A 0x0214 #define SPANSION_S25FL032A 0x0215 /* Same as S25FL032P, but the latter supports EDI and CFI */ #define SPANSION_S25FL064A 0x0216 /* Same as S25FL064P, but the latter supports EDI and CFI */ - +#define SPANSION_S25FL204 0x4013 +#define SPANSION_S25FL208 0x4014 +#define SPANSION_S25FL216 0x4015 /* Same as S25FL216K, but the latter supports OTP, 3 status regs, quad I/O, SFDP etc. */ /* * SST25 chips are SPI, first byte of device ID is memory type, second * byte of device ID is related to log(bitsize) at least for some chips.

1 0

[commit] r1690 - trunk
by repository service 28 Jun '13

28 Jun '13

Author: stefanct Date: Fri Jun 28 23:29:27 2013 New Revision: 1690 URL: http://flashrom.org/trac/flashrom/changeset/1690 Log: Add support for Micron/Numonyx/ST M25PX80. Also, refine status register prettyprinting and unlocking of all family members and add OTP details. Signed-off-by: Nikolay Nikolaev <evrinoma(a)gmail.com> Reviewed-by: Steven Zakulec <spzakulec(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri Jun 28 23:29:21 2013 (r1689) +++ trunk/flashchips.c Fri Jun 28 23:29:27 2013 (r1690) @@ -10149,6 +10149,38 @@ { .vendor = "ST", + .name = "M25PX80", + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_M25PX80, + .total_size = 1024, + .page_size = 256, + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { { 4 * 1024, 256 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, /* bit5: T/B */ + .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "ST", .name = "M25PX16", .bustype = BUS_SPI, .manufacture_id = ST_ID, @@ -10173,8 +10205,8 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_default_bp2, /* bit5: T/B */ + .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: per 64kB sector lock registers */ .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -10187,7 +10219,8 @@ .model_id = ST_M25PX32, .total_size = 4096, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 64B total; read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PRE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -10204,8 +10237,8 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_default_bp2, /* bit5: T/B */ + .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: per 64kB sector lock registers */ .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, @@ -10219,7 +10252,8 @@ .model_id = ST_M25PX64, .total_size = 8192, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 64B total; read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PRE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -10236,8 +10270,8 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_default_bp2, /* bit5: T/B */ + .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: per 64kB sector lock registers */ .write = spi_chip_write_256, .read = spi_chip_read, }, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Fri Jun 28 23:29:21 2013 (r1689) +++ trunk/flashchips.h Fri Jun 28 23:29:27 2013 (r1690) @@ -627,6 +627,7 @@ #define ST_M45PE40 0x4013 #define ST_M45PE80 0x4014 #define ST_M45PE16 0x4015 +#define ST_M25PX80 0x7114 #define ST_M25PX16 0x7115 #define ST_M25PX32 0x7116 #define ST_M25PX64 0x7117

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