flashrom

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[commit] r1786 - trunk
by repository service 04 May '14

04 May '14

Author: stefanct Date: Sun May 4 23:44:13 2014 New Revision: 1786 URL: http://flashrom.org/trac/flashrom/changeset/1786 Log: Support for Spansion S25FL132K and S25FL164K. Tested with actual S25FL164K via Arduino SPI. Signed-off-by: Nikolay Martynov <mar.kolya(a)gmail.com> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun May 4 02:55:24 2014 (r1785) +++ trunk/flashchips.c Sun May 4 23:44:13 2014 (r1786) @@ -9508,6 +9508,76 @@ { .vendor = "Spansion", + .name = "S25FL132K", + .bustype = BUS_SPI, + .manufacture_id = SPANSION_ID, + .model_id = SPANSION_S25FL132K, + .total_size = 4096, + .page_size = 256, + /* OTP: 768B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 4096 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { { 4096 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, /* TODO: improve */ + .unlock = spi_disable_blockprotect_bp2_srwd, /* #WP pin write-protects SRWP bit. */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Spansion", + .name = "S25FL164K", + .bustype = BUS_SPI, + .manufacture_id = SPANSION_ID, + .model_id = SPANSION_S25FL164K, + .total_size = 8192, + .page_size = 256, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 8192 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { { 8192 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp2, /* TODO: improve */ + .unlock = spi_disable_blockprotect_bp2_srwd, /* #WP pin write-protects SRWP bit. */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Spansion", .name = "S25FL128S......0", /* uniform 256kB sectors */ .bustype = BUS_SPI, .manufacture_id = SPANSION_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun May 4 02:55:24 2014 (r1785) +++ trunk/flashchips.h Sun May 4 23:44:13 2014 (r1786) @@ -566,6 +566,9 @@ #define SPANSION_S25FL204 0x4013 #define SPANSION_S25FL208 0x4014 #define SPANSION_S25FL216 0x4015 /* Same as S25FL216K, but the latter supports OTP, 3 status regs, quad I/O, SFDP etc. */ +#define SPANSION_S25FL132K 0x4016 +#define SPANSION_S25FL164K 0x4017 + /* * SST25 chips are SPI, first byte of device ID is memory type, second * byte of device ID is related to log(bitsize) at least for some chips.

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Flash access on ASUS F2A85 variants
by Stefan Tauner 04 May '14

04 May '14

Hello, I noticed that some F2A85 firmwares apparently block flashrom from accessing the flash correctly as noted here: http://www.coreboot.org/ASUS_F2A85-M#UEFI_builds_that_allow_flash_chip_acce… I could not find any details but the error message one receives: "ERROR: State of SpiAccessMacRomEn or SpiHostAccessRomEn prohibits full access." If I read the documentation of SpiHostAccessRomEn correctly then it should not bother us at all. It indicates it the ethernet firmware can access the host partition of the flash chip. If however the other bit (SpiAccessMacRomEn) is reset to 0 then we indeed have a problem. Can someone please send me the verbose output of flashrom to confirm which one it is? And I am also looking for testers with these boards, because I think the abort on SpiHostAccessRomEn is a bug in flashrom. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[PATCH] Added SST25WF080
by jharper＠iseis.com 04 May '14

04 May '14

This patch adds support for the SST25WF080 1 Mbyte SPI flash chip. It has been very minimally tested (basically one each read/write/verify), on Windows XP with a USB Blaster as the programmer. It worked, although it was horribly slow (at least 15 minutes to program 1 MB) - but I have not otherwise used this hardware/software combination to program anything, so that might be normal. - Jason Harper ---------------------------------------------------------------- This message was sent using IMP, the Internet Messaging Program.

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[commit] r1785 - trunk
by repository service 04 May '14

04 May '14

Author: stefanct Date: Sun May 4 02:55:24 2014 New Revision: 1785 URL: http://flashrom.org/trac/flashrom/changeset/1785 Log: Add support for SST25WF080. Also, refine status register prettyprinting and unlocking of the whole family. Signed-off-by: Jason Harper <jharper(a)iseis.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun May 4 01:01:18 2014 (r1784) +++ trunk/flashchips.c Sun May 4 02:55:24 2014 (r1785) @@ -10040,7 +10040,8 @@ .block_erase = spi_block_erase_c7, }, }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_sst25, /* FIXME: does not have a BP3 */ + .unlock = spi_disable_blockprotect_bp2_srwd, .write = spi_aai_write, .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {1650, 1950}, @@ -10074,7 +10075,8 @@ .block_erase = spi_block_erase_c7, }, }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_sst25, /* FIXME: does not have a BP3 */ + .unlock = spi_disable_blockprotect_bp2_srwd, .write = spi_aai_write, .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {1650, 1950}, @@ -10111,7 +10113,8 @@ .block_erase = spi_block_erase_c7, }, }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_sst25, /* FIXME: does not have a BP3 */ + .unlock = spi_disable_blockprotect_bp2_srwd, .write = spi_aai_write, .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {1650, 1950}, @@ -10148,7 +10151,46 @@ .block_erase = spi_block_erase_c7, }, }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_sst25, /* FIXME: does not have a BP3 */ + .unlock = spi_disable_blockprotect_bp2_srwd, + .write = spi_aai_write, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {1650, 1950}, + }, + + { + .vendor = "SST", + .name = "SST25WF080", + .bustype = BUS_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST25WF080, + .total_size = 1024, + .page_size = 256, + .feature_bits = FEATURE_WRSR_EITHER, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_sst25, /* *does* have a BP3 but it is useless */ + .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_aai_write, .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {1650, 1950}, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun May 4 01:01:18 2014 (r1784) +++ trunk/flashchips.h Sun May 4 02:55:24 2014 (r1785) @@ -575,6 +575,7 @@ #define SST_SST25WF010 0x2502 #define SST_SST25WF020 0x2503 #define SST_SST25WF040 0x2504 +#define SST_SST25WF080 0x2505 #define SST_SST25VF512A_REMS 0x48 /* REMS or RES opcode */ #define SST_SST25VF010_REMS 0x49 /* REMS or RES opcode */ #define SST_SST25VF020_REMS 0x43 /* REMS or RES opcode */

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[PATCH] Added support for MX23L3254
by Michael Coppola 04 May '14

04 May '14

I've added a new definition for the Macronix MX23L3254 chip (4M). Since it is a mask ROM, it doesn't support write or erase. Let me know if the definition is incorrect in describing this. Here's the datasheet for reference: http://www.macronix.com/Lists/DataSheet/Attachments/1233/MX23L3254,%203.0-3… Probe and read works when tested on a real chip: $ ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -r trying_again2.bin flashrom v0.9.7-r1767 on Linux 3.8.0-37-generic (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found Macronix flash chip "MX23L3254" (4096 kB, SPI) on buspirate_spi. === This flash part has status UNTESTED for operations: ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -VE, -Vw), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Reading flash... done. Signed-off-by: Michael Coppola <michael.n.coppola(a)gmail.com>

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[commit] r1784 - trunk
by repository service 04 May '14

04 May '14

Author: stefanct Date: Sun May 4 01:01:18 2014 New Revision: 1784 URL: http://flashrom.org/trac/flashrom/changeset/1784 Log: Add support for Macronix MX23L3254 mask ROM. Signed-off-by: Michael Coppola <michael.n.coppola(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/flash.h trunk/flashchips.c trunk/flashchips.h Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sat May 3 23:33:01 2014 (r1783) +++ trunk/flash.h Sun May 4 01:01:18 2014 (r1784) @@ -208,6 +208,7 @@ #define TEST_BAD_READ (1 << 5) #define TEST_BAD_ERASE (1 << 6) #define TEST_BAD_WRITE (1 << 7) +#define TEST_BAD_EW (TEST_BAD_ERASE | TEST_BAD_WRITE) #define TEST_BAD_REW (TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE) #define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE) #define TEST_BAD_MASK 0xf0 Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat May 3 23:33:01 2014 (r1783) +++ trunk/flashchips.c Sun May 4 01:01:18 2014 (r1784) @@ -5909,6 +5909,22 @@ { .vendor = "Macronix", + .name = "MX23L3254", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX23L3254, + .total_size = 4096, + .page_size = 256, + .tested = TEST_OK_PR | TEST_BAD_EW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .write = NULL, /* MX23L3254 is a mask ROM, so it is read-only */ + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {3000, 3600}, + }, + + { + .vendor = "Macronix", .name = "MX25L512(E)/MX25V512(C)", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sat May 3 23:33:01 2014 (r1783) +++ trunk/flashchips.h Sun May 4 01:01:18 2014 (r1784) @@ -423,13 +423,13 @@ #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */ -/* - * MX25 chips are SPI, first byte of device ID is memory type, +#define MACRONIX_ID 0xC2 /* Macronix (MX) */ +/* Mask ROMs */ +#define MACRONIX_MX23L3254 0x0516 +/* MX25 chips are SPI, first byte of device ID is memory type, * second byte of device ID is log(bitsize)-9. * Generalplus SPI chips seem to be compatible with Macronix - * and use the same set of IDs. - */ -#define MACRONIX_ID 0xC2 /* Macronix (MX) */ + * and use the same set of IDs. */ #define MACRONIX_MX25L512 0x2010 /* Same as MX25L512E, MX25V512, MX25V512C */ #define MACRONIX_MX25L1005 0x2011 /* Same as MX25L1005C, MX25L1006E */ #define MACRONIX_MX25L2005 0x2012 /* Same as MX25L2005C */ @@ -448,6 +448,7 @@ #define MACRONIX_MX25U12835E 0x2538 /* Same as MX25U12835F */ #define MACRONIX_MX25U25635F 0x2539 #define MACRONIX_MX25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */ + #define MACRONIX_MX29F001B 0x19 #define MACRONIX_MX29F001T 0x18 #define MACRONIX_MX29F002B 0x34 /* Same as MX29F002NB; N has reset pin n/c. */

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[commit] r1783 - in trunk: . util
by repository service 03 May '14

03 May '14

Author: stefanct Date: Sat May 3 23:33:01 2014 New Revision: 1783 URL: http://flashrom.org/trac/flashrom/changeset/1783 Log: Add a bunch of new/tested stuff and various small changes 20. Tested mainboards: OK: - abit BX6 2.0 Reported by Stefan Tauner - Acer EM61SM/EM61PM (used in Acer Aspire T180) Reported by Benjamin Bellec - ADLINK Express-HR Reported by Obermair Thomas - ASUS M3N-H/HDMI Reported by Franc Serres - Attro G5G100-P Reported by Christoph Grenz - ASRock 960GM-GS3 FX Reported by Fuley Istvan - Elitegroup P6BAP-A+ (V2.2) Reported by Arnaldo Pirrone - Elitegroup GeForce7050M-M (V2.0) Reported by Leif Middelschulte - Fujitsu D3041-A1 (used in ESPRIMO P2560) Reported by Daggi Duck - GIGABYTE GA-8S648 Reported by TeslaBIOS - GIGABYTE GA-970A-D3P (rev. 1.0) Reported by Jean-Francois Pirus - GIGABYTE GA-B85M-D3H Reported by Mladen Milinković - GIGABYTE GA-X79-UD3 Reported by Jeff O'Neil - GIGABYTE GA-X79-UP4 (rev. 1.0) Reported by George Spelvin - GIGABYTE GA-Z68MA-D2H-B3 (rev. 1.3) Reported by Vangelis Skarmoutsos - GIGABYTE GA-Z87-HD3 Reported by virii5 - Lenovo Tilapia CRB Reported by jenkins56 on IRC - MSI GT60-2OD (notebook, only with layout patches) Reported by Vasiliy Vylegzhanin - MSI MS-6704 (845PE Max2 PCB 1.0) (Pure Version w/o raid) Reported by professorll - MSI MS-7399 1.1 (used in Acer Aspire M5640/M3640) Reported by Koen Rousseau - MSI MS-7125 (K8N Neo4(-F/FI/FX)) We had a board enable for that one for years, but it was not (and still is not) completely clear which boards are covered. - MSI MS-7522 (MSI X58 Pro-E) Reported by Gianluigi Tiesi - PCWARE APM80-D3 Reported by César Augusto Jakoby - Pegatron IPP7A-CP Reported by Илья Шипко - Supermicro H8QME-2 Reported by Greg Tippitt - Supermicro X7SPA-H Reported by Kyle Bentley - Supermicro X7SPE-HF-D525 Reported by Micah Anderson - Supermicro X8DTE Reported by Mark Nipper - Supermicro X8SIL-F Reported by Peter Samuelson - ZOTAC IONITX-A (-E) version Reported by Maciej Wroniecki NOT OK: - Supermicro X10SLM-F Reported by Micah Anderson Flash chips: - Atmel AT29C020 to PREW (+PREW) It was marked like that in the past, but I could not find the reason why the test bits were reset. Urja Rannikko tested it again and it still works. - Eon EN25F10 to PREW (+PREW) Reported by Stolmár Tamás - Eon EN25QH64 to PR (+PR) Reported by Vladimir 'φ-coder' Serbinenko - GigaDevice GD25Q32(B) to PREW (+PREW) Reported by mrnuke - Macronix MX25L512(E)/MX25V512(C) to PREW (+PREW) Reported by Jamie Nichol - Macronix MX25L2005(C) to PREW (+PREW) Reported by Давыдов Дмитрий - Micron/Numonyx/ST N25Q064..1E to PREW (+PREW) Reported by Paolo Zambotti - Pmc Pm25LD010(C) to PREW (+PREW) Reported by Vasile Ceteras - Micron/Numonyx/ST M25P16 to PREW (+EW) Reported by raven - Micron/Numonyx/ST M25PX64 to PREW (+W) Reported by Zaolin - SST SST25VF020B to PREW (+PREW) Reported by Michaël Zweers - SST SST49LF040 to PREW (+W) Reported by Oskar Enoksson - Add support for MX25L3273E (evil twin of MX25L3205 et al.) Also, add MX25L1673 and MX25L6473E to the names of their twins and add a note about MX25L8073E. - Winbond W25X32 to PREW (+REW) Reported by The Raven - Winbond W29C010 etc. to PREW (+W) Reported by san Chipsets tested OK: - Intel NM70 (8086:1e5f) Reported by mrnuke - Intel C204 (8086:1c54) Reported by Vasiliy Vylegzhanin - Intel QM67 (8086:1c4f) Reported by Obermair Thomas - Intel HM77 (8086:1e57) Reported by Vasiliy Vylegzhanin - Intel B85 (8086:8c50) Reported by Mladen Milinković - Intel HM87 (8086:8c4b) Reported by Vasiliy Vylegzhanin - Intel Z87 (8086:8c44) Reported by virii5 - NVIDIA MCP51 (10de:0261) Reported by Marcin Kościelnicki - SiS 648 (1039:0648) Reported by TeslaBIOS Miscellaneous: - Mark ARM-USB-TINY-H as tested in ft2232_spi (reported by _nanodev_). - getrevision.sh: Ignore failing date calls. - getrevision.sh: Fix -u and -l for older git versions which require = for the git log grep parameter. - Corrected K8T Neo2-F entries due to a report from Stelios Tsampas. - Add "-p internal" to output that requests users to send flashrom -V logs. - Add Macbook2,1, Thinkpad X230, EasyNote LM85 to laptop whitelist. - Tiny other stuff. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/board_enable.c trunk/chipset_enable.c trunk/cli_output.c trunk/dummyflasher.c trunk/flashchips.c trunk/flashchips.h trunk/flashrom.8.tmpl trunk/ft2232_spi.c trunk/it87spi.c trunk/print.c trunk/spi25_statusreg.c trunk/util/getrevision.sh Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri May 2 17:41:42 2014 (r1782) +++ trunk/board_enable.c Sat May 3 23:33:01 2014 (r1783) @@ -334,7 +334,7 @@ } } msg_pinfo("Active config mode, unknown reg 0x20 ID: %02x.\n", model); - msg_pinfo("Please send the output of \"flashrom -V\" to \n" + msg_pinfo("Please send the output of \"flashrom -V -p internal\" to \n" "flashrom(a)flashrom.org with W836xx: your board name: flashrom -V\n" "as the subject to help us finish support for your Super I/O. Thanks.\n"); continue; @@ -489,7 +489,7 @@ * Winbond W83627THF: Raise GPIO 44. * * Suited for: - * - MSI K8T Neo2-F + * - MSI K8T Neo2-F V2.0 */ static int w83627thf_gpio44_raise_2e(void) { @@ -619,11 +619,9 @@ if (tmp & 0x02) { /* The data sheet contradicts itself about max size. */ max_rom_decode.parallel = 1024 * 1024; - msg_pinfo("IT8705F with very unusual settings. Please " - "send the output of \"flashrom -V\" to \n" - "flashrom(a)flashrom.org with " - "IT8705: your board name: flashrom -V\n" - "as the subject to help us finish " + msg_pinfo("IT8705F with very unusual settings.\n" + "Please send the output of \"flashrom -V -p internal\" to flashrom(a)flashrom.org\n" + "with \"IT8705: your board name: flashrom -V\" as the subject to help us finish\n" "support for your Super I/O. Thanks.\n"); ret = 1; } else if (tmp & 0x08) { @@ -1110,7 +1108,7 @@ /* * Suited for: * - Foxconn 6150K8MD-8EKRSH: Socket 939 + NVIDIA MCP51 - * - MSI K8N Neo4: NVIDIA CK804. TODO: Should probably be K8N Neo4 Platinum, see http://www.coreboot.org/pipermail/flashrom/2010-August/004362.html. + * - MSI K8N Neo4(-F/-FI/-FX/Platinum): NVIDIA CK804 * - MSI K8NGM2-L: NVIDIA MCP51 * - MSI K9N SLI: NVIDIA MCP55 */ @@ -2325,6 +2323,7 @@ {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", P3, "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, {0x8086, 0x27b9, 0xa0a0, 0x0632, 0x8086, 0x27da, 0xa0a0, 0x0632, NULL, NULL, NULL, P3, "AOpen", "i945GMx-VFX", 0, OK, intel_ich_gpio38_raise}, {0x8086, 0x277c, 0xa0a0, 0x060b, 0x8086, 0x27da, 0xa0a0, 0x060b, NULL, NULL, NULL, P3, "AOpen", "i975Xa-YDG", 0, OK, board_aopen_i975xa_ydg}, + {0x8086, 0x27A0, 0x8086, 0x7270, 0x8086, 0x27B9, 0x8086, 0x7270, "^MacBook2,1$", NULL, NULL, P2, "Apple", "MacBook2,1", 0, OK, p2_whitelist_laptop}, {0x8086, 0x27b8, 0x1849, 0x27b8, 0x8086, 0x27da, 0x1849, 0x27da, "^ConRoeXFire-eSATA2", NULL, NULL, P3, "ASRock", "ConRoeXFire-eSATA2", 0, OK, intel_ich_gpio16_raise}, {0x1022, 0x1536, 0x1849, 0x1536, 0x1022, 0x780e, 0x1849, 0x780e, "^Kabini CRB$", NULL, NULL, P2, "ASRock", "IMB-A180(-H)", 0, OK, p2_not_a_laptop}, {0x1039, 0x0741, 0x1849, 0x0741, 0x1039, 0x5513, 0x1849, 0x5513, "^K7S41 $", NULL, NULL, P3, "ASRock", "K7S41", 0, OK, w836xx_memw_enable_2e}, @@ -2425,14 +2424,15 @@ {0x8086, 0x27a0, 0x17aa, 0x2017, 0x8086, 0x27b9, 0x17aa, 0x2009, "^ThinkPad T60", NULL, NULL, P2, "Lenovo", "T60(s)", 0, OK, p2_whitelist_laptop}, {0x8086, 0x27a0, 0x17aa, 0x2017, 0x8086, 0x27b9, 0x17aa, 0x2009, "^ThinkPad X60", NULL, NULL, P2, "Lenovo", "X60(s)", 0, OK, p2_whitelist_laptop}, {0x8086, 0x3B07, 0x17AA, 0x2166, 0x8086, 0x3B30, 0x17AA, 0x2167, "^Lenovo X201", NULL, NULL, P2, "Lenovo", "X201", 0, OK, p2_whitelist_laptop}, + {0x8086, 0x1E22, 0x17AA, 0x21FA, 0x8086, 0x1E55, 0x17AA, 0x21FA, "^ThinkPad X230", NULL, NULL, P2, "Lenovo", "X230", 0, OK, p2_whitelist_laptop}, {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, P3, "Mitac", "6513WU", 0, OK, board_mitac_6513wu}, {0x8086, 0x8186, 0x8086, 0x8186, 0x8086, 0x8800, 0, 0, "^MSC Vertriebs GmbH$", NULL, NULL, P2, "MSC", "Q7-TCTC", 0, OK, p2_not_a_laptop}, - {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, P3, "MSI", "K8N Neo4-F", 0, OK, nvidia_mcp_gpio2_raise}, /* TODO: Should probably be K8N Neo4 Platinum, see http://www.coreboot.org/pipermail/flashrom/2010-August/004362.html. */ {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^MS-6163 (i440BX)$", NULL, NULL, P3, "MSI", "MS-6163 (MS-6163 Pro)", 0, OK, intel_piix4_gpo14_raise}, + {0x8086, 0x244b, 0x1462, 0x3910, 0x8086, 0x2442, 0x1462, 0x3910, NULL, NULL, NULL, P3, "MSI", "MS-6391 (845 Pro4)", 0, OK, intel_ich_gpio23_raise}, {0x1039, 0x0745, 0, 0, 0x1039, 0x0018, 0, 0, "^MS-6561", NULL, NULL, P3, "MSI", "MS-6561 (745 Ultra)", 0, OK, w836xx_memw_enable_2e}, {0x8086, 0x2560, 0x1462, 0x5770, 0x8086, 0x2562, 0x1462, 0x5778, NULL, NULL, NULL, P3, "MSI", "MS-6577 (Xenon)", 0, OK, w83627hf_gpio25_raise_2e}, {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, P3, "MSI", "MS-6590 (KT4 Ultra)", 0, OK, board_msi_kt4v}, - {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, P3, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio44_raise_2e}, + {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, "^MS-7094$", NULL, NULL, P3, "MSI", "MS-7094 (K8T Neo2-F V2.0)", 0, OK, w83627thf_gpio44_raise_2e}, {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, P3, "MSI", "MS-6712 (KT4V)", 0, OK, board_msi_kt4v}, {0x1106, 0x3148, 0 , 0 , 0x1106, 0x3177, 0 , 0 , NULL, "msi", "ms6787", P3, "MSI", "MS-6787 (P4MAM-V/P4MAM-L)", 0, OK, w836xx_memw_enable_2e}, {0x8086, 0x24d3, 0x1462, 0x7880, 0x8086, 0x2570, 0, 0, NULL, NULL, NULL, P3, "MSI", "MS-6788-040 (848P NeoV)", 0, OK, intel_ich_gpio32_raise}, @@ -2440,12 +2440,13 @@ {0x10DE, 0x00E0, 0x1462, 0x0250, 0x10DE, 0x00E1, 0x1462, 0x0250, NULL, NULL, NULL, P3, "MSI", "MS-7025 (K8N Neo2 Platinum)", 0, OK, nvidia_mcp_gpio0c_raise}, {0x10DE, 0x00E0, 0x1462, 0x0300, 0x10DE, 0x00E1, 0x1462, 0x0300, NULL, NULL, NULL, P3, "MSI", "MS-7030 (K8N Neo Platinum)", 0, OK, nvidia_mcp_gpio0c_raise}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, P3, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise}, - {0x8086, 0x244b, 0x1462, 0x3910, 0x8086, 0x2442, 0x1462, 0x3910, NULL, NULL, NULL, P3, "MSI", "MS-6391 (845 Pro4)", 0, OK, intel_ich_gpio23_raise}, {0x1106, 0x3149, 0x1462, 0x7061, 0x1106, 0x3227, 0, 0, NULL, NULL, NULL, P3, "MSI", "MS-7061 (KM4M-V/KM4AM-V)", 0, OK, w836xx_memw_enable_2e}, + {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, P3, "MSI", "MS-7125 (K8N Neo4(-F/-FI/-FX/Platinum))", 0, OK, nvidia_mcp_gpio2_raise}, {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", P3, "MSI", "MS-7135 (K8N Neo3)", 0, OK, w83627thf_gpio44_raise_4e}, {0x10DE, 0x0270, 0x1462, 0x7207, 0x10DE, 0x0264, 0x1462, 0x7207, NULL, NULL, NULL, P3, "MSI", "MS-7207 (K8NGM2-L)", 0, NT, nvidia_mcp_gpio2_raise}, {0x10DE, 0x0360, 0x1462, 0x7250, 0x10DE, 0x0368, 0x1462, 0x7250, NULL, NULL, NULL, P3, "MSI", "MS-7250 (K9N SLI)", 0, OK, nvidia_mcp_gpio2_raise}, {0x1011, 0x0019, 0xaa55, 0xaa55, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, P3, "Nokia", "IP530", 0, OK, fdc37b787_gpio50_raise_3f0}, + {0x8086, 0x3B30, 0x1025, 0x0379, 0x8086, 0x3B09, 0x1025, 0x0379, "^EasyNote LM85$", NULL, NULL, P2, "Packard Bell","EasyNote LM85", 0, OK, p2_whitelist_laptop}, {0x8086, 0x24d3, 0x144d, 0xb025, 0x8086, 0x1050, 0x144d, 0xb025, NULL, NULL, NULL, P3, "Samsung", "Polaris 32", 0, OK, intel_ich_gpio21_raise}, {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", P3, "Shuttle", "AK31", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, P3, "Shuttle", "AK38N", 256, OK, NULL}, Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Fri May 2 17:41:42 2014 (r1782) +++ trunk/chipset_enable.c Sat May 3 23:33:01 2014 (r1783) @@ -982,7 +982,7 @@ /* Works for VT82C686A/B too. */ static int enable_flash_vt82c596(struct pci_dev *dev, const char *name) { - /* Enable decoding of 0xFFF80000 to 0xFFFFFFFF. (1 MB) */ + /* Enable decoding of 0xFFF00000 to 0xFFFFFFFF. (1 MB) */ max_rom_decode.parallel = 1024 * 1024; return enable_flash_amd_via(dev, name, 0xE0); } @@ -1288,11 +1288,9 @@ ret = 1; out_msg: - msg_pinfo("Please send the output of \"flashrom -V\" to " - "flashrom(a)flashrom.org with\n" - "your board name: flashrom -V as the subject to help us " - "finish support for your\n" - "chipset. Thanks.\n"); + msg_pinfo("Please send the output of \"flashrom -V -p internal\" to flashrom(a)flashrom.org\n" + "with \"your board name: flashrom -V\" as the subject to help us finish support\n" + "for your chipset. Thanks.\n"); return ret; } @@ -1388,7 +1386,7 @@ {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540}, {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, {0x1039, 0x0646, OK, "SiS", "645DX", enable_flash_sis540}, - {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540}, + {0x1039, 0x0648, OK, "SiS", "648", enable_flash_sis540}, {0x1039, 0x0650, OK, "SiS", "650", enable_flash_sis540}, {0x1039, 0x0651, OK, "SiS", "651", enable_flash_sis540}, {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, @@ -1418,7 +1416,7 @@ /* Slave, should not be here, to fix known bug for A01. */ {0x10de, 0x00d3, OK, "NVIDIA", "CK804", enable_flash_ck804}, {0x10de, 0x0260, OK, "NVIDIA", "MCP51", enable_flash_ck804}, - {0x10de, 0x0261, NT, "NVIDIA", "MCP51", enable_flash_ck804}, + {0x10de, 0x0261, OK, "NVIDIA", "MCP51", enable_flash_ck804}, {0x10de, 0x0262, NT, "NVIDIA", "MCP51", enable_flash_ck804}, {0x10de, 0x0263, NT, "NVIDIA", "MCP51", enable_flash_ck804}, {0x10de, 0x0360, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* M57SLI*/ @@ -1490,14 +1488,14 @@ {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_pch6}, {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_pch6}, {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_pch6}, - {0x8086, 0x1c4f, NT, "Intel", "QM67", enable_flash_pch6}, + {0x8086, 0x1c4f, OK, "Intel", "QM67", enable_flash_pch6}, {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_pch6}, {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_pch6}, - {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_pch6}, + {0x8086, 0x1c54, OK, "Intel", "C204", enable_flash_pch6}, {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_pch6}, {0x8086, 0x1c5c, OK, "Intel", "H61", enable_flash_pch6}, - {0x8086, 0x1d40, OK, "Intel", "X79", enable_flash_pch6}, - {0x8086, 0x1d41, OK, "Intel", "X79", enable_flash_pch6}, + {0x8086, 0x1d40, OK, "Intel", "C60x/X79", enable_flash_pch6}, + {0x8086, 0x1d41, OK, "Intel", "C60x/X79", enable_flash_pch6}, {0x8086, 0x1e44, OK, "Intel", "Z77", enable_flash_pch7}, {0x8086, 0x1e46, NT, "Intel", "Z75", enable_flash_pch7}, {0x8086, 0x1e47, NT, "Intel", "Q77", enable_flash_pch7}, @@ -1507,12 +1505,12 @@ {0x8086, 0x1e53, NT, "Intel", "C216", enable_flash_pch7}, {0x8086, 0x1e55, OK, "Intel", "QM77", enable_flash_pch7}, {0x8086, 0x1e56, NT, "Intel", "QS77", enable_flash_pch7}, - {0x8086, 0x1e57, NT, "Intel", "HM77", enable_flash_pch7}, + {0x8086, 0x1e57, OK, "Intel", "HM77", enable_flash_pch7}, {0x8086, 0x1e58, NT, "Intel", "UM77", enable_flash_pch7}, {0x8086, 0x1e59, NT, "Intel", "HM76", enable_flash_pch7}, {0x8086, 0x1e5d, NT, "Intel", "HM75", enable_flash_pch7}, {0x8086, 0x1e5e, NT, "Intel", "HM70", enable_flash_pch7}, - {0x8086, 0x1e5f, NT, "Intel", "NM70", enable_flash_pch7}, + {0x8086, 0x1e5f, OK, "Intel", "NM70", enable_flash_pch7}, {0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7}, {0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich0}, @@ -1580,19 +1578,19 @@ {0x8086, 0x8c41, NT, "Intel", "Lynx Point Mobile Engineering Sample", enable_flash_pch8}, {0x8086, 0x8c42, NT, "Intel", "Lynx Point Desktop Engineering Sample", enable_flash_pch8}, {0x8086, 0x8c43, NT, "Intel", "Lynx Point", enable_flash_pch8}, - {0x8086, 0x8c44, NT, "Intel", "Z87", enable_flash_pch8}, + {0x8086, 0x8c44, OK, "Intel", "Z87", enable_flash_pch8}, {0x8086, 0x8c45, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c46, NT, "Intel", "Z85", enable_flash_pch8}, {0x8086, 0x8c47, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c48, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c49, NT, "Intel", "HM86", enable_flash_pch8}, {0x8086, 0x8c4a, OK, "Intel", "H87", enable_flash_pch8}, - {0x8086, 0x8c4b, NT, "Intel", "HM87", enable_flash_pch8}, + {0x8086, 0x8c4b, OK, "Intel", "HM87", enable_flash_pch8}, {0x8086, 0x8c4c, NT, "Intel", "Q85", enable_flash_pch8}, {0x8086, 0x8c4d, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c4e, NT, "Intel", "Q87", enable_flash_pch8}, {0x8086, 0x8c4f, NT, "Intel", "QM87", enable_flash_pch8}, - {0x8086, 0x8c50, NT, "Intel", "B85", enable_flash_pch8}, + {0x8086, 0x8c50, OK, "Intel", "B85", enable_flash_pch8}, {0x8086, 0x8c51, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c52, NT, "Intel", "C222", enable_flash_pch8}, {0x8086, 0x8c53, NT, "Intel", "Lynx Point", enable_flash_pch8}, Modified: trunk/cli_output.c ============================================================================== --- trunk/cli_output.c Fri May 2 17:41:42 2014 (r1782) +++ trunk/cli_output.c Sat May 3 23:33:01 2014 (r1783) @@ -36,7 +36,7 @@ if (fclose(logfile)) { /* fclose returned an error. Stop writing to be safe. */ logfile = NULL; - msg_perr("Closing the log file returned error %s\n", strerror(errno)); + msg_gerr("Closing the log file returned error %s\n", strerror(errno)); return 1; } logfile = NULL; Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Fri May 2 17:41:42 2014 (r1782) +++ trunk/dummyflasher.c Sat May 3 23:33:01 2014 (r1783) @@ -377,11 +377,14 @@ msg_pdbg("Filling fake flash chip with 0xff, size %i\n", emu_chip_size); memset(flashchip_contents, 0xff, emu_chip_size); + /* Will be freed by shutdown function if necessary. */ emu_persistent_image = extract_programmer_param("image"); if (!emu_persistent_image) { /* Nothing else to do. */ goto dummy_init_out; } + /* We will silently (in default verbosity) ignore the file if it does not exist (yet) or the size does + * not match the emulated chip. */ if (!stat(emu_persistent_image, &image_stat)) { msg_pdbg("Found persistent image %s, size %li ", emu_persistent_image, (long)image_stat.st_size); @@ -414,7 +417,7 @@ void *dummy_map(const char *descr, uintptr_t phys_addr, size_t len) { - msg_pspew("%s: Mapping %s, 0x%zx bytes at 0x%*" PRIxPTR "\n", + msg_pspew("%s: Mapping %s, 0x%zx bytes at 0x%0*" PRIxPTR "\n", __func__, descr, len, PRIxPTR_WIDTH, phys_addr); return (void *)phys_addr; } Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri May 2 17:41:42 2014 (r1782) +++ trunk/flashchips.c Sat May 3 23:33:01 2014 (r1783) @@ -2275,7 +2275,7 @@ .total_size = 256, .page_size = 256, .feature_bits = FEATURE_LONG_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 10000, /* 10ms */ .block_erasers = @@ -3228,7 +3228,7 @@ .total_size = 128, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -4271,7 +4271,7 @@ /* OTP: 512B total; enter 0x3A */ /* QPI enable 0x38, disable 0xFF */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PR, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { @@ -5173,7 +5173,7 @@ .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -5917,7 +5917,7 @@ .page_size = 256, /* MX25L512E supports SFDP */ .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -5991,7 +5991,7 @@ .total_size = 256, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -6172,7 +6172,7 @@ { .vendor = "Macronix", - .name = "MX25L1605D/MX25L1608D", + .name = "MX25L1605D/MX25L1608D/MX25L1673E", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L1605, @@ -6389,6 +6389,45 @@ { .vendor = "Macronix", + .name = "MX25L3273E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L3205, + .total_size = 4096, + .page_size = 256, + /* OTP: 64B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 128} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_default_bp3, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and dual I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", .name = "MX25L3235D", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, @@ -6497,7 +6536,7 @@ { .vendor = "Macronix", - .name = "MX25L6445E", + .name = "MX25L6445E/MX25L6473E", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L6405, @@ -7155,7 +7194,7 @@ .total_size = 2048, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_OK_PR, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -7484,6 +7523,7 @@ .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: per 64kB sector lock registers */ .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2300, 3600}, }, { @@ -7529,7 +7569,7 @@ .page_size = 256, /* OTP: 64B total; read 0x4B; write 0x42 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -7549,6 +7589,7 @@ .unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: per 64kB sector lock registers */ .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -7802,7 +7843,7 @@ /* supports SFDP */ /* OTP: 64B total; read 0x4B, write 0x42 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -8394,7 +8435,7 @@ .total_size = 128, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -9666,7 +9707,7 @@ .total_size = 256, .page_size = 256, .feature_bits = FEATURE_WRSR_EWSR, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -10766,7 +10807,7 @@ .total_size = 512, .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ .block_erasers = @@ -12298,7 +12339,7 @@ .total_size = 4096, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_OK_PROBE, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -12374,7 +12415,7 @@ .total_size = 128, .page_size = 128, .feature_bits = FEATURE_LONG_RESET, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_w29ee011, .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (w29ee011.c) */ .block_erasers = Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Fri May 2 17:41:42 2014 (r1782) +++ trunk/flashchips.h Sat May 3 23:33:01 2014 (r1783) @@ -434,11 +434,11 @@ #define MACRONIX_MX25L1005 0x2011 /* Same as MX25L1005C, MX25L1006E */ #define MACRONIX_MX25L2005 0x2012 /* Same as MX25L2005C */ #define MACRONIX_MX25L4005 0x2013 /* Same as MX25L4005A, MX25L4005C */ -#define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005 */ -#define MACRONIX_MX25L1605 0x2015 /* MX25L1605 (64k 0x20); MX25L1605A/MX25L1606E (4k 0x20, 64k 0x52); MX25L1605D/MX25L1608D (4k 0x20) */ -#define MACRONIX_MX25L3205 0x2016 /* MX25L3205, MX25L3205A (64k 0x20); MX25L3205D/MX25L3208D (4k 0x20); MX25L3206E (4k 0x20, 64k 0x52) */ -#define MACRONIX_MX25L6405 0x2017 /* MX25L6405, MX25L6405D (64k 0x20); MX25L6406E/MX25L6436E (4k 0x20); MX25L6445E (4k 0x20, 64k 0x52) */ -#define MACRONIX_MX25L12805 0x2018 /* Same as MX25L12805D */ +#define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005; FIXME: MX25L8073E (4k 0x20) */ +#define MACRONIX_MX25L1605 0x2015 /* MX25L1605 (64k 0x20); MX25L1605A/MX25L1606E (4k 0x20, 64k 0x52); MX25L1605D/MX25L1608D/MX25L1673E (4k 0x20) */ +#define MACRONIX_MX25L3205 0x2016 /* MX25L3205, MX25L3205A (64k 0x20); MX25L3205D/MX25L3208D (4k 0x20); MX25L3206E (4k 0x20, 64k 0x52); MX25L3273E (4k 0x20, 32k 0x52) */ +#define MACRONIX_MX25L6405 0x2017 /* MX25L6405, MX25L6405D (64k 0x20); MX25L6406E/MX25L6436E (4k 0x20); MX25L6445E/MX25L6473E (4k 0x20, 32k 0x52) */ +#define MACRONIX_MX25L12805 0x2018 /* Same as MX25L12805D, MX25L12835F, MX25L12845E (the latter two support completely new ID commands) */ #define MACRONIX_MX25L25635F 0x2019 /* Same as MX25L25639F, but the latter seems to not support REMS */ #define MACRONIX_MX25L1635D 0x2415 #define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */ @@ -590,6 +590,7 @@ #define SST_SST25VF064C 0x254B #define SST_SST26VF016 0x2601 #define SST_SST26VF032 0x2602 +#define SST_SST26VF064B 0x2643 #define SST_SST27SF512 0xA4 #define SST_SST27SF010 0xA5 #define SST_SST27SF020 0xA6 Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Fri May 2 17:41:42 2014 (r1782) +++ trunk/flashrom.8.tmpl Sat May 3 23:33:01 2014 (r1783) @@ -577,7 +577,7 @@ .sp where .B xxxx -is the name of the programmer +is the name of the programmer, .B bb is the PCI bus number, .B dd Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Fri May 2 17:41:42 2014 (r1782) +++ trunk/ft2232_spi.c Sat May 3 23:33:01 2014 (r1783) @@ -70,7 +70,7 @@ {OLIMEX_VID, OLIMEX_ARM_OCD_PID, NT, "Olimex", "ARM-USB-OCD"}, {OLIMEX_VID, OLIMEX_ARM_TINY_PID, OK, "Olimex", "ARM-USB-TINY"}, {OLIMEX_VID, OLIMEX_ARM_OCD_H_PID, NT, "Olimex", "ARM-USB-OCD-H"}, - {OLIMEX_VID, OLIMEX_ARM_TINY_H_PID, NT, "Olimex", "ARM-USB-TINY-H"}, + {OLIMEX_VID, OLIMEX_ARM_TINY_H_PID, OK, "Olimex", "ARM-USB-TINY-H"}, {0}, }; Modified: trunk/it87spi.c ============================================================================== --- trunk/it87spi.c Fri May 2 17:41:42 2014 (r1782) +++ trunk/it87spi.c Sat May 3 23:33:01 2014 (r1783) @@ -264,9 +264,8 @@ ret |= it87spi_probe(superios[i].port); break; default: - msg_pdbg("Super I/O ID 0x%04hx is not on the list of " - "flash capable controllers.\n", - superios[i].model); + msg_pdbg2("Super I/O ID 0x%04hx is not on the list of flash-capable controllers.\n", + superios[i].model); } } return ret; Modified: trunk/print.c ============================================================================== --- trunk/print.c Fri May 2 17:41:42 2014 (r1782) +++ trunk/print.c Sat May 3 23:33:01 2014 (r1783) @@ -533,6 +533,7 @@ B("abit", "AX8", OK, NULL, NULL), B("abit", "BF6", OK, NULL, NULL), B("abit", "BM6", OK, NULL, NULL), + B("abit", "BX6 2.0", OK, NULL, NULL), B("abit", "Fatal1ty F-I90HD", OK, NULL, NULL), B("abit", "IC7", OK, NULL, NULL), B("abit", "IP35", OK, NULL, NULL), @@ -545,8 +546,10 @@ B("abit", "VA6", OK, NULL, NULL), B("abit", "VT6X4", OK, NULL, NULL), B("Acer", "V75-M", OK, NULL, "This is an OEM board used by IBM in e.g. Aptiva 2170-G"), + B("Acer", "EM61SM/EM61PM", OK, NULL, "Used in Acer Aspire T180."), B("Acorp", "6A815EPD", OK, "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.…", NULL), B("Acorp", "6M810C", OK, NULL, NULL), + B("ADLINK", "Express-HR", OK, "http://www.adlinktech.com/PD/web/PD_detail.php?pid=1012", NULL), B("Advantech", "PCM-5820", OK, "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL), B("agami", "Aruma", OK, "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-600…", NULL), B("Albatron", "PM266A Pro", OK, "http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview…", NULL), /* FIXME */ @@ -562,6 +565,7 @@ B("ASRock", "880G Pro3", OK, "http://www.asrock.com/mb/overview.asp?Model=880G%20Pro3", NULL), B("ASRock", "890GX Extreme3", OK, "http://www.asrock.com/mb/overview.asp?Model=890GX%20Extreme3", NULL), B("ASRock", "939A785GMH/128M", OK, "http://www.asrock.com/mb/overview.asp?Model=939A785GMH/128M", NULL), + B("ASRock", "960GM-GS3 FX", OK, "http://www.asrock.com/mb/overview.asp?Model=960GM-GS3%20FX", NULL), B("ASRock", "A330GC", OK, "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL), B("ASRock", "A770CrossFire", OK, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL), B("ASRock", "A780FullHD", OK, "http://www.asrock.com/mb/overview.asp?Model=A780FullHD", "While flashrom is working correctly, there might be problems with the firmware images themselves. Please see http://www.flashrom.org/pipermail/flashrom/2012-July/009600.html for details."), @@ -620,11 +624,11 @@ B("ASUS", "M2A-VM (HDMI)", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL), B("ASUS", "M2N32-SLI Deluxe", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL), B("ASUS", "M2N68-VM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M2N68VM/", NULL), + B("ASUS", "M2NBP-VM CSM", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL), B("ASUS", "M2N-E", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"), B("ASUS", "M2N-E SLI", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL), - B("ASUS", "M2N-SLI Deluxe", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL), - B("ASUS", "M2NBP-VM CSM", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL), B("ASUS", "M2NPV-VM", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL), + B("ASUS", "M2N-SLI Deluxe", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL), B("ASUS", "M2V", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2V/", NULL), B("ASUS", "M2V-MX", OK, "http://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL), B("ASUS", "M3A", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL), @@ -633,10 +637,11 @@ B("ASUS", "M3A78-EM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL), B("ASUS", "M3N78 PRO", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78_PRO/", NULL), B("ASUS", "M3N78-VM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL), - B("ASUS", "M4A78-EM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL), - B("ASUS", "M4A785T-M", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TM/", NULL), + B("ASUS", "M3N-H/HDMI", OK, "http://www.asus.com/Motherboards/M3NHHDMI//", NULL), B("ASUS", "M4A785TD-M EVO", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL), B("ASUS", "M4A785TD-V EVO", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL), + B("ASUS", "M4A785T-M", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TM/", NULL), + B("ASUS", "M4A78-EM", OK, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL), B("ASUS", "M4A78LT-M LE", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL), B("ASUS", "M4A79T Deluxe", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL), B("ASUS", "M4A87TD/USB3", OK, "http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL), @@ -720,7 +725,7 @@ B("ASUS", "P8B75-M LE", BAD, NULL, "Probing works (2x 8192 kB via hwseq), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8H61 PRO", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8H61-M LE/USB3", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), - B("ASUS", "P8H67-M PRO", BAD, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), + B("ASUS", "P8H67-M PRO", BAD, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), // some firmware versions apparently are not locked, see report by Marek Zakrzewski B("ASUS", "P8H77-I", OK, "http://www.asus.com/Motherboards/P8H77I/", NULL), B("ASUS", "P8H77-M", OK, "http://www.asus.com/Motherboards/P8H77M/", NULL), B("ASUS", "P8H77-V LE", OK, "http://www.asus.com/Motherboards/P8H77V_LE/", NULL), @@ -739,6 +744,7 @@ B("ASUS", "TUSL2-C", NT, "http://support.asus.com/download.aspx?SLanguage=en&p=1&s=4&m=TUSL2-C&os=&ha…", "Untested board enable."), B("ASUS", "Z8NA-D6C", OK, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL), B("ASUS", "Z8PE-D12", OK, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL), + B("Attro", "G5G100-P", OK, "http://www.attro.com/motherboard/G5G100-P.htm", NULL), B("Bachmann", "OT200", OK, "http://www.bachmann.info/produkte/bedien-und-beobachtungsgeraete/operator-t…", NULL), B("BCOM", "WinNET100", OK, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."), B("Bifferos", "Bifferboard", OK, "http://bifferos.co.uk/", NULL), @@ -766,6 +772,7 @@ B("Elitegroup", "848P-A7", OK, NULL, NULL), B("Elitegroup", "GeForce6100PM-M2 (V3.0)", OK, NULL, NULL), B("Elitegroup", "GeForce6100SM-M", OK, NULL, NULL), + B("Elitegroup", "GeForce7050M-M (V2.0)", OK, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=865&M…", NULL), B("Elitegroup", "GF7100PVT-M3 (V1.0)", OK, NULL, NULL), B("Elitegroup", "GF8200A", OK, NULL, NULL), B("Elitegroup", "K7S5A", OK, NULL, NULL), @@ -774,6 +781,7 @@ B("Elitegroup", "K7VTA3", OK, NULL, NULL), B("Elitegroup", "P4M800PRO-M (V1.0A, V2.0)", OK, NULL, NULL), B("Elitegroup", "P4VXMS (V1.0A)", OK, NULL, NULL), + B("Elitegroup", "P6BAP-A+ (V2.2)", OK, NULL, NULL), B("Elitegroup", "P6IWP-Fe", OK, NULL, NULL), B("Elitegroup", "P6VAP-A+", OK, NULL, NULL), B("Elitegroup", "RS485M-M", OK, NULL, NULL), @@ -792,10 +800,11 @@ B("Foxconn", "A6VMX", OK, "http://www.foxconnchannel.com/ProductDetail.aspx?T=Motherboard&U=en-us00003…", NULL), B("Foxconn", "P4M800P7MA-RS2", OK, "http://www.foxconnchannel.com/ProductDetail.aspx?T=Motherboard&U=en-us00001…", NULL), B("Foxconn", "P55MX", OK, "http://www.foxconnchannel.com/ProductDetail.aspx?T=motherboard&U=en-us00004…", "Needs the MFG jumper to be set correctly before flashing to enable the Flash Descriptor Override Strap."), - B("Freetech", "P6F91i", OK, "http://web.archive.org/web/20010417035034/http://www.freetech.com/prod/P6F9…", NULL), B("Foxconn", "Q45M", BAD, "http://www.foxconnchannel.com/ProductDetail.aspx?T=Motherboard&U=en-us00005…", "Probing works (Hardware sequencing, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), - B("Fujitsu-Siemens", "ESPRIMO P5915", OK, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRI…", "Mainboard model is D2312-A2."), + B("Freetech", "P6F91i", OK, "http://web.archive.org/web/20010417035034/http://www.freetech.com/prod/P6F9…", NULL), + B("Fujitsu", "D3041-A1", OK, NULL, "Used in ESPRIMO P2560, contains an Atmel AT26DF081A."), B("Fujitsu-Siemens", "CELSIUS W410", BAD, "ftp://ftp.ts.fujitsu.com/pub/mainboard-oem-sales/Products/Mainboards/Indust…", "Mainboard model is D3062-A1. Probing works (Macronix MX25L6405, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), + B("Fujitsu-Siemens", "ESPRIMO P5915", OK, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRI…", "Mainboard model is D2312-A2."), B("GIGABYTE", "GA-2761GXDK", OK, "http://www.computerbase.de/news/hardware/mainboards/amd-systeme/2007/mai/gi…", NULL), B("GIGABYTE", "GA-6BXC", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1445", NULL), B("GIGABYTE", "GA-6BXDU", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1429", NULL), @@ -811,22 +820,25 @@ B("GIGABYTE", "GA-8IP775", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1830", NULL), B("GIGABYTE", "GA-8IRML", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL), B("GIGABYTE", "GA-8PE667 Ultra 2", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1607", NULL), + B("GIGABYTE", "GA-8S648", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1674", NULL), B("GIGABYTE", "GA-8SIMLH", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1399", NULL), B("GIGABYTE", "GA-945PL-S3P (rev. 6.6)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL), B("GIGABYTE", "GA-965GM-S2 (rev. 2.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL), B("GIGABYTE", "GA-965P-DS4", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL), + B("GIGABYTE", "GA-970A-D3P (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4642", NULL), B("GIGABYTE", "GA-A75M-UD2H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3928", NULL), + B("GIGABYTE", "GA-B85M-D3H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4567", NULL), B("GIGABYTE", "GA-EP31-DS3L (rev. 2.1)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL), B("GIGABYTE", "GA-EP35-DS3L", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL), + B("GIGABYTE", "GA-EX58-UD4P", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL), B("GIGABYTE", "GA-G41MT-S2PT", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3960", NULL), B("GIGABYTE", "GA-H61M-D2-B3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3773", NULL), B("GIGABYTE", "GA-H61M-D2H-USB3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4004", NULL), B("GIGABYTE", "GA-H77-D3H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4141", "Does only work with -p internal:ich_spi_mode=hwseq due to an evil twin of MX25L6405 and ICH SPI lockdown."), B("GIGABYTE", "GA-H77M-D3H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4388", NULL), - B("GIGABYTE", "GA-EX58-UD4P", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL), - B("GIGABYTE", "GA-K8N-SLI", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL), - B("GIGABYTE", "GA-K8N51GMF", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL), B("GIGABYTE", "GA-K8N51GMF-9", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1939", NULL), + B("GIGABYTE", "GA-K8N51GMF", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL), + B("GIGABYTE", "GA-K8N-SLI", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL), B("GIGABYTE", "GA-K8NS Pro-939", NT, "http://www.gigabyte.com/products/product-page.aspx?pid=1875", "Untested board enable."), B("GIGABYTE", "GA-M57SLI-S4", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2287", NULL), B("GIGABYTE", "GA-M61P-S3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2434", NULL), @@ -848,10 +860,14 @@ B("GIGABYTE", "GA-P67A-UD3P", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL), B("GIGABYTE", "GA-X58A-UD3R (rev. 2.0)", OK, NULL, NULL), B("GIGABYTE", "GA-X58A-UD7 (rev. 2.0)", OK, NULL, NULL), - B("GIGABYTE", "GA-X79-UD5", OK, NULL, NULL), + B("GIGABYTE", "GA-X79-UD5", OK, NULL, NULL), + B("GIGABYTE", "GA-X79-UD3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4050", "Contains a Macronix MX25L6406E."), + B("GIGABYTE", "GA-X79-UP4 (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4288", NULL), + B("GIGABYTE", "GA-Z68MA-D2H-B3 (rev. 1.3)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3975", NULL), B("GIGABYTE", "GA-Z68MX-UD2H-B (rev. 1.3)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL), B("GIGABYTE", "GA-Z68XP-UD3 (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL), B("GIGABYTE", "GA-Z77MX-D3H", BAD, "http://www.gigabyte.com/products/product-page.aspx?pid=4145", "Uses MX25L6436E and requires a small patch (but works flawlessly with that)."), + B("GIGABYTE", "GA-Z87-HD3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=4489", NULL), B("HP", "8100 Elite CMT PC (304Bh)", BAD, NULL, "SPI lock down, PR, read-only descriptor, locked ME region."), B("HP", "e-Vectra P2706T", OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&pro…", NULL), B("HP", "Evans-GL6 (Pegatron IPMEL-AE)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?cc=us&lc=en&dlc=en&docname=c019…", "Found in HP Pavilion Slimline s5220f."), @@ -893,6 +909,7 @@ B("Jetway", "J7F4K1G5D-PB", OK, "http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=282&proname=J7F4K1G…", NULL), B("Kontron", "986LCD-M", OK, "http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/…", NULL), B("Lanner", "EM-8510C", OK, NULL, NULL), + B("Lenovo", "Tilapia CRB", OK, NULL, "Used in ThinkCentre M75e."), B("Lex", "CV700A", OK, "http://www.lex.com.tw/product/CV700A-spec.htm", NULL), B("Mitac", "6513WU", OK, "http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/produ…", NULL), B("MSC", "Q7-TCTC", OK, "http://www.msc-ge.com/en/produkte/com/moduls/overview/5779-www.html", NULL), @@ -907,7 +924,8 @@ B("MSI", "MS-6570 (K7N2)", OK, "http://www.msi.com/product/mb/K7N2.html", NULL), B("MSI", "MS-6577 (Xenon)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?product=90390&lc=en&cc=us&dlc=e…", "This is an OEM board from HP, the HP name is Xenon."), B("MSI", "MS-6590 (KT4 Ultra)", OK, "http://www.msi.com/product/mb/KT4-Ultra.html", NULL), - B("MSI", "MS-6702E (K8T Neo2-F)",OK, "http://www.msi.com/product/mb/K8T-Neo2-F--FIR.html", NULL), + //B("MSI", "MS-6702E (K8T Neo2-F/FIR)",OK, "http://www.msi.com/product/mb/K8T-Neo2-F--FIR.html", NULL), This was wrongly attributed to the MS-7094 board enable. + B("MSI", "MS-6704 (845PE Max2 PCB 1.0)", OK, "http://www.msi.com/product/mb/845PE-Max2.html", "Write protection must be disabled in the BIOS setup."), B("MSI", "MS-6712 (KT4V)", OK, "http://www.msi.com/product/mb/KT4V---KT4V-L--v1-0-.html", NULL), B("MSI", "MS-6787 (P4MAM-V/P4MAM-L)", OK, "http://www.msi.com/service/search/?kw=6787&type=product", NULL), B("MSI", "MS-7005 (651M-L)", OK, "http://www.msi.com/product/mb/651M-L.html", NULL), @@ -916,6 +934,8 @@ B("MSI", "MS-7046", OK, "http://www.heimir.de/ms7046/", NULL), B("MSI", "MS-7061 (KM4M-V/KM4AM-V)", OK, "http://www.msi.com/service/search/?kw=7061&type=product", NULL), B("MSI", "MS-7065", OK, "http://browse.geekbench.ca/geekbench2/view/53114", NULL), + B("MSI", "MS-7094 (K8T Neo2-F V2.0)",OK, "http://www.msi.com/product/mb/K8T_Neo2F_V2.0.html", NULL), + B("MSI", "MS-7125 (K8N Neo4(-F/-FI/-FX/Platinum))", OK, "http://www.msi.com/product/mb/K8N_Neo4_Platinum_PCB_1.0.html", NULL), B("MSI", "MS-7135 (K8N Neo3)", OK, "http://www.msi.com/product/mb/K8N-Neo3.html", NULL), B("MSI", "MS-7142 (K8MM-V)", OK, "http://www.msi.com/product/mb/K8MM-V.html", NULL), B("MSI", "MS-7168 (Orion)", OK, "http://support.packardbell.co.uk/uk/item/index.php?i=spec_orion&pi=platform…", NULL), @@ -935,6 +955,8 @@ B("MSI", "MS-7369 (K9N Neo V2)", OK, "http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL), B("MSI", "MS-7376 (K9A2 Platinum V1)", OK, "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL), B("MSI", "MS-7379 (G31M)", OK, "http://www.msi.com/product/mb/G31M.html", NULL), + B("MSI", "MS-7399 1.1 (Persian)", OK, "http://acersupport.com/acerpanam/desktop/0000/Acer/AspireM5640/AspireM5640s…", "This is an OEM board used by Acer in e.g. Aspire M5640/M3640."), + B("MSI", "MS-7522 (MSI X58 Pro-E)", OK, "http://www.msi.com/product/mb/X58_ProE.html", NULL), B("MSI", "MS-7529 (G31M3-L(S) V2)", OK, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL), B("MSI", "MS-7529 (G31TM-P21)", OK, "http://www.msi.com/product/mb/G31TM-P21.html", NULL), B("MSI", "MS-7548 (Aspen-GL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&d…", NULL), @@ -968,6 +990,8 @@ B("PC Engines", "Alix.3d3", OK, "http://pcengines.ch/alix3d3.htm", NULL), B("PC Engines", "Alix.6f2", OK, "http://pcengines.ch/alix6f2.htm", NULL), B("PC Engines", "WRAP.2E", OK, "http://pcengines.ch/wrap2e1.htm", NULL), + B("PCWARE", "APM80-D3", OK, "http://www.pcwarebr.com.br/produtos_mb_apm80-d3.php", "Probably manufactured by ASUS"), + B("Pegatron", "IPP7A-CP", OK, NULL, NULL), B("Portwell", "PEB-4700VLA", OK, "http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA", NULL), B("RCA", "RM4100", OK, "http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL), B("Samsung", "Polaris 32", OK, NULL, NULL), @@ -992,10 +1016,14 @@ B("Sun", "Fire x4600", BAD, "http://www.sun.com/servers/x64/x4600/", "No public report found. May work now."), B("Sun", "Ultra 40 M2", OK, "http://download.oracle.com/docs/cd/E19127-01/ultra40.ws/820-0123-13/intro.h…", NULL), B("Supermicro", "H8QC8", OK, "http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm", NULL), + B("Supermicro", "H8QME-2", OK, "http://www.supermicro.com/Aplus/motherboard/Opteron8000/MCP55/H8QME-2.cfm", NULL), + B("Supermicro", "X10SLM-F", BAD, "http://www.supermicro.com/products/motherboard/Xeon/C220/X10SLM-F.cfm", "Probing works (Winbond W25Q128, 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked; SMM protection enabled."), B("Supermicro", "X5DP8-G2", OK, "http://www.supermicro.com/products/motherboard/Xeon/E7501/X5DP8-G2.cfm", NULL), B("Supermicro", "X7DBT-INF", OK, "http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm", NULL), - B("Supermicro", "X7SPA-HF", OK, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IP…", NULL), + B("Supermicro", "X7SPA-H(F)", OK, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H", NULL), + B("Supermicro", "X7SPE-HF-D525", OK, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPE-HF-D525.cfm", NULL), B("Supermicro", "X8DT3", OK, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL), + B("Supermicro", "X8DT6-F", OK, "http://www.supermicro.nl/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&S…", NULL), B("Supermicro", "X8DTE-F", OK, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&…", NULL), B("Supermicro", "X8DTG-D", OK, "http://www.supermicro.com/products/motherboard/qpi/5500/x8dtg-df.cfm", NULL), B("Supermicro", "X8DTH-6F", OK, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL), @@ -1005,6 +1033,7 @@ B("Supermicro", "X8DTU-F", OK, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL), B("Supermicro", "X8SAX", OK, "http://www.supermicro.com/products/motherboard/xeon3000/x58/x8sax.cfm", NULL), B("Supermicro", "X8SIE(-F)", BAD, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI…", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."), + B("Supermicro", "X8SIL-F", OK, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIL.cfm", NULL), B("Supermicro", "X8STi", OK, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL), B("Supermicro", "X9DR3-F", BAD, "http://www.supermicro.com/products/motherboard/xeon/c600/x9dr3-f.cfm", "Probing works (Numonyx N25Q128 (supported by SFDP only atm), 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Supermicro", "X9DRD-7LN4F", BAD, "http://www.supermicro.com/products/motherboard/xeon/c600/x9drd-7ln4f.cfm", "Probing works (Numonyx N25Q128 (supported by SFDP only atm), 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), @@ -1070,6 +1099,7 @@ B("ZOTAC", "GeForce 8200", OK, NULL, NULL), B("ZOTAC", "H61-ITX WiFi (H61ITX-A-E)", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ZOTAC", "H67-ITX WiFi (H67ITX-C-E)", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), + B("ZOTAC", "IONITX-A", OK, NULL, NULL), B("ZOTAC", "nForce 630i Supreme (N73U-Supreme)", OK, NULL, NULL), B("ZOTAC", "ZBOX AD02 (PLUS)", OK, NULL, NULL), B("ZOTAC", "ZBOX HD-ID11", OK, NULL, NULL), @@ -1101,6 +1131,7 @@ B("IBM/Lenovo", "Thinkpad X1", BAD, "http://www.thinkwiki.org/wiki/Category:X1", "Probing works (ST M25PX64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs) and ME is locked. Also, a Protected Range is locking the top range of the BIOS region (presumably the boot block)."), B("IBM/Lenovo", "240", BAD, "http://www.stanford.edu/~bresnan//tp240.html", "Seems to (partially) work at first, but one block/sector cannot be written which then leaves you with a bricked laptop. Maybe this can be investigated and fixed in software later."), B("Lenovo", "3000 V100 TF05Cxx", OK, "http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3…", NULL), + //B("MSI", "GT60-2OD", OK, "http://www.msi.com/product/nb/GT60_2OD.html", NULL), requires layout patches #endif {0}, Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Fri May 2 17:41:42 2014 (r1782) +++ trunk/spi25_statusreg.c Sat May 3 23:33:01 2014 (r1783) @@ -640,7 +640,7 @@ int spi_prettyprint_status_register_bp2_ep_srwd(struct flashctx *flash) { uint8_t status = spi_read_status_register(flash); - msg_cdbg("Chip status register is 0x%02x\n", status); + spi_prettyprint_status_register_hex(status); spi_prettyprint_status_register_srwd(status); msg_cdbg("Chip status register: Program Fail Flag (P_FAIL) is %sset\n", Modified: trunk/util/getrevision.sh ============================================================================== --- trunk/util/getrevision.sh Fri May 2 17:41:42 2014 (r1782) +++ trunk/util/getrevision.sh Sat May 3 23:33:01 2014 (r1783) @@ -173,7 +173,7 @@ elif git_is_file_tracked "$1" ; then r=$(git_last_commit "$1") - local svn_base=$(git log --grep git-svn-id -1 --format='%h') + local svn_base=$(git log --grep=git-svn-id -1 --format='%h') if [ "$svn_base" != "" ] ; then local diff_to_svn=$(git rev-list --count ${svn_base}..${r}) if [ "$diff_to_svn" -gt 0 ] ; then @@ -204,7 +204,7 @@ # If this is a "native" git-svn clone we could use git svn log: # git svn log --oneline -1 | sed 's/^r//;s/[[:blank:]].*//' or even git svn find-rev # but it is easier to just grep for the git-svn-id unconditionally - r=$(git log --grep git-svn-id -1 -- "$1" | \ + r=$(git log --grep=git-svn-id -1 -- "$1" | \ grep git-svn-id | \ sed 's/.*@/r/;s/[[:blank:]].*//') fi @@ -247,7 +247,7 @@ local query_path= local action= - # The is the main loop + # Argument parser loop while [ $# -gt 0 ]; do case ${1} in @@ -286,7 +286,7 @@ fi query_path=$1 else - echo "Warning: Ignoring over-abundant paramter: \"${1}\"">&2 + echo "Warning: Ignoring overabundant parameter: \"${1}\"">&2 fi shift;; esac;

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Re: [flashrom] W836xx : HP Z820 : flashrom -V
by Stefan Tauner 03 May '14

03 May '14

On Sat, 3 May 2014 14:02:17 -0700 Roberto <roberto(a)godenis.com> wrote: > Timely email, succesfully used buspirate just two days ago. Still > struggling though because you lose the Intel ME/ATM functions. The code for > the ME co-resides with the BIOS code in the flash. But the rest works fine. > Those functions must be signed with the certificate being stored elsewhere. It does but probably in the 0x00005000-0x0050ffff range as written in the flash descriptor (and shown by flashrom). This is pretty much self-contained and should remain in a working condition if you leave it alone and just tamper with the BIOS region. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] W836xx : HP Z820 : flashrom -V
by Roberto Denis 03 May '14

03 May '14

iwer, stefacnt: Thanks for your IRC help a couple days ago. I have been partially successful in using the ROM layout file (-l) feature in flashrom to segment the writes to the flash in my HP Z820 workstation. It evident the HP Z820 flash has two ‘regions’: that below 0x510000 and that 0x510000 and above. The lower portion contains the coding for the Intel AMT/ME features and other data. The attached lower.txt file is log of the successful write flash addresses below 0x510000. But writing to the space above 0x510000 is still a problem. In that space I tried writing just to the bootblock area (which is all I am seeking to update in this flash) and while flashrom tags it initially as read/write, the write fails. See the attached upper.txt logfile. I did attempt writing to the entire upper section (not just the bootblock) and got the same results. The flash is hardware write enabled or I could not have written to the area below 0x510000. It seems something else seems needs enabling. Any thoughts would be helpful. Thanks again ... Roberto

3 2

Sector unprotect@AT25DF081A
by Márton Miklós 03 May '14

03 May '14

Hello flashrom developers! I am currently hacking flashrom support for a National Instrments USB-8451 USB-SPI converter. I have found an AT25DF081A in the drawer to be used as a medical rabbit for my experiments. Probing, reading works fine, but the chip is sector protected. The flashrom tries to disable the protection with clearing the 7th bit (SPRL) in the status register, but as the datasheet states: / / /As a safeguard against accidental or erroneous locking or unlocking of sectors, the Sector Protection Registers can themselves be locked from updates by using the SPRL (Sector Protection Registers Locked) bit of the Status Register (refer to "Status Register Commands" on page 16 for more details). If the Sector Protection Registers are locked, then any attempts to issue the Unprotect Sector command will be ignored, and the device will reset the WEL bit in the Status////Register back to a logical "0" and return to the idle state once the CS pin has been deasserted.// / So to unlock my flash I would have to walk through the sectors and issue an Unprotect sector command with the sector's address. My problem is that the erase blocks addresses and the sector addresses are different things. In my case it has 64Kbyte block feature and the sectors are 64Kbyte, but it also has 4KByte block feature too. What would you recommend how to implement the sector unlocking mode? My proposal is the following: - Add a sector describing structure to the flashchip structure. It would contain the sector count and sector size. - Create a new unlock method: spi_disable_blockprotect_at2x_sector_unprotect for e.g. which clears the SPRL, then (if SWP is not 0) loops through the sectors and unlock them. - If we want to be nice after the write we can reprotect the device. Please let me know your opinion on this topic! Thanks! -- Üdvözlettel, Márton Miklós

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