- flashrom - mail.coreboot.org

flashrom -p gfxnvidia detect my atheros ath9k wifi card
by Denis 'GNUtoo' Carikli 07 Jan '13

07 Jan '13

Hi, Here are the logs: # ./flashrom -p gfxnvidia -VVV flashrom v0.9.5.2-r1546 on Linux 3.0.0-19-generic-pae (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.7, GCC 4.6.1, little endian Command line (3 args): ./flashrom -p gfxnvidia -VVV Calibrating delay loop... OS timer resolution is 1 usecs, 1503M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10007 us, 4 myus = 4 us, OK. Initializing gfxnvidia programmer Found "NVIDIA RIVA TNT2 Ultra" (168c:0029, BDF 03:06.0). PCI header type 0x00 Requested BAR is MEM, 32bit, not prefetchable === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom(a)flashrom.org if it works for you. Please add the name of your PCI device to the subject. Thank you for your help! === Detected NVIDIA I/O base address: 0xd8600000. The following protocols are supported: Parallel. Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29LV640B, 8192 kB: probe_en29lv640b: id1 0xffff, id2 0x00ff Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Restoring PCI config space for 03:06:0 reg 0x50 # lspci -n 00:00.0 0600: 1022:9601 00:01.0 0604: 1022:9602 00:0a.0 0604: 1022:9609 00:11.0 0106: 1002:4390 00:12.0 0c03: 1002:4397 00:12.1 0c03: 1002:4398 00:12.2 0c03: 1002:4396 00:13.0 0c03: 1002:4397 00:13.1 0c03: 1002:4398 00:13.2 0c03: 1002:4396 00:14.0 0c05: 1002:4385 (rev 3c) 00:14.1 0101: 1002:439c 00:14.2 0403: 1002:4383 00:14.3 0601: 1002:439d 00:14.4 0604: 1002:4384 00:14.5 0c03: 1002:4399 00:18.0 0600: 1022:1200 00:18.1 0600: 1022:1201 00:18.2 0600: 1022:1202 00:18.3 0600: 1022:1203 00:18.4 0600: 1022:1204 01:05.0 0300: 1002:9710 01:05.1 0403: 1002:970f 02:00.0 0200: 10ec:8168 (rev 03) 03:06.0 0280: 168c:0029 (rev 01) # lspci 00:00.0 Host bridge: Advanced Micro Devices [AMD] RS880 Host Bridge 00:01.0 PCI bridge: Advanced Micro Devices [AMD] RS780/RS880 PCI to PCI bridge (int gfx) 00:0a.0 PCI bridge: Advanced Micro Devices [AMD] RS780/RS880 PCI to PCI bridge (PCIE port 5) 00:11.0 SATA controller: ATI Technologies Inc SB7x0/SB8x0/SB9x0 SATA Controller [IDE mode] 00:12.0 USB Controller: ATI Technologies Inc SB7x0/SB8x0/SB9x0 USB OHCI0 Controller 00:12.1 USB Controller: ATI Technologies Inc SB7x0 USB OHCI1 Controller 00:12.2 USB Controller: ATI Technologies Inc SB7x0/SB8x0/SB9x0 USB EHCI Controller 00:13.0 USB Controller: ATI Technologies Inc SB7x0/SB8x0/SB9x0 USB OHCI0 Controller 00:13.1 USB Controller: ATI Technologies Inc SB7x0 USB OHCI1 Controller 00:13.2 USB Controller: ATI Technologies Inc SB7x0/SB8x0/SB9x0 USB EHCI Controller 00:14.0 SMBus: ATI Technologies Inc SBx00 SMBus Controller (rev 3c) 00:14.1 IDE interface: ATI Technologies Inc SB7x0/SB8x0/SB9x0 IDE Controller 00:14.2 Audio device: ATI Technologies Inc SBx00 Azalia (Intel HDA) 00:14.3 ISA bridge: ATI Technologies Inc SB7x0/SB8x0/SB9x0 LPC host controller 00:14.4 PCI bridge: ATI Technologies Inc SBx00 PCI to PCI Bridge 00:14.5 USB Controller: ATI Technologies Inc SB7x0/SB8x0/SB9x0 USB OHCI2 Controller 00:18.0 Host bridge: Advanced Micro Devices [AMD] Family 10h Processor HyperTransport Configuration 00:18.1 Host bridge: Advanced Micro Devices [AMD] Family 10h Processor Address Map 00:18.2 Host bridge: Advanced Micro Devices [AMD] Family 10h Processor DRAM Controller 00:18.3 Host bridge: Advanced Micro Devices [AMD] Family 10h Processor Miscellaneous Control 00:18.4 Host bridge: Advanced Micro Devices [AMD] Family 10h Processor Link Control 01:05.0 VGA compatible controller: ATI Technologies Inc RS880 [Radeon HD 4200] 01:05.1 Audio device: ATI Technologies Inc RS880 Audio Device [Radeon HD 4200] 02:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller (rev 03) 03:06.0 Network controller: Atheros Communications Inc. AR922X Wireless Network Adapter (rev 01) Denis.

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(no subject)
by Andrei Slavoiu 06 Jan '13

06 Jan '13

http://www.theleak.co.uk/wp-content/themes/twentyten/dwncst.php?jqcw=jqcw

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[PATCH] remove exit call from pcidev_init
by Niklas Söderlund 06 Jan '13

06 Jan '13

If the function fails it returns 0. All callers have been made aware of this and are prepared to handle it. Signed-off-by: Niklas Söderlund <niso(a)kth.se> --- atahpt.c | 2 ++ drkaiser.c | 2 ++ gfxnvidia.c | 2 ++ nic3com.c | 2 ++ nicintel.c | 7 +++---- nicintel_spi.c | 2 ++ nicnatsemi.c | 2 ++ nicrealtek.c | 2 ++ ogp_spi.c | 2 ++ pcidev.c | 6 +++--- satamv.c | 5 ++--- satasii.c | 3 ++- 12 files changed, 26 insertions(+), 11 deletions(-) diff --git a/atahpt.c b/atahpt.c index b692b88..4c1b13e 100644 --- a/atahpt.c +++ b/atahpt.c @@ -71,6 +71,8 @@ int atahpt_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_4, ata_hpt); + if (!io_base_addr) + return 1; /* Enable flash access. */ reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS); diff --git a/drkaiser.c b/drkaiser.c index d4b6120..ffabf9b 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -71,6 +71,8 @@ int drkaiser_init(void) return 1; addr = pcidev_init(PCI_BASE_ADDRESS_2, drkaiser_pcidev); + if (!addr) + return 1; /* Write magic register to enable flash write. */ rpci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR, diff --git a/gfxnvidia.c b/gfxnvidia.c index 457172d..fe2362a 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -95,6 +95,8 @@ int gfxnvidia_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, gfx_nvidia); + if (!io_base_addr) + return 1; io_base_addr += 0x300000; msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr); diff --git a/nic3com.c b/nic3com.c index 4df720f..27d9506 100644 --- a/nic3com.c +++ b/nic3com.c @@ -91,6 +91,8 @@ int nic3com_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_3com); + if (!io_base_addr) + return 1; id = pcidev_dev->device_id; diff --git a/nicintel.c b/nicintel.c index f2d4529..7d6fa94 100644 --- a/nicintel.c +++ b/nicintel.c @@ -77,11 +77,10 @@ int nicintel_init(void) if (get_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case - * of errors. - * FIXME: BAR2 is not available if the device uses the CardBus function. - */ + /* FIXME: BAR2 is not available if the device uses the CardBus function. */ addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel); + if (!addr) + return 1; nicintel_bar = physmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); if (nicintel_bar == ERROR_PTR) diff --git a/nicintel_spi.c b/nicintel_spi.c index 7eb3af3..af7347b 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -171,6 +171,8 @@ int nicintel_spi_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); + if (!io_base_addr) + return 1; nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", io_base_addr, 4096); diff --git a/nicnatsemi.c b/nicnatsemi.c index c39637a..d16984d 100644 --- a/nicnatsemi.c +++ b/nicnatsemi.c @@ -63,6 +63,8 @@ int nicnatsemi_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_natsemi); + if (!io_base_addr) + return 1; if (register_shutdown(nicnatsemi_shutdown, NULL)) return 1; diff --git a/nicrealtek.c b/nicrealtek.c index f808e06..17a3172 100644 --- a/nicrealtek.c +++ b/nicrealtek.c @@ -65,6 +65,8 @@ int nicrealtek_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek); + if (!io_base_addr) + return 1; if (register_shutdown(nicrealtek_shutdown, NULL)) return 1; diff --git a/ogp_spi.c b/ogp_spi.c index 8502847..dc62d7d 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -132,6 +132,8 @@ int ogp_spi_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, ogp_spi); + if (!io_base_addr) + return 1; ogp_spibar = physmap("OGP registers", io_base_addr, 4096); diff --git a/pcidev.c b/pcidev.c index e8b4dc1..c32027c 100644 --- a/pcidev.c +++ b/pcidev.c @@ -207,7 +207,7 @@ uintptr_t pcidev_init(int bar, const struct pcidev_status *devs) if (pcidev_bdf != NULL) { if ((msg = pci_filter_parse_slot(&filter, pcidev_bdf))) { msg_perr("Error: %s\n", msg); - exit(1); + return 0; } } free(pcidev_bdf); @@ -228,13 +228,13 @@ uintptr_t pcidev_init(int bar, const struct pcidev_status *devs) /* Only continue if exactly one supported PCI dev has been found. */ if (found == 0) { msg_perr("Error: No supported PCI device found.\n"); - exit(1); + return 0; } else if (found > 1) { msg_perr("Error: Multiple supported PCI devices found. " "Use 'flashrom -p xxxx:pci=bb:dd.f' \n" "to explicitly select the card with the given BDF " "(PCI bus, device, function).\n"); - exit(1); + return 0; } return curaddr; diff --git a/satamv.c b/satamv.c index 0b83a14..f23af3b 100644 --- a/satamv.c +++ b/satamv.c @@ -89,10 +89,9 @@ int satamv_init(void) return 1; /* BAR0 has all internal registers memory mapped. */ - /* No need to check for errors, pcidev_init() will not return in case - * of errors. - */ addr = pcidev_init(PCI_BASE_ADDRESS_0, satas_mv); + if (!addr) + return 1; mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) diff --git a/satasii.c b/satasii.c index 75378be..ac70129 100644 --- a/satasii.c +++ b/satasii.c @@ -73,7 +73,8 @@ int satasii_init(void) if (get_io_perms()) return 1; - pcidev_init(PCI_BASE_ADDRESS_0, satas_sii); + if (!pcidev_init(PCI_BASE_ADDRESS_0, satas_sii)) + return 1; id = pcidev_dev->device_id; -- 1.7.11.1

2 1

[commit] r1644 - trunk
by repository service 06 Jan '13

06 Jan '13

Author: hailfinger Date: Sun Jan 6 00:52:45 2013 New Revision: 1644 URL: http://flashrom.org/trac/flashrom/changeset/1644 Log: Decouple BAR reading from pci device init, handle errors gracefully. pcidev_init() now returns struct pci_device * instead of a BAR stored in PCI config space. This allows for real error checking instead of having exit(1) everywhere in pcidev.c. Thanks to Niklas Söderlund for coming up with the original error handling patch which was slightly modified and folded into this patch. Move the declaration of struct pci_device in programmer.h before the first user. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/atahpt.c trunk/drkaiser.c trunk/gfxnvidia.c trunk/nic3com.c trunk/nicintel.c trunk/nicintel_spi.c trunk/nicnatsemi.c trunk/nicrealtek.c trunk/ogp_spi.c trunk/pcidev.c trunk/programmer.h trunk/satamv.c trunk/satasii.c Modified: trunk/atahpt.c ============================================================================== --- trunk/atahpt.c Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/atahpt.c Sun Jan 6 00:52:45 2013 (r1644) @@ -58,17 +58,22 @@ int atahpt_init(void) { + struct pci_dev *dev = NULL; uint32_t reg32; if (rget_io_perms()) return 1; - io_base_addr = pcidev_init(PCI_BASE_ADDRESS_4, ata_hpt); + dev = pcidev_init(ata_hpt, PCI_BASE_ADDRESS_4); + if (!dev) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_4); /* Enable flash access. */ - reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS); + reg32 = pci_read_long(dev, REG_FLASH_ACCESS); reg32 |= (1 << 24); - rpci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32); + rpci_write_long(dev, REG_FLASH_ACCESS, reg32); register_par_programmer(&par_programmer_atahpt, BUS_PARALLEL); Modified: trunk/drkaiser.c ============================================================================== --- trunk/drkaiser.c Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/drkaiser.c Sun Jan 6 00:52:45 2013 (r1644) @@ -64,17 +64,20 @@ int drkaiser_init(void) { + struct pci_dev *dev = NULL; uint32_t addr; if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case of errors. */ - addr = pcidev_init(PCI_BASE_ADDRESS_2, drkaiser_pcidev); + dev = pcidev_init(drkaiser_pcidev, PCI_BASE_ADDRESS_2); + if (!dev) + return 1; + + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); /* Write magic register to enable flash write. */ - rpci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR, - PCI_MAGIC_DRKAISER_VALUE); + rpci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE); /* Map 128kB flash memory window. */ drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", Modified: trunk/gfxnvidia.c ============================================================================== --- trunk/gfxnvidia.c Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/gfxnvidia.c Sun Jan 6 00:52:45 2013 (r1644) @@ -85,14 +85,17 @@ int gfxnvidia_init(void) { + struct pci_dev *dev = NULL; uint32_t reg32; if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case of errors. */ - io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, gfx_nvidia); + dev = pcidev_init(gfx_nvidia, PCI_BASE_ADDRESS_0); + if (!dev) + return 1; + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); io_base_addr += 0x300000; msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr); @@ -102,9 +105,9 @@ return 1; /* Allow access to flash interface (will disable screen). */ - reg32 = pci_read_long(pcidev_dev, 0x50); + reg32 = pci_read_long(dev, 0x50); reg32 &= ~(1 << 0); - rpci_write_long(pcidev_dev, 0x50, reg32); + rpci_write_long(dev, 0x50, reg32); /* Write/erase doesn't work. */ programmer_may_write = 0; Modified: trunk/nic3com.c ============================================================================== --- trunk/nic3com.c Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/nic3com.c Sun Jan 6 00:52:45 2013 (r1644) @@ -86,13 +86,18 @@ int nic3com_init(void) { + struct pci_dev *dev = NULL; + if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case of errors. */ - io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_3com); + dev = pcidev_init(nics_3com, PCI_BASE_ADDRESS_0); + if (!dev) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); - id = pcidev_dev->device_id; + id = dev->device_id; /* 3COM 3C90xB cards need a special fixup. */ if (id == 0x9055 || id == 0x9001 || id == 0x9004 || id == 0x9005 Modified: trunk/nicintel.c ============================================================================== --- trunk/nicintel.c Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/nicintel.c Sun Jan 6 00:52:45 2013 (r1644) @@ -68,6 +68,7 @@ int nicintel_init(void) { + struct pci_dev *dev = NULL; uintptr_t addr; /* Needed only for PCI accesses on some platforms. @@ -76,17 +77,17 @@ if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case of errors. - * FIXME: BAR2 is not available if the device uses the CardBus function. - */ - addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel); + /* FIXME: BAR2 is not available if the device uses the CardBus function. */ + dev = pcidev_init(nics_intel, PCI_BASE_ADDRESS_2); + if (!dev) + return 1; + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); nicintel_bar = physmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); if (nicintel_bar == ERROR_PTR) goto error_out_unmap; - /* FIXME: Using pcidev_dev _will_ cause pretty explosions in the future. */ - addr = pcidev_readbar(pcidev_dev, PCI_BASE_ADDRESS_0); + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); /* FIXME: This is not an aligned mapping. Use 4k? */ nicintel_control_bar = physmap("Intel NIC control/status reg", addr, NICINTEL_CONTROL_MEMMAP_SIZE); Modified: trunk/nicintel_spi.c ============================================================================== --- trunk/nicintel_spi.c Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/nicintel_spi.c Sun Jan 6 00:52:45 2013 (r1644) @@ -166,14 +166,17 @@ int nicintel_spi_init(void) { + struct pci_dev *dev = NULL; uint32_t tmp; if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case of errors. */ - io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); + dev = pcidev_init(nics_intel_spi, PCI_BASE_ADDRESS_0); + if (!dev) + return 1; + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", io_base_addr, MEMMAP_SIZE); /* Automatic restore of EECD on shutdown is not possible because EECD Modified: trunk/nicnatsemi.c ============================================================================== --- trunk/nicnatsemi.c Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/nicnatsemi.c Sun Jan 6 00:52:45 2013 (r1644) @@ -52,22 +52,19 @@ .chip_writen = fallback_chip_writen, }; -static int nicnatsemi_shutdown(void *data) -{ - pci_cleanup(pacc); - return 0; -} - int nicnatsemi_init(void) { + struct pci_dev *dev = NULL; + if (rget_io_perms()) return 1; - io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_natsemi); - - if (register_shutdown(nicnatsemi_shutdown, NULL)) + dev = pcidev_init(nics_natsemi, PCI_BASE_ADDRESS_0); + if (!dev) return 1; + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + /* The datasheet shows address lines MA0-MA16 in one place and MA0-MA15 * in another. My NIC has MA16 connected to A16 on the boot ROM socket * so I'm assuming it is accessible. If not then next line wants to be Modified: trunk/nicrealtek.c ============================================================================== --- trunk/nicrealtek.c Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/nicrealtek.c Sun Jan 6 00:52:45 2013 (r1644) @@ -59,16 +59,19 @@ int nicrealtek_init(void) { + struct pci_dev *dev = NULL; + if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case of errors. */ - io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek); - if (register_shutdown(nicrealtek_shutdown, NULL)) + dev = pcidev_init(nics_realtek, PCI_BASE_ADDRESS_0); + if (!dev) return 1; + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + /* Beware, this ignores the vendor ID! */ - switch (pcidev_dev->device_id) { + switch (dev->device_id) { case 0x8139: /* RTL8139 */ case 0x1211: /* SMC 1211TX */ default: @@ -81,6 +84,9 @@ break; } + if (register_shutdown(nicrealtek_shutdown, NULL)) + return 1; + register_par_programmer(&par_programmer_nicrealtek, BUS_PARALLEL); return 0; Modified: trunk/ogp_spi.c ============================================================================== --- trunk/ogp_spi.c Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/ogp_spi.c Sun Jan 6 00:52:45 2013 (r1644) @@ -105,6 +105,7 @@ int ogp_spi_init(void) { + struct pci_dev *dev = NULL; char *type; type = extract_programmer_param("rom"); @@ -131,8 +132,11 @@ if (rget_io_perms()) return 1; - io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, ogp_spi); + dev = pcidev_init(ogp_spi, PCI_BASE_ADDRESS_0); + if (!dev) + return 1; + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); ogp_spibar = physmap("OGP registers", io_base_addr, 4096); if (register_shutdown(ogp_spi_shutdown, NULL)) Modified: trunk/pcidev.c ============================================================================== --- trunk/pcidev.c Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/pcidev.c Sun Jan 6 00:52:45 2013 (r1644) @@ -27,7 +27,6 @@ uint32_t io_base_addr; struct pci_access *pacc; -struct pci_dev *pcidev_dev = NULL; enum pci_bartype { TYPE_MEMBAR, @@ -156,7 +155,6 @@ static int pcidev_shutdown(void *data) { - pcidev_dev = NULL; if (pacc == NULL) { msg_perr("%s: Tried to cleanup an invalid PCI context!\n" "Please report a bug at flashrom(a)flashrom.org\n", __func__); @@ -181,18 +179,24 @@ return 0; } -uintptr_t pcidev_init(int bar, const struct dev_entry *devs) +/* pcidev_init gets an array of allowed PCI device IDs and returns a pointer to struct pci_dev iff exactly one + * match was found. If the "pci=bb:dd.f" programmer parameter was specified, a match is only considered if it + * also matches the specified bus:device.function. + * For convenience, this function also registers its own undo handlers. + */ +struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar) { struct pci_dev *dev; + struct pci_dev *found_dev = NULL; struct pci_filter filter; char *pcidev_bdf; char *msg = NULL; int found = 0; int i; - uintptr_t addr = 0, curaddr = 0; + uintptr_t addr = 0; - if(pci_init_common() != 0) - return 1; + if (pci_init_common() != 0) + return NULL; pci_filter_init(pacc, &filter); /* Filter by bb:dd.f (if supplied by the user). */ @@ -200,7 +204,7 @@ if (pcidev_bdf != NULL) { if ((msg = pci_filter_parse_slot(&filter, pcidev_bdf))) { msg_perr("Error: %s\n", msg); - exit(1); + return NULL; } } free(pcidev_bdf); @@ -230,8 +234,7 @@ * just those with a valid BAR. */ if ((addr = pcidev_readbar(dev, bar)) != 0) { - curaddr = addr; - pcidev_dev = dev; + found_dev = dev; found++; } } @@ -240,14 +243,14 @@ /* Only continue if exactly one supported PCI dev has been found. */ if (found == 0) { msg_perr("Error: No supported PCI device found.\n"); - exit(1); + return NULL; } else if (found > 1) { msg_perr("Error: Multiple supported PCI devices found. Use 'flashrom -p xxxx:pci=bb:dd.f' \n" "to explicitly select the card with the given BDF (PCI bus, device, function).\n"); - exit(1); + return NULL; } - return curaddr; + return found_dev; } enum pci_write_type { Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/programmer.h Sun Jan 6 00:52:45 2013 (r1644) @@ -160,8 +160,25 @@ unsigned int half_period; }; -#if CONFIG_INTERNAL == 1 +#if NEED_PCI == 1 struct pci_dev; + +/* pcidev.c */ +// FIXME: These need to be local, not global +extern uint32_t io_base_addr; +extern struct pci_access *pacc; +int pci_init_common(void); +uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); +struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar); +/* rpci_write_* are reversible writes. The original PCI config space register + * contents will be restored on shutdown. + */ +int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data); +int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data); +int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data); +#endif + +#if CONFIG_INTERNAL == 1 struct penable { uint16_t vendor_id; uint16_t device_id; @@ -232,23 +249,6 @@ void myusec_calibrate_delay(void); void internal_delay(int usecs); -#if NEED_PCI == 1 -/* pcidev.c */ -// FIXME: These need to be local, not global -extern uint32_t io_base_addr; -extern struct pci_access *pacc; -extern struct pci_dev *pcidev_dev; -int pci_init_common(void); -uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); -uintptr_t pcidev_init(int bar, const struct dev_entry *devs); -/* rpci_write_* are reversible writes. The original PCI config space register - * contents will be restored on shutdown. - */ -int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data); -int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data); -int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data); -#endif - #if CONFIG_INTERNAL == 1 /* board_enable.c */ int board_parse_parameter(const char *boardstring, const char **vendor, const char **model); Modified: trunk/satamv.c ============================================================================== --- trunk/satamv.c Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/satamv.c Sun Jan 6 00:52:45 2013 (r1644) @@ -81,6 +81,7 @@ */ int satamv_init(void) { + struct pci_dev *dev = NULL; uintptr_t addr; uint32_t tmp; @@ -88,11 +89,11 @@ return 1; /* BAR0 has all internal registers memory mapped. */ - /* No need to check for errors, pcidev_init() will not return in case - * of errors. - */ - addr = pcidev_init(PCI_BASE_ADDRESS_0, satas_mv); + dev = pcidev_init(satas_mv, PCI_BASE_ADDRESS_0); + if (!dev) + return 1; + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) return 1; @@ -143,8 +144,7 @@ pci_rmmio_writel(tmp, mv_bar + GPIO_PORT_CONTROL); /* Get I/O BAR location. */ - tmp = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_2) & - PCI_BASE_ADDRESS_IO_MASK; + tmp = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); /* Truncate to reachable range. * FIXME: Check if the I/O BAR is actually reachable. * This is an arch specific check. Modified: trunk/satasii.c ============================================================================== --- trunk/satasii.c Fri Jan 4 23:54:07 2013 (r1643) +++ trunk/satasii.c Sun Jan 6 00:52:45 2013 (r1644) @@ -76,21 +76,24 @@ int satasii_init(void) { + struct pci_dev *dev = NULL; uint32_t addr; uint16_t reg_offset; if (rget_io_perms()) return 1; - pcidev_init(PCI_BASE_ADDRESS_0, satas_sii); + dev = pcidev_init(satas_sii, PCI_BASE_ADDRESS_0); + if (!dev) + return 1; - id = pcidev_dev->device_id; + id = dev->device_id; if ((id == 0x3132) || (id == 0x3124)) { - addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_0) & ~0x07; + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); reg_offset = 0x70; } else { - addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_5) & ~0x07; + addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_5); reg_offset = 0x50; }

1 0

Report: Intel DQ77KB KBQ7710H.86A.0046.2012.1122.1629 read
by dpcimanager＠users.sourceforge.net 05 Jan '13

05 Jan '13

flashrom v0.9.6.1-r1622 on Darwin 12.2.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.9, LLVM Clang 4.1 ((tags/Apple/clang-421.11.66)), little endian Command line (5 args): ~/Desktop/DPCIManager.app/Contents/MacOS/flashrom -VV -r ~/Downloads/Intel DQ77KB KBQ7710H.86A.0046.2012.1122.1629.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, Jan 4 20:28:57 Melanies-Mac-Pro kernel[0]: DirectHW: Driver v1.3 (compiled on Dec 4 2012) loaded. Visit http://www.coresystems.de/ for more information. 470M loops per second, 10 myus = 11 us, 100 myus = 107 us, 1000 myus = 1078 us, 10000 myus = 10432 us, 4 myus = 5 us, OK. Initializing internal programmer Mapping low megabyte at 0x00000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x00000400. No coreboot table found. DMI string system-manufacturer: " " DMI string system-product-name: " " DMI string system-version: " " DMI string baseboard-manufacturer: "Intel Corporation" DMI string baseboard-product-name: "DQ77KB" DMI string baseboard-version: "AAG40294-401" DMI string chassis-type: "Desktop" Found chipset "Intel Q77" with PCI ID 8086:1e47. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode enabled 0xff600000/0xff200000 FWH decode enabled 0xff500000/0xff100000 FWH decode enabled 0xff400000/0xff000000 FWH decode enabled Maximum FWH chip size: 0x100000 bytes BIOS_CNTL = 0x2a: BIOS Lock Enable: enabled, BIOS Write Enable: disabled WARNING: BIOS region SMM protection is enabled! WARNING: Setting Bios Control at 0xdc from 0x2a to 0x0b on Q77 failed. New value is 0x2a. Root Complex Register Block address = 0xfed1c000 GCS = 0xc61: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 WARNING: SPI Configuration Lockdown activated. Reading OPCODES... done OP Type Pre-OP op[0]: 0x02, write w/ addr, none op[1]: 0x03, read w/ addr, none op[2]: 0x20, write w/ addr, none op[3]: 0x05, read w/o addr, none op[4]: 0x9f, read w/o addr, none op[5]: 0x01, write w/o addr, none op[6]: 0x00, read w/o addr, none op[7]: 0x00, read w/o addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x00 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x005dc0f0 (FADDR) 0x50: 0x00000a0b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b 0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region (0x00000000-0x00000fff) is read-only. 0x58: 0x0bff05c0 FREG1: BIOS region (0x005c0000-0x00bfffff) is read-write. 0x5C: 0x05bf0003 FREG2: WARNING: Management Engine region (0x00003000-0x005bffff) is locked. 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) is read-write. 0x64: 0x00001fff FREG4: Platform Data region is unused. 0x74: 0x00000000 (PR0 is unused) 0x78: 0x00000000 (PR1 is unused) 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) Please send a verbose log to flashrom(a)flashrom.org if this board is not listed on http://flashrom.org/Supported_hardware#Supported_mainboards yet. Writes have been disabled for safety reasons. You can enforce write support with the ich_spi_force programmer option, but you will most likely harm your hardware! If you force flashrom you will get no support if something breaks. On a few mainboards it is possible to enable write access by setting a jumper (see its documentation or the board itself). 0x90: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0x91: 0xf94010 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=0, SME=0, SCF=1 0x94: 0x0006 (PREOP) 0x96: 0x043b (OPTYPE) 0x98: 0x05200302 (OPMENU) 0x9C: 0x0000019f (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00802005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x03040103 FLMAP1 0x12100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 4 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 2 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH Strap Length): 18 FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x0930001c FLILL 0x00000000 --- Details --- Component 1 density: 8 MB Component 2 density: 4 MB Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 33 MHz Write and Erase Clock Freq.: 33 MHz Fast Read is supported. Fast Read Clock Frequency: 33 MHz No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x0bff05c0 FLREG2 0x05bf0003 FLREG3 0x00020001 FLREG4 0x00001fff --- Details --- Region 0 (Descr.) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x005c0000 - 0x00bfffff Region 2 (ME ) 0x00003000 - 0x005bffff Region 3 (GbE ) 0x00001000 - 0x00002fff Region 4 (Platf.) is unused. === Master Section === FLMSTR1 0x0a0b0000 FLMSTR2 0x0c0d0000 FLMSTR3 0x08080118 --- Details --- Descr. BIOS ME GbE Platf. BIOS r rw rw ME r rw rw GbE rw Enabling hardware sequencing due to multiple flash chips detected. SPI Read Configuration: prefetching enabled, caching enabled, PROBLEMS, continuing anyway The following protocols are supported: FWH, Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Found 2 attached SPI flash chips with a combined density of 12288 kB. There is only one partition containing the whole address space (0x000000 - 0xbfffff). There are 3072 erase blocks with 4096 B each. Found Programmer flash chip "Opaque flash chip" (12288 kB, Programmer-specific) at physical address 0x0. Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Found Programmer flash chip "Opaque flash chip" (12288 kB, Programmer-specific). Reading flash... Reading 12582912 bytes starting at 0x000000. Transaction error between offset 0x00003000 and 0x0000303f (= 0x00003000 + 63)! Read operation failed!

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Re: [flashrom] [PATCH] Introduce msg_*warn.
by Stefan Tauner 04 Jan '13

04 Jan '13

On Fri, 4 Jan 2013 17:49:45 +0100 Idwer Vollering <vidwer(a)gmail.com> wrote: > 2013/1/4 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at>: > > Also, unify all outputs of "Warning:" and "Error:" to use normal > > capitalization instead of mixing it with all capitals. > > > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > … > Replace 'toss' with 'discard' (as you are going to do), then this is > Acked-by: Idwer Vollering <vidwer(a)gmail.com> Thanks. Adjusted as discussed, fixed the indention problem Carl-Daniel mentioned and committed in r1643. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1643 - trunk
by repository service 04 Jan '13

04 Jan '13

Author: stefanct Date: Fri Jan 4 23:54:07 2013 New Revision: 1643 URL: http://flashrom.org/trac/flashrom/changeset/1643 Log: Introduce msg_*warn. Also, unify all outputs of "Warning:" and "Error:" to use normal capitalization instead of mixing it with all capitals. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/board_enable.c trunk/cbtable.c trunk/chipset_enable.c trunk/cli_output.c trunk/dmi.c trunk/flash.h trunk/ichspi.c trunk/internal.c trunk/satasii.c trunk/serprog.c trunk/sst_fwhub.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Fri Jan 4 23:24:58 2013 (r1642) +++ trunk/board_enable.c Fri Jan 4 23:54:07 2013 (r1643) @@ -546,7 +546,7 @@ sio_mask(port, 0x24, 0x28, 0x38); } else { - msg_perr("WARNING: Flash interface in use by GPIO!\n"); + msg_pwarn("Warning: Flash interface in use by GPIO!\n"); } } else { msg_pinfo("BIOS ROM is disabled\n"); @@ -2556,8 +2556,8 @@ if (board->dmi_pattern) { if (!has_dmi_support) { - msg_perr("WARNING: Can't autodetect %s %s, DMI info unavailable.\n", - board->vendor_name, board->board_name); + msg_pwarn("Warning: Can't autodetect %s %s, DMI info unavailable.\n", + board->vendor_name, board->board_name); msg_pinfo("Please supply the board vendor and model name with the " "-p internal:mainboard=<vendor>:<model> option.\n"); continue; @@ -2582,14 +2582,14 @@ return 0; if (!force_boardenable) { - msg_pinfo("WARNING: The mainboard-specific code for %s %s has not been tested,\n" + msg_pwarn("Warning: The mainboard-specific code for %s %s has not been tested,\n" "and thus will not be executed by default. Depending on your hardware,\n" "erasing, writing or even probing can fail without running this code.\n\n" "Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection\n" "\"internal programmer\") for details.\n", board->vendor_name, board->board_name); return 1; } - msg_pinfo("NOTE: Running an untested board enable procedure.\n" + msg_pwarn("NOTE: Running an untested board enable procedure.\n" "Please report success/failure to flashrom(a)flashrom.org.\n"); return 0; } Modified: trunk/cbtable.c ============================================================================== --- trunk/cbtable.c Fri Jan 4 23:24:58 2013 (r1642) +++ trunk/cbtable.c Fri Jan 4 23:54:07 2013 (r1643) @@ -96,9 +96,9 @@ if (!strcasecmp(image_vendor, cb_vendor) && !strcasecmp(image_model, cb_model)) { msg_pdbg2("This coreboot image matches this mainboard.\n"); } else { - msg_pinfo("WARNING: This coreboot image (%s:%s) does not appear to\n" - " be correct for the detected mainboard (%s:%s).\n", - image_vendor, image_model, cb_vendor, cb_model); + msg_perr("This coreboot image (%s:%s) does not appear to\n" + "be correct for the detected mainboard (%s:%s).\n", + image_vendor, image_model, cb_vendor, cb_model); return -1; } Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Fri Jan 4 23:24:58 2013 (r1642) +++ trunk/chipset_enable.c Fri Jan 4 23:54:07 2013 (r1643) @@ -300,11 +300,11 @@ msg_pdbg("BIOS Lock Enable: %sabled, ", (new & (1 << 1)) ? "en" : "dis"); msg_pdbg("BIOS Write Enable: %sabled\n", (new & (1 << 0)) ? "en" : "dis"); if (new & (1 << 5)) - msg_pinfo("WARNING: BIOS region SMM protection is enabled!\n"); + msg_pwarn("Warning: BIOS region SMM protection is enabled!\n"); if (new != wanted) - msg_pinfo("WARNING: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n" + msg_pwarn("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n" "New value is 0x%02x.\n", bios_cntl, old, wanted, name, new); /* Return an error if we could not set the write enable */ @@ -661,7 +661,7 @@ rpci_write_byte(dev, 0x40, val); if (pci_read_byte(dev, 0x40) != val) { - msg_pinfo("\nWARNING: Failed to enable flash write on \"%s\"\n", name); + msg_pwarn("\nWarning: Failed to enable flash write on \"%s\"\n", name); return -1; } @@ -1516,7 +1516,7 @@ if (!dev) continue; if (ret != -2) { - msg_pinfo("WARNING: unexpected second chipset match: " + msg_pwarn("Warning: unexpected second chipset match: " "\"%s %s\"\n" "ignoring, please report lspci and board URL " "to flashrom(a)flashrom.org\n" Modified: trunk/cli_output.c ============================================================================== --- trunk/cli_output.c Fri Jan 4 23:24:58 2013 (r1642) +++ trunk/cli_output.c Fri Jan 4 23:54:07 2013 (r1643) @@ -74,16 +74,15 @@ int ret = 0; FILE *output_type = stdout; - if (level == MSG_ERROR) + if (level < MSG_INFO) output_type = stderr; if (level <= verbose_screen) { va_start(ap, fmt); ret = vfprintf(output_type, fmt, ap); va_end(ap); - /* msg_*spew usually happens inside chip accessors in possibly - * time-critical operations. Don't slow them down by flushing. - */ + /* msg_*spew often happens inside chip accessors in possibly + * time-critical operations. Don't slow them down by flushing. */ if (level != MSG_SPEW) fflush(output_type); } Modified: trunk/dmi.c ============================================================================== --- trunk/dmi.c Fri Jan 4 23:24:58 2013 (r1642) +++ trunk/dmi.c Fri Jan 4 23:54:07 2013 (r1643) @@ -105,7 +105,7 @@ "%s -s %s", dmidecode_command, string_name); dmidecode_pipe = popen(commandline, "r"); if (!dmidecode_pipe) { - msg_perr("DMI pipe open error\n"); + msg_perr("Opening DMI pipe failed!\n"); return NULL; } @@ -127,13 +127,11 @@ } } while (answerbuf[0] == '#'); - /* Toss all output above DMI_MAX_ANSWER_LEN away to prevent - deadlock on pclose. */ + /* Discard all output exceeding DMI_MAX_ANSWER_LEN to prevent deadlock on pclose. */ while (!feof(dmidecode_pipe)) getc(dmidecode_pipe); if (pclose(dmidecode_pipe) != 0) { - msg_pinfo("dmidecode execution unsuccessful - continuing " - "without DMI info\n"); + msg_pwarn("dmidecode execution unsuccessful - continuing without DMI info\n"); return NULL; } @@ -144,7 +142,7 @@ result = strdup(answerbuf); if (!result) - msg_perr("WARNING: Out of memory - DMI support fails"); + msg_pwarn("Warning: Out of memory - DMI support fails"); return result; } Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Fri Jan 4 23:24:58 2013 (r1642) +++ trunk/flash.h Fri Jan 4 23:54:07 2013 (r1643) @@ -271,16 +271,20 @@ #endif enum msglevel { MSG_ERROR = 0, - MSG_INFO = 1, - MSG_DEBUG = 2, - MSG_DEBUG2 = 3, - MSG_SPEW = 4, + MSG_WARN = 1, + MSG_INFO = 2, + MSG_DEBUG = 3, + MSG_DEBUG2 = 4, + MSG_SPEW = 5, }; /* Let gcc and clang check for correct printf-style format strings. */ int print(enum msglevel level, const char *fmt, ...) __attribute__((format(printf, 2, 3))); #define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */ #define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */ #define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */ +#define msg_gwarn(...) print(MSG_WARN, __VA_ARGS__) /* general warnings */ +#define msg_pwarn(...) print(MSG_WARN, __VA_ARGS__) /* programmer warnings */ +#define msg_cwarn(...) print(MSG_WARN, __VA_ARGS__) /* chip warnings */ #define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */ #define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */ #define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */ Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Fri Jan 4 23:24:58 2013 (r1642) +++ trunk/ichspi.c Fri Jan 4 23:54:07 2013 (r1643) @@ -1455,7 +1455,7 @@ return 0; } - msg_pinfo("FREG%i: WARNING: %s region (0x%08x-0x%08x) is %s.\n", i, + msg_pwarn("FREG%i: Warning: %s region (0x%08x-0x%08x) is %s.\n", i, region_names[i], base, (limit | 0x0fff), access_names[rwperms]); return 1; @@ -1486,7 +1486,7 @@ } msg_pdbg("0x%02X: 0x%08x ", off, pr); - msg_pinfo("PR%u: WARNING: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr), + msg_pwarn("PR%u: Warning: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr), ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]); return 1; } @@ -1618,7 +1618,7 @@ mmio_readl(ich_spibar + offs), i); } if (mmio_readw(ich_spibar) & (1 << 15)) { - msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); + msg_pwarn("WARNING: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; } ich_init_opcodes(); @@ -1669,7 +1669,7 @@ msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); prettyprint_ich9_reg_hsfs(tmp2); if (tmp2 & HSFS_FLOCKDN) { - msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); + msg_pwarn("Warning: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; } if (tmp2 & HSFS_FDV) @@ -1879,7 +1879,7 @@ msg_pdbg("0x6c: 0x%04x (CLOCK/DEBUG)\n", mmio_readw(ich_spibar + 0x6c)); if (mmio_readw(ich_spibar) & (1 << 15)) { - msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); + msg_pwarn("Warning: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; } Modified: trunk/internal.c ============================================================================== --- trunk/internal.c Fri Jan 4 23:24:58 2013 (r1642) +++ trunk/internal.c Fri Jan 4 23:54:07 2013 (r1643) @@ -257,7 +257,7 @@ #if defined(__i386__) || defined(__x86_64__) if ((cb_parse_table(&cb_vendor, &cb_model) == 0) && (board_vendor != NULL) && (board_model != NULL)) { if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { - msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" + msg_pwarn("Warning: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" " match the current coreboot IDs of the mainboard (%s:%s).\n", board_vendor, board_model, cb_vendor, cb_model); if (!force_boardmismatch) Modified: trunk/satasii.c ============================================================================== --- trunk/satasii.c Fri Jan 4 23:24:58 2013 (r1642) +++ trunk/satasii.c Fri Jan 4 23:54:07 2013 (r1643) @@ -98,7 +98,7 @@ /* Check if ROM cycle are OK. */ if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) - msg_pinfo("Warning: Flash seems unconnected.\n"); + msg_pwarn("Warning: Flash seems unconnected.\n"); if (register_shutdown(satasii_shutdown, NULL)) return 1; Modified: trunk/serprog.c ============================================================================== --- trunk/serprog.c Fri Jan 4 23:24:58 2013 (r1642) +++ trunk/serprog.c Fri Jan 4 23:54:07 2013 (r1643) @@ -467,7 +467,7 @@ * in a single byte. */ if (sp_docommand(S_CMD_Q_BUSTYPE, 0, NULL, 1, &c)) { - msg_perr("Warning: NAK to query supported buses\n"); + msg_pwarn("Warning: NAK to query supported buses\n"); c = BUS_NONSPI; /* A reasonable default for now. */ } serprog_buses_supported = c; @@ -547,9 +547,8 @@ buf[3] = (f_spi_req >> (3 * 8)) & 0xFF; if (sp_check_commandavail(S_CMD_S_SPI_FREQ) == 0) - msg_perr(MSGHEADER "Warning: Setting the SPI clock rate is not supported!\n"); - else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf) - == 0) { + msg_pwarn(MSGHEADER "Warning: Setting the SPI clock rate is not supported!\n"); + else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf) == 0) { f_spi = buf[0]; f_spi |= buf[1] << (1 * 8); f_spi |= buf[2] << (2 * 8); @@ -557,7 +556,7 @@ msg_pdbg(MSGHEADER "Requested to set SPI clock frequency to %u Hz. " "It was actually set to %u Hz\n", f_spi_req, f_spi); } else - msg_pdbg(MSGHEADER "Setting SPI clock rate to %u Hz failed!\n", f_spi_req); + msg_pwarn(MSGHEADER "Setting SPI clock rate to %u Hz failed!\n", f_spi_req); } free(spispeed); bt = serprog_buses_supported; @@ -633,14 +632,14 @@ } if (sp_docommand(S_CMD_Q_PGMNAME, 0, NULL, 16, pgmname)) { - msg_perr("Warning: NAK to query programmer name\n"); + msg_pwarn("Warning: NAK to query programmer name\n"); strcpy((char *)pgmname, "(unknown)"); } pgmname[16] = 0; msg_pinfo(MSGHEADER "Programmer name is \"%s\"\n", pgmname); if (sp_docommand(S_CMD_Q_SERBUF, 0, NULL, 2, &sp_device_serbuf_size)) { - msg_perr("Warning: NAK to query serial buffer size\n"); + msg_pwarn("Warning: NAK to query serial buffer size\n"); } msg_pdbg(MSGHEADER "Serial buffer size is %d\n", sp_device_serbuf_size); @@ -660,8 +659,7 @@ if (sp_docommand(S_CMD_Q_OPBUF, 0, NULL, 2, &sp_device_opbuf_size)) { - msg_perr("Warning: NAK to query operation buffer " - "size\n"); + msg_pwarn("Warning: NAK to query operation buffer size\n"); } msg_pdbg(MSGHEADER "operation buffer size is %d\n", sp_device_opbuf_size); @@ -755,7 +753,7 @@ if (sp_docommand(S_CMD_S_PIN_STATE, 1, &dis, 0, NULL) == 0) msg_pdbg(MSGHEADER "Output drivers disabled\n"); else - msg_perr(MSGHEADER "%s: Warning: could not disable output buffers\n", __func__); + msg_pwarn(MSGHEADER "%s: Warning: could not disable output buffers\n", __func__); } /* FIXME: fix sockets on windows(?), especially closing */ serialport_shutdown(&sp_fd); Modified: trunk/sst_fwhub.c ============================================================================== --- trunk/sst_fwhub.c Fri Jan 4 23:24:58 2013 (r1642) +++ trunk/sst_fwhub.c Fri Jan 4 23:54:07 2013 (r1643) @@ -86,7 +86,7 @@ { if (clear_sst_fwhub_block_lock(flash, i)) { - msg_cdbg("Warning: Unlock Failed for block 0x%06x\n", i); + msg_cwarn("Warning: Unlock Failed for block 0x%06x\n", i); ret++; } }

1 0

Re: [flashrom] [PATCH] Unify PCI init and let pcidev clean itself up.
by Carl-Daniel Hailfinger 04 Jan '13

04 Jan '13

Am 02.01.2013 15:43 schrieb Stefan Tauner: > Previously the internal programmer used its own code to initialize pcilib. > This patch extracts the common code from the internal programmer and > pcidev_init() into pcidev_init_common(). > This fixes the non-existent PCI cleanup of the internal programmer and adds > an additional safety by checking for an already existing PCI context. > > We got a nice shutdown function registration infrastructure, but did not use it > very wisely. Instead we added shutdown functions to a myriad of programmers > unnecessarily. In this patch we get rid of those that do only call pci_cleanup(pacc) > by adding a shutdown function the pcidev.c itself that gets registered by > pcidev_init(). > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Great work! Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

[commit] r1642 - trunk
by repository service 04 Jan '13

04 Jan '13

Author: stefanct Date: Fri Jan 4 23:24:58 2013 New Revision: 1642 URL: http://flashrom.org/trac/flashrom/changeset/1642 Log: Unify PCI init and let pcidev clean itself up. Previously the internal programmer used its own code to initialize pcilib. This patch extracts the common code from the internal programmer and pcidev_init() into pcidev_init_common(). This fixes the non-existent PCI cleanup of the internal programmer and adds an additional safety by checking for an already existing PCI context. We got a nice shutdown function registration infrastructure, but did not use it very wisely. Instead we added shutdown functions to a myriad of programmers unnecessarily. In this patch we get rid of those that do only call pci_cleanup(pacc) by adding a shutdown function the pcidev.c itself that gets registered by pcidev_init(). Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/atahpt.c trunk/drkaiser.c trunk/gfxnvidia.c trunk/internal.c trunk/nic3com.c trunk/nicintel.c trunk/nicintel_spi.c trunk/nicrealtek.c trunk/ogp_spi.c trunk/pcidev.c trunk/programmer.h trunk/satamv.c trunk/satasii.c Modified: trunk/atahpt.c ============================================================================== --- trunk/atahpt.c Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/atahpt.c Fri Jan 4 23:24:58 2013 (r1642) @@ -56,13 +56,6 @@ .chip_writen = fallback_chip_writen, }; -static int atahpt_shutdown(void *data) -{ - /* Flash access is disabled automatically by PCI restore. */ - pci_cleanup(pacc); - return 0; -} - int atahpt_init(void) { uint32_t reg32; @@ -72,9 +65,6 @@ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_4, ata_hpt); - if (register_shutdown(atahpt_shutdown, NULL)) - return 1; - /* Enable flash access. */ reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS); reg32 |= (1 << 24); Modified: trunk/drkaiser.c ============================================================================== --- trunk/drkaiser.c Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/drkaiser.c Fri Jan 4 23:24:58 2013 (r1642) @@ -59,8 +59,6 @@ static int drkaiser_shutdown(void *data) { physunmap(drkaiser_bar, DRKAISER_MEMMAP_SIZE); - /* Flash write is disabled automatically by PCI restore. */ - pci_cleanup(pacc); return 0; } @@ -71,6 +69,7 @@ if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ addr = pcidev_init(PCI_BASE_ADDRESS_2, drkaiser_pcidev); /* Write magic register to enable flash write. */ Modified: trunk/gfxnvidia.c ============================================================================== --- trunk/gfxnvidia.c Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/gfxnvidia.c Fri Jan 4 23:24:58 2013 (r1642) @@ -80,10 +80,6 @@ static int gfxnvidia_shutdown(void *data) { physunmap(nvidia_bar, GFXNVIDIA_MEMMAP_SIZE); - /* Flash interface access is disabled (and screen enabled) automatically - * by PCI restore. - */ - pci_cleanup(pacc); return 0; } @@ -94,6 +90,7 @@ if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, gfx_nvidia); io_base_addr += 0x300000; @@ -101,7 +98,6 @@ nvidia_bar = physmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); - /* Must be done before rpci calls. */ if (register_shutdown(gfxnvidia_shutdown, NULL)) return 1; Modified: trunk/internal.c ============================================================================== --- trunk/internal.c Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/internal.c Fri Jan 4 23:24:58 2013 (r1642) @@ -245,10 +245,8 @@ internal_buses_supported = BUS_NONSPI; /* Initialize PCI access for flash enables */ - pacc = pci_alloc(); /* Get the pci_access structure */ - /* Set all options you want -- here we stick with the defaults */ - pci_init(pacc); /* Initialize the PCI library */ - pci_scan_bus(pacc); /* We want to get the list of devices */ + if (pci_init_common() != 0) + return 1; if (processor_flash_enable()) { msg_perr("Processor detection/init failed.\n" Modified: trunk/nic3com.c ============================================================================== --- trunk/nic3com.c Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/nic3com.c Fri Jan 4 23:24:58 2013 (r1642) @@ -81,7 +81,6 @@ OUTL(internal_conf, io_base_addr + INTERNAL_CONFIG); } - pci_cleanup(pacc); return 0; } @@ -90,6 +89,7 @@ if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_3com); id = pcidev_dev->device_id; Modified: trunk/nicintel.c ============================================================================== --- trunk/nicintel.c Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/nicintel.c Fri Jan 4 23:24:58 2013 (r1642) @@ -63,7 +63,6 @@ { physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); - pci_cleanup(pacc); return 0; } @@ -77,8 +76,7 @@ if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case - * of errors. + /* No need to check for errors, pcidev_init() will not return in case of errors. * FIXME: BAR2 is not available if the device uses the CardBus function. */ addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel); @@ -117,7 +115,6 @@ error_out_unmap: physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); error_out: - pci_cleanup(pacc); return 1; } Modified: trunk/nicintel_spi.c ============================================================================== --- trunk/nicintel_spi.c Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/nicintel_spi.c Fri Jan 4 23:24:58 2013 (r1642) @@ -160,7 +160,6 @@ pci_mmio_writel(tmp, nicintel_spibar + EECD); physunmap(nicintel_spibar, MEMMAP_SIZE); - pci_cleanup(pacc); return 0; } @@ -172,6 +171,7 @@ if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", Modified: trunk/nicrealtek.c ============================================================================== --- trunk/nicrealtek.c Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/nicrealtek.c Fri Jan 4 23:24:58 2013 (r1642) @@ -54,7 +54,6 @@ static int nicrealtek_shutdown(void *data) { /* FIXME: We forgot to disable software access again. */ - pci_cleanup(pacc); return 0; } @@ -63,8 +62,8 @@ if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek); - if (register_shutdown(nicrealtek_shutdown, NULL)) return 1; Modified: trunk/ogp_spi.c ============================================================================== --- trunk/ogp_spi.c Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/ogp_spi.c Fri Jan 4 23:24:58 2013 (r1642) @@ -100,8 +100,6 @@ static int ogp_spi_shutdown(void *data) { physunmap(ogp_spibar, 4096); - pci_cleanup(pacc); - return 0; } Modified: trunk/pcidev.c ============================================================================== --- trunk/pcidev.c Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/pcidev.c Fri Jan 4 23:24:58 2013 (r1642) @@ -154,6 +154,33 @@ return (uintptr_t)addr; } +static int pcidev_shutdown(void *data) +{ + pcidev_dev = NULL; + if (pacc == NULL) { + msg_perr("%s: Tried to cleanup an invalid PCI context!\n" + "Please report a bug at flashrom(a)flashrom.org\n", __func__); + return 1; + } + pci_cleanup(pacc); + return 0; +} + +int pci_init_common(void) +{ + if (pacc != NULL) { + msg_perr("%s: Tried to allocate a new PCI context, but there is still an old one!\n" + "Please report a bug at flashrom(a)flashrom.org\n", __func__); + return 1; + } + pacc = pci_alloc(); /* Get the pci_access structure */ + pci_init(pacc); /* Initialize the PCI library */ + if (register_shutdown(pcidev_shutdown, NULL)) + return 1; + pci_scan_bus(pacc); /* We want to get the list of devices */ + return 0; +} + uintptr_t pcidev_init(int bar, const struct dev_entry *devs) { struct pci_dev *dev; @@ -164,9 +191,8 @@ int i; uintptr_t addr = 0, curaddr = 0; - pacc = pci_alloc(); /* Get the pci_access structure */ - pci_init(pacc); /* Initialize the PCI library */ - pci_scan_bus(pacc); /* We want to get the list of devices */ + if(pci_init_common() != 0) + return 1; pci_filter_init(pacc, &filter); /* Filter by bb:dd.f (if supplied by the user). */ @@ -244,6 +270,11 @@ int undo_pci_write(void *p) { struct undo_pci_write_data *data = p; + if (pacc == NULL) { + msg_perr("%s: Tried to undo PCI writes without a valid PCI context!\n" + "Please report a bug at flashrom(a)flashrom.org\n", __func__); + return 1; + } msg_pdbg("Restoring PCI config space for %02x:%02x:%01x reg 0x%02x\n", data->dev.bus, data->dev.dev, data->dev.func, data->reg); switch (data->type) { Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/programmer.h Fri Jan 4 23:24:58 2013 (r1642) @@ -238,6 +238,7 @@ extern uint32_t io_base_addr; extern struct pci_access *pacc; extern struct pci_dev *pcidev_dev; +int pci_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); uintptr_t pcidev_init(int bar, const struct dev_entry *devs); /* rpci_write_* are reversible writes. The original PCI config space register Modified: trunk/satamv.c ============================================================================== --- trunk/satamv.c Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/satamv.c Fri Jan 4 23:24:58 2013 (r1642) @@ -60,7 +60,6 @@ static int satamv_shutdown(void *data) { physunmap(mv_bar, 0x20000); - pci_cleanup(pacc); return 0; } @@ -96,7 +95,7 @@ mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) - goto error_out; + return 1; if (register_shutdown(satamv_shutdown, NULL)) return 1; @@ -159,10 +158,6 @@ register_par_programmer(&par_programmer_satamv, BUS_PARALLEL); return 0; - -error_out: - pci_cleanup(pacc); - return 1; } /* BAR2 (MEM) can map NVRAM and flash. We set it to flash in the init function. Modified: trunk/satasii.c ============================================================================== --- trunk/satasii.c Thu Jan 3 21:44:30 2013 (r1641) +++ trunk/satasii.c Fri Jan 4 23:24:58 2013 (r1642) @@ -57,7 +57,6 @@ static int satasii_shutdown(void *data) { physunmap(sii_bar, SATASII_MEMMAP_SIZE); - pci_cleanup(pacc); return 0; }

1 0

Re: [flashrom] [PATCH] Introduce msg_*warn.
by Idwer Vollering 04 Jan '13

04 Jan '13

2013/1/4 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at>: > Also, unify all outputs of "Warning:" and "Error:" to use normal > capitalization instead of mixing it with all capitals. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > board_enable.c | 8 ++++---- > cbtable.c | 6 +++--- > chipset_enable.c | 8 ++++---- > cli_output.c | 7 +++---- > dmi.c | 10 ++++------ > flash.h | 12 ++++++++---- > ichspi.c | 10 +++++----- > internal.c | 2 +- > satasii.c | 2 +- > serprog.c | 18 ++++++++---------- > sst_fwhub.c | 2 +- > 11 files changed, 42 insertions(+), 43 deletions(-) > > diff --git a/board_enable.c b/board_enable.c > index b6834e0..20369ad 100644 > --- a/board_enable.c > +++ b/board_enable.c > @@ -546,7 +546,7 @@ void w83697xx_memw_enable(uint16_t port) > sio_mask(port, 0x24, 0x28, 0x38); > > } else { > - msg_perr("WARNING: Flash interface in use by GPIO!\n"); > + msg_pwarn("Warning: Flash interface in use by GPIO!\n"); > } > } else { > msg_pinfo("BIOS ROM is disabled\n"); > @@ -2556,7 +2556,7 @@ const static struct board_match *board_match_pci_ids(enum board_match_phase phas > > if (board->dmi_pattern) { > if (!has_dmi_support) { > - msg_perr("WARNING: Can't autodetect %s %s, DMI info unavailable.\n", > + msg_pwarn("Warning: Can't autodetect %s %s, DMI info unavailable.\n", > board->vendor_name, board->board_name); > msg_pinfo("Please supply the board vendor and model name with the " > "-p internal:mainboard=<vendor>:<model> option.\n"); > @@ -2582,14 +2582,14 @@ static int board_enable_safetycheck(const struct board_match *board) > return 0; > > if (!force_boardenable) { > - msg_pinfo("WARNING: The mainboard-specific code for %s %s has not been tested,\n" > + msg_pwarn("Warning: The mainboard-specific code for %s %s has not been tested,\n" > "and thus will not be executed by default. Depending on your hardware,\n" > "erasing, writing or even probing can fail without running this code.\n\n" > "Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection\n" > "\"internal programmer\") for details.\n", board->vendor_name, board->board_name); > return 1; > } > - msg_pinfo("NOTE: Running an untested board enable procedure.\n" > + msg_pwarn("NOTE: Running an untested board enable procedure.\n" > "Please report success/failure to flashrom(a)flashrom.org.\n"); > return 0; > } > diff --git a/cbtable.c b/cbtable.c > index b859e68..e262a84 100644 > --- a/cbtable.c > +++ b/cbtable.c > @@ -96,9 +96,9 @@ int cb_check_image(uint8_t *image, int size) > if (!strcasecmp(image_vendor, cb_vendor) && !strcasecmp(image_model, cb_model)) { > msg_pdbg2("This coreboot image matches this mainboard.\n"); > } else { > - msg_pinfo("WARNING: This coreboot image (%s:%s) does not appear to\n" > - " be correct for the detected mainboard (%s:%s).\n", > - image_vendor, image_model, cb_vendor, cb_model); > + msg_perr("This coreboot image (%s:%s) does not appear to\n" > + "be correct for the detected mainboard (%s:%s).\n", > + image_vendor, image_model, cb_vendor, cb_model); > return -1; > } > > diff --git a/chipset_enable.c b/chipset_enable.c > index 0dc1d7e..1e2df21 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -300,11 +300,11 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_ > msg_pdbg("BIOS Lock Enable: %sabled, ", (new & (1 << 1)) ? "en" : "dis"); > msg_pdbg("BIOS Write Enable: %sabled\n", (new & (1 << 0)) ? "en" : "dis"); > if (new & (1 << 5)) > - msg_pinfo("WARNING: BIOS region SMM protection is enabled!\n"); > + msg_pwarn("Warning: BIOS region SMM protection is enabled!\n"); > > > if (new != wanted) > - msg_pinfo("WARNING: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n" > + msg_pwarn("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n" > "New value is 0x%02x.\n", bios_cntl, old, wanted, name, new); > > /* Return an error if we could not set the write enable */ > @@ -661,7 +661,7 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name) > rpci_write_byte(dev, 0x40, val); > > if (pci_read_byte(dev, 0x40) != val) { > - msg_pinfo("\nWARNING: Failed to enable flash write on \"%s\"\n", name); > + msg_pwarn("\nWarning: Failed to enable flash write on \"%s\"\n", name); > return -1; > } > > @@ -1516,7 +1516,7 @@ int chipset_flash_enable(void) > if (!dev) > continue; > if (ret != -2) { > - msg_pinfo("WARNING: unexpected second chipset match: " > + msg_pwarn("Warning: unexpected second chipset match: " > "\"%s %s\"\n" > "ignoring, please report lspci and board URL " > "to flashrom(a)flashrom.org\n" > diff --git a/cli_output.c b/cli_output.c > index 57a0a05..54b09a6 100644 > --- a/cli_output.c > +++ b/cli_output.c > @@ -74,16 +74,15 @@ int print(enum msglevel level, const char *fmt, ...) > int ret = 0; > FILE *output_type = stdout; > > - if (level == MSG_ERROR) > + if (level < MSG_INFO) > output_type = stderr; > > if (level <= verbose_screen) { > va_start(ap, fmt); > ret = vfprintf(output_type, fmt, ap); > va_end(ap); > - /* msg_*spew usually happens inside chip accessors in possibly > - * time-critical operations. Don't slow them down by flushing. > - */ > + /* msg_*spew often happens inside chip accessors in possibly > + * time-critical operations. Don't slow them down by flushing. */ > if (level != MSG_SPEW) > fflush(output_type); > } > diff --git a/dmi.c b/dmi.c > index a6e2146..5e293c7 100644 > --- a/dmi.c > +++ b/dmi.c > @@ -105,7 +105,7 @@ static char *get_dmi_string(const char *string_name) > "%s -s %s", dmidecode_command, string_name); > dmidecode_pipe = popen(commandline, "r"); > if (!dmidecode_pipe) { > - msg_perr("DMI pipe open error\n"); > + msg_perr("Opening DMI pipe failed!\n"); > return NULL; > } > > @@ -127,13 +127,11 @@ static char *get_dmi_string(const char *string_name) > } > } while (answerbuf[0] == '#'); > > - /* Toss all output above DMI_MAX_ANSWER_LEN away to prevent > - deadlock on pclose. */ > + /* Toss all output above DMI_MAX_ANSWER_LEN away to prevent deadlock on pclose. */ Replace 'toss' with 'discard' (as you are going to do), then this is Acked-by: Idwer Vollering <vidwer(a)gmail.com> > while (!feof(dmidecode_pipe)) > getc(dmidecode_pipe); > if (pclose(dmidecode_pipe) != 0) { > - msg_pinfo("dmidecode execution unsuccessful - continuing " > - "without DMI info\n"); > + msg_pwarn("dmidecode execution unsuccessful - continuing without DMI info\n"); > return NULL; > } > > @@ -144,7 +142,7 @@ static char *get_dmi_string(const char *string_name) > > result = strdup(answerbuf); > if (!result) > - msg_perr("WARNING: Out of memory - DMI support fails"); > + msg_pwarn("Warning: Out of memory - DMI support fails"); > > return result; > } > diff --git a/flash.h b/flash.h > index 3149b4f..a479286 100644 > --- a/flash.h > +++ b/flash.h > @@ -271,16 +271,20 @@ void start_logging(void); > #endif > enum msglevel { > MSG_ERROR = 0, > - MSG_INFO = 1, > - MSG_DEBUG = 2, > - MSG_DEBUG2 = 3, > - MSG_SPEW = 4, > + MSG_WARN = 1, > + MSG_INFO = 2, > + MSG_DEBUG = 3, > + MSG_DEBUG2 = 4, > + MSG_SPEW = 5, > }; > /* Let gcc and clang check for correct printf-style format strings. */ > int print(enum msglevel level, const char *fmt, ...) __attribute__((format(printf, 2, 3))); > #define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */ > #define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */ > #define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */ > +#define msg_gwarn(...) print(MSG_WARN, __VA_ARGS__) /* general warnings */ > +#define msg_pwarn(...) print(MSG_WARN, __VA_ARGS__) /* programmer warnings */ > +#define msg_cwarn(...) print(MSG_WARN, __VA_ARGS__) /* chip warnings */ > #define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */ > #define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */ > #define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */ > diff --git a/ichspi.c b/ichspi.c > index fadfe62..2a3d58a 100644 > --- a/ichspi.c > +++ b/ichspi.c > @@ -1455,7 +1455,7 @@ static int ich9_handle_frap(uint32_t frap, int i) > return 0; > } > > - msg_pinfo("FREG%i: WARNING: %s region (0x%08x-0x%08x) is %s.\n", i, > + msg_pwarn("FREG%i: Warning: %s region (0x%08x-0x%08x) is %s.\n", i, > region_names[i], base, (limit | 0x0fff), > access_names[rwperms]); > return 1; > @@ -1486,7 +1486,7 @@ static int ich9_handle_pr(int i) > } > > msg_pdbg("0x%02X: 0x%08x ", off, pr); > - msg_pinfo("PR%u: WARNING: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr), > + msg_pwarn("PR%u: Warning: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr), > ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]); > return 1; > } > @@ -1618,7 +1618,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > mmio_readl(ich_spibar + offs), i); > } > if (mmio_readw(ich_spibar) & (1 << 15)) { > - msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); > + msg_pwarn("WARNING: SPI Configuration Lockdown activated.\n"); > ichspi_lock = 1; > } > ich_init_opcodes(); > @@ -1669,7 +1669,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); > prettyprint_ich9_reg_hsfs(tmp2); > if (tmp2 & HSFS_FLOCKDN) { > - msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); > + msg_pwarn("Warning: SPI Configuration Lockdown activated.\n"); > ichspi_lock = 1; > } > if (tmp2 & HSFS_FDV) > @@ -1879,7 +1879,7 @@ int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) > msg_pdbg("0x6c: 0x%04x (CLOCK/DEBUG)\n", > mmio_readw(ich_spibar + 0x6c)); > if (mmio_readw(ich_spibar) & (1 << 15)) { > - msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); > + msg_pwarn("Warning: SPI Configuration Lockdown activated.\n"); > ichspi_lock = 1; > } > > diff --git a/internal.c b/internal.c > index eda4d59..c4aa5a4 100644 > --- a/internal.c > +++ b/internal.c > @@ -259,7 +259,7 @@ int internal_init(void) > #if defined(__i386__) || defined(__x86_64__) > if ((cb_parse_table(&cb_vendor, &cb_model) == 0) && (board_vendor != NULL) && (board_model != NULL)) { > if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { > - msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" > + msg_pwarn("Warning: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" > " match the current coreboot IDs of the mainboard (%s:%s).\n", > board_vendor, board_model, cb_vendor, cb_model); > if (!force_boardmismatch) > diff --git a/satasii.c b/satasii.c > index 7b94203..158ce30 100644 > --- a/satasii.c > +++ b/satasii.c > @@ -99,7 +99,7 @@ int satasii_init(void) > > /* Check if ROM cycle are OK. */ > if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) > - msg_pinfo("Warning: Flash seems unconnected.\n"); > + msg_pwarn("Warning: Flash seems unconnected.\n"); > > if (register_shutdown(satasii_shutdown, NULL)) > return 1; > diff --git a/serprog.c b/serprog.c > index e5ac62b..c36c93d 100644 > --- a/serprog.c > +++ b/serprog.c > @@ -467,7 +467,7 @@ int serprog_init(void) > * in a single byte. > */ > if (sp_docommand(S_CMD_Q_BUSTYPE, 0, NULL, 1, &c)) { > - msg_perr("Warning: NAK to query supported buses\n"); > + msg_pwarn("Warning: NAK to query supported buses\n"); > c = BUS_NONSPI; /* A reasonable default for now. */ > } > serprog_buses_supported = c; > @@ -547,9 +547,8 @@ int serprog_init(void) > buf[3] = (f_spi_req >> (3 * 8)) & 0xFF; > > if (sp_check_commandavail(S_CMD_S_SPI_FREQ) == 0) > - msg_perr(MSGHEADER "Warning: Setting the SPI clock rate is not supported!\n"); > - else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf) > - == 0) { > + msg_pwarn(MSGHEADER "Warning: Setting the SPI clock rate is not supported!\n"); > + else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf) == 0) { > f_spi = buf[0]; > f_spi |= buf[1] << (1 * 8); > f_spi |= buf[2] << (2 * 8); > @@ -557,7 +556,7 @@ int serprog_init(void) > msg_pdbg(MSGHEADER "Requested to set SPI clock frequency to %u Hz. " > "It was actually set to %u Hz\n", f_spi_req, f_spi); > } else > - msg_pdbg(MSGHEADER "Setting SPI clock rate to %u Hz failed!\n", f_spi_req); > + msg_pwarn(MSGHEADER "Setting SPI clock rate to %u Hz failed!\n", f_spi_req); > } > free(spispeed); > bt = serprog_buses_supported; > @@ -633,14 +632,14 @@ int serprog_init(void) > } > > if (sp_docommand(S_CMD_Q_PGMNAME, 0, NULL, 16, pgmname)) { > - msg_perr("Warning: NAK to query programmer name\n"); > + msg_pwarn("Warning: NAK to query programmer name\n"); > strcpy((char *)pgmname, "(unknown)"); > } > pgmname[16] = 0; > msg_pinfo(MSGHEADER "Programmer name is \"%s\"\n", pgmname); > > if (sp_docommand(S_CMD_Q_SERBUF, 0, NULL, 2, &sp_device_serbuf_size)) { > - msg_perr("Warning: NAK to query serial buffer size\n"); > + msg_pwarn("Warning: NAK to query serial buffer size\n"); > } > msg_pdbg(MSGHEADER "Serial buffer size is %d\n", > sp_device_serbuf_size); > @@ -660,8 +659,7 @@ int serprog_init(void) > > if (sp_docommand(S_CMD_Q_OPBUF, 0, NULL, 2, > &sp_device_opbuf_size)) { > - msg_perr("Warning: NAK to query operation buffer " > - "size\n"); > + msg_pwarn("Warning: NAK to query operation buffer size\n"); > } > msg_pdbg(MSGHEADER "operation buffer size is %d\n", > sp_device_opbuf_size); > @@ -755,7 +753,7 @@ static int serprog_shutdown(void *data) > if (sp_docommand(S_CMD_S_PIN_STATE, 1, &dis, 0, NULL) == 0) > msg_pdbg(MSGHEADER "Output drivers disabled\n"); > else > - msg_perr(MSGHEADER "%s: Warning: could not disable output buffers\n", __func__); > + msg_pwarn(MSGHEADER "%s: Warning: could not disable output buffers\n", __func__); > } > /* FIXME: fix sockets on windows(?), especially closing */ > serialport_shutdown(&sp_fd); > diff --git a/sst_fwhub.c b/sst_fwhub.c > index a440a20..3dd140e 100644 > --- a/sst_fwhub.c > +++ b/sst_fwhub.c > @@ -86,7 +86,7 @@ int unlock_sst_fwhub(struct flashctx *flash) > { > if (clear_sst_fwhub_block_lock(flash, i)) > { > - msg_cdbg("Warning: Unlock Failed for block 0x%06x\n", i); > + msg_cwarn("Warning: Unlock Failed for block 0x%06x\n", i); > ret++; > } > } > -- > Kind regards, Stefan Tauner > > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > http://www.flashrom.org/mailman/listinfo/flashrom

1 0

[PATCH 0/6] Add libflashrom interface
by Nico Huber 04 Jan '13

04 Jan '13

This is an attempt to add a libflashrom interface like the one described in the wiki (http://flashrom.org/Libflashrom). It's not complete but functional. To keep the impact on existing code low, some glue code is added in a new file libflashrom.c. The first commit changes some internal pointers to const, to make the glue code a little smaller. The second commit adds the interface (libflashrom.h), and the glue. The third adds a Doxyfile for doxygen documentation. The fourth commit adapts the cli code to use the new message output interface. The last two commits fix two issues that we encountered when a client wants to restart things after calling programmer_shutdown(). Nico Huber (6): Make some char pointers const Add a convenient libflashrom interface Add Doxyfile for libflashrom documentation Adapt CLI to use new libflashrom interface' print callback On shutdown, reset count of registered programmers Cleanup ichspi opcode settings on shutdown Doxyfile | 1781 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Makefile | 8 +- cli_classic.c | 3 + cli_output.c | 7 +- flash.h | 6 +- flashrom.c | 12 +- ichspi.c | 14 + libflashrom.c | 443 ++++++++++++++ libflashrom.h | 55 ++ programmer.h | 2 +- 10 files changed, 2317 insertions(+), 14 deletions(-) Kind regards, Nico Huber

2 8

Re: [flashrom] [PATCH] Introduce msg_*warn.
by Carl-Daniel Hailfinger 04 Jan '13

04 Jan '13

Thanks for taking care of this long-standing issue! (Not a review, just a short comment.) Am 04.01.2013 14:51 schrieb Stefan Tauner: > @@ -2556,7 +2556,7 @@ const static struct board_match *board_match_pci_ids(enum board_match_phase phas > > if (board->dmi_pattern) { > if (!has_dmi_support) { > - msg_perr("WARNING: Can't autodetect %s %s, DMI info unavailable.\n", > + msg_pwarn("Warning: Can't autodetect %s %s, DMI info unavailable.\n", > board->vendor_name, board->board_name); Hm. Alignment? > msg_pinfo("Please supply the board vendor and model name with the " > "-p internal:mainboard=<vendor>:<model> option.\n"); Regards, Carl-Daniel -- http://www.hailfinger.org/

1 0

[PATCH] Introduce msg_*warn.
by Stefan Tauner 04 Jan '13

04 Jan '13

Also, unify all outputs of "Warning:" and "Error:" to use normal capitalization instead of mixing it with all capitals. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- board_enable.c | 8 ++++---- cbtable.c | 6 +++--- chipset_enable.c | 8 ++++---- cli_output.c | 7 +++---- dmi.c | 10 ++++------ flash.h | 12 ++++++++---- ichspi.c | 10 +++++----- internal.c | 2 +- satasii.c | 2 +- serprog.c | 18 ++++++++---------- sst_fwhub.c | 2 +- 11 files changed, 42 insertions(+), 43 deletions(-) diff --git a/board_enable.c b/board_enable.c index b6834e0..20369ad 100644 --- a/board_enable.c +++ b/board_enable.c @@ -546,7 +546,7 @@ void w83697xx_memw_enable(uint16_t port) sio_mask(port, 0x24, 0x28, 0x38); } else { - msg_perr("WARNING: Flash interface in use by GPIO!\n"); + msg_pwarn("Warning: Flash interface in use by GPIO!\n"); } } else { msg_pinfo("BIOS ROM is disabled\n"); @@ -2556,7 +2556,7 @@ const static struct board_match *board_match_pci_ids(enum board_match_phase phas if (board->dmi_pattern) { if (!has_dmi_support) { - msg_perr("WARNING: Can't autodetect %s %s, DMI info unavailable.\n", + msg_pwarn("Warning: Can't autodetect %s %s, DMI info unavailable.\n", board->vendor_name, board->board_name); msg_pinfo("Please supply the board vendor and model name with the " "-p internal:mainboard=<vendor>:<model> option.\n"); @@ -2582,14 +2582,14 @@ static int board_enable_safetycheck(const struct board_match *board) return 0; if (!force_boardenable) { - msg_pinfo("WARNING: The mainboard-specific code for %s %s has not been tested,\n" + msg_pwarn("Warning: The mainboard-specific code for %s %s has not been tested,\n" "and thus will not be executed by default. Depending on your hardware,\n" "erasing, writing or even probing can fail without running this code.\n\n" "Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection\n" "\"internal programmer\") for details.\n", board->vendor_name, board->board_name); return 1; } - msg_pinfo("NOTE: Running an untested board enable procedure.\n" + msg_pwarn("NOTE: Running an untested board enable procedure.\n" "Please report success/failure to flashrom(a)flashrom.org.\n"); return 0; } diff --git a/cbtable.c b/cbtable.c index b859e68..e262a84 100644 --- a/cbtable.c +++ b/cbtable.c @@ -96,9 +96,9 @@ int cb_check_image(uint8_t *image, int size) if (!strcasecmp(image_vendor, cb_vendor) && !strcasecmp(image_model, cb_model)) { msg_pdbg2("This coreboot image matches this mainboard.\n"); } else { - msg_pinfo("WARNING: This coreboot image (%s:%s) does not appear to\n" - " be correct for the detected mainboard (%s:%s).\n", - image_vendor, image_model, cb_vendor, cb_model); + msg_perr("This coreboot image (%s:%s) does not appear to\n" + "be correct for the detected mainboard (%s:%s).\n", + image_vendor, image_model, cb_vendor, cb_model); return -1; } diff --git a/chipset_enable.c b/chipset_enable.c index 0dc1d7e..1e2df21 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -300,11 +300,11 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_ msg_pdbg("BIOS Lock Enable: %sabled, ", (new & (1 << 1)) ? "en" : "dis"); msg_pdbg("BIOS Write Enable: %sabled\n", (new & (1 << 0)) ? "en" : "dis"); if (new & (1 << 5)) - msg_pinfo("WARNING: BIOS region SMM protection is enabled!\n"); + msg_pwarn("Warning: BIOS region SMM protection is enabled!\n"); if (new != wanted) - msg_pinfo("WARNING: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n" + msg_pwarn("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n" "New value is 0x%02x.\n", bios_cntl, old, wanted, name, new); /* Return an error if we could not set the write enable */ @@ -661,7 +661,7 @@ static int enable_flash_vt823x(struct pci_dev *dev, const char *name) rpci_write_byte(dev, 0x40, val); if (pci_read_byte(dev, 0x40) != val) { - msg_pinfo("\nWARNING: Failed to enable flash write on \"%s\"\n", name); + msg_pwarn("\nWarning: Failed to enable flash write on \"%s\"\n", name); return -1; } @@ -1516,7 +1516,7 @@ int chipset_flash_enable(void) if (!dev) continue; if (ret != -2) { - msg_pinfo("WARNING: unexpected second chipset match: " + msg_pwarn("Warning: unexpected second chipset match: " "\"%s %s\"\n" "ignoring, please report lspci and board URL " "to flashrom(a)flashrom.org\n" diff --git a/cli_output.c b/cli_output.c index 57a0a05..54b09a6 100644 --- a/cli_output.c +++ b/cli_output.c @@ -74,16 +74,15 @@ int print(enum msglevel level, const char *fmt, ...) int ret = 0; FILE *output_type = stdout; - if (level == MSG_ERROR) + if (level < MSG_INFO) output_type = stderr; if (level <= verbose_screen) { va_start(ap, fmt); ret = vfprintf(output_type, fmt, ap); va_end(ap); - /* msg_*spew usually happens inside chip accessors in possibly - * time-critical operations. Don't slow them down by flushing. - */ + /* msg_*spew often happens inside chip accessors in possibly + * time-critical operations. Don't slow them down by flushing. */ if (level != MSG_SPEW) fflush(output_type); } diff --git a/dmi.c b/dmi.c index a6e2146..5e293c7 100644 --- a/dmi.c +++ b/dmi.c @@ -105,7 +105,7 @@ static char *get_dmi_string(const char *string_name) "%s -s %s", dmidecode_command, string_name); dmidecode_pipe = popen(commandline, "r"); if (!dmidecode_pipe) { - msg_perr("DMI pipe open error\n"); + msg_perr("Opening DMI pipe failed!\n"); return NULL; } @@ -127,13 +127,11 @@ static char *get_dmi_string(const char *string_name) } } while (answerbuf[0] == '#'); - /* Toss all output above DMI_MAX_ANSWER_LEN away to prevent - deadlock on pclose. */ + /* Toss all output above DMI_MAX_ANSWER_LEN away to prevent deadlock on pclose. */ while (!feof(dmidecode_pipe)) getc(dmidecode_pipe); if (pclose(dmidecode_pipe) != 0) { - msg_pinfo("dmidecode execution unsuccessful - continuing " - "without DMI info\n"); + msg_pwarn("dmidecode execution unsuccessful - continuing without DMI info\n"); return NULL; } @@ -144,7 +142,7 @@ static char *get_dmi_string(const char *string_name) result = strdup(answerbuf); if (!result) - msg_perr("WARNING: Out of memory - DMI support fails"); + msg_pwarn("Warning: Out of memory - DMI support fails"); return result; } diff --git a/flash.h b/flash.h index 3149b4f..a479286 100644 --- a/flash.h +++ b/flash.h @@ -271,16 +271,20 @@ void start_logging(void); #endif enum msglevel { MSG_ERROR = 0, - MSG_INFO = 1, - MSG_DEBUG = 2, - MSG_DEBUG2 = 3, - MSG_SPEW = 4, + MSG_WARN = 1, + MSG_INFO = 2, + MSG_DEBUG = 3, + MSG_DEBUG2 = 4, + MSG_SPEW = 5, }; /* Let gcc and clang check for correct printf-style format strings. */ int print(enum msglevel level, const char *fmt, ...) __attribute__((format(printf, 2, 3))); #define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */ #define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */ #define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */ +#define msg_gwarn(...) print(MSG_WARN, __VA_ARGS__) /* general warnings */ +#define msg_pwarn(...) print(MSG_WARN, __VA_ARGS__) /* programmer warnings */ +#define msg_cwarn(...) print(MSG_WARN, __VA_ARGS__) /* chip warnings */ #define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */ #define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */ #define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */ diff --git a/ichspi.c b/ichspi.c index fadfe62..2a3d58a 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1455,7 +1455,7 @@ static int ich9_handle_frap(uint32_t frap, int i) return 0; } - msg_pinfo("FREG%i: WARNING: %s region (0x%08x-0x%08x) is %s.\n", i, + msg_pwarn("FREG%i: Warning: %s region (0x%08x-0x%08x) is %s.\n", i, region_names[i], base, (limit | 0x0fff), access_names[rwperms]); return 1; @@ -1486,7 +1486,7 @@ static int ich9_handle_pr(int i) } msg_pdbg("0x%02X: 0x%08x ", off, pr); - msg_pinfo("PR%u: WARNING: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr), + msg_pwarn("PR%u: Warning: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr), ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]); return 1; } @@ -1618,7 +1618,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, mmio_readl(ich_spibar + offs), i); } if (mmio_readw(ich_spibar) & (1 << 15)) { - msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); + msg_pwarn("WARNING: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; } ich_init_opcodes(); @@ -1669,7 +1669,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); prettyprint_ich9_reg_hsfs(tmp2); if (tmp2 & HSFS_FLOCKDN) { - msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); + msg_pwarn("Warning: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; } if (tmp2 & HSFS_FDV) @@ -1879,7 +1879,7 @@ int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) msg_pdbg("0x6c: 0x%04x (CLOCK/DEBUG)\n", mmio_readw(ich_spibar + 0x6c)); if (mmio_readw(ich_spibar) & (1 << 15)) { - msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); + msg_pwarn("Warning: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; } diff --git a/internal.c b/internal.c index eda4d59..c4aa5a4 100644 --- a/internal.c +++ b/internal.c @@ -259,7 +259,7 @@ int internal_init(void) #if defined(__i386__) || defined(__x86_64__) if ((cb_parse_table(&cb_vendor, &cb_model) == 0) && (board_vendor != NULL) && (board_model != NULL)) { if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { - msg_pinfo("WARNING: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" + msg_pwarn("Warning: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" " match the current coreboot IDs of the mainboard (%s:%s).\n", board_vendor, board_model, cb_vendor, cb_model); if (!force_boardmismatch) diff --git a/satasii.c b/satasii.c index 7b94203..158ce30 100644 --- a/satasii.c +++ b/satasii.c @@ -99,7 +99,7 @@ int satasii_init(void) /* Check if ROM cycle are OK. */ if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) - msg_pinfo("Warning: Flash seems unconnected.\n"); + msg_pwarn("Warning: Flash seems unconnected.\n"); if (register_shutdown(satasii_shutdown, NULL)) return 1; diff --git a/serprog.c b/serprog.c index e5ac62b..c36c93d 100644 --- a/serprog.c +++ b/serprog.c @@ -467,7 +467,7 @@ int serprog_init(void) * in a single byte. */ if (sp_docommand(S_CMD_Q_BUSTYPE, 0, NULL, 1, &c)) { - msg_perr("Warning: NAK to query supported buses\n"); + msg_pwarn("Warning: NAK to query supported buses\n"); c = BUS_NONSPI; /* A reasonable default for now. */ } serprog_buses_supported = c; @@ -547,9 +547,8 @@ int serprog_init(void) buf[3] = (f_spi_req >> (3 * 8)) & 0xFF; if (sp_check_commandavail(S_CMD_S_SPI_FREQ) == 0) - msg_perr(MSGHEADER "Warning: Setting the SPI clock rate is not supported!\n"); - else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf) - == 0) { + msg_pwarn(MSGHEADER "Warning: Setting the SPI clock rate is not supported!\n"); + else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf) == 0) { f_spi = buf[0]; f_spi |= buf[1] << (1 * 8); f_spi |= buf[2] << (2 * 8); @@ -557,7 +556,7 @@ int serprog_init(void) msg_pdbg(MSGHEADER "Requested to set SPI clock frequency to %u Hz. " "It was actually set to %u Hz\n", f_spi_req, f_spi); } else - msg_pdbg(MSGHEADER "Setting SPI clock rate to %u Hz failed!\n", f_spi_req); + msg_pwarn(MSGHEADER "Setting SPI clock rate to %u Hz failed!\n", f_spi_req); } free(spispeed); bt = serprog_buses_supported; @@ -633,14 +632,14 @@ int serprog_init(void) } if (sp_docommand(S_CMD_Q_PGMNAME, 0, NULL, 16, pgmname)) { - msg_perr("Warning: NAK to query programmer name\n"); + msg_pwarn("Warning: NAK to query programmer name\n"); strcpy((char *)pgmname, "(unknown)"); } pgmname[16] = 0; msg_pinfo(MSGHEADER "Programmer name is \"%s\"\n", pgmname); if (sp_docommand(S_CMD_Q_SERBUF, 0, NULL, 2, &sp_device_serbuf_size)) { - msg_perr("Warning: NAK to query serial buffer size\n"); + msg_pwarn("Warning: NAK to query serial buffer size\n"); } msg_pdbg(MSGHEADER "Serial buffer size is %d\n", sp_device_serbuf_size); @@ -660,8 +659,7 @@ int serprog_init(void) if (sp_docommand(S_CMD_Q_OPBUF, 0, NULL, 2, &sp_device_opbuf_size)) { - msg_perr("Warning: NAK to query operation buffer " - "size\n"); + msg_pwarn("Warning: NAK to query operation buffer size\n"); } msg_pdbg(MSGHEADER "operation buffer size is %d\n", sp_device_opbuf_size); @@ -755,7 +753,7 @@ static int serprog_shutdown(void *data) if (sp_docommand(S_CMD_S_PIN_STATE, 1, &dis, 0, NULL) == 0) msg_pdbg(MSGHEADER "Output drivers disabled\n"); else - msg_perr(MSGHEADER "%s: Warning: could not disable output buffers\n", __func__); + msg_pwarn(MSGHEADER "%s: Warning: could not disable output buffers\n", __func__); } /* FIXME: fix sockets on windows(?), especially closing */ serialport_shutdown(&sp_fd); diff --git a/sst_fwhub.c b/sst_fwhub.c index a440a20..3dd140e 100644 --- a/sst_fwhub.c +++ b/sst_fwhub.c @@ -86,7 +86,7 @@ int unlock_sst_fwhub(struct flashctx *flash) { if (clear_sst_fwhub_block_lock(flash, i)) { - msg_cdbg("Warning: Unlock Failed for block 0x%06x\n", i); + msg_cwarn("Warning: Unlock Failed for block 0x%06x\n", i); ret++; } } -- Kind regards, Stefan Tauner

1 0

Re: [flashrom] ASUS P7P55D-E LX verbose log
by Stefan Tauner 03 Jan '13

03 Jan '13

Hi, thanks for your report. Did you try writing too? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Bus Pirate pull-up resistors patch.
by Brian Salcedo 03 Jan '13

03 Jan '13

When working with some flash chips using the Bus Pirate programmer, the use of the Bus Pirate's on-board pull-up resistors is sometimes necessary. Use of said pull-up resistors requires the user to apply a voltage to the VPU pin of the Bus Pirate, and then command it to use them. Included is a patch to initialize the Bus Pirate's pull-up resistors with a 'pullups=1' at the command line: e.g. flashrom -p buspirate_spi:dev=/dev/buspirate,pullups=1 Here is a link to information pertaining to what this patch does. http://dangerousprototypes.com/docs/SPI_(binary)#0100wxyz_-_Configure_perip… Currently, flashrom sends 0x4b, which does not set the "pull-ups" bit high. Optionally sending 0x4f instead will enable them. --- trunk/buspirate_spi.c 2013-01-01 04:03:42.507602657 -0500 +++ src/flashrom/buspirate_spi.c 2013-01-01 04:02:25.847578106 -0500 @@ -204,11 +204,13 @@ char *dev = NULL; char *speed = NULL; char *tmp; + char *pullups = NULL; unsigned int fw_version_major = 0; unsigned int fw_version_minor = 0; int spispeed = 0x7; int ret = 0; int i; + int ipullup = 0; dev = extract_programmer_param("dev"); if (dev && !strlen(dev)) { @@ -220,6 +222,16 @@ return 1; } + /* enable pull-up resistors? */ + pullups = extract_programmer_param("pullups"); + if(pullups) { + ipullup = atoi(pullups); + + if(ipullup == 1) { + msg_pinfo("Enabled Bus Pirate pull-up resistors.\n"); + } + } + speed = extract_programmer_param("spispeed"); if (speed) { for (i = 0; spispeeds[i].name; i++) @@ -395,7 +407,7 @@ } /* Initial setup (SPI peripherals config): Enable power, CS high, AUX */ - bp_commbuf[0] = 0x40 | 0xb; + bp_commbuf[0] = 0x40 | ((ipullup == 1) ? 0xf : 0xb); ret = buspirate_sendrecv(bp_commbuf, 1, 1); if (ret) return 1; Happy New Year! Signed-off-by: Brian Salcedo <bsalcedo(a)gmx.us>

2 1

[commit] r1641 - trunk
by repository service 03 Jan '13

03 Jan '13

Author: stefanct Date: Thu Jan 3 21:44:30 2013 New Revision: 1641 URL: http://flashrom.org/trac/flashrom/changeset/1641 Log: Add user interface to activate the Bus Pirate pull-up resistors. When working with some flash chips using the Bus Pirate programmer, the use of the Bus Pirate's on-board pull-up resistors is sometimes necessary. On v3 hardware the use of said pull-up resistors requires the user to apply a voltage to the VPU pin of the Bus Pirate, and then command it to use them. For v4 hardware which supports also fixed internal 3.3V and 5V sources no documentation could be found. Here is a link to information pertaining to what this patch does: http://dangerousprototypes.com/docs/SPI_(binary)#0100wxyz_-_Configure_perip… Bonus: small cleanup of superfluous stack variables. Signed-off-by: Brian Salcedo <bsalcedo(a)gmx.us> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Tested-by: Brian Salcedo <bsalcedo(a)gmx.us> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/buspirate_spi.c trunk/flashrom.8 Modified: trunk/buspirate_spi.c ============================================================================== --- trunk/buspirate_spi.c Tue Jan 1 01:06:51 2013 (r1640) +++ trunk/buspirate_spi.c Thu Jan 3 21:44:30 2013 (r1641) @@ -201,14 +201,14 @@ int buspirate_spi_init(void) { - char *dev = NULL; - char *speed = NULL; char *tmp; + char *dev; + int i; unsigned int fw_version_major = 0; unsigned int fw_version_minor = 0; int spispeed = 0x7; int ret = 0; - int i; + int pullup = 0; dev = extract_programmer_param("dev"); if (dev && !strlen(dev)) { @@ -220,18 +220,29 @@ return 1; } - speed = extract_programmer_param("spispeed"); - if (speed) { - for (i = 0; spispeeds[i].name; i++) - if (!strncasecmp(spispeeds[i].name, speed, - strlen(spispeeds[i].name))) { + tmp = extract_programmer_param("spispeed"); + if (tmp) { + for (i = 0; spispeeds[i].name; i++) { + if (!strncasecmp(spispeeds[i].name, tmp, strlen(spispeeds[i].name))) { spispeed = spispeeds[i].speed; break; } + } if (!spispeeds[i].name) msg_perr("Invalid SPI speed, using default.\n"); } - free(speed); + free(tmp); + + tmp = extract_programmer_param("pullups"); + if (tmp) { + if (strcasecmp("on", tmp) == 0) + pullup = 1; + else if (strcasecmp("off", tmp) == 0) + ; // ignore + else + msg_perr("Invalid pullups state, not using them.\n"); + } + free(tmp); /* Default buffer size is 19: 16 bytes data, 3 bytes control. */ #define DEFAULT_BUFSIZE (16 + 3) @@ -395,12 +406,16 @@ } /* Initial setup (SPI peripherals config): Enable power, CS high, AUX */ - bp_commbuf[0] = 0x40 | 0xb; + bp_commbuf[0] = 0x40 | 0x0b; + if (pullup == 1) { + bp_commbuf[0] |= (1 << 2); + msg_pdbg("Enabling pull-up resistors.\n"); + } ret = buspirate_sendrecv(bp_commbuf, 1, 1); if (ret) return 1; if (bp_commbuf[0] != 0x01) { - msg_perr("Protocol error while setting power/CS/AUX!\n"); + msg_perr("Protocol error while setting power/CS/AUX(/Pull-up resistors)!\n"); return 1; } Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Tue Jan 1 01:06:51 2013 (r1640) +++ trunk/flashrom.8 Thu Jan 3 21:44:30 2013 (r1641) @@ -637,6 +637,20 @@ can be .BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M (in Hz). The default is the maximum frequency of 8 MHz. +.sp +An optional pullups parameter specifies the use of the Bus Pirate internal pull-up resistors. This may be +needed if you are working with a flash ROM chip that you have physically removed from the board. Syntax is +.sp +.B " flashrom -p buspirate_spi:pullups=state" +.sp +where +.B state +can be +.BR on " or " off . +More information about the Bus Pirate pull-up resistors and their purpose is available at +.nh +.BR "http://dangerousprototypes.com/docs/Practical_guide_to_Bus_Pirate_pull-up_r… " . +Only the external supply voltage (Vpu) is supported as of this writing. .SS .BR "dediprog " programmer An optional

1 0

[PATCH 7/7] Enable serprog on Windows.
by Stefan Tauner 03 Jan '13

03 Jan '13

Sockets are not ported (yet). Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- Makefile | 8 +------- serprog.c | 18 ++++++++++++------ 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/Makefile b/Makefile index b948996..0150dd1 100644 --- a/Makefile +++ b/Makefile @@ -138,12 +138,6 @@ FLASHROM_CFLAGS += -Dffs=__builtin_ffs # libusb-win32/libftdi stuff is usually installed in /usr/local. CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib -# Serprog is not supported under Windows/MinGW (missing sockets support). -ifeq ($(CONFIG_SERPROG), yes) -UNSUPPORTED_FEATURES += CONFIG_SERPROG=yes -else -override CONFIG_SERPROG = no -endif # For now we disable all PCI-based programmers on Windows/MinGW (no libpci). ifeq ($(CONFIG_INTERNAL), yes) UNSUPPORTED_FEATURES += CONFIG_INTERNAL=yes @@ -324,7 +318,7 @@ SVNDEF := -D'FLASHROM_VERSION="$(VERSION)"' # Always enable internal/onboard support for now. CONFIG_INTERNAL ?= yes -# Always enable serprog for now. Needs to be disabled on Windows. +# Always enable serprog for now. CONFIG_SERPROG ?= yes # RayeR SPIPGM hardware support diff --git a/serprog.c b/serprog.c index 9d86ff8..5842cce 100644 --- a/serprog.c +++ b/serprog.c @@ -20,21 +20,23 @@ */ #include <stdio.h> +#ifndef _WIN32 /* stuff (presumably) needed for sockets only */ #include <stdlib.h> #include <unistd.h> -#include <strings.h> -#include <string.h> -#include <ctype.h> #include <fcntl.h> #include <sys/socket.h> #include <arpa/inet.h> #include <netinet/in.h> #include <netinet/tcp.h> #include <netdb.h> -#include <sys/stat.h> -#include <errno.h> -#include <inttypes.h> +#endif +#ifdef _WIN32 +#include <conio.h> +#else #include <termios.h> +#endif +#include <string.h> +#include <errno.h> #include "flash.h" #include "programmer.h" #include "chipdrivers.h" @@ -81,6 +83,7 @@ static int sp_opbuf_usage = 0; whether the command is supported before doing it */ static int sp_check_avail_automatic = 0; +#ifndef WIN32 static int sp_opensocket(char *ip, unsigned int port) { int flag = 1; @@ -114,6 +117,7 @@ static int sp_opensocket(char *ip, unsigned int port) setsockopt(sock, IPPROTO_TCP, TCP_NODELAY, &flag, sizeof(int)); return sock; } +#endif /* Synchronize: a bit tricky algorithm that tries to (and in my tests has * * always succeeded in) bring the serial protocol to known waiting-for- * @@ -351,6 +355,7 @@ int serprog_init(void) } free(device); +#ifndef _WIN32 device = extract_programmer_param("ip"); if (have_device && device) { msg_perr("Error: Both host and device specified.\n" @@ -394,6 +399,7 @@ int serprog_init(void) "flashrom -p serprog:ip=ipaddr:port\n"); return 1; } +#endif if (register_shutdown(serprog_shutdown, NULL)) return 1; -- Kind regards, Stefan Tauner

1 0

[PATCH 6/7] serial.c: be more pedantic.
by Stefan Tauner 03 Jan '13

03 Jan '13

Check more return codes and close the file handle in case of errors in sp_openserport(). Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- serial.c | 60 ++++++++++++++++++++++++++++++++++++++++++++---------------- 1 file changed, 44 insertions(+), 16 deletions(-) diff --git a/serial.c b/serial.c index 00d79bc..a41233f 100644 --- a/serial.c +++ b/serial.c @@ -179,8 +179,8 @@ fdtype sp_openserport(char *dev, unsigned int baud) } DCB dcb; if (!GetCommState(fd, &dcb)) { - msg_perr_strerror("Could not fetch serial port configuration: "); - return SER_INV_FD; + msg_perr_strerror("Could not fetch original serial port configuration: "); + goto out_close; } const struct baudentry *entry = round_baud(baud); dcb.BaudRate = entry->baud; @@ -189,16 +189,19 @@ fdtype sp_openserport(char *dev, unsigned int baud) dcb.StopBits = ONESTOPBIT; if (!SetCommState(fd, &dcb)) { msg_perr_strerror("Could not change serial port configuration: "); - return SER_INV_FD; + goto out_close; } if (!GetCommState(fd, &dcb)) { - msg_perr_strerror("Could not fetch serial port configuration: "); - return SER_INV_FD; + msg_perr_strerror("Could not fetch new serial port configuration: "); + goto out_close; } msg_pdbg("Baud rate is %ld.\n", dcb.BaudRate); return fd; +out_close: + CloseHandle(sp_fd); + return SER_INV_FD; #else - struct termios options; + struct termios wanted, observed; int fd; fd = open(dev, O_RDWR | O_NOCTTY | O_NDELAY); if (fd < 0) { @@ -206,18 +209,43 @@ fdtype sp_openserport(char *dev, unsigned int baud) return SER_INV_FD; } fcntl(fd, F_SETFL, 0); - tcgetattr(fd, &options); + if (tcgetattr(fd, &observed) != 0) { + msg_perr_strerror("Could not fetch original serial port configuration: "); + goto out_close; + } + wanted = observed; const struct baudentry *entry = round_baud(baud); - cfsetispeed(&options, entry->flag); - cfsetospeed(&options, entry->flag); - msg_pdbg("Setting baud rate to %d.\n", entry->baud); - options.c_cflag &= ~(PARENB | CSTOPB | CSIZE | CRTSCTS); - options.c_cflag |= (CS8 | CLOCAL | CREAD); - options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); - options.c_iflag &= ~(IXON | IXOFF | IXANY | ICRNL | IGNCR | INLCR); - options.c_oflag &= ~OPOST; - tcsetattr(fd, TCSANOW, &options); + if (cfsetispeed(&wanted, entry->flag) != 0 || cfsetospeed(&wanted, entry->flag) != 0) { + msg_perr_strerror("Could not set serial baud rate: "); + goto out_close; + } + wanted.c_cflag &= ~(PARENB | CSTOPB | CSIZE | CRTSCTS); + wanted.c_cflag |= (CS8 | CLOCAL | CREAD); + wanted.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); + wanted.c_iflag &= ~(IXON | IXOFF | IXANY | ICRNL | IGNCR | INLCR); + wanted.c_oflag &= ~OPOST; + if (tcsetattr(fd, TCSANOW, &wanted) != 0) { + msg_perr_strerror("Could not change serial port configuration: "); + goto out_close; + } + if (tcgetattr(fd, &observed) != 0) { + msg_perr_strerror("Could not fetch new serial port configuration: "); + goto out_close; + } + if (observed.c_cflag != wanted.c_cflag || + observed.c_lflag != wanted.c_lflag || + observed.c_iflag != wanted.c_iflag || + observed.c_oflag != wanted.c_oflag || + cfgetispeed(&observed) != cfgetispeed(&wanted)) { + msg_perr("%s: Some requested options did not stick.\n", __func__); + goto out_close; + } + msg_pdbg("Baud rate is %d.\n", entry->baud); return fd; + +out_close: + close(sp_fd); + return SER_INV_FD; #endif } -- Kind regards, Stefan Tauner

1 0

[PATCH 5/7] Replace native calls in serprog with wrapper calls.
by Stefan Tauner 03 Jan '13

03 Jan '13

read(), write(), usleep() are replaced. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- serial.c | 2 +- serprog.c | 43 +++++++++++++++---------------------------- 2 files changed, 16 insertions(+), 29 deletions(-) diff --git a/serial.c b/serial.c index 9fa5c5d..00d79bc 100644 --- a/serial.c +++ b/serial.c @@ -348,7 +348,7 @@ int serialport_read(unsigned char *buf, unsigned int readcnt) return 1; } if (!tmp) - msg_pdbg("Empty read\n"); + msg_pdbg2("Empty read\n"); readcnt -= tmp; buf += tmp; } diff --git a/serprog.c b/serprog.c index 90670cb..9d86ff8 100644 --- a/serprog.c +++ b/serprog.c @@ -133,7 +133,7 @@ static int sp_synchronize(void) goto err_out; } /* A second should be enough to get all the answers to the buffer */ - usleep(1000 * 1000); + internal_delay(1000 * 1000); sp_flush_incoming(); /* Then try up to 8 times to send syncnop and get the correct special * @@ -206,15 +206,15 @@ static int sp_docommand(uint8_t command, uint32_t parmlen, unsigned char c; if (sp_automatic_cmdcheck(command)) return 1; - if (write(sp_fd, &command, 1) != 1) { + if (serialport_write(&command, 1) != 0) { msg_perr("Error: cannot write op code: %s\n", strerror(errno)); return 1; } - if (write(sp_fd, params, parmlen) != (parmlen)) { + if (serialport_write(params, parmlen) != 0) { msg_perr("Error: cannot write parameters: %s\n", strerror(errno)); return 1; } - if (read(sp_fd, &c, 1) != 1) { + if (serialport_read(&c, 1) != 0) { msg_perr("Error: cannot read from device: %s\n", strerror(errno)); return 1; } @@ -225,17 +225,10 @@ static int sp_docommand(uint8_t command, uint32_t parmlen, return 1; } if (retlen) { - int rd_bytes = 0; - do { - int r; - r = read(sp_fd, retparms + rd_bytes, - retlen - rd_bytes); - if (r <= 0) { - msg_perr("Error: cannot read return parameters: %s\n", strerror(errno)); - return 1; - } - rd_bytes += r; - } while (rd_bytes != retlen); + if (serialport_read(retparms, retlen) != 0) { + msg_perr("Error: cannot read return parameters: %s\n", strerror(errno)); + return 1; + } } return 0; } @@ -245,7 +238,7 @@ static void sp_flush_stream(void) if (sp_streamed_transmit_ops) do { unsigned char c; - if (read(sp_fd, &c, 1) != 1) { + if (serialport_read(&c, 1) != 0) { sp_die("Error: cannot read from device (flushing stream)"); } if (c == S_NAK) { @@ -272,7 +265,7 @@ static int sp_stream_buffer_op(uint8_t cmd, uint32_t parmlen, uint8_t * parms) memcpy(&(sp[1]), parms, parmlen); if (sp_streamed_transmit_bytes >= (1 + parmlen + sp_device_serbuf_size)) sp_flush_stream(); - if (write(sp_fd, sp, 1 + parmlen) != (1 + parmlen)) + if (serialport_write(sp, 1 + parmlen) != 0) sp_die("Error: cannot write command"); free(sp); sp_streamed_transmit_ops += 1; @@ -687,10 +680,9 @@ static void sp_pass_writen(void) header[4] = (sp_write_n_addr >> 0) & 0xFF; header[5] = (sp_write_n_addr >> 8) & 0xFF; header[6] = (sp_write_n_addr >> 16) & 0xFF; - if (write(sp_fd, header, 7) != 7) + if (serialport_write(header, 7) != 0) sp_die("Error: cannot write write-n command\n"); - if (write(sp_fd, sp_write_n_buf, sp_write_n_bytes) != - sp_write_n_bytes) + if (serialport_write(sp_write_n_buf, sp_write_n_bytes) != 0) sp_die("Error: cannot write write-n data"); sp_streamed_transmit_bytes += 7 + sp_write_n_bytes; sp_streamed_transmit_ops += 1; @@ -791,7 +783,7 @@ static uint8_t serprog_chip_readb(const struct flashctx *flash, buf[2] = ((addr >> 16) & 0xFF); sp_stream_buffer_op(S_CMD_R_BYTE, 3, buf); sp_flush_stream(); - if (read(sp_fd, &c, 1) != 1) + if (serialport_read(&c, 1) != 0) sp_die("readb byteread"); msg_pspew("%s addr=0x%lx returning 0x%02X\n", __func__, addr, c); return c; @@ -800,7 +792,6 @@ static uint8_t serprog_chip_readb(const struct flashctx *flash, /* Local version that really does the job, doesn't care of max_read_n. */ static void sp_do_read_n(uint8_t * buf, const chipaddr addr, size_t len) { - int rd_bytes = 0; unsigned char sbuf[6]; msg_pspew("%s: addr=0x%lx len=%lu\n", __func__, addr, (unsigned long)len); /* Stream the read-n -- as above. */ @@ -814,12 +805,8 @@ static void sp_do_read_n(uint8_t * buf, const chipaddr addr, size_t len) sbuf[5] = ((len >> 16) & 0xFF); sp_stream_buffer_op(S_CMD_R_NBYTES, 6, sbuf); sp_flush_stream(); - do { - int r = read(sp_fd, buf + rd_bytes, len - rd_bytes); - if (r <= 0) - sp_die("Error: cannot read read-n data"); - rd_bytes += r; - } while (rd_bytes != len); + if (serialport_read(buf, len) != 0) + sp_die("Error: cannot read read-n data"); return; } -- Kind regards, Stefan Tauner

1 0

[PATCH 4/7] Introduce serialport_write_nonblock().
by Stefan Tauner 03 Jan '13

03 Jan '13

It seems useful to have a generic and platform-independent method to read and write to a serial port without blocking. This is the write part. This allows to get rid of the explicit temporary disabling of blocking I/O in serprog's sp_synchronize(). Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- programmer.h | 1 + serial.c | 77 +++++++++++++++++++++++++++++++++++++++++++++++++++++++--- serprog.c | 19 ++++----------- 3 files changed, 80 insertions(+), 17 deletions(-) diff --git a/programmer.h b/programmer.h index b4f69c4..9286e2d 100644 --- a/programmer.h +++ b/programmer.h @@ -645,6 +645,7 @@ extern fdtype sp_fd; /* expose serialport_shutdown as it's currently used by buspirate */ int serialport_shutdown(void *data); int serialport_write(unsigned char *buf, unsigned int writecnt); +int serialport_write_nonblock(unsigned char *buf, unsigned int writecnt, unsigned int timeout, unsigned int *really_wrote); int serialport_read(unsigned char *buf, unsigned int readcnt); int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned int timeout, unsigned int *really_read); diff --git a/serial.c b/serial.c index c3154ab..9fa5c5d 100644 --- a/serial.c +++ b/serial.c @@ -390,13 +390,13 @@ int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned in int i; int rd_bytes = 0; for (i = 0; i < timeout; i++) { - msg_pspew("readcnt %d rd_bytes %d\n", readcnt, rd_bytes); #ifdef _WIN32 + msg_pspew("readcnt %d rd_bytes %d\n", readcnt, rd_bytes); ReadFile(sp_fd, c + rd_bytes, readcnt - rd_bytes, &rv, NULL); msg_pspew("read %lu bytes\n", rv); #else rv = read(sp_fd, c + rd_bytes, readcnt - rd_bytes); - msg_pspew("read %zd bytes\n", rv); + //msg_pspew("read %zd bytes\n", rv); #endif if ((rv == -1) && (errno != EAGAIN)) { msg_perr_strerror("Serial port read error: "); @@ -406,7 +406,6 @@ int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned in if (rv > 0) rd_bytes += rv; if (rd_bytes == readcnt) { - msg_perr("read successful\n"); ret = 0; break; } @@ -426,3 +425,75 @@ int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned in } return ret; } + +/* Tries up to timeout ms to write writecnt characters from the array starting at buf. Returns + * 0 on success, positive values on temporary errors (e.g. timeouts) and negative ones on permanent errors. + * If really_wrote is not NULL, this function sets its contents to the number of bytes written successfully. */ +int serialport_write_nonblock(unsigned char *buf, unsigned int writecnt, unsigned int timeout, unsigned int *really_wrote) +{ + int ret = 1; + /* disable blocked i/o and declare platform-specific variables */ +#ifdef _WIN32 + DWORD rv; + COMMTIMEOUTS oldTimeout; + COMMTIMEOUTS newTimeout = { + .ReadIntervalTimeout = MAXDWORD, + .ReadTotalTimeoutMultiplier = 0, + .ReadTotalTimeoutConstant = 0, + .WriteTotalTimeoutMultiplier = 0, + .WriteTotalTimeoutConstant = 0 + }; + if(!GetCommTimeouts(sp_fd, &oldTimeout)) { + msg_perr_strerror("Could not get serial port timeout settings: "); + return -1; + } + if(!SetCommTimeouts(sp_fd, &newTimeout)) { + msg_perr_strerror("Could not set serial port timeout settings: "); + return -1; + } +#else + ssize_t rv; + const int flags = fcntl(sp_fd, F_GETFL); + fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK); +#endif + + int i; + int wr_bytes = 0; + for (i = 0; i < timeout; i++) { + msg_pspew("writecnt %d wr_bytes %d\n", writecnt, wr_bytes); +#ifdef _WIN32 + WriteFile(sp_fd, buf + wr_bytes, writecnt - wr_bytes, &rv, NULL); + msg_pspew("wrote %lu bytes\n", rv); +#else + rv = write(sp_fd, buf + wr_bytes, writecnt - wr_bytes); + msg_pspew("wrote %zd bytes\n", rv); +#endif + if ((rv == -1) && (errno != EAGAIN)) { + msg_perr_strerror("Serial port write error: "); + ret = -1; + break; + } + if (rv > 0) { + wr_bytes += rv; + if (wr_bytes == writecnt) { + msg_pspew("write successful\n"); + ret = 0; + break; + } + } + internal_delay(1000); /* 1ms units */ + } + if (really_wrote != NULL) + *really_wrote = wr_bytes; + + /* restore original blocking behavior */ +#ifdef _WIN32 + if (!SetCommTimeouts(sp_fd, &oldTimeout)) { + msg_perr_strerror("Could not restore serial port timeout settings: "); +#else + if (fcntl(sp_fd, F_SETFL, flags) != 0) { +#endif + return -1; + } + return ret; +} diff --git a/serprog.c b/serprog.c index 4a2db28..90670cb 100644 --- a/serprog.c +++ b/serprog.c @@ -117,23 +117,19 @@ static int sp_opensocket(char *ip, unsigned int port) /* Synchronize: a bit tricky algorithm that tries to (and in my tests has * * always succeeded in) bring the serial protocol to known waiting-for- * - * command state - uses nonblocking read - rest of the driver uses * + * command state - uses nonblocking I/O - rest of the driver uses * * blocking read - TODO: add an alarm() timer for the rest of the app on * * serial operations, though not such a big issue as the first thing to * * do is synchronize (eg. check that device is alive). */ static int sp_synchronize(void) { int i; - int flags = fcntl(sp_fd, F_GETFL); unsigned char buf[8]; - flags |= O_NONBLOCK; - fcntl(sp_fd, F_SETFL, flags); /* First sends 8 NOPs, then flushes the return data - should cause * * the device serial parser to get to a sane state, unless if it * * is waiting for a real long write-n. */ memset(buf, S_CMD_NOP, 8); - if (write(sp_fd, buf, 8) != 8) { - msg_perr("flush write: %s\n", strerror(errno)); + if (serialport_write_nonblock(buf, 8, 1, NULL) != 0) { goto err_out; } /* A second should be enough to get all the answers to the buffer */ @@ -147,8 +143,7 @@ static int sp_synchronize(void) for (i = 0; i < 8; i++) { int n; unsigned char c = S_CMD_SYNCNOP; - if (write(sp_fd, &c, 1) != 1) { - msg_perr("sync write: %s\n", strerror(errno)); + if (serialport_write_nonblock(&c, 1, 1, NULL) != 0) { goto err_out; } msg_pdbg("."); @@ -165,9 +160,8 @@ static int sp_synchronize(void) if (ret > 0 || c != S_ACK) continue; c = S_CMD_SYNCNOP; - if (write(sp_fd, &c, 1) != 1) { - msg_perr("sync write: %s\n", strerror(errno)); - return 1; + if (serialport_write_nonblock(&c, 1, 1, NULL) != 0) { + goto err_out; } ret = serialport_read_nonblock(&c, 1, 500, NULL); if (ret < 0) @@ -179,9 +173,6 @@ static int sp_synchronize(void) goto err_out; if (c != S_ACK) break; /* fail */ - /* Ok, synchronized; back to blocking reads and return. */ - flags &= ~O_NONBLOCK; - fcntl(sp_fd, F_SETFL, flags); msg_pdbg("\n"); return 0; } -- Kind regards, Stefan Tauner

1 0

[PATCH 3/7] Replace sp_sync_read_timeout() with serialport_read_nonblock().
by Stefan Tauner 03 Jan '13

03 Jan '13

It seems useful to have a generic and platform-independent method to read and write to a serial port without blocking. This is the read part. It stores the current blocking properties before disabling blocking and restores them after reading. The timeout is implemented as previously by retrying every millisecond until the timeout is reached or enough characters are available. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- programmer.h | 1 + serial.c | 71 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ serprog.c | 28 ++++------------------- 3 files changed, 76 insertions(+), 24 deletions(-) diff --git a/programmer.h b/programmer.h index 8de42bc..b4f69c4 100644 --- a/programmer.h +++ b/programmer.h @@ -646,6 +646,7 @@ extern fdtype sp_fd; int serialport_shutdown(void *data); int serialport_write(unsigned char *buf, unsigned int writecnt); int serialport_read(unsigned char *buf, unsigned int readcnt); +int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned int timeout, unsigned int *really_read); /* Serial port/pin mapping: diff --git a/serial.c b/serial.c index dd3471d..c3154ab 100644 --- a/serial.c +++ b/serial.c @@ -355,3 +355,74 @@ int serialport_read(unsigned char *buf, unsigned int readcnt) return 0; } + +/* Tries up to timeout ms to read readcnt characters and places them into the array starting at c. Returns + * 0 on success, positive values on temporary errors (e.g. timeouts) and negative ones on permanent errors. + * If really_read is not NULL, this function sets its contents to the number of bytes read successfully. */ +int serialport_read_nonblock(unsigned char *c, unsigned int readcnt, unsigned int timeout, unsigned int *really_read) +{ + int ret = 1; + /* disable blocked i/o and declare platform-specific variables */ +#ifdef _WIN32 + DWORD rv; + COMMTIMEOUTS oldTimeout; + COMMTIMEOUTS newTimeout = { + .ReadIntervalTimeout = MAXDWORD, + .ReadTotalTimeoutMultiplier = 0, + .ReadTotalTimeoutConstant = 0, + .WriteTotalTimeoutMultiplier = 0, + .WriteTotalTimeoutConstant = 0 + }; + if(!GetCommTimeouts(sp_fd, &oldTimeout)) { + msg_perr_strerror("Could not get serial port timeout settings: "); + return -1; + } + if(!SetCommTimeouts(sp_fd, &newTimeout)) { +#else + ssize_t rv; + const int flags = fcntl(sp_fd, F_GETFL); + if (fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK) != 0) { +#endif + msg_perr_strerror("Could not set serial port timeout settings %s"); + return -1; + } + + int i; + int rd_bytes = 0; + for (i = 0; i < timeout; i++) { + msg_pspew("readcnt %d rd_bytes %d\n", readcnt, rd_bytes); +#ifdef _WIN32 + ReadFile(sp_fd, c + rd_bytes, readcnt - rd_bytes, &rv, NULL); + msg_pspew("read %lu bytes\n", rv); +#else + rv = read(sp_fd, c + rd_bytes, readcnt - rd_bytes); + msg_pspew("read %zd bytes\n", rv); +#endif + if ((rv == -1) && (errno != EAGAIN)) { + msg_perr_strerror("Serial port read error: "); + ret = -1; + break; + } + if (rv > 0) + rd_bytes += rv; + if (rd_bytes == readcnt) { + msg_perr("read successful\n"); + ret = 0; + break; + } + internal_delay(1000); /* 1ms units */ + } + if (really_read != NULL) + *really_read = rd_bytes; + + /* restore original blocking behavior */ +#ifdef _WIN32 + if (!SetCommTimeouts(sp_fd, &oldTimeout)) { +#else + if (fcntl(sp_fd, F_SETFL, flags) != 0) { +#endif + msg_perr_strerror("Could not restore serial port timeout settings: %s\n"); + ret = -1; + } + return ret; +} diff --git a/serprog.c b/serprog.c index e5ac62b..4a2db28 100644 --- a/serprog.c +++ b/serprog.c @@ -115,26 +115,6 @@ static int sp_opensocket(char *ip, unsigned int port) return sock; } -/* Returns 0 on success and places the character read into the location pointed to by c. - * Returns positive values on temporary errors and negative ones on permanent errors. - * An iteration of one loop takes up to 1ms. */ -static int sp_sync_read_timeout(unsigned int loops, unsigned char *c) -{ - int i; - for (i = 0; i < loops; i++) { - ssize_t rv; - rv = read(sp_fd, c, 1); - if (rv == 1) - return 0; - if ((rv == -1) && (errno != EAGAIN)) { - msg_perr("read: %s\n", strerror(errno)); - return -1; - } - usleep(1000); /* 1ms units */ - } - return 1; -} - /* Synchronize: a bit tricky algorithm that tries to (and in my tests has * * always succeeded in) bring the serial protocol to known waiting-for- * * command state - uses nonblocking read - rest of the driver uses * @@ -174,12 +154,12 @@ static int sp_synchronize(void) msg_pdbg("."); fflush(stdout); for (n = 0; n < 10; n++) { - int ret = sp_sync_read_timeout(50, &c); + int ret = serialport_read_nonblock(&c, 1, 50, NULL); if (ret < 0) goto err_out; if (ret > 0 || c != S_NAK) continue; - ret = sp_sync_read_timeout(20, &c); + ret = serialport_read_nonblock(&c, 1, 20, NULL); if (ret < 0) goto err_out; if (ret > 0 || c != S_ACK) @@ -189,12 +169,12 @@ static int sp_synchronize(void) msg_perr("sync write: %s\n", strerror(errno)); return 1; } - ret = sp_sync_read_timeout(500, &c); + ret = serialport_read_nonblock(&c, 1, 500, NULL); if (ret < 0) goto err_out; if (ret > 0 || c != S_NAK) break; /* fail */ - ret = sp_sync_read_timeout(100, &c); + ret = serialport_read_nonblock(&c, 1, 100, NULL); if (ret > 0 || ret < 0) goto err_out; if (c != S_ACK) -- Kind regards, Stefan Tauner

1 0

[PATCH 2/7] serial.c: round baudrates to valid ones.
by Stefan Tauner 03 Jan '13

03 Jan '13

MSDN says: "The baud rate at which the communications device operates. This member can be an actual baud rate value, or one of the following indexes." But it is not specified what happens for different values, so we round down to valid ones (or to the minimum of 9600) by reusing the existing struct baudentry sp_baudtable[] and the new function round_baud(). Do similarly on non-Windows where arbitrary values are not allowed anyway. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- serial.c | 97 ++++++++++++++++++++++++++++++++++++-------------------------- 1 file changed, 57 insertions(+), 40 deletions(-) diff --git a/serial.c b/serial.c index 18562be..dd3471d 100644 --- a/serial.c +++ b/serial.c @@ -47,62 +47,89 @@ void __attribute__((noreturn)) sp_die(char *msg) exit(1); } -#ifndef _WIN32 +#ifdef _WIN32 +struct baudentry { + DWORD flag; + unsigned int baud; +}; +#define BAUDENTRY(baud) { CBR_##baud, baud }, +#else struct baudentry { int flag; unsigned int baud; }; - -/* I'd like if the C preprocessor could have directives in macros */ #define BAUDENTRY(baud) { B##baud, baud }, +#endif + +/* I'd like if the C preprocessor could have directives in macros. + * See TERMIOS(3) and http://msdn.microsoft.com/en-us/library/windows/desktop/aa363214(v=vs.85).a… and + * http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=inclu… */ static const struct baudentry sp_baudtable[] = { - BAUDENTRY(9600) + BAUDENTRY(9600) /* unconditional default */ +#if defined(B19200) || defined(CBR_19200) BAUDENTRY(19200) +#endif +#if defined(B38400) || defined(CBR_38400) BAUDENTRY(38400) +#endif +#if defined(B57600) || defined(CBR_57600) BAUDENTRY(57600) +#endif +#if defined(B115200) || defined(CBR_115200) BAUDENTRY(115200) -#ifdef B230400 +#endif +#if defined(B230400) || defined(CBR_230400) BAUDENTRY(230400) #endif -#ifdef B460800 +#if defined(B460800) || defined(CBR_460800) BAUDENTRY(460800) #endif -#ifdef B500000 +#if defined(B500000) || defined(CBR_500000) BAUDENTRY(500000) #endif -#ifdef B576000 +#if defined(B576000) || defined(CBR_576000) BAUDENTRY(576000) #endif -#ifdef B921600 +#if defined(B921600) || defined(CBR_921600) BAUDENTRY(921600) #endif -#ifdef B1000000 +#if defined(B1000000) || defined(CBR_1000000) BAUDENTRY(1000000) #endif -#ifdef B1152000 +#if defined(B1152000) || defined(CBR_1152000) BAUDENTRY(1152000) #endif -#ifdef B1500000 +#if defined(B1500000) || defined(CBR_1500000) BAUDENTRY(1500000) #endif -#ifdef B2000000 +#if defined(B2000000) || defined(CBR_2000000) BAUDENTRY(2000000) #endif -#ifdef B2500000 +#if defined(B2500000) || defined(CBR_2500000) BAUDENTRY(2500000) #endif -#ifdef B3000000 +#if defined(B3000000) || defined(CBR_3000000) BAUDENTRY(3000000) #endif -#ifdef B3500000 +#if defined(B3500000) || defined(CBR_3500000) BAUDENTRY(3500000) #endif -#ifdef B4000000 +#if defined(B4000000) || defined(CBR_4000000) BAUDENTRY(4000000) #endif {0, 0} /* Terminator */ }; -#endif + +const struct baudentry *round_baud(unsigned int baud) +{ + int i; + /* Round baud rate to next lower entry in sp_baudtable if it exists, else use the lowest entry. */ + for (i = ARRAY_SIZE(sp_baudtable) - 2; i >= 0 ; i--) { + if (sp_baudtable[i].baud <= baud) + return &sp_baudtable[i]; + } + return &sp_baudtable[0]; +} /* Uses msg_perr to print the last system error. * Prints "Error: " followed first by \c msg and then by the description of the last error retrieved via @@ -155,15 +182,8 @@ fdtype sp_openserport(char *dev, unsigned int baud) msg_perr_strerror("Could not fetch serial port configuration: "); return SER_INV_FD; } - switch (baud) { - case 9600: dcb.BaudRate = CBR_9600; break; - case 19200: dcb.BaudRate = CBR_19200; break; - case 38400: dcb.BaudRate = CBR_38400; break; - case 57600: dcb.BaudRate = CBR_57600; break; - case 115200: dcb.BaudRate = CBR_115200; break; - default: msg_perr("Error: Could not set baud rate: %s\n", strerror(errno)); - return SER_INV_FD; - } + const struct baudentry *entry = round_baud(baud); + dcb.BaudRate = entry->baud; dcb.ByteSize = 8; dcb.Parity = NOPARITY; dcb.StopBits = ONESTOPBIT; @@ -171,10 +191,15 @@ fdtype sp_openserport(char *dev, unsigned int baud) msg_perr_strerror("Could not change serial port configuration: "); return SER_INV_FD; } + if (!GetCommState(fd, &dcb)) { + msg_perr_strerror("Could not fetch serial port configuration: "); + return SER_INV_FD; + } + msg_pdbg("Baud rate is %ld.\n", dcb.BaudRate); return fd; #else struct termios options; - int fd, i; + int fd; fd = open(dev, O_RDWR | O_NOCTTY | O_NDELAY); if (fd < 0) { msg_perr_strerror("Cannot open serial port: "); @@ -182,18 +207,10 @@ fdtype sp_openserport(char *dev, unsigned int baud) } fcntl(fd, F_SETFL, 0); tcgetattr(fd, &options); - for (i = 0;; i++) { - if (sp_baudtable[i].baud == 0) { - close(fd); - msg_perr("Error: cannot configure for baudrate %d\n", baud); - return SER_INV_FD; - } - if (sp_baudtable[i].baud == baud) { - cfsetispeed(&options, sp_baudtable[i].flag); - cfsetospeed(&options, sp_baudtable[i].flag); - break; - } - } + const struct baudentry *entry = round_baud(baud); + cfsetispeed(&options, entry->flag); + cfsetospeed(&options, entry->flag); + msg_pdbg("Setting baud rate to %d.\n", entry->baud); options.c_cflag &= ~(PARENB | CSTOPB | CSIZE | CRTSCTS); options.c_cflag |= (CS8 | CLOCAL | CREAD); options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); -- Kind regards, Stefan Tauner

1 0

[PATCH 1/7] serial.c: abstract system error printing.
by Stefan Tauner 03 Jan '13

03 Jan '13

Windows is awkward. The win32 API does not support errno/strerror as one might expect. Introduce a new msg_* function that alleviates the pain a bit (my head still hurts very badly). Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- serial.c | 34 ++++++++++++++++++++++++++++------ 1 file changed, 28 insertions(+), 6 deletions(-) diff --git a/serial.c b/serial.c index 9446ce3..18562be 100644 --- a/serial.c +++ b/serial.c @@ -104,17 +104,39 @@ static const struct baudentry sp_baudtable[] = { }; #endif +/* Uses msg_perr to print the last system error. + * Prints "Error: " followed first by \c msg and then by the description of the last error retrieved via + * strerror() or FormatMessage() and ending with a linebreak. */ +static void msg_perr_strerror(const char *msg) +{ + msg_perr("Error: %s", msg); +#ifdef _WIN32 + char *lpMsgBuf; + DWORD nErr = GetLastError(); + FormatMessage(FORMAT_MESSAGE_ALLOCATE_BUFFER | FORMAT_MESSAGE_FROM_SYSTEM, NULL, nErr, + MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT), (LPTSTR) &lpMsgBuf, 0, NULL); + msg_perr(lpMsgBuf); + /* At least some formatted messages contain a line break at the end. Make sure to always print one */ + if (lpMsgBuf[strlen(lpMsgBuf)-1] != '\n') + msg_perr("\n"); + LocalFree(lpMsgBuf); +#else + msg_perr("%s\n", strerror(errno)); +#endif +} + fdtype sp_openserport(char *dev, unsigned int baud) { #ifdef _WIN32 HANDLE fd; char *dev2 = dev; - if ((strlen(dev) > 3) && (tolower((unsigned char)dev[0]) == 'c') && + if ((strlen(dev) > 3) && + (tolower((unsigned char)dev[0]) == 'c') && (tolower((unsigned char)dev[1]) == 'o') && (tolower((unsigned char)dev[2]) == 'm')) { dev2 = malloc(strlen(dev) + 5); if (!dev2) { - msg_perr("Error: Out of memory: %s\n", strerror(errno)); + msg_perr_strerror("Out of memory: "); return SER_INV_FD; } strcpy(dev2, "\\\\.\\"); @@ -125,12 +147,12 @@ fdtype sp_openserport(char *dev, unsigned int baud) if (dev2 != dev) free(dev2); if (fd == INVALID_HANDLE_VALUE) { - msg_perr("Error: cannot open serial port: %s\n", strerror(errno)); + msg_perr_strerror("Cannot open serial port: "); return SER_INV_FD; } DCB dcb; if (!GetCommState(fd, &dcb)) { - msg_perr("Error: Could not fetch serial port configuration: %s\n", strerror(errno)); + msg_perr_strerror("Could not fetch serial port configuration: "); return SER_INV_FD; } switch (baud) { @@ -146,7 +168,7 @@ fdtype sp_openserport(char *dev, unsigned int baud) dcb.Parity = NOPARITY; dcb.StopBits = ONESTOPBIT; if (!SetCommState(fd, &dcb)) { - msg_perr("Error: Could not change serial port configuration: %s\n", strerror(errno)); + msg_perr_strerror("Could not change serial port configuration: "); return SER_INV_FD; } return fd; @@ -155,7 +177,7 @@ fdtype sp_openserport(char *dev, unsigned int baud) int fd, i; fd = open(dev, O_RDWR | O_NOCTTY | O_NDELAY); if (fd < 0) { - msg_perr("Error: cannot open serial port: %s\n", strerror(errno)); + msg_perr_strerror("Cannot open serial port: "); return SER_INV_FD; } fcntl(fd, F_SETFL, 0); -- Kind regards, Stefan Tauner

1 0

[PATCH 0/7] Port serprog to Windows 2.0
by Stefan Tauner 03 Jan '13

03 Jan '13

Developing cross-platform is great! If you look at 1/7 and have to puke, please don't blame me. I got the win32 calls right eventually and tested this with wine and my serprog flasher (which uses serial over USB). I repeat: I used serial over USB inside wine to talk serprog. haha. Tests with programmers using serial.c (e.g. buspirate) on all platforms warmly welcomed. Stefan Tauner (7): serial.c: abstract system error printing. serial.c: round baudrates to valid ones. Replace sp_sync_read_timeout() with serialport_read_nonblock(). Introduce serialport_write_nonblock(). Replace native calls in serprog with wrapper calls. serial.c: be more pedantic. Enable serprog on Windows. Makefile | 8 +- programmer.h | 2 + serial.c | 319 ++++++++++++++++++++++++++++++++++++++++++++++++---------- serprog.c | 108 +++++++------------- 4 files changed, 303 insertions(+), 134 deletions(-) -- Kind regards, Stefan Tauner

1 0

MX25L1605DM2I-12G with Buspirate
by Daniel . 03 Jan '13

03 Jan '13

thanks for your help. your solution seems to be fine but I guess the failed update has corrupted the first 0.5MB on the flash device :( It seems I would need a full dump of a working machine to compare the data of the first 0.5MB right? Do I have any chance to get this solved without a full dump? I hope someone can help me. 2012/12/6 Andrew Goodbody <ajg4tadpole(a)gmail.com> > On 01/12/12 21:11, Daniel . wrote: > >> So at last I just need to know now how I can merge the needed >> decompressed files back into a flashable ROM file. >> > > No, this is the wrong way. You do not need to decompress the .wph file. > The .wph file in this case is 1.5MB long with some extra data and code > stuck on the end. So the first thing to do is to cut the excess after 1.5MB > off the end of that file. This 1.5MB is the top 1.5MB of the 2MB flash > image**. Read the first 0.5MB from the flash device* and prefix it to the > 1.5MB image to create the 2MB image. You can then program that 2MB image to > the flash device. > > Andrew > > * If the failed update has corrupted this first 0.5MB on the flash device > then you have big trouble. > > ** If you want to confirm that, disassemble the last 16 bytes of the 1.5MB > image, there should be a real mode far jump. >

1 0

[PATCH] Automatic programmer driver writer
by Carl-Daniel Hailfinger 03 Jan '13

03 Jan '13

Run ./build_new_driver.sh and recompile. You have a new driver, and it's linked in at the appropriate places. Patch needs work for anything which is not a bitbang SPI driver. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-programmer_template/build_new_driver.sh =================================================================== --- flashrom-programmer_template/build_new_driver.sh (Revision 0) +++ flashrom-programmer_template/build_new_driver.sh (Revision 0) @@ -0,0 +1,232 @@ +#!/bin/bash +# flashrom programmer driver skeleton builder. +# Copyright 2012 Carl-Daniel Hailfinger +# Licensed under the GNU GPL v2 + +# Fill in all info in the block below, and don't touch anything else. +PROGRAMMERNAME=ezo +PROGRAMMERDESCR="EZo+Willem Programmer" +PROGRAMMERMANUF="EZo and Willem" +PROGRAMMERURL="http://www.$PROGRAMMERNAMEflash.com/" +AUTHORNAME="Carl-Daniel Hailfinger" +# Does the programmer need a map/unmap function? +HAVE_MAP=no +# Does the programmer have its own delay function? +HAVE_DELAY=no +# Does the programmer need some sort of direct hardware access? +NEED_PCI=yes +# Does the programmer need some sort of serial port access? +NEED_SERIAL=no +# Does the programmer use Parallel/LPC/FWH functionality? +NEED_PARLPCFWH=no +# Does the programmer use the bitbanging SPI infrastructure? +NEED_BITBANG_SPI=yes + +# No user serviceable parts below. +if test $HAVE_MAP = yes; then MAPNAME=$PROGRAMMERNAME; else MAPNAME=fallback; fi +if test $HAVE_DELAY = yes; then DELAYNAME=$PROGRAMMERNAME; else DELAYNAME=internal; fi +PROGRAMMERNAMECAPS=$(echo -n $PROGRAMMERNAME|tr "[[:lower:]]" "[[:upper:]]") +CONFIGNAME=CONFIG_$PROGRAMMERNAMECAPS +ENUMNAME=PROGRAMMER_$PROGRAMMERNAMECAPS +BITBANG_SPI_ENUMNAME=BITBANG_SPI_MASTER_$PROGRAMMERNAMECAPS +if test $NEED_PCI = yes; then NEEDS="NEED_PCI := yes\n"; fi +if test $NEED_SERIAL = yes; then NEEDS+="NEED_SERIAL := yes\n"; fi + +sed "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_ARRAY-\ +#if $CONFIGNAME == 1\n\ + {\n\ + .name = \"${PROGRAMMERNAME}\",\n\ + .init = ${PROGRAMMERNAME}_init,\n\ + .map_flash_region = ${MAPNAME}_map,\n\ + .unmap_flash_region = ${MAPNAME}_unmap,\n\ + .delay = ${DELAYNAME}_delay,\n\ + },\n\ +#endif\n\ +\n\0-" flashrom.c >flashrom.c.mine + +sed -e "s/^#PLACEHOLDER_NEWPROG_DEFAULTCONFIG/\ +# Enable $PROGRAMMERDESCR for now.\n\ +$CONFIGNAME ?= yes\n\ +\n\0/" \ +-e "s/^#PLACEHOLDER_NEWPROG_COMPILERULE/\ +ifeq (\$($CONFIGNAME), yes)\n\ +FEATURE_CFLAGS += -D'$CONFIGNAME=1'\n\ +PROGRAMMER_OBJS += $PROGRAMMERNAME.o\n\ +${NEEDS}\ +endif\n\ +\n\0/" Makefile >Makefile.mine1 + +if test $NEED_BITBANG_SPI = yes; then +sed -e "s/^#PLACEHOLDER_NEWPROG_BITBANGSPICONFIG1/\ +ifeq (\$($CONFIGNAME), yes)\n\ +override CONFIG_BITBANG_SPI = yes\n\ +else\n\ +\0/" \ +-e "s/^#PLACEHOLDER_NEWPROG_BITBANGSPICONFIG2/\ +\0\n\ +endif/;" Makefile.mine1 >Makefile.mine +rm Makefile.mine1 +else +mv Makefile.mine1 Makefile.mine +fi + +sed -e "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_ENUM-\ +#if $CONFIGNAME == 1\n\ + $ENUMNAME,\n\ +#endif\n\ +\0-" \ +-e "s-//PLACEHOLDER_NEWPROG_PUBLICFUNCTIONS-\ +/* $PROGRAMMERNAME.c */\n\ +#if $CONFIGNAME == 1\n\ +int ${PROGRAMMERNAME}_init(void);\n\ +#endif\n\ +\n\0-" programmer.h >programmer.h.mine1 + +if test $NEED_BITBANG_SPI = yes; then +sed -e "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_BITBANG_ENUM-\ +#if $CONFIGNAME == 1\n\ + $BITBANG_SPI_ENUMNAME,\n\ +#endif\n\ +\0-" \ +-e "s-//PLACEHOLDER_NEWPROG_SELECT_SPI_BITBANG\$-\ +|| $CONFIGNAME == 1 \0-" programmer.h.mine1 >programmer.h.mine +rm programmer.h.mine1 +else +mv programmer.h.mine1 programmer.h.mine +fi + +sed -e "s-PLACEHOLDER_NEWPROG_CHECK_PROGRAMMERCOUNT-\ +$CONFIGNAME+\0-" \ +-e "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_ENUMDEFAULT-\ +#if $CONFIGNAME == 1\n\ + $ENUMNAME\n\ +#endif\n\ +\0-" cli_classic.c >cli_classic.c.mine + +cat >$PROGRAMMERNAME.c <<EOF +/* + * This file is part of the flashrom project. + * + * Copyright (C) $(date +%Y) $AUTHORNAME + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Driver for the $PROGRAMMERDESCR hardware by $PROGRAMMERMANUF. + * See $PROGRAMMERURL for more info. + */ + +#include "flash.h" +#include "programmer.h" + +EOF + +if test $NEED_PARLPCFWH = yes; then +cat >>$PROGRAMMERNAME.c <<EOF +static const struct par_programmer par_programmer_${PROGRAMMERNAME} = { + .chip_readb = ${PROGRAMMERNAME}_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = ${PROGRAMMERNAME}_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +EOF +fi + +if test $NEED_BITBANG_SPI = yes; then +cat >>$PROGRAMMERNAME.c <<EOF +static void ${PROGRAMMERNAME}_bitbang_set_cs(int val) +{ + /* Set/clear the CS# line. */ +} + +static void ${PROGRAMMERNAME}_bitbang_set_sck(int val) +{ + /* Set/clear the SCLK line. */ +} + +static void ${PROGRAMMERNAME}_bitbang_set_mosi(int val) +{ + /* Set/clear the MOSI line. */ +} + +static int ${PROGRAMMERNAME}_bitbang_get_miso(void) +{ + /* Get the state of the MISO line and return it. */ + /* Set it to 1 to get the template to compile. */ + int misoval = 0; + + return misoval; +} + +static void ${PROGRAMMERNAME}_request_spibus(void) +{ +} + +static void ${PROGRAMMERNAME}_release_spibus(void) +{ +} + +static const struct bitbang_spi_master bitbang_spi_master_$PROGRAMMERNAME = { + .type = $BITBANG_SPI_ENUMNAME, + .set_cs = ${PROGRAMMERNAME}_bitbang_set_cs, + .set_sck = ${PROGRAMMERNAME}_bitbang_set_sck, + .set_mosi = ${PROGRAMMERNAME}_bitbang_set_mosi, + .get_miso = ${PROGRAMMERNAME}_bitbang_get_miso, + .request_bus = ${PROGRAMMERNAME}_request_spibus, + .release_bus = ${PROGRAMMERNAME}_release_spibus, + .half_period = 1, +}; + +EOF +fi + +cat >>$PROGRAMMERNAME.c <<EOF +static int ${PROGRAMMERNAME}_shutdown(void *data) +{ + /* Shutdown stuff. */ + return 0; +} + +int ${PROGRAMMERNAME}_init(void) +{ + /* Init stuff (i.e. parameter parsing) here which does not need to be + * undone. + */ + + /* If your shutdown function takes a parameter, replace NULL with it. */ + register_shutdown(${PROGRAMMERNAME}_shutdown, NULL); + + /* Init stuff which needs to be undone on shutdown. */ + +EOF + +if test $NEED_BITBANG_SPI = yes; then +cat >>$PROGRAMMERNAME.c <<EOF + /* 1 usec halfperiod delay, change as needed. */ + if (bitbang_spi_init(&bitbang_spi_master_${PROGRAMMERNAME})) + return 1; + +EOF +fi + +cat >>$PROGRAMMERNAME.c <<EOF + return 0; +} +EOF + EigenschaftsÃ¤nderungen: flashrom-programmer_template/build_new_driver.sh ___________________________________________________________________ HinzugefÃ¼gt: svn:executable + * Index: flashrom-programmer_template/Makefile =================================================================== --- flashrom-programmer_template/Makefile (Revision 1539) +++ flashrom-programmer_template/Makefile (Arbeitskopie) @@ -344,6 +344,8 @@ # Enable Linux spidev interface by default. We disable it on non-Linux targets. CONFIG_LINUX_SPI ?= yes +#PLACEHOLDER_NEWPROG_DEFAULTCONFIG + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -363,7 +365,9 @@ ifeq ($(CONFIG_OGP_SPI), yes) override CONFIG_BITBANG_SPI = yes else +#PLACEHOLDER_NEWPROG_BITBANGSPICONFIG1 CONFIG_BITBANG_SPI ?= no +#PLACEHOLDER_NEWPROG_BITBANGSPICONFIG2 endif endif endif @@ -503,6 +507,8 @@ PROGRAMMER_OBJS += linux_spi.o endif +#PLACEHOLDER_NEWPROG_COMPILERULE + ifeq ($(NEED_SERIAL), yes) LIB_OBJS += serial.o endif Index: flashrom-programmer_template/cli_classic.c =================================================================== --- flashrom-programmer_template/cli_classic.c (Revision 1539) +++ flashrom-programmer_template/cli_classic.c (Arbeitskopie) @@ -41,7 +41,7 @@ * if more than one of them is selected. If only one is selected, it is clear * that the user wants that one to become the default. */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV > 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV+PLACEHOLDER_NEWPROG_CHECK_PROGRAMMERCOUNT > 1 #error Please enable either CONFIG_DUMMY or CONFIG_INTERNAL or disable support for all programmers except one. #endif static enum programmer default_programmer = @@ -96,6 +96,7 @@ #if CONFIG_LINUX_SPI == 1 PROGRAMMER_LINUX_SPI #endif +//PLACEHOLDER_NEWPROG_PROGRAMMER_ENUMDEFAULT ; #endif Index: flashrom-programmer_template/flashrom.c =================================================================== --- flashrom-programmer_template/flashrom.c (Revision 1539) +++ flashrom-programmer_template/flashrom.c (Arbeitskopie) @@ -261,6 +261,7 @@ }, #endif +//PLACEHOLDER_NEWPROG_PROGRAMMER_ARRAY {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; Index: flashrom-programmer_template/programmer.h =================================================================== --- flashrom-programmer_template/programmer.h (Revision 1539) +++ flashrom-programmer_template/programmer.h (Arbeitskopie) @@ -87,6 +87,7 @@ #if CONFIG_LINUX_SPI == 1 PROGRAMMER_LINUX_SPI, #endif +//PLACEHOLDER_NEWPROG_PROGRAMMER_ENUM PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -127,6 +128,7 @@ #if CONFIG_OGP_SPI == 1 BITBANG_SPI_MASTER_OGP, #endif +//PLACEHOLDER_NEWPROG_PROGRAMMER_BITBANG_ENUM }; struct bitbang_spi_master { @@ -461,6 +463,8 @@ int dediprog_init(void); #endif +//PLACEHOLDER_NEWPROG_PUBLICFUNCTIONS + /* flashrom.c */ struct decode_sizes { uint32_t parallel; @@ -505,7 +509,7 @@ #if CONFIG_DEDIPROG == 1 SPI_CONTROLLER_DEDIPROG, #endif -#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__))) +#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__))) //PLACEHOLDER_NEWPROG_SELECT_SPI_BITBANG SPI_CONTROLLER_BITBANG, #endif #if CONFIG_LINUX_SPI == 1 -- http://www.hailfinger.org/

2 6

Re: [flashrom] [PATCH 1/5] Let pcidev clean itself up.
by Carl-Daniel Hailfinger 02 Jan '13

02 Jan '13

Am 01.01.2013 18:29 schrieb Stefan Tauner: > We got a nice shutdown function registration infrastructure, but did not use it > very wisely. Instead we added shutdown functions to a myriad of programmers > unnecessarily. In this patch we get rid of those that do only call pci_cleanup(pacc) > by adding a shutdown function the pcidev.c itself that gets registered by > pcidev_init(). > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Thanks for your patch, I really like it. A few comments: > diff --git a/nicrealtek.c b/nicrealtek.c > index 3c3b261..0929e5d 100644 > --- a/nicrealtek.c > +++ b/nicrealtek.c > @@ -51,22 +51,25 @@ static const struct par_programmer par_programmer_nicrealtek = { > .chip_writen = fallback_chip_writen, > }; > > +#if 0 > static int nicrealtek_shutdown(void *data) > { > /* FIXME: We forgot to disable software access again. */ > - pci_cleanup(pacc); > return 0; > } > +#endif > > int nicrealtek_init(void) > { > if (rget_io_perms()) > return 1; > > + /* No need to check for errors, pcidev_init() will not return in case of errors. */ > io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek); > - > +#if 0 > if (register_shutdown(nicrealtek_shutdown, NULL)) > return 1; > +#endif > > /* Beware, this ignores the vendor ID! */ > switch (pcidev_dev->device_id) { Please remove the #if 0 in the hunks above. It's not performance critical. > diff --git a/pcidev.c b/pcidev.c > index 1a26e99..37bcc22 100644 > --- a/pcidev.c > +++ b/pcidev.c > @@ -154,6 +154,14 @@ uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) > return (uintptr_t)addr; > } > > +static int pcidev_shutdown(void *data) Hm yes... I don't like the name that much, but I don't see a better alternative, so disregard this comment. > +{ > + if (pacc != NULL) > + pci_cleanup(pacc); undo_pci_write() spits out an error message for pacc==NULL, but here you don't... that is inconsistent. If anything, it's really an error here. Or am I missing something. > + pcidev_dev = NULL; > + return 0; > +} > + > uintptr_t pcidev_init(int bar, const struct dev_entry *devs) > { > struct pci_dev *dev; > @@ -166,6 +174,8 @@ uintptr_t pcidev_init(int bar, const struct dev_entry *devs) > > pacc = pci_alloc(); /* Get the pci_access structure */ > pci_init(pacc); /* Initialize the PCI library */ > + if (register_shutdown(pcidev_shutdown, NULL)) Hm. My local tree has register_shutdown(pci_cleanup_wrapper, pacc); instead. I think your variant is better because it doesn't keep a possibly deleted pointer around. Then again, deleting pacc should never ever happen outside pcidev_shutdown. > + return 1; > pci_scan_bus(pacc); /* We want to get the list of devices */ > pci_filter_init(pacc, &filter); > > @@ -244,6 +254,11 @@ struct undo_pci_write_data { > int undo_pci_write(void *p) > { > struct undo_pci_write_data *data = p; > + if (pacc == NULL) { > + msg_perr("%s: Tried to undo PCI writes without a valid PCI context!\n" > + "Please report a bug at flashrom(a)flashrom.org\n", __func__); > + return 1; > + } Debatable, but OK. See my comment about the pacc check in pcidev_shutdown. > msg_pdbg("Restoring PCI config space for %02x:%02x:%01x reg 0x%02x\n", > data->dev.bus, data->dev.dev, data->dev.func, data->reg); > switch (data->type) { Everything else is fine. Regards, Carl-Daniel -- http://www.hailfinger.org/

2 4

Bus Pirate SPI fine tuning.
by Brian Salcedo 02 Jan '13

02 Jan '13

This negates my previous pull-up resistors patch. Please see http://dangerousprototypes.com/docs/SPI_(binary) for more information. This patch adds additional fine tuning parameters for SPI on the Bus Pirate. If documenting these parameters, please refer the reader to the Bus Pirate documentation - not flashrom! The original initialization parameters are retained. (0xb and 0xa respectively) Signed-off-by: Brian Salcedo <bsalcedo(a)gmx.us>

1 0

ASUS P7P55D-E LX verbose log
by Кирилл Артюшенко 02 Jan '13

02 Jan '13

Log lncuded

1 0

[PATCH 5/5] Allow physmap_common() to round address ranges to page boundaries.
by Stefan Tauner 01 Jan '13

01 Jan '13

Automatically round address ranges requested from physmap_autocleanup() to page boundaries. Other physmap() variants were not changed so this is safe regarding unmapping. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- physmap.c | 47 ++++++++++++++++++++++++++++++++--------------- 1 file changed, 32 insertions(+), 15 deletions(-) diff --git a/physmap.c b/physmap.c index 8b9fea7..ea87d1a 100644 --- a/physmap.c +++ b/physmap.c @@ -218,6 +218,27 @@ void physunmap(void *virt_addr, size_t len) } #endif +/* Round start to nearest page boundary below and set len so that the resulting + * address range ends at the lowest possible page boundary where the original + * address range is still entirely contained. It returns the difference between + * the rounded start address and the original start address. */ +static uintptr_t round_to_page_boundaries(uintptr_t *start, size_t *len) +{ + uintptr_t page_size = getpagesize(); + uintptr_t page_mask = ~(page_size-1); + uintptr_t end = *start + *len; + uintptr_t old_start = *start; + msg_gspew("page_size=%lu\n", page_size); + msg_gspew("pre-rounding: start=0x%0*" PRIxPTR ", len=0x%0zx, end=0x%0*" PRIxPTR "\n", + PRIxPTR_WIDTH, *start, *len, PRIxPTR_WIDTH, end); + *start = *start & page_mask; + end = (end + page_size - 1) & page_mask; + *len = end - *start; + msg_gspew("post-rounding: start=0x%0*" PRIxPTR ", len=0x%0zx, end=0x%0*" PRIxPTR "\n", + PRIxPTR_WIDTH, *start, *len, PRIxPTR_WIDTH, *start + *len); + return old_start - *start; +} + struct physmap_stutdown_data { void *addr; size_t len; @@ -236,24 +257,18 @@ static int physmap_shutdown(void *data) } static void *physmap_common(const char *descr, uintptr_t phys_addr, size_t len, bool mayfail, - bool readonly, bool autocleanup) + bool readonly, bool autocleanup, bool round) { void *virt_addr; + uintptr_t offset = 0; if (len == 0) { msg_pspew("Not mapping %s, zero size at 0x%0*" PRIxPTR ".\n", descr, PRIxPTR_WIDTH, phys_addr); return ERROR_PTR; } - if ((getpagesize() - 1) & len) { - msg_perr("Mapping %s at 0x%08lx, unaligned size 0x%lx.\n", - descr, phys_addr, (unsigned long)len); - } - - if ((getpagesize() - 1) & phys_addr) { - msg_perr("Mapping %s, 0x%lx bytes at unaligned 0x%08lx.\n", - descr, (unsigned long)len, phys_addr); - } + if (round) + offset = round_to_page_boundaries(&phys_addr, &len); if (readonly) virt_addr = sys_physmap_ro_cached(phys_addr, len); @@ -279,7 +294,9 @@ static void *physmap_common(const char *descr, uintptr_t phys_addr, size_t len, "and reboot, or reboot into\n" "single user mode.\n"); #endif - if (!mayfail) + if (mayfail) + return ERROR_PTR; + else exit(3); } @@ -298,7 +315,7 @@ static void *physmap_common(const char *descr, uintptr_t phys_addr, size_t len, } } - return virt_addr; + return virt_addr + offset; unmap_out: physunmap(virt_addr, len); return ERROR_PTR; @@ -306,17 +323,17 @@ unmap_out: void *physmap(const char *descr, uintptr_t phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, false, false, false); + return physmap_common(descr, phys_addr, len, false, false, false, false); } void *physmap_autocleanup(const char *descr, uintptr_t phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, false, false, true); + return physmap_common(descr, phys_addr, len, false, false, true, true); } void *physmap_try_ro(const char *descr, uintptr_t phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, true, true, false); + return physmap_common(descr, phys_addr, len, true, true, false, false); } #if defined(__i386__) || defined(__x86_64__) -- Kind regards, Stefan Tauner

1 0

[PATCH 4/5] uintptr_t-ify physmap.c.
by Stefan Tauner 01 Jan '13

01 Jan '13

unsigned long is not the right type for manipulating pointer values. Since C99 there are suitable unsigned and signed types available, namely uintptr_t and intptr_t respectively. Use them in physmap.c where applicable. This should be done in a lot of other places in flashrom too, but that's a huge pile of work and we better start it with a small step than never (which is the forseeable alternative ;) This patch also changes the display width of all address values in physmap.c to 16/8 hex characters depending on the architecture. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- physmap.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/physmap.c b/physmap.c index a9445d5..8b9fea7 100644 --- a/physmap.c +++ b/physmap.c @@ -20,6 +20,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <inttypes.h> #include <unistd.h> #include <stdbool.h> #include <stdio.h> @@ -35,6 +36,8 @@ #include <errno.h> #endif +#define PRIxPTR_WIDTH ((int)(sizeof(uintptr_t)*2)) + #ifdef __DJGPP__ #include <dpmi.h> #include <sys/nearptr.h> @@ -43,7 +46,7 @@ static void *realmem_map; -static void *map_first_meg(unsigned long phys_addr, size_t len) +static void *map_first_meg(uintptr_t phys_addr, size_t len) { if (realmem_map) return realmem_map + phys_addr; @@ -62,7 +65,7 @@ static void *map_first_meg(unsigned long phys_addr, size_t len) return realmem_map + phys_addr; } -static void *sys_physmap(unsigned long phys_addr, size_t len) +static void *sys_physmap(uintptr_t phys_addr, size_t len) { int ret; __dpmi_meminfo mi; @@ -110,7 +113,7 @@ void physunmap(void *virt_addr, size_t len) #define MEM_DEV "" -void *sys_physmap(unsigned long phys_addr, size_t len) +void *sys_physmap(uintptr_t phys_addr, size_t len) { return (void *)phys_to_virt(phys_addr); } @@ -134,7 +137,7 @@ void cleanup_cpu_msr(void) #define MEM_DEV "DirectHW" -static void *sys_physmap(unsigned long phys_addr, size_t len) +static void *sys_physmap(uintptr_t phys_addr, size_t len) { /* The short form of ?: is a GNU extension. * FIXME: map_physical returns NULL both for errors and for success @@ -166,7 +169,7 @@ static int fd_mem = -1; static int fd_mem_cached = -1; /* For MMIO access. Must be uncached, doesn't make sense to restrict to ro. */ -static void *sys_physmap_rw_uncached(unsigned long phys_addr, size_t len) +static void *sys_physmap_rw_uncached(uintptr_t phys_addr, size_t len) { void *virt_addr; @@ -186,7 +189,7 @@ static void *sys_physmap_rw_uncached(unsigned long phys_addr, size_t len) /* For reading DMI/coreboot/whatever tables. We should never write, and we * do not care about caching. */ -static void *sys_physmap_ro_cached(unsigned long phys_addr, size_t len) +static void *sys_physmap_ro_cached(uintptr_t phys_addr, size_t len) { void *virt_addr; @@ -232,14 +235,13 @@ static int physmap_shutdown(void *data) return 0; } -static void *physmap_common(const char *descr, unsigned long phys_addr, size_t len, bool mayfail, +static void *physmap_common(const char *descr, uintptr_t phys_addr, size_t len, bool mayfail, bool readonly, bool autocleanup) { void *virt_addr; if (len == 0) { - msg_pspew("Not mapping %s, zero size at 0x%08lx.\n", - descr, phys_addr); + msg_pspew("Not mapping %s, zero size at 0x%0*" PRIxPTR ".\n", descr, PRIxPTR_WIDTH, phys_addr); return ERROR_PTR; } @@ -261,8 +263,8 @@ static void *physmap_common(const char *descr, unsigned long phys_addr, size_t l if (ERROR_PTR == virt_addr) { if (NULL == descr) descr = "memory"; - msg_perr("Error accessing %s, 0x%lx bytes at 0x%08lx\n", descr, - (unsigned long)len, phys_addr); + msg_perr("Error accessing %s, 0x%0zx bytes at 0x%0*" PRIxPTR "\n", + descr, len, PRIxPTR_WIDTH, phys_addr); perror(MEM_DEV " mmap failed"); #ifdef __linux__ if (EINVAL == errno) { @@ -302,17 +304,17 @@ unmap_out: return ERROR_PTR; } -void *physmap(const char *descr, unsigned long phys_addr, size_t len) +void *physmap(const char *descr, uintptr_t phys_addr, size_t len) { return physmap_common(descr, phys_addr, len, false, false, false); } -void *physmap_autocleanup(const char *descr, unsigned long phys_addr, size_t len) +void *physmap_autocleanup(const char *descr, uintptr_t phys_addr, size_t len) { return physmap_common(descr, phys_addr, len, false, false, true); } -void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len) +void *physmap_try_ro(const char *descr, uintptr_t phys_addr, size_t len) { return physmap_common(descr, phys_addr, len, true, true, false); } -- Kind regards, Stefan Tauner

1 0

[PATCH 3/5] Automatically unmap physmap()s.
by Stefan Tauner 01 Jan '13

01 Jan '13

Similarly to the previous PCI self-clean up patch this one allows to get rid of a huge number of programmer shutdown functions and makes introducing bugs harder. It adds a new function physmap_autocleanup() that takes care of unmapping at shutdown. Callers are changed where it makes sense. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipset_enable.c | 12 +++++++----- drkaiser.c | 12 ++---------- gfxnvidia.c | 11 ++--------- ichspi.c | 4 +++- it85spi.c | 3 +++ mcp6x_spi.c | 15 +++++---------- nicintel.c | 22 +++------------------- nicintel_spi.c | 10 +++------- ogp_spi.c | 11 ++--------- physmap.c | 54 ++++++++++++++++++++++++++++++++++++++++++++---------- programmer.h | 1 + satamv.c | 11 +---------- satasii.c | 14 ++++---------- sb600spi.c | 6 ++++-- 14 files changed, 84 insertions(+), 102 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 0dc1d7e..0635268 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -480,7 +480,9 @@ static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) msg_pdbg("\nRoot Complex Register Block address = 0x%x\n", tmp); /* Map RCBA to virtual memory */ - rcrb = physmap("ICH RCRB", tmp, 0x4000); + rcrb = physmap_autocleanup("ICH RCRB", tmp, 0x4000); + if (rcrb == ERROR_PTR) + return 1; /* Test Boot BIOS Strap Status */ bnt = mmio_readl(rcrb + 0x3410); @@ -551,7 +553,9 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, msg_pdbg("Root Complex Register Block address = 0x%x\n", tmp); /* Map RCBA to virtual memory */ - rcrb = physmap("ICH RCRB", tmp, 0x4000); + rcrb = physmap_autocleanup("ICH RCRB", tmp, 0x4000); + if (rcrb == ERROR_PTR) + return 1; gcs = mmio_readl(rcrb + 0x3410); msg_pdbg("GCS = 0x%x: ", gcs); @@ -703,10 +707,8 @@ static int enable_flash_vt_vx(struct pci_dev *dev, const char *name) case 0x8410: /* VX900 */ mmio_base = pci_read_long(dev, 0xbc) << 8; mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); - if (mmio_base_physmapped == ERROR_PTR) { - physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + if (mmio_base_physmapped == ERROR_PTR) return ERROR_FATAL; - } /* Offset 0 - Bit 0 holds SPI Bus0 Enable Bit. */ spi_cntl = mmio_readl(mmio_base_physmapped) + 0x00; diff --git a/drkaiser.c b/drkaiser.c index a6eca1c..062ec73 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -56,12 +56,6 @@ static const struct par_programmer par_programmer_drkaiser = { .chip_writen = fallback_chip_writen, }; -static int drkaiser_shutdown(void *data) -{ - physunmap(drkaiser_bar, DRKAISER_MEMMAP_SIZE); - return 0; -} - int drkaiser_init(void) { uint32_t addr; @@ -77,10 +71,8 @@ int drkaiser_init(void) PCI_MAGIC_DRKAISER_VALUE); /* Map 128kB flash memory window. */ - drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", - addr, DRKAISER_MEMMAP_SIZE); - - if (register_shutdown(drkaiser_shutdown, NULL)) + drkaiser_bar = physmap_autocleanup("Dr. Kaiser PC-Waechter flash memory", addr, DRKAISER_MEMMAP_SIZE); + if (drkaiser_bar == ERROR_PTR) return 1; max_rom_decode.parallel = 128 * 1024; diff --git a/gfxnvidia.c b/gfxnvidia.c index a994d68..ec63cf6 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -77,12 +77,6 @@ static const struct par_programmer par_programmer_gfxnvidia = { .chip_writen = fallback_chip_writen, }; -static int gfxnvidia_shutdown(void *data) -{ - physunmap(nvidia_bar, GFXNVIDIA_MEMMAP_SIZE); - return 0; -} - int gfxnvidia_init(void) { uint32_t reg32; @@ -96,9 +90,8 @@ int gfxnvidia_init(void) io_base_addr += 0x300000; msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr); - nvidia_bar = physmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); - - if (register_shutdown(gfxnvidia_shutdown, NULL)) + nvidia_bar = physmap_autocleanup("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); + if (nvidia_bar == ERROR_PTR) return 1; /* Allow access to flash interface (will disable screen). */ diff --git a/ichspi.c b/ichspi.c index fadfe62..4b52745 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1845,7 +1845,9 @@ int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) { int i; - ich_spibar = physmap("VIA SPI MMIO registers", mmio_base, 0x70); + ich_spibar = physmap_autocleanup("VIA SPI MMIO registers", mmio_base, 0x70); + if (ich_spibar == ERROR_PTR) + return ERROR_FATAL; /* Do we really need no write enable? Like the LPC one at D17F0 0x40 */ /* Not sure if it speaks all these bus protocols. */ diff --git a/it85spi.c b/it85spi.c index 0b074eb..b778436 100644 --- a/it85spi.c +++ b/it85spi.c @@ -262,6 +262,9 @@ static int it85xx_spi_common_init(struct superio s) * Major TODO here, and it will be a lot of work. */ base = (chipaddr)physmap("it85 communication", 0xFFFFF000, 0x1000); + if (base == ERROR_PTR) + return 1; + msg_pdbg("%s():%d base=0x%08x\n", __func__, __LINE__, (unsigned int)base); ce_high = (unsigned char *)(base + 0xE00); /* 0xFFFFFE00 */ diff --git a/mcp6x_spi.c b/mcp6x_spi.c index ac40557..0c519eb 100644 --- a/mcp6x_spi.c +++ b/mcp6x_spi.c @@ -135,25 +135,20 @@ int mcp6x_spi_init(int want_spi) /* Accessing a NULL pointer BAR is evil. Don't do it. */ if (!mcp6x_spibaraddr && want_spi) { - msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR " - "is invalid.\n"); + msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR is invalid.\n"); return 1; } else if (!mcp6x_spibaraddr && !want_spi) { msg_pdbg("MCP SPI is not used.\n"); return 0; } else if (mcp6x_spibaraddr && !want_spi) { - msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently" - " doesn't have SPI enabled.\n"); + msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled.\n"); /* FIXME: Should we enable SPI anyway? */ return 0; } /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ - mcp6x_spibar = physmap("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); - -#if 0 - /* FIXME: Run the physunmap in a shutdown function. */ - physunmap(mcp6x_spibar, 0x544); -#endif + mcp6x_spibar = physmap_autocleanup("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); + if (mcp6x_spibar == ERROR_PTR) + return 1; status = mmio_readw(mcp6x_spibar + 0x530); msg_pdbg("SPI control is 0x%04x, req=%i, gnt=%i\n", diff --git a/nicintel.c b/nicintel.c index 8481915..5463af2 100644 --- a/nicintel.c +++ b/nicintel.c @@ -59,13 +59,6 @@ static const struct par_programmer par_programmer_nicintel = { .chip_writen = fallback_chip_writen, }; -static int nicintel_shutdown(void *data) -{ - physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); - physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); - return 0; -} - int nicintel_init(void) { uintptr_t addr; @@ -81,19 +74,15 @@ int nicintel_init(void) */ addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel); - nicintel_bar = physmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); + nicintel_bar = physmap_autocleanup("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); if (nicintel_bar == ERROR_PTR) - goto error_out_unmap; + return 1; /* FIXME: Using pcidev_dev _will_ cause pretty explosions in the future. */ addr = pcidev_readbar(pcidev_dev, PCI_BASE_ADDRESS_0); /* FIXME: This is not an aligned mapping. Use 4k? */ - nicintel_control_bar = physmap("Intel NIC control/status reg", - addr, NICINTEL_CONTROL_MEMMAP_SIZE); + nicintel_control_bar = physmap_autocleanup("Intel NIC control/status reg", addr, NICINTEL_CONTROL_MEMMAP_SIZE); if (nicintel_control_bar == ERROR_PTR) - goto error_out; - - if (register_shutdown(nicintel_shutdown, NULL)) return 1; /* FIXME: This register is pretty undocumented in all publicly available @@ -111,11 +100,6 @@ int nicintel_init(void) register_par_programmer(&par_programmer_nicintel, BUS_PARALLEL); return 0; - -error_out_unmap: - physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); -error_out: - return 1; } static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val, diff --git a/nicintel_spi.c b/nicintel_spi.c index f61c2b1..8630f3f 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -151,16 +151,12 @@ static int nicintel_spi_shutdown(void *data) { uint32_t tmp; - /* Disable writes manually. See the comment about EECD in - * nicintel_spi_init() for details. - */ + /* Disable writes manually. See the comment about EECD in nicintel_spi_init() for details. */ tmp = pci_mmio_readl(nicintel_spibar + EECD); tmp &= ~FLASH_WRITES_ENABLED; tmp |= FLASH_WRITES_DISABLED; pci_mmio_writel(tmp, nicintel_spibar + EECD); - physunmap(nicintel_spibar, MEMMAP_SIZE); - return 0; } @@ -174,8 +170,8 @@ int nicintel_spi_init(void) /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); - nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", - io_base_addr, MEMMAP_SIZE); + nicintel_spibar = physmap_autocleanup("Intel Gigabit NIC w/ SPI flash", io_base_addr, MEMMAP_SIZE); + /* Automatic restore of EECD on shutdown is not possible because EECD * does not only contain FLASH_WRITES_DISABLED|FLASH_WRITES_ENABLED, * but other bits with side effects as well. Those other bits must be diff --git a/ogp_spi.c b/ogp_spi.c index 6fb1a77..d66b2ef 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -97,12 +97,6 @@ static const struct bitbang_spi_master bitbang_spi_master_ogp = { .half_period = 0, }; -static int ogp_spi_shutdown(void *data) -{ - physunmap(ogp_spibar, 4096); - return 0; -} - int ogp_spi_init(void) { char *type; @@ -133,9 +127,8 @@ int ogp_spi_init(void) io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, ogp_spi); - ogp_spibar = physmap("OGP registers", io_base_addr, 4096); - - if (register_shutdown(ogp_spi_shutdown, NULL)) + ogp_spibar = physmap_autocleanup("OGP registers", io_base_addr, 4096); + if (ogp_spibar == ERROR_PTR) return 1; if (bitbang_spi_init(&bitbang_spi_master_ogp)) diff --git a/physmap.c b/physmap.c index 5aa9874..a9445d5 100644 --- a/physmap.c +++ b/physmap.c @@ -21,6 +21,7 @@ */ #include <unistd.h> +#include <stdbool.h> #include <stdio.h> #include <stdlib.h> #include <string.h> @@ -214,13 +215,25 @@ void physunmap(void *virt_addr, size_t len) } #endif -#define PHYSMAP_NOFAIL 0 -#define PHYSMAP_MAYFAIL 1 -#define PHYSMAP_RW 0 -#define PHYSMAP_RO 1 +struct physmap_stutdown_data { + void *addr; + size_t len; +}; -static void *physmap_common(const char *descr, unsigned long phys_addr, - size_t len, int mayfail, int readonly) +static int physmap_shutdown(void *data) +{ + if (data == NULL) { + msg_perr("%s: tried to shutdown without valid data!\n", __func__); + return 1; + } + struct physmap_stutdown_data *d = data; + physunmap(d->addr, d->len); + free(data); + return 0; +} + +static void *physmap_common(const char *descr, unsigned long phys_addr, size_t len, bool mayfail, + bool readonly, bool autocleanup) { void *virt_addr; @@ -268,19 +281,40 @@ static void *physmap_common(const char *descr, unsigned long phys_addr, exit(3); } + if (autocleanup) { + struct physmap_stutdown_data *d = malloc(sizeof(struct physmap_stutdown_data)); + if (d == NULL) { + msg_perr("%s: Out of memory!\n", __func__); + goto unmap_out; + } + + d->addr = virt_addr; + d->len = len; + if (register_shutdown(physmap_shutdown, d) != 0) { + msg_perr("%s: Could not register shutdown function!\n", __func__); + goto unmap_out; + } + } + return virt_addr; +unmap_out: + physunmap(virt_addr, len); + return ERROR_PTR; } void *physmap(const char *descr, unsigned long phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, PHYSMAP_NOFAIL, - PHYSMAP_RW); + return physmap_common(descr, phys_addr, len, false, false, false); +} + +void *physmap_autocleanup(const char *descr, unsigned long phys_addr, size_t len) +{ + return physmap_common(descr, phys_addr, len, false, false, true); } void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, PHYSMAP_MAYFAIL, - PHYSMAP_RO); + return physmap_common(descr, phys_addr, len, true, true, false); } #if defined(__i386__) || defined(__x86_64__) diff --git a/programmer.h b/programmer.h index 4302809..77b78bd 100644 --- a/programmer.h +++ b/programmer.h @@ -272,6 +272,7 @@ int processor_flash_enable(void); /* physmap.c */ void *physmap(const char *descr, unsigned long phys_addr, size_t len); +void *physmap_autocleanup(const char *descr, unsigned long phys_addr, size_t len); void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len); void physunmap(void *virt_addr, size_t len); #if CONFIG_INTERNAL == 1 diff --git a/satamv.c b/satamv.c index 46a0e2d..726dd5a 100644 --- a/satamv.c +++ b/satamv.c @@ -57,12 +57,6 @@ static const struct par_programmer par_programmer_satamv = { .chip_writen = fallback_chip_writen, }; -static int satamv_shutdown(void *data) -{ - physunmap(mv_bar, 0x20000); - return 0; -} - /* * Random notes: * FCE# Flash Chip Enable @@ -93,13 +87,10 @@ int satamv_init(void) */ addr = pcidev_init(PCI_BASE_ADDRESS_0, satas_mv); - mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); + mv_bar = physmap_autocleanup("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) return 1; - if (register_shutdown(satamv_shutdown, NULL)) - return 1; - tmp = pci_mmio_readl(mv_bar + FLASH_PARAM); msg_pspew("Flash Parameters:\n"); msg_pspew("TurnOff=0x%01x\n", (tmp >> 0) & 0x7); diff --git a/satasii.c b/satasii.c index 730c420..36f4cd1 100644 --- a/satasii.c +++ b/satasii.c @@ -54,12 +54,6 @@ static const struct par_programmer par_programmer_satasii = { .chip_writen = fallback_chip_writen, }; -static int satasii_shutdown(void *data) -{ - physunmap(sii_bar, SATASII_MEMMAP_SIZE); - return 0; -} - static uint32_t satasii_wait_done(void) { uint32_t ctrl_reg; @@ -94,15 +88,15 @@ int satasii_init(void) reg_offset = 0x50; } - sii_bar = physmap("SATA SiI registers", addr, SATASII_MEMMAP_SIZE) + reg_offset; + sii_bar = physmap_autocleanup("SATA SiI registers", addr, SATASII_MEMMAP_SIZE); + if (sii_bar == ERROR_PTR) + return 1; + sii_bar += reg_offset; /* Check if ROM cycle are OK. */ if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) msg_pinfo("Warning: Flash seems unconnected.\n"); - if (register_shutdown(satasii_shutdown, NULL)) - return 1; - register_par_programmer(&par_programmer_satasii, BUS_PARALLEL); return 0; diff --git a/sb600spi.c b/sb600spi.c index fe60aa9..7888bb9 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -224,8 +224,10 @@ int sb600_probe_spi(struct pci_dev *dev) return 0; /* Physical memory has to be mapped at page (4k) boundaries. */ - sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000, - 0x1000); + sb600_spibar = physmap_autocleanup("SB600 SPI registers", tmp & 0xfffff000, 0x1000); + if (sb600_spibar == ERROR_PTR) + return 1; + /* The low bits of the SPI base address are used as offset into * the mapped page. */ -- Kind regards, Stefan Tauner

1 0

[PATCH 2/5] Add pci_init_common() to unify PCI init.
by Stefan Tauner 01 Jan '13

01 Jan '13

Previously the internal programmer used its own code to initialize pcilib. This patch extracts the common code from the internal programmer and pcidev_init() into pcidev_init_common(). This fixes the non-existent PCI cleanup of the internal programmer. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- internal.c | 6 ++---- pcidev.c | 15 +++++++++++---- programmer.h | 1 + 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/internal.c b/internal.c index eda4d59..9b34715 100644 --- a/internal.c +++ b/internal.c @@ -245,10 +245,8 @@ int internal_init(void) internal_buses_supported = BUS_NONSPI; /* Initialize PCI access for flash enables */ - pacc = pci_alloc(); /* Get the pci_access structure */ - /* Set all options you want -- here we stick with the defaults */ - pci_init(pacc); /* Initialize the PCI library */ - pci_scan_bus(pacc); /* We want to get the list of devices */ + if(pci_init_common() != 0) + return 1; if (processor_flash_enable()) { msg_perr("Processor detection/init failed.\n" diff --git a/pcidev.c b/pcidev.c index 37bcc22..a5a7088 100644 --- a/pcidev.c +++ b/pcidev.c @@ -162,6 +162,16 @@ static int pcidev_shutdown(void *data) return 0; } +int pci_init_common(void) +{ + pacc = pci_alloc(); /* Get the pci_access structure */ + pci_init(pacc); /* Initialize the PCI library */ + if (register_shutdown(pcidev_shutdown, NULL)) + return 1; + pci_scan_bus(pacc); /* We want to get the list of devices */ + return 0; +} + uintptr_t pcidev_init(int bar, const struct dev_entry *devs) { struct pci_dev *dev; @@ -172,11 +182,8 @@ uintptr_t pcidev_init(int bar, const struct dev_entry *devs) int i; uintptr_t addr = 0, curaddr = 0; - pacc = pci_alloc(); /* Get the pci_access structure */ - pci_init(pacc); /* Initialize the PCI library */ - if (register_shutdown(pcidev_shutdown, NULL)) + if(pci_init_common() != 0) return 1; - pci_scan_bus(pacc); /* We want to get the list of devices */ pci_filter_init(pacc, &filter); /* Filter by bb:dd.f (if supplied by the user). */ diff --git a/programmer.h b/programmer.h index 8de42bc..4302809 100644 --- a/programmer.h +++ b/programmer.h @@ -238,6 +238,7 @@ void internal_delay(int usecs); extern uint32_t io_base_addr; extern struct pci_access *pacc; extern struct pci_dev *pcidev_dev; +int pci_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); uintptr_t pcidev_init(int bar, const struct dev_entry *devs); /* rpci_write_* are reversible writes. The original PCI config space register -- Kind regards, Stefan Tauner

1 0

[PATCH 1/5] Let pcidev clean itself up.
by Stefan Tauner 01 Jan '13

01 Jan '13

We got a nice shutdown function registration infrastructure, but did not use it very wisely. Instead we added shutdown functions to a myriad of programmers unnecessarily. In this patch we get rid of those that do only call pci_cleanup(pacc) by adding a shutdown function the pcidev.c itself that gets registered by pcidev_init(). Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- atahpt.c | 10 ---------- drkaiser.c | 3 +-- gfxnvidia.c | 6 +----- nic3com.c | 2 +- nicintel.c | 5 +---- nicintel_spi.c | 2 +- nicrealtek.c | 7 +++++-- ogp_spi.c | 2 -- pcidev.c | 15 +++++++++++++++ satamv.c | 7 +------ satasii.c | 1 - 11 files changed, 26 insertions(+), 34 deletions(-) diff --git a/atahpt.c b/atahpt.c index 461191d..d19cb75 100644 --- a/atahpt.c +++ b/atahpt.c @@ -56,13 +56,6 @@ static const struct par_programmer par_programmer_atahpt = { .chip_writen = fallback_chip_writen, }; -static int atahpt_shutdown(void *data) -{ - /* Flash access is disabled automatically by PCI restore. */ - pci_cleanup(pacc); - return 0; -} - int atahpt_init(void) { uint32_t reg32; @@ -72,9 +65,6 @@ int atahpt_init(void) io_base_addr = pcidev_init(PCI_BASE_ADDRESS_4, ata_hpt); - if (register_shutdown(atahpt_shutdown, NULL)) - return 1; - /* Enable flash access. */ reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS); reg32 |= (1 << 24); diff --git a/drkaiser.c b/drkaiser.c index e461061..a6eca1c 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -59,8 +59,6 @@ static const struct par_programmer par_programmer_drkaiser = { static int drkaiser_shutdown(void *data) { physunmap(drkaiser_bar, DRKAISER_MEMMAP_SIZE); - /* Flash write is disabled automatically by PCI restore. */ - pci_cleanup(pacc); return 0; } @@ -71,6 +69,7 @@ int drkaiser_init(void) if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ addr = pcidev_init(PCI_BASE_ADDRESS_2, drkaiser_pcidev); /* Write magic register to enable flash write. */ diff --git a/gfxnvidia.c b/gfxnvidia.c index 624fd7c..a994d68 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -80,10 +80,6 @@ static const struct par_programmer par_programmer_gfxnvidia = { static int gfxnvidia_shutdown(void *data) { physunmap(nvidia_bar, GFXNVIDIA_MEMMAP_SIZE); - /* Flash interface access is disabled (and screen enabled) automatically - * by PCI restore. - */ - pci_cleanup(pacc); return 0; } @@ -94,6 +90,7 @@ int gfxnvidia_init(void) if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, gfx_nvidia); io_base_addr += 0x300000; @@ -101,7 +98,6 @@ int gfxnvidia_init(void) nvidia_bar = physmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); - /* Must be done before rpci calls. */ if (register_shutdown(gfxnvidia_shutdown, NULL)) return 1; diff --git a/nic3com.c b/nic3com.c index 05eada6..4ec6193 100644 --- a/nic3com.c +++ b/nic3com.c @@ -81,7 +81,6 @@ static int nic3com_shutdown(void *data) OUTL(internal_conf, io_base_addr + INTERNAL_CONFIG); } - pci_cleanup(pacc); return 0; } @@ -90,6 +89,7 @@ int nic3com_init(void) if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_3com); id = pcidev_dev->device_id; diff --git a/nicintel.c b/nicintel.c index d210d78..8481915 100644 --- a/nicintel.c +++ b/nicintel.c @@ -63,7 +63,6 @@ static int nicintel_shutdown(void *data) { physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); - pci_cleanup(pacc); return 0; } @@ -77,8 +76,7 @@ int nicintel_init(void) if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case - * of errors. + /* No need to check for errors, pcidev_init() will not return in case of errors. * FIXME: BAR2 is not available if the device uses the CardBus function. */ addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel); @@ -117,7 +115,6 @@ int nicintel_init(void) error_out_unmap: physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); error_out: - pci_cleanup(pacc); return 1; } diff --git a/nicintel_spi.c b/nicintel_spi.c index 325e61c..f61c2b1 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -160,7 +160,6 @@ static int nicintel_spi_shutdown(void *data) pci_mmio_writel(tmp, nicintel_spibar + EECD); physunmap(nicintel_spibar, MEMMAP_SIZE); - pci_cleanup(pacc); return 0; } @@ -172,6 +171,7 @@ int nicintel_spi_init(void) if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", diff --git a/nicrealtek.c b/nicrealtek.c index 3c3b261..0929e5d 100644 --- a/nicrealtek.c +++ b/nicrealtek.c @@ -51,22 +51,25 @@ static const struct par_programmer par_programmer_nicrealtek = { .chip_writen = fallback_chip_writen, }; +#if 0 static int nicrealtek_shutdown(void *data) { /* FIXME: We forgot to disable software access again. */ - pci_cleanup(pacc); return 0; } +#endif int nicrealtek_init(void) { if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek); - +#if 0 if (register_shutdown(nicrealtek_shutdown, NULL)) return 1; +#endif /* Beware, this ignores the vendor ID! */ switch (pcidev_dev->device_id) { diff --git a/ogp_spi.c b/ogp_spi.c index d1bb12f..6fb1a77 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -100,8 +100,6 @@ static const struct bitbang_spi_master bitbang_spi_master_ogp = { static int ogp_spi_shutdown(void *data) { physunmap(ogp_spibar, 4096); - pci_cleanup(pacc); - return 0; } diff --git a/pcidev.c b/pcidev.c index 1a26e99..37bcc22 100644 --- a/pcidev.c +++ b/pcidev.c @@ -154,6 +154,14 @@ uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) return (uintptr_t)addr; } +static int pcidev_shutdown(void *data) +{ + if (pacc != NULL) + pci_cleanup(pacc); + pcidev_dev = NULL; + return 0; +} + uintptr_t pcidev_init(int bar, const struct dev_entry *devs) { struct pci_dev *dev; @@ -166,6 +174,8 @@ uintptr_t pcidev_init(int bar, const struct dev_entry *devs) pacc = pci_alloc(); /* Get the pci_access structure */ pci_init(pacc); /* Initialize the PCI library */ + if (register_shutdown(pcidev_shutdown, NULL)) + return 1; pci_scan_bus(pacc); /* We want to get the list of devices */ pci_filter_init(pacc, &filter); @@ -244,6 +254,11 @@ struct undo_pci_write_data { int undo_pci_write(void *p) { struct undo_pci_write_data *data = p; + if (pacc == NULL) { + msg_perr("%s: Tried to undo PCI writes without a valid PCI context!\n" + "Please report a bug at flashrom(a)flashrom.org\n", __func__); + return 1; + } msg_pdbg("Restoring PCI config space for %02x:%02x:%01x reg 0x%02x\n", data->dev.bus, data->dev.dev, data->dev.func, data->reg); switch (data->type) { diff --git a/satamv.c b/satamv.c index c0c1ffa..46a0e2d 100644 --- a/satamv.c +++ b/satamv.c @@ -60,7 +60,6 @@ static const struct par_programmer par_programmer_satamv = { static int satamv_shutdown(void *data) { physunmap(mv_bar, 0x20000); - pci_cleanup(pacc); return 0; } @@ -96,7 +95,7 @@ int satamv_init(void) mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) - goto error_out; + return 1; if (register_shutdown(satamv_shutdown, NULL)) return 1; @@ -159,10 +158,6 @@ int satamv_init(void) register_par_programmer(&par_programmer_satamv, BUS_PARALLEL); return 0; - -error_out: - pci_cleanup(pacc); - return 1; } /* BAR2 (MEM) can map NVRAM and flash. We set it to flash in the init function. diff --git a/satasii.c b/satasii.c index 7b94203..730c420 100644 --- a/satasii.c +++ b/satasii.c @@ -57,7 +57,6 @@ static const struct par_programmer par_programmer_satasii = { static int satasii_shutdown(void *data) { physunmap(sii_bar, SATASII_MEMMAP_SIZE); - pci_cleanup(pacc); return 0; } -- Kind regards, Stefan Tauner

1 0

[PATCH 0/5] Improve PCI and physmapping 2.0
by Stefan Tauner 01 Jan '13

01 Jan '13

1 0

Some additions for the intel-mysteries file
by Steven Zakulec 01 Jan '13

01 Jan '13

Hi, I've tried to make some sense out of the ME documents, and after some study, I've put together a list of the ways mentioned in Intel sheets to disable/stop the ME, and what chipsets they apply to/don't apply to. I've then included some observations I've made. If you find this useful (and think it's more likely valid than not), reply, and I'll send a sign-off so it can be put in a patch. ME disabling methods (all from section 4.5 or section on FPT (Flash Programming Tool): Manufacturer mode jumper (GPIO 33) (also Flash Descriptor Override) Works on: Montevina (Oct 2007 guide) (1), (3) Intel 3 series chipset (2) Ibex Peak (4), (7) Intel 6 series chipset (5), (6) Remove all memory from Bank 0 (1), (2), (3) >From (2): This causes the ME to boot up in an error state, which is saved on the flash device. Once the OS has booted, you can program the flash device. Works on: Montevina (ICH9M) (Oct 2007 guide) (1), (3) Intel 3 series chipset (2) Doesn't work on: Ibex Peak (4) Intel 6 series chipset (5), (6) or presumably anything after Ibex Peak. HMRFPO message Works on: Ibex Peak (4) Intel 6 series chipset (5), (6) Set ME disable bits (2) >From (2): Set ME disable bits in the strap sections of the descriptor region- see ICH EDS for more info Works on: Intel 3 series chipset (2) Security override strap? (2) Temporarily stop ME thru MEbx? (4), (5) (7) says this: Temporarily disable the Intel® ME through the MEBX. Power off or cold reset. - This option is only applicable to non-Intel ME Ignition firmware. (4), (5) says Stopping ME is not a requirement when writing to the fixed offset region. (6) says FPT will stop ME SPI accessing automatically if it try to write data into the ME region. Customers do not have to do extra step to stop ME if using FPT tool to update ME region. (5) does not mention this note. Section 8 (Update Parameter Tool) of (4),(5),(6) is interesting- the tool will work with ME manufacturing mode bit set, and a locked Descriptor region. References: (1) Montevina SW/FW OEM Bring up Guide, October 2007, Rev 0.4 (2) System Tools User Guide, July 2007, Rev 0.92 (Intel 3 series chipset ) (3) Intel Management Engine, System Tools User Guide, October 2007, Rev 0.60 (4) (Ibex Peak) System Tools User Guide for Intel® Management Engine Firmware 6.0 (Corporate), User Guide, June 2009, Revision 0.60 (5) System Tools for Intel® 6 Series Chipset Family Intel® Management Engine, Firmware 7.0 SKU’s, User Guide, May 2010, Revision: 0.81 (6) (Cougar Point) System Tools for Intel® 6 Series Chipset Family Intel® Management Engine, Firmware 7.0 SKU’s, User Guide, December 2010, Revision: 1.08 (7) Ibex Peak SPI Programming Guide, Application Note, January 2009, Revision 1.3 In theory, pre-Ibex Peak chipsets should be able to take advantage of the removing memory method, which would be fairly easy to do. The Update Parameters tool is interesting, especially if it works, but since it's a separate tool, it's not of real use.

1 0

[commit] r1640 - trunk
by repository service 01 Jan '13

01 Jan '13

Author: stefanct Date: Tue Jan 1 01:06:51 2013 New Revision: 1640 URL: http://flashrom.org/trac/flashrom/changeset/1640 Log: Add a bunch of new/tested stuff and various small changes 16. Tested Mainboards: OK: - Acer V75-M (used in IBM Aptiva 2170-G http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html - ASRock 4CoreDual-VSTA with W39V040FB http://paste.flashrom.org/view.php?id=1446 - ASRock 775Dual-VSTA http://www.flashrom.org/pipermail/flashrom/2012-December/010294.html - ASRock E350M1/USB3 http://paste.flashrom.org/view.php?id=1465 - ASUS P5B-VM http://www.flashrom.org/pipermail/flashrom/2012-December/010351.html - ASUS SABERTOOTH 990FX R2.0 http://www.flashrom.org/pipermail/flashrom/2012-December/010210.html - Elitegroup A928 (including a laptop whitelist board enable) http://www.flashrom.org/pipermail/flashrom/2012-November/010119.html - EVGA 122-CK-NF68 Reported by Stephanie Daugherty on IRC http://paste.flashrom.org/view.php?id=1431 - GIGABYTE GA-A75M-UD2H Reported by Soul_keeper on IRC http://paste.flashrom.org/view.php?id=1490 - Intel D945GCNL Add board enable to override laptop detection too. http://www.flashrom.org/pipermail/flashrom/2012-December/010276.html - MSI G33M (MS-7357) http://www.flashrom.org/pipermail/flashrom/2012-October/010056.html - Shuttle FB61 http://www.flashrom.org/pipermail/flashrom/2012-November/010105.html - Tyan S4882 (Thunder K8QS Pro) Reported on IRC NOT OK: Alienware Aurora-R2 http://www.flashrom.org/pipermail/flashrom/2012-December/010225.html Biostar H61MU3 http://www.flashrom.org/pipermail/flashrom/2012-November/010144.html Dell OptiPlex 7010 http://paste.flashrom.org/view.php?id=1481 Intel DH67CL http://www.flashrom.org/pipermail/flashrom/2012-November/010112.html Supermicro X9DRT-HF+ http://www.flashrom.org/pipermail/flashrom/2012-November/010155.html Supermicro X9DRW http://www.flashrom.org/pipermail/flashrom/2012-November/010150.html Tested flash chips: - Atmel AT25FS010 to PREW (+PREW) http://paste.flashrom.org/view.php?id=1484 - Eon EN25F64 to PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2012-December/010210.html - Spansion S25FL032A/P to PREW (+EW) http://paste.flashrom.org/view.php?id=1510 - ST M29F002T/NT to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html - Winbond W25X10 to PREW (+PREW) http://paste.flashrom.org/view.php?id=1486 Tested chipsets: - NVIDIA MCP78S http://www.flashrom.org/pipermail/flashrom/2012-November/010176.html - SiS 650 http://www.flashrom.org/pipermail/flashrom/2012-November/010119.html Miscellaneous: - Typo in GA-X58A-UDR3 (correct is GA-X58A-UD3R). - Force 2-digit hex numbers in prints were it makes sense. - Share code between enable_flash_sis530() and enable_flash_sis540(). - Some SST 25 series chips support both WRSR enable commands... - S25FL032A and S25FL064A share the IDs with their P versions, so rename them. - Fix a few memleaks in serprog. - Dediprog uses UINT_MAX so include limits.h (fixes the Windows build of dediprog) - Add (another) hint regarding the mandatory -p parameter to the manpage to make Debian bug #690478 happy. http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=690478 - Fix whitespace issues. - On shutdown, reset count of registered programmers (by Nico Huber) - Fix atahpt.c shutdown. The order of pcidev_init, register_shutdown and rpci_write_* is important! Thanks to Roy for reporting the problem and testing the fix. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/Makefile trunk/atahpt.c trunk/board_enable.c trunk/chipset_enable.c trunk/dediprog.c trunk/flashchips.c trunk/flashchips.h trunk/flashrom.8 trunk/flashrom.c trunk/print.c trunk/serprog.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sun Dec 30 02:23:17 2012 (r1639) +++ trunk/Makefile Tue Jan 1 01:06:51 2013 (r1640) @@ -581,7 +581,7 @@ else ifeq ($(TARGET_OS), Darwin) # DirectHW framework can be found in the DirectHW library. -PCILIBS += -framework IOKit -framework DirectHW +PCILIBS += -framework IOKit -framework DirectHW else endif endif Modified: trunk/atahpt.c ============================================================================== --- trunk/atahpt.c Sun Dec 30 02:23:17 2012 (r1639) +++ trunk/atahpt.c Tue Jan 1 01:06:51 2013 (r1640) @@ -72,14 +72,14 @@ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_4, ata_hpt); + if (register_shutdown(atahpt_shutdown, NULL)) + return 1; + /* Enable flash access. */ reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS); reg32 |= (1 << 24); rpci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32); - if (register_shutdown(atahpt_shutdown, NULL)) - return 1; - register_par_programmer(&par_programmer_atahpt, BUS_PARALLEL); return 0; Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sun Dec 30 02:23:17 2012 (r1639) +++ trunk/board_enable.c Tue Jan 1 01:06:51 2013 (r1640) @@ -2378,6 +2378,7 @@ {0x10b7, 0x9055, 0x1028, 0x0082, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, P3, "Dell", "OptiPlex GX1", 0, OK, intel_piix4_gpo30_lower}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, P3, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, {0x1106, 0x3189, 0x1106, 0x3189, 0x1106, 0x3177, 0x1106, 0x3177, "^AD77", "dfi", "ad77", P3, "DFI", "AD77", 0, NT, w836xx_memw_enable_2e}, + {0x1039, 0x6325, 0x1019, 0x0f05, 0x1039, 0x0016, 0, 0, NULL, NULL, NULL, P2, "Elitegroup", "A928", 0, OK, p2_whitelist_laptop}, {0x10de, 0x03ea, 0x1019, 0x2602, 0x10de, 0x03e0, 0x1019, 0x2602, NULL, NULL, NULL, P3, "Elitegroup", "GeForce6100SM-M", 0, OK, board_ecs_geforce6100sm_m}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, P3, "Elitegroup", "K7VTA3", 256, OK, NULL}, {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, P3, "EPoX", "EP-8K5A2", 0, OK, w836xx_memw_enable_2e}, @@ -2406,6 +2407,7 @@ {0x8086, 0x27A0, 0, 0, 0x8086, 0x27B9, 0, 0, NULL, "ibase", "mb899", P3, "IBASE", "MB899", 0, OK, intel_ich_gpio26_raise}, {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, P3, "IBM", "x3455", 0, OK, board_ibm_x3455}, {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, P3, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi}, + {0x8086, 0x27b8, 0x8086, 0xd606, 0x8086, 0x2770, 0x8086, 0xd606, "^D945GCNL$", NULL, NULL, P2, "Intel", "D945GCNL", 0, OK, p2_not_a_laptop}, {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, P3, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower}, {0x1022, 0x7468, 0, 0, 0x1022, 0x7460, 0, 0, NULL, "iwill", "dk8_htx", P3, "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e}, {0x8086, 0x27A0, 0x8086, 0x27a0, 0x8086, 0x27b8, 0x8086, 0x27b8, NULL, "kontron", "986lcd-m", P3, "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sun Dec 30 02:23:17 2012 (r1639) +++ trunk/chipset_enable.c Tue Jan 1 01:06:51 2013 (r1640) @@ -95,19 +95,20 @@ static int enable_flash_sis_mapping(struct pci_dev *dev, const char *name) { + #define SIS_MAPREG 0x40 uint8_t new, newer; /* Extended BIOS enable = 1, Lower BIOS Enable = 1 */ /* This is 0xFFF8000~0xFFFF0000 decoding on SiS 540/630. */ - new = pci_read_byte(dev, 0x40); + new = pci_read_byte(dev, SIS_MAPREG); new &= (~0x04); /* No idea why we clear bit 2. */ new |= 0xb; /* 0x3 for some chipsets, bit 7 seems to be don't care. */ - rpci_write_byte(dev, 0x40, new); - newer = pci_read_byte(dev, 0x40); - if (newer != new) { - msg_pinfo("Setting register 0x%x to 0x%x on %s failed " - "(WARNING ONLY).\n", 0x40, new, name); - msg_pinfo("Stuck at 0x%x\n", newer); + rpci_write_byte(dev, SIS_MAPREG, new); + newer = pci_read_byte(dev, SIS_MAPREG); + if (newer != new) { /* FIXME: share this with other code? */ + msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", + SIS_MAPREG, new, name); + msg_pinfo("Stuck at 0x%02x.\n", newer); return -1; } return 0; @@ -176,8 +177,9 @@ return ret; } -static int enable_flash_sis530(struct pci_dev *dev, const char *name) +static int enable_flash_sis5x0(struct pci_dev *dev, const char *name, uint8_t dis_mask, uint8_t en_mask) { + #define SIS_REG 0x45 uint8_t new, newer; int ret = 0; struct pci_dev *sbdev; @@ -188,46 +190,28 @@ ret = enable_flash_sis_mapping(sbdev, name); - new = pci_read_byte(sbdev, 0x45); - new &= (~0x20); - new |= 0x4; - rpci_write_byte(sbdev, 0x45, new); - newer = pci_read_byte(sbdev, 0x45); - if (newer != new) { - msg_pinfo("Setting register 0x%x to 0x%x on %s failed " - "(WARNING ONLY).\n", 0x45, new, name); - msg_pinfo("Stuck at 0x%x\n", newer); + new = pci_read_byte(sbdev, SIS_REG); + new &= (~dis_mask); + new |= en_mask; + rpci_write_byte(sbdev, SIS_REG, new); + newer = pci_read_byte(sbdev, SIS_REG); + if (newer != new) { /* FIXME: share this with other code? */ + msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", SIS_REG, new, name); + msg_pinfo("Stuck at 0x%02x\n", newer); ret = -1; } return ret; } -static int enable_flash_sis540(struct pci_dev *dev, const char *name) +static int enable_flash_sis530(struct pci_dev *dev, const char *name) { - uint8_t new, newer; - int ret = 0; - struct pci_dev *sbdev; - - sbdev = find_southbridge(dev->vendor_id, name); - if (!sbdev) - return -1; - - ret = enable_flash_sis_mapping(sbdev, name); - - new = pci_read_byte(sbdev, 0x45); - new &= (~0x80); - new |= 0x40; - rpci_write_byte(sbdev, 0x45, new); - newer = pci_read_byte(sbdev, 0x45); - if (newer != new) { - msg_pinfo("Setting register 0x%x to 0x%x on %s failed " - "(WARNING ONLY).\n", 0x45, new, name); - msg_pinfo("Stuck at 0x%x\n", newer); - ret = -1; - } + return enable_flash_sis5x0(dev, name, 0x20, 0x04); +} - return ret; +static int enable_flash_sis540(struct pci_dev *dev, const char *name) +{ + return enable_flash_sis5x0(dev, name, 0x80, 0x40); } /* Datasheet: @@ -268,9 +252,8 @@ rpci_write_word(dev, xbcs, new); - if (pci_read_word(dev, xbcs) != new) { - msg_pinfo("Setting register 0x%x to 0x%x on %s failed " - "(WARNING ONLY).\n", xbcs, new, name); + if (pci_read_word(dev, xbcs) != new) { /* FIXME: share this with other code? */ + msg_pinfo("Setting register 0x%04x to 0x%04x on %s failed (WARNING ONLY).\n", xbcs, new, name); return -1; } @@ -678,8 +661,7 @@ rpci_write_byte(dev, 0x40, val); if (pci_read_byte(dev, 0x40) != val) { - msg_pinfo("\nWARNING: Failed to enable flash write on \"%s\"\n", - name); + msg_pinfo("\nWARNING: Failed to enable flash write on \"%s\"\n", name); return -1; } @@ -851,15 +833,15 @@ static int enable_flash_sc1100(struct pci_dev *dev, const char *name) { + #define SC_REG 0x52 uint8_t new; - rpci_write_byte(dev, 0x52, 0xee); + rpci_write_byte(dev, SC_REG, 0xee); - new = pci_read_byte(dev, 0x52); + new = pci_read_byte(dev, SC_REG); - if (new != 0xee) { - msg_pinfo("Setting register 0x%x to 0x%x on %s failed " - "(WARNING ONLY).\n", 0x52, new, name); + if (new != 0xee) { /* FIXME: share this with other code? */ + msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", SC_REG, new, name); return -1; } @@ -869,29 +851,31 @@ /* Works for AMD-8111, VIA VT82C586A/B, VIA VT82C686A/B. */ static int enable_flash_amd8111(struct pci_dev *dev, const char *name) { + #define AMD_MAPREG 0x43 + #define AMD_ENREG 0x40 uint8_t old, new; /* Enable decoding at 0xffb00000 to 0xffffffff. */ - old = pci_read_byte(dev, 0x43); + old = pci_read_byte(dev, AMD_MAPREG); new = old | 0xC0; if (new != old) { - rpci_write_byte(dev, 0x43, new); - if (pci_read_byte(dev, 0x43) != new) { - msg_pinfo("Setting register 0x%x to 0x%x on %s failed " - "(WARNING ONLY).\n", 0x43, new, name); + rpci_write_byte(dev, AMD_MAPREG, new); + if (pci_read_byte(dev, AMD_MAPREG) != new) { + msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", + AMD_MAPREG, new, name); } } /* Enable 'ROM write' bit. */ - old = pci_read_byte(dev, 0x40); + old = pci_read_byte(dev, AMD_ENREG); new = old | 0x01; if (new == old) return 0; - rpci_write_byte(dev, 0x40, new); + rpci_write_byte(dev, AMD_ENREG, new); - if (pci_read_byte(dev, 0x40) != new) { - msg_pinfo("Setting register 0x%x to 0x%x on %s failed " - "(WARNING ONLY).\n", 0x40, new, name); + if (pci_read_byte(dev, AMD_ENREG) != new) { + msg_pinfo("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n", + AMD_ENREG, new, name); return -1; } @@ -1055,8 +1039,8 @@ new = old | 0xC0; if (new != old) { rpci_write_byte(dev, reg, new); - if (pci_read_byte(dev, reg) != new) { - msg_pinfo("Setting register 0x%02x to 0x%x on %s failed.\n", reg, new, name); + if (pci_read_byte(dev, reg) != new) { /* FIXME: share this with other code? */ + msg_pinfo("Setting register 0x%02x to 0x%02x on %s failed.\n", reg, new, name); err++; } } @@ -1298,7 +1282,7 @@ {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, {0x1039, 0x0646, OK, "SiS", "645DX", enable_flash_sis540}, {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540}, - {0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis540}, + {0x1039, 0x0650, OK, "SiS", "650", enable_flash_sis540}, {0x1039, 0x0651, OK, "SiS", "651", enable_flash_sis540}, {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, {0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540}, @@ -1355,7 +1339,7 @@ {0x10de, 0x0442, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, {0x10de, 0x0443, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x}, {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp6x_7x}, - {0x10de, 0x075c, NT, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, + {0x10de, 0x075c, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, {0x10de, 0x075d, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x}, {0x10de, 0x07d7, OK, "NVIDIA", "MCP73", enable_flash_mcp6x_7x}, {0x10de, 0x0aac, OK, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, Modified: trunk/dediprog.c ============================================================================== --- trunk/dediprog.c Sun Dec 30 02:23:17 2012 (r1639) +++ trunk/dediprog.c Tue Jan 1 01:06:51 2013 (r1640) @@ -19,6 +19,7 @@ #include <stdio.h> #include <string.h> +#include <limits.h> #include <errno.h> #include <usb.h> #include "flash.h" Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Dec 30 02:23:17 2012 (r1639) +++ trunk/flashchips.c Tue Jan 1 01:06:51 2013 (r1640) @@ -1864,7 +1864,7 @@ .total_size = 128, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -3598,7 +3598,7 @@ .total_size = 8192, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_OK_PR, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -6832,14 +6832,14 @@ { .vendor = "Spansion", - .name = "S25FL032A", + .name = "S25FL032A/P", .bustype = BUS_SPI, .manufacture_id = SPANSION_ID, .model_id = SPANSION_S25FL032A, .total_size = 4096, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_OK_PR, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -6861,7 +6861,7 @@ { .vendor = "Spansion", - .name = "S25FL064A", + .name = "S25FL064A/P", .bustype = BUS_SPI, .manufacture_id = SPANSION_ID, .model_id = SPANSION_S25FL064A, @@ -6922,13 +6922,13 @@ { .vendor = "SST", - .name = "SST25LF080A", + .name = "SST25LF080(A)", .bustype = BUS_SPI, .manufacture_id = SST_ID, .model_id = SST_SST25VF080_REMS, .total_size = 1024, .page_size = 256, - .feature_bits = FEATURE_WRSR_EWSR, + .feature_bits = FEATURE_WRSR_EITHER, .tested = TEST_UNTESTED, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, @@ -6992,7 +6992,7 @@ .model_id = SST_SST25VF016B, .total_size = 2048, .page_size = 256, - .feature_bits = FEATURE_WRSR_EWSR, + .feature_bits = FEATURE_WRSR_EITHER, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -8659,7 +8659,7 @@ .total_size = 256, .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_AAA | FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = @@ -9600,7 +9600,7 @@ .total_size = 128, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun Dec 30 02:23:17 2012 (r1639) +++ trunk/flashchips.h Tue Jan 1 01:06:51 2013 (r1640) @@ -483,8 +483,8 @@ #define SPANSION_S25FL004A 0x0212 #define SPANSION_S25FL008A 0x0213 #define SPANSION_S25FL016A 0x0214 -#define SPANSION_S25FL032A 0x0215 -#define SPANSION_S25FL064A 0x0216 +#define SPANSION_S25FL032A 0x0215 /* Same as S25FL032P, but the latter supports EDI and CFI */ +#define SPANSION_S25FL064A 0x0216 /* Same as S25FL064P, but the latter supports EDI and CFI */ /* * SST25 chips are SPI, first byte of device ID is memory type, second Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Sun Dec 30 02:23:17 2012 (r1639) +++ trunk/flashrom.8 Tue Jan 1 01:06:51 2013 (r1640) @@ -34,7 +34,9 @@ in probe-only mode and check the output. Also you are advised to make a backup of your current ROM contents with .B \-r -before you try to write a new image. +before you try to write a new image. All operations involving any chip access (probe/read/write/...) require the +.B -p/--programmer +option to be used (please see below). .TP .B "\-r, \-\-read <file>" Read flash ROM contents and save them into the given @@ -128,7 +130,7 @@ .sp .B " flashrom \-p prog \-\-layout rom.layout \-\-image normal \-w some.rom" .sp -To update only the images named +To update only the images named .BR "normal " "and " "fallback" ", run:" .sp .B " flashrom \-p prog \-l rom.layout \-i normal -i fallback \-w some.rom" @@ -694,11 +696,11 @@ .BR "pony_spi " programmer The serial port (like /dev/ttyS0, /dev/ttyUSB0 on Linux or COM3 on windows) is specified using the mandatory -.B dev +.B dev parameter. The adapter type is selectable between SI-Prog (used for SPI devices with PonyProg 2000) or a custom made serial bitbanging programmer named "serbang". The optional -.B type +.B type parameter accepts the values "si_prog" (default) or "serbang". .sp Information about the SI-Prog adapter can be found at @@ -724,7 +726,7 @@ .B cprom or .B s3 -for the configuration ROM and +for the configuration ROM and .B bprom or .B bios @@ -733,7 +735,7 @@ you want to use with the .B pci= parameter as explained in the -.B nic3com et al.\& +.B nic3com et al.\& section above. .sp More information about the hardware is available at Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sun Dec 30 02:23:17 2012 (r1639) +++ trunk/flashrom.c Tue Jan 1 01:06:51 2013 (r1640) @@ -397,7 +397,10 @@ int i = --shutdown_fn_count; ret |= shutdown_fn[i].func(shutdown_fn[i].data); } + programmer_param = NULL; + registered_programmer_count = 0; + return ret; } Modified: trunk/print.c ============================================================================== --- trunk/print.c Sun Dec 30 02:23:17 2012 (r1639) +++ trunk/print.c Tue Jan 1 01:06:51 2013 (r1640) @@ -517,15 +517,19 @@ B("abit", "NF7-S", OK, NULL, NULL), B("abit", "VA6", OK, NULL, NULL), B("abit", "VT6X4", OK, NULL, NULL), + B("Acer", "V75-M", OK, NULL, "This is an OEM board used by IBM in e.g. Aptiva 2170-G"), B("Acorp", "6A815EPD", OK, "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.…", NULL), B("Advantech", "PCM-5820", OK, "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL), B("agami", "Aruma", OK, "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-600…", NULL), B("Albatron", "PM266A Pro", OK, "http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview…", NULL), /* FIXME */ + B("Alienware", "Aurora-R2", BAD, NULL, "Mainboard model is 0RV30W. Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("AOpen", "i945GMx-VFX", OK, NULL, "This is (also?) an OEM board from FSC (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."), B("AOpen", "vKM400Am-S", OK, "http://usa.aopen.com/products_detail.aspx?Auno=824", NULL), B("Artec Group","DBE61", OK, "http://wiki.thincan.org/DBE61", NULL), B("Artec Group","DBE62", OK, "http://wiki.thincan.org/DBE62", NULL), B("ASI", "MB-5BLMP", OK, "http://www.hojerteknik.com/winnet.htm", "Used in the IGEL WinNET III thin client."), + B("ASRock", "4CoreDual-VSTA", OK, "http://www.asrock.com/mb/overview.asp?Model=4CoreDual-VSTA", "W39V040FB"), + B("ASRock", "775Dual-VSTA", OK, "http://www.asrock.com/mb/overview.asp?Model=775Dual-VSTA", NULL), B("ASRock", "775i65G", OK, "http://www.asrock.com/mb/overview.asp?Model=775i65G", NULL), B("ASRock", "880G Pro3", OK, "http://www.asrock.com/mb/overview.asp?Model=880G%20Pro3", NULL), B("ASRock", "890GX Extreme3", OK, "http://www.asrock.com/mb/overview.asp?Model=890GX%20Extreme3", NULL), @@ -535,6 +539,7 @@ B("ASRock", "A780FullHD", OK, "http://www.asrock.com/mb/overview.asp?Model=A780FullHD", "While flashrom is working correctly, there might be problems with the firmware images themselves. Please see http://www.flashrom.org/pipermail/flashrom/2012-July/009600.html for details."), B("ASRock", "ALiveNF6G-DVI", OK, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL), B("ASRock", "AM2NF6G-VSTA", OK, "http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL), + B("ASRock", "E350M1/USB3", OK, "http://www.asrock.com/mb/overview.asp?model=e350m1/usb3", NULL), B("ASRock", "ConRoeXFire-eSATA2", OK, "http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL), B("ASRock", "H61M-ITX", BAD, "http://www.asrock.com/mb/overview.asp?Model=H61M-ITX", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASRock", "H67M", BAD, "http://www.asrock.com/mb/overview.asp?Model=H67M", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), @@ -636,6 +641,7 @@ B("ASUS", "P5A", OK, NULL, NULL), B("ASUS", "P5B", OK, NULL, NULL), B("ASUS", "P5B-Deluxe", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/", NULL), + B("ASUS", "P5B-VM", OK, NULL, NULL), B("ASUS", "P5BV-M", BAD, NULL, "Reported by Bernhard M. Wiedemann <bernhard(a)uml12d.zq1.de> to flashrom(a)coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."), B("ASUS", "P5BV-R", OK, "http://www.asus.com/Server_Workstation/Servers/RS120E5PA2/", "Used in RS120-E5/PA2 servers."), B("ASUS", "P5GC-MX/1333", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/", NULL), @@ -684,6 +690,7 @@ B("ASUS", "P8Z68-V PRO", BAD, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8Z68-V PRO/GEN3", OK, "http://www.asus.com/Motherboards/Intel_Socket_1155/P8Z68V_PROGEN3/", "Warning: MAC address of LOM is stored at 0x1000 - 0x1005 of the image."), B("ASUS", "SABERTOOTH 990FX", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/SABERTOOTH_990FX/", NULL), + B("ASUS", "SABERTOOTH 990FX R2.0", OK, "http://www.asus.com/Motherboards/AMD_AM3Plus/SABERTOOTH_990FX_R20/", NULL), B("ASUS", "CUSL2-C", OK, NULL, "The image provided by ASUS is only 256 kB big and has to be written to the upper 256 kB of the 512 kB chip."), B("ASUS", "TUSL2-C", NT, "http://support.asus.com/download.aspx?SLanguage=en&p=1&s=4&m=TUSL2-C&os=&ha…", "Untested board enable."), B("ASUS", "Z8NA-D6C", OK, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL), @@ -691,6 +698,7 @@ B("Bachmann", "OT200", OK, "http://www.bachmann.info/produkte/bedien-und-beobachtungsgeraete/operator-t…", NULL), B("BCOM", "WinNET100", OK, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."), B("Bifferos", "Bifferboard", OK, "http://bifferos.co.uk/", NULL), + B("Biostar", "H61MGC", BAD, NULL, "Probing works (Eon EN25Q32(A/B), 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Biostar", "H61MU3", BAD, NULL, "Probing works (Eon EN25Q32(A/B), 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Biostar", "M6TBA", BAD, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), B("Biostar", "M7NCD Pro", OK, "http://www.biostar.com.tw/app/en/mb/introduction.php?S_ID=260", NULL), @@ -703,6 +711,7 @@ B("Boser", "HS-6637", BAD, "http://www.boser.com.tw/manual/HS-62376637v3.4.pdf", "Reported by Mark Robinson <mark(a)zl2tod.net> to flashrom(a)coreboot.org, no public archive. Missing board enable and/or F29C51002T unlocking. May work now."), B("Congatec", "conga-X852", OK, "http://www.congatec.com/single_news+M57715f6263d.html?&L=1", NULL), B("Dell", "Inspiron 580", BAD, "http://support.dell.com/support/edocs/systems/insp580/en/index.htm", "Probing works (Macronix MX25L6405, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), + B("Dell", "OptiPlex 7010", BAD, NULL, "Mainboard model is 0KRC95. Probing works (Hardware Sequencing 4 + 8MB), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), B("Dell", "OptiPlex GX1", OK, "http://support.dell.com/support/edocs/systems/ban_gx1/en/index.htm", NULL), B("Dell", "PowerEdge 1850", OK, "http://support.dell.com/support/edocs/systems/pe1850/en/index.htm", NULL), B("Dell", "PowerEdge C6220", BAD, NULL, "Mainboard model is 0HYFFG. Probing works (Macronix MX25L6405, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked (and there are even overlapping PRs)."), @@ -730,6 +739,7 @@ B("EPoX", "EP-8RDA3+", OK, "http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL), B("EPoX", "EP-9NPA7I", OK, "http://www.epox.com/product.asp?ID=EP-9NPA7I", NULL), B("EPoX", "EP-BX3", OK, "http://www.epox.com/product.asp?ID=EP-BX3", NULL), + B("EVGA", "122-CK-NF68", OK, NULL, NULL), B("EVGA", "132-CK-NF78", OK, "http://www.evga.com/articles/385.asp", NULL), B("EVGA", "270-WS-W555-A2 (Classified SR-2)", OK, "http://www.evga.com/products/moreInfo.asp?pn=270-WS-W555-A2", NULL), B("FIC", "VA-502", BAD, "ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. Seems the PCI subsystem IDs are identical with the Tekram P6Pro-A5. May work now."), @@ -747,7 +757,6 @@ B("GIGABYTE", "GA-6IEM", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1379", NULL), B("GIGABYTE", "GA-6VXE7+", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2410", NULL), B("GIGABYTE", "GA-6ZMA", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL), - B("GIGABYTE", "GA-MA785GMT-UD2H (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3156", NULL), B("GIGABYTE", "GA-770TA-UD3", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3272", NULL), B("GIGABYTE", "GA-7DXR", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1302", NULL), B("GIGABYTE", "GA-7VT600", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL), @@ -761,6 +770,7 @@ B("GIGABYTE", "GA-945PL-S3P (rev. 6.6)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL), B("GIGABYTE", "GA-965GM-S2 (rev. 2.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL), B("GIGABYTE", "GA-965P-DS4", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL), + B("GIGABYTE", "GA-A75M-UD2H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3928", NULL), B("GIGABYTE", "GA-EP31-DS3L (rev. 2.1)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL), B("GIGABYTE", "GA-EP35-DS3L", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL), B("GIGABYTE", "GA-G41MT-S2PT", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3960", NULL), @@ -780,6 +790,7 @@ B("GIGABYTE", "GA-MA770-UD3 (rev. 2.1)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3302", NULL), B("GIGABYTE", "GA-MA770T-UD3P", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3096", NULL), B("GIGABYTE", "GA-MA780G-UD3H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3004", NULL), + B("GIGABYTE", "GA-MA785GMT-UD2H (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3156", NULL), B("GIGABYTE", "GA-MA78G-DS3H (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2800", NULL), B("GIGABYTE", "GA-MA78GM-S2H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2758", NULL), /* TODO: Rev. 1.BAD, 1.OK, or 2.x? */ B("GIGABYTE", "GA-MA78GPM-DS2H", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=2859", NULL), @@ -788,8 +799,8 @@ B("GIGABYTE", "GA-MA790XT-UD4P (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3010", NULL), B("GIGABYTE", "GA-P55A-UD4 (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL), B("GIGABYTE", "GA-P67A-UD3P", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL), + B("GIGABYTE", "GA-X58A-UD3R (rev. 2.0)", OK, NULL, NULL), B("GIGABYTE", "GA-X58A-UD7 (rev. 2.0)", OK, NULL, NULL), - B("GIGABYTE", "GA-X58A-UDR3 (rev. 2.0)", OK, NULL, NULL), B("GIGABYTE", "GA-X79-UD5", OK, NULL, NULL), B("GIGABYTE", "GA-Z68MX-UD2H-B (rev. 1.3)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL), B("GIGABYTE", "GA-Z68XP-UD3 (rev. 1.0)", OK, "http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL), @@ -813,11 +824,13 @@ B("Intel", "D201GLY", OK, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL), B("Intel", "D425KT", BAD, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/de…", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"), B("Intel", "D865GLC", BAD, NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"), + B("Intel", "D945GCNL", OK, NULL, NULL), B("Intel", "DG45ID", BAD, "http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.h…", "Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."), B("Intel", "DQ965GF", BAD, NULL, "Probing enables Hardware Sequencing (behind that hides a SST SST25VF016B, 2048 kB). Parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked (and the platform data region seems to be bogus)."), B("Intel", "DG965OT", BAD, NULL, "Probing enables Hardware Sequencing (behind that hides a SST SST25VF080B, 1024 kB). Parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked (and the platform data region seems to be bogus)."), B("Intel", "DH61AG ", BAD, NULL, "H61 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2012-June/009417.html"), B("Intel", "DH67CF", BAD, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"), + B("Intel", "DH67CL", BAD, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2012-November/010112.html"), B("Intel", "DN2800MT (Marshalltown)", BAD, NULL, "BIOS locked via BIOS_CNTL."), B("Intel", "EP80759", OK, NULL, NULL), B("Intel", "Foxhollow", OK, NULL, "Intel reference board."), @@ -865,6 +878,7 @@ B("MSI", "MS-7309 (K9N6PGM2-V2)", OK, "http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL), B("MSI", "MS-7312 (K9MM-V)", OK, "http://www.msi.com/product/mb/K9MM-V.html", NULL), B("MSI", "MS-7345 (P35 Neo2-FIR)", OK, "http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL), + B("MSI", "MS-7357 (G33M)", OK, "http://www.msi.com/product/mb/G33M.html", NULL), B("MSI", "MS-7368 (K9AG Neo2-Digital)", OK, "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL), B("MSI", "MS-7369 (K9N Neo V2)", OK, "http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL), B("MSI", "MS-7376 (K9A2 Platinum V1)", OK, "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL), @@ -903,6 +917,7 @@ B("Shuttle", "AK38N", OK, "http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/", NULL), B("Shuttle", "AV11V30", OK, NULL, NULL), B("Shuttle", "AV18E2", OK, "http://www.shuttle.eu/_archive/older/de/av18.htm", NULL), + B("Shuttle", "FB61", OK, "http://www.shuttle.eu/_archive/older/en/fb61.htm#mainboardfb6", "Used in SB61G2 systems."), B("Shuttle", "FD37", OK, "http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL), B("Shuttle", "FH67", OK, "http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL), B("Shuttle", "FN25", OK, "http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=", NULL), @@ -931,6 +946,8 @@ B("Supermicro", "X8SIE(-F)", BAD, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI…", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."), B("Supermicro", "X8STi", OK, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL), B("Supermicro", "X9DR3-F", BAD, "http://www.supermicro.com/products/motherboard/xeon/c600/x9dr3-f.cfm", "Probing works (Numonyx N25Q128 (supported by SFDP only atm), 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), + B("Supermicro", "X9DRT-HF+", BAD, NULL, "Probing works (Numonyx N25Q128 (supported by SFDP only atm), 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked; SMM protection enabled."), + B("Supermicro", "X9DRW", BAD, NULL, "Probing works (Numonyx N25Q128 (supported by SFDP only atm), 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Supermicro", "X9QRi-F+", BAD, "http://www.supermicro.com/products/motherboard/Xeon/C600/X9QRi-F_.cfm", "Probing works (Macronix MX25L12805, 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked; SMM protection enabled."), B("Supermicro", "X9SCA-F", BAD, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Supermicro", "X9SCL", BAD, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), @@ -957,6 +974,7 @@ B("Tyan", "S2933 (Thunder n3600S)", OK, "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=478&SKU=600000063", NULL), B("Tyan", "S3095 (Tomcat i945GM)", OK, "http://www.tyan.com/product_board_detail.aspx?pid=181", NULL), B("Tyan", "S3992 (Thunder h2000M)", OK, "http://tyan.com/product_board_detail.aspx?pid=235", NULL), + B("Tyan", "S4882 (Thunder K8QS Pro)", OK, "http://www.tyan.com/archive/products/html/thunderk8qspro.html", NULL), B("Tyan", "S5180 (Toledo i965R)", OK, "http://www.tyan.com/product_board_detail.aspx?pid=456", NULL), B("Tyan", "S5191 (Toledo i3000R)", OK, "http://www.tyan.com/product_board_detail.aspx?pid=343", NULL), B("Tyan", "S5197 (Toledo i3010W)", OK, "http://www.tyan.com/product_board_detail.aspx?pid=349", NULL), @@ -1008,6 +1026,8 @@ B("Dell", "Latitude CPi A366XT", BAD, "http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop immediately powers off if you try to hot-swap the chip. It's not yet tested if write/erase would work on this laptop."), B("Dell", "Vostro 3700", BAD, NULL, "Locked ME, see http://www.flashrom.org/pipermail/flashrom/2012-May/009197.html."), B("Dell", "Latitude E6520", BAD, NULL, "Locked ME, see http://www.flashrom.org/pipermail/flashrom/2012-June/009420.html."), + B("Elitegroup", "A928", OK, NULL, "Bootsector is locked and needs to be skipped with a layout file (writeable address range is 00000000:0003bfff"), + B("HP/Compaq", "EliteBook 8560p", BAD, NULL, "SPI lock down, SMM protection, PR in BIOS region, read-only descriptor, locked ME region."), B("HP/Compaq", "nx9005", BAD, "http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"), B("HP/Compaq", "nx9010", BAD, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us…", "Hangs upon '''flashrom -V''' (needs hard power-cycle then)."), B("IBM/Lenovo", "Thinkpad T40p", BAD, "http://www.thinkwiki.org/wiki/Category:T40p", NULL), Modified: trunk/serprog.c ============================================================================== --- trunk/serprog.c Sun Dec 30 02:23:17 2012 (r1639) +++ trunk/serprog.c Tue Jan 1 01:06:51 2013 (r1640) @@ -223,7 +223,7 @@ { if ((sp_check_avail_automatic) && (sp_check_commandavail(cmd) == 0)) { msg_pdbg("Warning: Automatic command availability check failed " - "for cmd 0x%x - won't execute cmd\n", cmd); + "for cmd 0x%02x - won't execute cmd\n", cmd); return 1; } return 0; @@ -522,6 +522,7 @@ f_spi_req = strtol(spispeed, &f_spi_suffix, 0); if (errno != 0 || spispeed == f_spi_suffix) { msg_perr("Error: Could not convert 'spispeed'.\n"); + free(spispeed); return 1; } if (strlen(f_spi_suffix) == 1) { @@ -531,10 +532,12 @@ f_spi_req *= 1000; else { msg_perr("Error: Garbage following 'spispeed' value.\n"); + free(spispeed); return 1; } } else if (strlen(f_spi_suffix) > 1) { msg_perr("Error: Garbage following 'spispeed' value.\n"); + free(spispeed); return 1; }

1 0

Logs for Asus P5B-VM
by user 31 Dec '12

31 Dec '12

Logs for Asus P5B-VM.

2 1

[PATCH] fixup! Add pci_init_common() to unify PCI init.
by Stefan Tauner 31 Dec '12

31 Dec '12

oops. forgot to save after renaming the method :) Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- pcidev.c | 4 ++-- programmer.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/pcidev.c b/pcidev.c index 7f1f243..a5a7088 100644 --- a/pcidev.c +++ b/pcidev.c @@ -162,7 +162,7 @@ static int pcidev_shutdown(void *data) return 0; } -int pcidev_init_common(void) +int pci_init_common(void) { pacc = pci_alloc(); /* Get the pci_access structure */ pci_init(pacc); /* Initialize the PCI library */ @@ -182,7 +182,7 @@ uintptr_t pcidev_init(int bar, const struct dev_entry *devs) int i; uintptr_t addr = 0, curaddr = 0; - if(pcidev_init_common() != 0) + if(pci_init_common() != 0) return 1; pci_filter_init(pacc, &filter); diff --git a/programmer.h b/programmer.h index 5cbf289..77b78bd 100644 --- a/programmer.h +++ b/programmer.h @@ -238,7 +238,7 @@ void internal_delay(int usecs); extern uint32_t io_base_addr; extern struct pci_access *pacc; extern struct pci_dev *pcidev_dev; -int pcidev_init_common(void); +int pci_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); uintptr_t pcidev_init(int bar, const struct dev_entry *devs); /* rpci_write_* are reversible writes. The original PCI config space register -- Kind regards, Stefan Tauner

1 0

[PATCH 4/4] Allow physmap_common() to round address ranges to page boundaries.
by Stefan Tauner 31 Dec '12

31 Dec '12

Automatically round address ranges requested from physmap_autocleanup() to page boundaries. Other physmap() variants were not changed so this is safe regarding unmapping. This patch also changes the display width of all addresses in physmap.c to 16 hex characters. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- physmap.c | 54 +++++++++++++++++++++++++++++++++++------------------- 1 file changed, 35 insertions(+), 19 deletions(-) diff --git a/physmap.c b/physmap.c index a9445d5..e6d9a30 100644 --- a/physmap.c +++ b/physmap.c @@ -20,6 +20,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <inttypes.h> #include <unistd.h> #include <stdbool.h> #include <stdio.h> @@ -215,6 +216,27 @@ void physunmap(void *virt_addr, size_t len) } #endif +/* Round start to nearest page boundary below and set len so that the resulting + * address range ends at the lowest possible page boundary where the original + * address range is still entirely contained. It returns the difference between + * the rounded start address and the original start address. */ +static unsigned long round_to_page_boundaries(unsigned long *start, size_t *len) +{ + unsigned long page_size = getpagesize(); + unsigned long page_mask = ~(page_size-1); + unsigned long end = *start + *len; + unsigned long old_start = *start; + msg_gspew("page_size=%lu\n", page_size); + msg_gspew("pre-rounding: start=0x%016" PRIx64 ", len=0x%0zx, end=0x%016" PRIx64 "\n", + *start, *len, end); + *start = *start & page_mask; + end = (end + page_size - 1) & page_mask; + *len = end - *start; + msg_gspew("post-rounding: start=0x%016" PRIx64 ", len=0x%0zx, end=0x%016" PRIx64 "\n", + *start, *len, *start + *len); + return old_start - *start; +} + struct physmap_stutdown_data { void *addr; size_t len; @@ -233,25 +255,18 @@ static int physmap_shutdown(void *data) } static void *physmap_common(const char *descr, unsigned long phys_addr, size_t len, bool mayfail, - bool readonly, bool autocleanup) + bool readonly, bool autocleanup, bool round) { void *virt_addr; + unsigned long offset = 0; if (len == 0) { - msg_pspew("Not mapping %s, zero size at 0x%08lx.\n", - descr, phys_addr); + msg_pspew("Not mapping %s, zero size at 0x%016" PRIx64 ".\n", descr, phys_addr); return ERROR_PTR; } - if ((getpagesize() - 1) & len) { - msg_perr("Mapping %s at 0x%08lx, unaligned size 0x%lx.\n", - descr, phys_addr, (unsigned long)len); - } - - if ((getpagesize() - 1) & phys_addr) { - msg_perr("Mapping %s, 0x%lx bytes at unaligned 0x%08lx.\n", - descr, (unsigned long)len, phys_addr); - } + if (round) + offset = round_to_page_boundaries(&phys_addr, &len); if (readonly) virt_addr = sys_physmap_ro_cached(phys_addr, len); @@ -261,8 +276,7 @@ static void *physmap_common(const char *descr, unsigned long phys_addr, size_t l if (ERROR_PTR == virt_addr) { if (NULL == descr) descr = "memory"; - msg_perr("Error accessing %s, 0x%lx bytes at 0x%08lx\n", descr, - (unsigned long)len, phys_addr); + msg_perr("Error accessing %s, 0x%0zx bytes at 0x%016" PRIx64 "\n", descr, len, phys_addr); perror(MEM_DEV " mmap failed"); #ifdef __linux__ if (EINVAL == errno) { @@ -277,7 +291,9 @@ static void *physmap_common(const char *descr, unsigned long phys_addr, size_t l "and reboot, or reboot into\n" "single user mode.\n"); #endif - if (!mayfail) + if (mayfail) + return ERROR_PTR; + else exit(3); } @@ -296,7 +312,7 @@ static void *physmap_common(const char *descr, unsigned long phys_addr, size_t l } } - return virt_addr; + return virt_addr + offset; unmap_out: physunmap(virt_addr, len); return ERROR_PTR; @@ -304,17 +320,17 @@ unmap_out: void *physmap(const char *descr, unsigned long phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, false, false, false); + return physmap_common(descr, phys_addr, len, false, false, false, false); } void *physmap_autocleanup(const char *descr, unsigned long phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, false, false, true); + return physmap_common(descr, phys_addr, len, false, false, true, true); } void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, true, true, false); + return physmap_common(descr, phys_addr, len, true, true, false, false); } #if defined(__i386__) || defined(__x86_64__) -- Kind regards, Stefan Tauner

1 0

[PATCH 3/4] Automatically unmap physmap()s.
by Stefan Tauner 31 Dec '12

31 Dec '12

Similarly to the previous PCI self-clean up patch this one allows to get rid of a huge number of programmer shutdown functions and makes introducing bugs harder. It adds a new function physmap_autocleanup() that takes care of unmapping at shutdown. Callers are changed where it makes sense. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipset_enable.c | 12 +++++++----- drkaiser.c | 12 ++---------- gfxnvidia.c | 11 ++--------- ichspi.c | 4 +++- it85spi.c | 3 +++ mcp6x_spi.c | 15 +++++---------- nicintel.c | 22 +++------------------- nicintel_spi.c | 10 +++------- ogp_spi.c | 11 ++--------- physmap.c | 54 ++++++++++++++++++++++++++++++++++++++++++++---------- programmer.h | 1 + satamv.c | 11 +---------- satasii.c | 14 ++++---------- sb600spi.c | 6 ++++-- 14 files changed, 84 insertions(+), 102 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 267008c..8bce1a3 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -497,7 +497,9 @@ static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) msg_pdbg("\nRoot Complex Register Block address = 0x%x\n", tmp); /* Map RCBA to virtual memory */ - rcrb = physmap("ICH RCRB", tmp, 0x4000); + rcrb = physmap_autocleanup("ICH RCRB", tmp, 0x4000); + if (rcrb == ERROR_PTR) + return 1; /* Test Boot BIOS Strap Status */ bnt = mmio_readl(rcrb + 0x3410); @@ -568,7 +570,9 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, msg_pdbg("Root Complex Register Block address = 0x%x\n", tmp); /* Map RCBA to virtual memory */ - rcrb = physmap("ICH RCRB", tmp, 0x4000); + rcrb = physmap_autocleanup("ICH RCRB", tmp, 0x4000); + if (rcrb == ERROR_PTR) + return 1; gcs = mmio_readl(rcrb + 0x3410); msg_pdbg("GCS = 0x%x: ", gcs); @@ -721,10 +725,8 @@ static int enable_flash_vt_vx(struct pci_dev *dev, const char *name) case 0x8410: /* VX900 */ mmio_base = pci_read_long(dev, 0xbc) << 8; mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); - if (mmio_base_physmapped == ERROR_PTR) { - physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + if (mmio_base_physmapped == ERROR_PTR) return ERROR_FATAL; - } /* Offset 0 - Bit 0 holds SPI Bus0 Enable Bit. */ spi_cntl = mmio_readl(mmio_base_physmapped) + 0x00; diff --git a/drkaiser.c b/drkaiser.c index a6eca1c..062ec73 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -56,12 +56,6 @@ static const struct par_programmer par_programmer_drkaiser = { .chip_writen = fallback_chip_writen, }; -static int drkaiser_shutdown(void *data) -{ - physunmap(drkaiser_bar, DRKAISER_MEMMAP_SIZE); - return 0; -} - int drkaiser_init(void) { uint32_t addr; @@ -77,10 +71,8 @@ int drkaiser_init(void) PCI_MAGIC_DRKAISER_VALUE); /* Map 128kB flash memory window. */ - drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", - addr, DRKAISER_MEMMAP_SIZE); - - if (register_shutdown(drkaiser_shutdown, NULL)) + drkaiser_bar = physmap_autocleanup("Dr. Kaiser PC-Waechter flash memory", addr, DRKAISER_MEMMAP_SIZE); + if (drkaiser_bar == ERROR_PTR) return 1; max_rom_decode.parallel = 128 * 1024; diff --git a/gfxnvidia.c b/gfxnvidia.c index a994d68..ec63cf6 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -77,12 +77,6 @@ static const struct par_programmer par_programmer_gfxnvidia = { .chip_writen = fallback_chip_writen, }; -static int gfxnvidia_shutdown(void *data) -{ - physunmap(nvidia_bar, GFXNVIDIA_MEMMAP_SIZE); - return 0; -} - int gfxnvidia_init(void) { uint32_t reg32; @@ -96,9 +90,8 @@ int gfxnvidia_init(void) io_base_addr += 0x300000; msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr); - nvidia_bar = physmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); - - if (register_shutdown(gfxnvidia_shutdown, NULL)) + nvidia_bar = physmap_autocleanup("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); + if (nvidia_bar == ERROR_PTR) return 1; /* Allow access to flash interface (will disable screen). */ diff --git a/ichspi.c b/ichspi.c index fadfe62..4b52745 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1845,7 +1845,9 @@ int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) { int i; - ich_spibar = physmap("VIA SPI MMIO registers", mmio_base, 0x70); + ich_spibar = physmap_autocleanup("VIA SPI MMIO registers", mmio_base, 0x70); + if (ich_spibar == ERROR_PTR) + return ERROR_FATAL; /* Do we really need no write enable? Like the LPC one at D17F0 0x40 */ /* Not sure if it speaks all these bus protocols. */ diff --git a/it85spi.c b/it85spi.c index 0b074eb..b778436 100644 --- a/it85spi.c +++ b/it85spi.c @@ -262,6 +262,9 @@ static int it85xx_spi_common_init(struct superio s) * Major TODO here, and it will be a lot of work. */ base = (chipaddr)physmap("it85 communication", 0xFFFFF000, 0x1000); + if (base == ERROR_PTR) + return 1; + msg_pdbg("%s():%d base=0x%08x\n", __func__, __LINE__, (unsigned int)base); ce_high = (unsigned char *)(base + 0xE00); /* 0xFFFFFE00 */ diff --git a/mcp6x_spi.c b/mcp6x_spi.c index ac40557..0c519eb 100644 --- a/mcp6x_spi.c +++ b/mcp6x_spi.c @@ -135,25 +135,20 @@ int mcp6x_spi_init(int want_spi) /* Accessing a NULL pointer BAR is evil. Don't do it. */ if (!mcp6x_spibaraddr && want_spi) { - msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR " - "is invalid.\n"); + msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR is invalid.\n"); return 1; } else if (!mcp6x_spibaraddr && !want_spi) { msg_pdbg("MCP SPI is not used.\n"); return 0; } else if (mcp6x_spibaraddr && !want_spi) { - msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently" - " doesn't have SPI enabled.\n"); + msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled.\n"); /* FIXME: Should we enable SPI anyway? */ return 0; } /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ - mcp6x_spibar = physmap("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); - -#if 0 - /* FIXME: Run the physunmap in a shutdown function. */ - physunmap(mcp6x_spibar, 0x544); -#endif + mcp6x_spibar = physmap_autocleanup("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); + if (mcp6x_spibar == ERROR_PTR) + return 1; status = mmio_readw(mcp6x_spibar + 0x530); msg_pdbg("SPI control is 0x%04x, req=%i, gnt=%i\n", diff --git a/nicintel.c b/nicintel.c index 8481915..5463af2 100644 --- a/nicintel.c +++ b/nicintel.c @@ -59,13 +59,6 @@ static const struct par_programmer par_programmer_nicintel = { .chip_writen = fallback_chip_writen, }; -static int nicintel_shutdown(void *data) -{ - physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); - physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); - return 0; -} - int nicintel_init(void) { uintptr_t addr; @@ -81,19 +74,15 @@ int nicintel_init(void) */ addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel); - nicintel_bar = physmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); + nicintel_bar = physmap_autocleanup("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); if (nicintel_bar == ERROR_PTR) - goto error_out_unmap; + return 1; /* FIXME: Using pcidev_dev _will_ cause pretty explosions in the future. */ addr = pcidev_readbar(pcidev_dev, PCI_BASE_ADDRESS_0); /* FIXME: This is not an aligned mapping. Use 4k? */ - nicintel_control_bar = physmap("Intel NIC control/status reg", - addr, NICINTEL_CONTROL_MEMMAP_SIZE); + nicintel_control_bar = physmap_autocleanup("Intel NIC control/status reg", addr, NICINTEL_CONTROL_MEMMAP_SIZE); if (nicintel_control_bar == ERROR_PTR) - goto error_out; - - if (register_shutdown(nicintel_shutdown, NULL)) return 1; /* FIXME: This register is pretty undocumented in all publicly available @@ -111,11 +100,6 @@ int nicintel_init(void) register_par_programmer(&par_programmer_nicintel, BUS_PARALLEL); return 0; - -error_out_unmap: - physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); -error_out: - return 1; } static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val, diff --git a/nicintel_spi.c b/nicintel_spi.c index f61c2b1..8630f3f 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -151,16 +151,12 @@ static int nicintel_spi_shutdown(void *data) { uint32_t tmp; - /* Disable writes manually. See the comment about EECD in - * nicintel_spi_init() for details. - */ + /* Disable writes manually. See the comment about EECD in nicintel_spi_init() for details. */ tmp = pci_mmio_readl(nicintel_spibar + EECD); tmp &= ~FLASH_WRITES_ENABLED; tmp |= FLASH_WRITES_DISABLED; pci_mmio_writel(tmp, nicintel_spibar + EECD); - physunmap(nicintel_spibar, MEMMAP_SIZE); - return 0; } @@ -174,8 +170,8 @@ int nicintel_spi_init(void) /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); - nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", - io_base_addr, MEMMAP_SIZE); + nicintel_spibar = physmap_autocleanup("Intel Gigabit NIC w/ SPI flash", io_base_addr, MEMMAP_SIZE); + /* Automatic restore of EECD on shutdown is not possible because EECD * does not only contain FLASH_WRITES_DISABLED|FLASH_WRITES_ENABLED, * but other bits with side effects as well. Those other bits must be diff --git a/ogp_spi.c b/ogp_spi.c index 6fb1a77..d66b2ef 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -97,12 +97,6 @@ static const struct bitbang_spi_master bitbang_spi_master_ogp = { .half_period = 0, }; -static int ogp_spi_shutdown(void *data) -{ - physunmap(ogp_spibar, 4096); - return 0; -} - int ogp_spi_init(void) { char *type; @@ -133,9 +127,8 @@ int ogp_spi_init(void) io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, ogp_spi); - ogp_spibar = physmap("OGP registers", io_base_addr, 4096); - - if (register_shutdown(ogp_spi_shutdown, NULL)) + ogp_spibar = physmap_autocleanup("OGP registers", io_base_addr, 4096); + if (ogp_spibar == ERROR_PTR) return 1; if (bitbang_spi_init(&bitbang_spi_master_ogp)) diff --git a/physmap.c b/physmap.c index 5aa9874..a9445d5 100644 --- a/physmap.c +++ b/physmap.c @@ -21,6 +21,7 @@ */ #include <unistd.h> +#include <stdbool.h> #include <stdio.h> #include <stdlib.h> #include <string.h> @@ -214,13 +215,25 @@ void physunmap(void *virt_addr, size_t len) } #endif -#define PHYSMAP_NOFAIL 0 -#define PHYSMAP_MAYFAIL 1 -#define PHYSMAP_RW 0 -#define PHYSMAP_RO 1 +struct physmap_stutdown_data { + void *addr; + size_t len; +}; -static void *physmap_common(const char *descr, unsigned long phys_addr, - size_t len, int mayfail, int readonly) +static int physmap_shutdown(void *data) +{ + if (data == NULL) { + msg_perr("%s: tried to shutdown without valid data!\n", __func__); + return 1; + } + struct physmap_stutdown_data *d = data; + physunmap(d->addr, d->len); + free(data); + return 0; +} + +static void *physmap_common(const char *descr, unsigned long phys_addr, size_t len, bool mayfail, + bool readonly, bool autocleanup) { void *virt_addr; @@ -268,19 +281,40 @@ static void *physmap_common(const char *descr, unsigned long phys_addr, exit(3); } + if (autocleanup) { + struct physmap_stutdown_data *d = malloc(sizeof(struct physmap_stutdown_data)); + if (d == NULL) { + msg_perr("%s: Out of memory!\n", __func__); + goto unmap_out; + } + + d->addr = virt_addr; + d->len = len; + if (register_shutdown(physmap_shutdown, d) != 0) { + msg_perr("%s: Could not register shutdown function!\n", __func__); + goto unmap_out; + } + } + return virt_addr; +unmap_out: + physunmap(virt_addr, len); + return ERROR_PTR; } void *physmap(const char *descr, unsigned long phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, PHYSMAP_NOFAIL, - PHYSMAP_RW); + return physmap_common(descr, phys_addr, len, false, false, false); +} + +void *physmap_autocleanup(const char *descr, unsigned long phys_addr, size_t len) +{ + return physmap_common(descr, phys_addr, len, false, false, true); } void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, PHYSMAP_MAYFAIL, - PHYSMAP_RO); + return physmap_common(descr, phys_addr, len, true, true, false); } #if defined(__i386__) || defined(__x86_64__) diff --git a/programmer.h b/programmer.h index 7703ec1..5cbf289 100644 --- a/programmer.h +++ b/programmer.h @@ -272,6 +272,7 @@ int processor_flash_enable(void); /* physmap.c */ void *physmap(const char *descr, unsigned long phys_addr, size_t len); +void *physmap_autocleanup(const char *descr, unsigned long phys_addr, size_t len); void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len); void physunmap(void *virt_addr, size_t len); #if CONFIG_INTERNAL == 1 diff --git a/satamv.c b/satamv.c index 46a0e2d..726dd5a 100644 --- a/satamv.c +++ b/satamv.c @@ -57,12 +57,6 @@ static const struct par_programmer par_programmer_satamv = { .chip_writen = fallback_chip_writen, }; -static int satamv_shutdown(void *data) -{ - physunmap(mv_bar, 0x20000); - return 0; -} - /* * Random notes: * FCE# Flash Chip Enable @@ -93,13 +87,10 @@ int satamv_init(void) */ addr = pcidev_init(PCI_BASE_ADDRESS_0, satas_mv); - mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); + mv_bar = physmap_autocleanup("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) return 1; - if (register_shutdown(satamv_shutdown, NULL)) - return 1; - tmp = pci_mmio_readl(mv_bar + FLASH_PARAM); msg_pspew("Flash Parameters:\n"); msg_pspew("TurnOff=0x%01x\n", (tmp >> 0) & 0x7); diff --git a/satasii.c b/satasii.c index 730c420..36f4cd1 100644 --- a/satasii.c +++ b/satasii.c @@ -54,12 +54,6 @@ static const struct par_programmer par_programmer_satasii = { .chip_writen = fallback_chip_writen, }; -static int satasii_shutdown(void *data) -{ - physunmap(sii_bar, SATASII_MEMMAP_SIZE); - return 0; -} - static uint32_t satasii_wait_done(void) { uint32_t ctrl_reg; @@ -94,15 +88,15 @@ int satasii_init(void) reg_offset = 0x50; } - sii_bar = physmap("SATA SiI registers", addr, SATASII_MEMMAP_SIZE) + reg_offset; + sii_bar = physmap_autocleanup("SATA SiI registers", addr, SATASII_MEMMAP_SIZE); + if (sii_bar == ERROR_PTR) + return 1; + sii_bar += reg_offset; /* Check if ROM cycle are OK. */ if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) msg_pinfo("Warning: Flash seems unconnected.\n"); - if (register_shutdown(satasii_shutdown, NULL)) - return 1; - register_par_programmer(&par_programmer_satasii, BUS_PARALLEL); return 0; diff --git a/sb600spi.c b/sb600spi.c index fe60aa9..7888bb9 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -224,8 +224,10 @@ int sb600_probe_spi(struct pci_dev *dev) return 0; /* Physical memory has to be mapped at page (4k) boundaries. */ - sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000, - 0x1000); + sb600_spibar = physmap_autocleanup("SB600 SPI registers", tmp & 0xfffff000, 0x1000); + if (sb600_spibar == ERROR_PTR) + return 1; + /* The low bits of the SPI base address are used as offset into * the mapped page. */ -- Kind regards, Stefan Tauner

1 0

[PATCH 2/4] Add pci_init_common() to unify PCI init.
by Stefan Tauner 31 Dec '12

31 Dec '12

Previously the internal programmer used its own code to initialize pcilib. This patch extracts the common code from the internal programmer and pcidev_init() into pcidev_init_common(). This fixes the non-existent PCI cleanup of the internal programmer. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- internal.c | 6 ++---- pcidev.c | 15 +++++++++++---- programmer.h | 1 + 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/internal.c b/internal.c index eda4d59..9b34715 100644 --- a/internal.c +++ b/internal.c @@ -245,10 +245,8 @@ int internal_init(void) internal_buses_supported = BUS_NONSPI; /* Initialize PCI access for flash enables */ - pacc = pci_alloc(); /* Get the pci_access structure */ - /* Set all options you want -- here we stick with the defaults */ - pci_init(pacc); /* Initialize the PCI library */ - pci_scan_bus(pacc); /* We want to get the list of devices */ + if(pci_init_common() != 0) + return 1; if (processor_flash_enable()) { msg_perr("Processor detection/init failed.\n" diff --git a/pcidev.c b/pcidev.c index 37bcc22..7f1f243 100644 --- a/pcidev.c +++ b/pcidev.c @@ -162,6 +162,16 @@ static int pcidev_shutdown(void *data) return 0; } +int pcidev_init_common(void) +{ + pacc = pci_alloc(); /* Get the pci_access structure */ + pci_init(pacc); /* Initialize the PCI library */ + if (register_shutdown(pcidev_shutdown, NULL)) + return 1; + pci_scan_bus(pacc); /* We want to get the list of devices */ + return 0; +} + uintptr_t pcidev_init(int bar, const struct dev_entry *devs) { struct pci_dev *dev; @@ -172,11 +182,8 @@ uintptr_t pcidev_init(int bar, const struct dev_entry *devs) int i; uintptr_t addr = 0, curaddr = 0; - pacc = pci_alloc(); /* Get the pci_access structure */ - pci_init(pacc); /* Initialize the PCI library */ - if (register_shutdown(pcidev_shutdown, NULL)) + if(pcidev_init_common() != 0) return 1; - pci_scan_bus(pacc); /* We want to get the list of devices */ pci_filter_init(pacc, &filter); /* Filter by bb:dd.f (if supplied by the user). */ diff --git a/programmer.h b/programmer.h index 8de42bc..7703ec1 100644 --- a/programmer.h +++ b/programmer.h @@ -238,6 +238,7 @@ void internal_delay(int usecs); extern uint32_t io_base_addr; extern struct pci_access *pacc; extern struct pci_dev *pcidev_dev; +int pcidev_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); uintptr_t pcidev_init(int bar, const struct dev_entry *devs); /* rpci_write_* are reversible writes. The original PCI config space register -- Kind regards, Stefan Tauner

1 0

[PATCH 1/4] Let pcidev clean itself up.
by Stefan Tauner 31 Dec '12

31 Dec '12

We got a nice shutdown function registration infrastructure, but did not use it very wisely. Instead we added shutdown functions to a myriad of programmers unnecessarily. In this patch we get rid of those that do only call pci_cleanup(pacc) by adding a shutdown function the pcidev.c itself that gets registered by pcidev_init(). Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- atahpt.c | 10 ---------- drkaiser.c | 3 +-- gfxnvidia.c | 6 +----- nic3com.c | 2 +- nicintel.c | 5 +---- nicintel_spi.c | 2 +- nicrealtek.c | 7 +++++-- ogp_spi.c | 2 -- pcidev.c | 15 +++++++++++++++ satamv.c | 7 +------ satasii.c | 1 - 11 files changed, 26 insertions(+), 34 deletions(-) diff --git a/atahpt.c b/atahpt.c index 92f7deb..d19cb75 100644 --- a/atahpt.c +++ b/atahpt.c @@ -56,13 +56,6 @@ static const struct par_programmer par_programmer_atahpt = { .chip_writen = fallback_chip_writen, }; -static int atahpt_shutdown(void *data) -{ - /* Flash access is disabled automatically by PCI restore. */ - pci_cleanup(pacc); - return 0; -} - int atahpt_init(void) { uint32_t reg32; @@ -77,9 +70,6 @@ int atahpt_init(void) reg32 |= (1 << 24); rpci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32); - if (register_shutdown(atahpt_shutdown, NULL)) - return 1; - register_par_programmer(&par_programmer_atahpt, BUS_PARALLEL); return 0; diff --git a/drkaiser.c b/drkaiser.c index e461061..a6eca1c 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -59,8 +59,6 @@ static const struct par_programmer par_programmer_drkaiser = { static int drkaiser_shutdown(void *data) { physunmap(drkaiser_bar, DRKAISER_MEMMAP_SIZE); - /* Flash write is disabled automatically by PCI restore. */ - pci_cleanup(pacc); return 0; } @@ -71,6 +69,7 @@ int drkaiser_init(void) if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ addr = pcidev_init(PCI_BASE_ADDRESS_2, drkaiser_pcidev); /* Write magic register to enable flash write. */ diff --git a/gfxnvidia.c b/gfxnvidia.c index 624fd7c..a994d68 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -80,10 +80,6 @@ static const struct par_programmer par_programmer_gfxnvidia = { static int gfxnvidia_shutdown(void *data) { physunmap(nvidia_bar, GFXNVIDIA_MEMMAP_SIZE); - /* Flash interface access is disabled (and screen enabled) automatically - * by PCI restore. - */ - pci_cleanup(pacc); return 0; } @@ -94,6 +90,7 @@ int gfxnvidia_init(void) if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, gfx_nvidia); io_base_addr += 0x300000; @@ -101,7 +98,6 @@ int gfxnvidia_init(void) nvidia_bar = physmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); - /* Must be done before rpci calls. */ if (register_shutdown(gfxnvidia_shutdown, NULL)) return 1; diff --git a/nic3com.c b/nic3com.c index 05eada6..4ec6193 100644 --- a/nic3com.c +++ b/nic3com.c @@ -81,7 +81,6 @@ static int nic3com_shutdown(void *data) OUTL(internal_conf, io_base_addr + INTERNAL_CONFIG); } - pci_cleanup(pacc); return 0; } @@ -90,6 +89,7 @@ int nic3com_init(void) if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_3com); id = pcidev_dev->device_id; diff --git a/nicintel.c b/nicintel.c index d210d78..8481915 100644 --- a/nicintel.c +++ b/nicintel.c @@ -63,7 +63,6 @@ static int nicintel_shutdown(void *data) { physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); - pci_cleanup(pacc); return 0; } @@ -77,8 +76,7 @@ int nicintel_init(void) if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case - * of errors. + /* No need to check for errors, pcidev_init() will not return in case of errors. * FIXME: BAR2 is not available if the device uses the CardBus function. */ addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel); @@ -117,7 +115,6 @@ int nicintel_init(void) error_out_unmap: physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); error_out: - pci_cleanup(pacc); return 1; } diff --git a/nicintel_spi.c b/nicintel_spi.c index 325e61c..f61c2b1 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -160,7 +160,6 @@ static int nicintel_spi_shutdown(void *data) pci_mmio_writel(tmp, nicintel_spibar + EECD); physunmap(nicintel_spibar, MEMMAP_SIZE); - pci_cleanup(pacc); return 0; } @@ -172,6 +171,7 @@ int nicintel_spi_init(void) if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", diff --git a/nicrealtek.c b/nicrealtek.c index 3c3b261..0929e5d 100644 --- a/nicrealtek.c +++ b/nicrealtek.c @@ -51,22 +51,25 @@ static const struct par_programmer par_programmer_nicrealtek = { .chip_writen = fallback_chip_writen, }; +#if 0 static int nicrealtek_shutdown(void *data) { /* FIXME: We forgot to disable software access again. */ - pci_cleanup(pacc); return 0; } +#endif int nicrealtek_init(void) { if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek); - +#if 0 if (register_shutdown(nicrealtek_shutdown, NULL)) return 1; +#endif /* Beware, this ignores the vendor ID! */ switch (pcidev_dev->device_id) { diff --git a/ogp_spi.c b/ogp_spi.c index d1bb12f..6fb1a77 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -100,8 +100,6 @@ static const struct bitbang_spi_master bitbang_spi_master_ogp = { static int ogp_spi_shutdown(void *data) { physunmap(ogp_spibar, 4096); - pci_cleanup(pacc); - return 0; } diff --git a/pcidev.c b/pcidev.c index 1a26e99..37bcc22 100644 --- a/pcidev.c +++ b/pcidev.c @@ -154,6 +154,14 @@ uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) return (uintptr_t)addr; } +static int pcidev_shutdown(void *data) +{ + if (pacc != NULL) + pci_cleanup(pacc); + pcidev_dev = NULL; + return 0; +} + uintptr_t pcidev_init(int bar, const struct dev_entry *devs) { struct pci_dev *dev; @@ -166,6 +174,8 @@ uintptr_t pcidev_init(int bar, const struct dev_entry *devs) pacc = pci_alloc(); /* Get the pci_access structure */ pci_init(pacc); /* Initialize the PCI library */ + if (register_shutdown(pcidev_shutdown, NULL)) + return 1; pci_scan_bus(pacc); /* We want to get the list of devices */ pci_filter_init(pacc, &filter); @@ -244,6 +254,11 @@ struct undo_pci_write_data { int undo_pci_write(void *p) { struct undo_pci_write_data *data = p; + if (pacc == NULL) { + msg_perr("%s: Tried to undo PCI writes without a valid PCI context!\n" + "Please report a bug at flashrom(a)flashrom.org\n", __func__); + return 1; + } msg_pdbg("Restoring PCI config space for %02x:%02x:%01x reg 0x%02x\n", data->dev.bus, data->dev.dev, data->dev.func, data->reg); switch (data->type) { diff --git a/satamv.c b/satamv.c index c0c1ffa..46a0e2d 100644 --- a/satamv.c +++ b/satamv.c @@ -60,7 +60,6 @@ static const struct par_programmer par_programmer_satamv = { static int satamv_shutdown(void *data) { physunmap(mv_bar, 0x20000); - pci_cleanup(pacc); return 0; } @@ -96,7 +95,7 @@ int satamv_init(void) mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) - goto error_out; + return 1; if (register_shutdown(satamv_shutdown, NULL)) return 1; @@ -159,10 +158,6 @@ int satamv_init(void) register_par_programmer(&par_programmer_satamv, BUS_PARALLEL); return 0; - -error_out: - pci_cleanup(pacc); - return 1; } /* BAR2 (MEM) can map NVRAM and flash. We set it to flash in the init function. diff --git a/satasii.c b/satasii.c index 7b94203..730c420 100644 --- a/satasii.c +++ b/satasii.c @@ -57,7 +57,6 @@ static const struct par_programmer par_programmer_satasii = { static int satasii_shutdown(void *data) { physunmap(sii_bar, SATASII_MEMMAP_SIZE); - pci_cleanup(pacc); return 0; } -- Kind regards, Stefan Tauner

1 0

Re: [flashrom] [PATCH] automatically round address ranges requested from physmap_common to page boundaries
by Stefan Tauner 31 Dec '12

31 Dec '12

On Mon, 30 May 2011 02:45:44 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > this patch also changes the display width of all addresses in physmap.c to 16 hex characters. > > FIXME: what about unmappings? > munmap is safe. > djgpp's __dpmi_free_physical_address_mapping: unknown. > DirectHW's unmap_physical: unknown. > > FIXME: jakllsch suggested using PRIx64 instead of x, because it's more portable FIXME: in the case we can not map and 'mayfail' is true we should return ERROR_PTR instead of ERROR_PTR + diff -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 1

Re: [flashrom] 2theMax RAID 100 (HPT370)
by Roy 31 Dec '12

31 Dec '12

2012/12/28 Idwer Vollering <vidwer(a)gmail.com>: > 2012/12/27 Roy <roytam(a)gmail.com>: >> Hi all, >> >> I got a 2theMax RAID 100 card with SST MPF 39SF512 70-4C-NH 64KB ROm on >> PCB, >> flashrom segfaults at the end. > > Interesting. Can you run flashrom from GDB? > > 'gdb --args ./flashrom -p atahpt -V' > (gdb) start > (wait a little) > (gdb) bt > Sure. But isn't pcilib yells the prefix path is NULL? root@www6:~/flashrom-0.9.6.1# gdb -args ./flashrom -p atahpt GNU gdb (GDB) 7.0.1-debian Copyright (C) 2009 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html> This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "i486-linux-gnu". For bug reporting instructions, please see: <http://www.gnu.org/software/gdb/bugs/>... Reading symbols from /root/flashrom-0.9.6.1/flashrom...done. (gdb) r Starting program: /root/flashrom-0.9.6.1/flashrom -p atahpt flashrom v0.9.6.1-r1564 on Linux 2.6.32-5-686 (i686) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom(a)flashrom.org if it works for you. Please add the name of your PCI device to the subject. Thank you for your help! === No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. pcilib: Cannot open (null)/devices/0000:00:0f.0/config Program received signal SIGSEGV, Segmentation fault. 0xb7ee52ae in ?? () from /lib/i686/cmov/libc.so.6 (gdb) bt #0 0xb7ee52ae in ?? () from /lib/i686/cmov/libc.so.6 #1 0xb7ee6745 in ?? () from /lib/i686/cmov/libc.so.6 #2 0xb7ee98ad in free () from /lib/i686/cmov/libc.so.6 #3 0x0806dd5f in undo_pci_write (p=0x80a30e0) at pcidev.c:274 #4 0x08049ff2 in programmer_shutdown () at flashrom.c:367 #5 0x0804db16 in main (argc=3, argv=0xbffffd94) at cli_classic.c:521 (gdb) >> >> lspci: >> 00:0f.0 Mass storage controller [0180]: HighPoint Technologies, Inc. >> HPT366/368/370/370A/372/372N [1103:0004] (rev 03) >> Subsystem: HighPoint Technologies, Inc. HPT370 UDMA100 >> [1103:0005] >> Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- >> ParErr- >> Stepping- SERR- FastB2B- DisINTx- >> Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- >> <TAbort- <MAbort- >SERR- <PERR- INTx- >> Latency: 120 (2000ns min, 2000ns max), Cache Line Size: 32 bytes >> Interrupt: pin A routed to IRQ 18 >> Region 0: I/O ports at a800 [size=8] >> Region 1: I/O ports at a400 [size=4] >> Region 2: I/O ports at a000 [size=8] >> Region 3: I/O ports at 9800 [size=4] >> Region 4: I/O ports at 9400 [size=256] >> [virtual] Expansion ROM at 20020000 [disabled] [size=128K] >> Kernel driver in use: HPT366_IDE > > Does unloading/not loading hpt366_ide at boot time improve things? > >> 00: 03 11 04 00 05 00 00 02 03 00 80 01 08 78 00 00 >> 10: 01 a8 00 00 01 a4 00 00 01 a0 00 00 01 98 00 00 >> 20: 01 94 00 00 00 00 00 00 00 00 00 00 03 11 05 00 >> 30: 00 00 00 00 60 00 00 00 00 00 00 00 0a 01 08 08 >> 40: a7 4e 81 06 a7 4e 81 06 a7 4e 81 06 a7 4e 81 06 >> 50: 05 01 00 00 05 01 00 00 1b 00 00 23 24 00 26 00 >> 60: 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00 >> 70: 00 00 00 00 00 00 00 00 94 00 00 00 00 00 00 00 >> 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> >> flashrom v0.9.6.1-r1564 on Linux 2.6.32-5-686 (i686) >> flashrom is free software, get the source code at >> http://www.flashrom.org >> >> flashrom was built with libpci 3.1.7, GCC 4.4.5, little endian > > On which operating system is it built, segfaulting? Debian 6.0.6 i386. > >> Command line (3 args): ./flashrom -p atahpt -V >> Calibrating delay loop... OS timer resolution is 1 usecs, 230M loops per >> second, delay more than 10% too short (got 76% of expected delay), >> recalculating... 291M loops per second, 10 myus = 10 us, 100 myus = 97 >> us, >> 1000 myus = 962 us, 10000 myus = 9635 us, 4 myus = 5 us, OK. >> Initializing atahpt programmer >> Found "Highpoint HPT366/368/370/370A/372/372N" (1103:0004, BDF 00:0f.0). >> === >> This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output >> to flashrom(a)flashrom.org if it works for you. Please add the name of >> your >> PCI device to the subject. Thank you for your help! >> === >> Requested BAR is I/O >> The following protocols are supported: Parallel. >> Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT49F040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Eon EN29LV640B, 8192 kB: probe_en29lv640b: id1 0x0000, id2 >> 0x0000 >> Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0x00, id2 >> 0x00 >> Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0x00, id2 >> 0x00 >> Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 >> 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 >> 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing >> information, using default 10mS/40uS. probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing >> information, using default 10mS/40uS. probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for PMC Pm39LV512, 64 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0x00, id2 0x00, >> id1 >> parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 >> parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 >> parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0x00, id2 0x00 >> Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0x00, id2 0x00 >> Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 >> parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 >> parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, >> id1 >> parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: >> probe_jedec_common: >> id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, >> id2 >> is normal flash content >> Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: >> probe_jedec_common: >> id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, >> id2 >> is normal flash content >> Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: >> Old >> Winbond W29* probe method disabled because the probing sequence puts the >> AMIC A49LF040A in a funky state. Use 'flashrom -c >> W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with >> such a >> chip. >> Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 >> 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 >> is >> normal flash content >> Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> No EEPROM/flash device found. >> Note: flashrom can never write if the flash chip isn't found >> automatically. >> Restoring PCI config space for 00:0f:0 reg 0x58 >> pcilib: Cannot open (null)/devices/0000:00:0f.0/config >> >> HTH, >> Roy >> >> >> _______________________________________________ >> flashrom mailing list >> flashrom(a)flashrom.org >> http://www.flashrom.org/mailman/listinfo/flashrom

2 2

VIA VT6421A (HZ-006)
by Roy 31 Dec '12

31 Dec '12

Hi all, It has "HZ-006" printed on the PCB. It does have Pm39LV512-70JCB on the board, but it seems no firmware written and no boot ROM messages. lspci: 00:0f.0 RAID bus controller [0104]: VIA Technologies, Inc. VT6421 IDE RAID Controller [1106:3249] (rev 50) Subsystem: VIA Technologies, Inc. VT6421 IDE RAID Controller [1106:3249] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 Interrupt: pin A routed to IRQ 18 Region 0: I/O ports at a800 [size=16] Region 1: I/O ports at a400 [size=16] Region 2: I/O ports at a000 [size=16] Region 3: I/O ports at 9800 [size=16] Region 4: I/O ports at 9400 [size=32] Region 5: I/O ports at 9000 [size=256] [virtual] Expansion ROM at 20020000 [disabled] [size=64K] Capabilities: [e0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: sata_via 00: 06 11 49 32 07 00 90 02 50 00 04 01 00 20 00 00 10: 01 a8 00 00 01 a4 00 00 01 a0 00 00 01 98 00 00 20: 01 94 00 00 01 90 00 00 00 00 00 00 06 11 49 32 30: 00 00 00 00 e0 00 00 00 00 00 00 00 0a 01 00 00 40: 33 03 f1 44 0e af 00 00 00 00 00 03 00 00 00 00 50: 00 00 04 00 00 00 00 00 00 10 10 00 05 00 20 00 60: 00 00 ff ff 00 00 00 00 00 00 00 00 00 00 ff ff 70: 00 00 00 00 01 f0 00 00 01 00 01 00 11 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 0b f2 c9 35 10 ac c0 00 a8 a8 a8 a8 ff 00 b6 b6 b0: 0f 0f 0f 0f 34 00 00 00 00 00 20 00 00 00 00 00 c0: 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 d0: 02 01 00 00 00 00 00 00 02 01 00 00 00 00 00 00 e0: 01 00 02 00 00 00 00 00 50 01 49 32 06 11 49 32 f0: 00 00 70 00 00 00 00 00 00 00 00 00 00 00 00 00 flashrom v0.9.6.1-r1564 on Linux 2.6.32-5-686 (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.7, GCC 4.4.5, little endian Command line (3 args): ./flashrom -p atavia -V Calibrating delay loop... OS timer resolution is 1 usecs, 261M loops per second, delay more than 10% too short (got 87% of expected delay), recalculating... 296M loops per second, 10 myus = 10 us, 100 myus = 98 us, 1000 myus = 986 us, 10000 myus = 9789 us, 4 myus = 5 us, OK. Initializing atavia programmer Found "VIA VT6421A" (1106:3249, BDF 00:0f.0). === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom(a)flashrom.org if it works for you. Please add the name of your PCI device to the subject. Thank you for your help! === Requested BAR is ROM Error: No supported PCI device found. HTH, Roy

2 4

W836xx: Compaq Presario CQ60: flashrom -V
by Narcis Garcia - GiLUG 30 Dec '12

30 Dec '12

$ sudo flashrom -p internal -V flashrom v0.9.6.1-r1563 on Linux 3.5.0-21-generic (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian Command line (3 args): flashrom -p internal -V Calibrating delay loop... OS timer resolution is 1 usecs, 1661M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1017 us, 10000 myus = 10012 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Hewlett-Packard" DMI string system-product-name: "Compaq Presario CQ60 Notebook PC" DMI string system-version: "F.26" DMI string baseboard-manufacturer: "Wistron" DMI string baseboard-product-name: "3612" DMI string baseboard-version: "09.45" DMI string chassis-type: "Notebook" Laptop detected via DMI. W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: fc. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. Error: Programmer initialization failed.

1 0

[commit] r1639 - trunk
by repository service 30 Dec '12

30 Dec '12

Author: stefanct Date: Sun Dec 30 02:23:17 2012 New Revision: 1639 URL: http://flashrom.org/trac/flashrom/changeset/1639 Log: Constify parameters and globals. This makes some stuff const (partially to get a more convenient libflashrom interface). Signed-off-by: Nico Huber <nico.huber(a)secunet.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/cli_classic.c trunk/flash.h trunk/flashrom.c trunk/programmer.h Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Sat Dec 29 20:26:55 2012 (r1638) +++ trunk/cli_classic.c Sun Dec 30 02:23:17 2012 (r1639) @@ -532,7 +532,7 @@ free(layoutfile); free(pparam); /* clean up global variables */ - free(chip_to_probe); + free((char *)chip_to_probe); /* Silence! Freeing is not modifying contents. */ chip_to_probe = NULL; #ifndef STANDALONE ret |= close_logfile(); Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sat Dec 29 20:26:55 2012 (r1638) +++ trunk/flash.h Sun Dec 30 02:23:17 2012 (r1639) @@ -222,7 +222,7 @@ extern int verbose_screen; extern int verbose_logfile; extern const char flashrom_version[]; -extern char *chip_to_probe; +extern const char *chip_to_probe; void map_flash_registers(struct flashctx *flash); int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int erase_flash(struct flashctx *flash); @@ -231,7 +231,7 @@ int min(int a, int b); int max(int a, int b); void tolower_string(char *str); -char *extract_param(char **haystack, const char *needle, const char *delim); +char *extract_param(const char *const *haystack, const char *needle, const char *delim); int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len); int need_erase(uint8_t *have, uint8_t *want, unsigned int len, enum write_granularity gran); char *strcat_realloc(char *dest, const char *src); Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sat Dec 29 20:26:55 2012 (r1638) +++ trunk/flashrom.c Sun Dec 30 02:23:17 2012 (r1639) @@ -40,13 +40,13 @@ #include "hwaccess.h" const char flashrom_version[] = FLASHROM_VERSION; -char *chip_to_probe = NULL; +const char *chip_to_probe = NULL; int verbose_screen = MSG_INFO; int verbose_logfile = MSG_DEBUG2; static enum programmer programmer = PROGRAMMER_INVALID; -static char *programmer_param = NULL; +static const char *programmer_param = NULL; /* * Programmers supporting multiple buses can have differing size limits on @@ -351,7 +351,7 @@ return 0; } -int programmer_init(enum programmer prog, char *param) +int programmer_init(enum programmer prog, const char *param) { int ret; @@ -517,7 +517,7 @@ * needle and remove everything from the first occurrence of needle to the next * delimiter from haystack. */ -char *extract_param(char **haystack, const char *needle, const char *delim) +char *extract_param(const char *const *haystack, const char *needle, const char *delim) { char *param_pos, *opt_pos, *rest; char *opt = NULL; Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sat Dec 29 20:26:55 2012 (r1638) +++ trunk/programmer.h Sun Dec 30 02:23:17 2012 (r1639) @@ -122,7 +122,7 @@ extern const struct programmer_entry programmer_table[]; -int programmer_init(enum programmer prog, char *param); +int programmer_init(enum programmer prog, const char *param); int programmer_shutdown(void); enum bitbang_spi_master_type {

1 0

Re: [flashrom] [PATCH] Simplify hwaccess.c.
by Stefan Tauner 29 Dec '12

29 Dec '12

On Sun, 26 Aug 2012 20:59:25 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > Previously the code was focused on architectures which led to lots of > duplicate code and spread the information regarding differences between > the architectures accross the file. > > With this patch there is a single function header for any function and the > differentiation between architectures (and OS where needed) happens > in one place. Also, this patch adds simple defines to bundle often used arch > and os checks. A central check for unknown architectures and OSes has > been added on top. > > Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> self-acked and committed in r1638. thanks again, peter! -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[commit] r1638 - trunk
by repository service 29 Dec '12

29 Dec '12

Author: stefanct Date: Sat Dec 29 20:26:55 2012 New Revision: 1638 URL: http://flashrom.org/trac/flashrom/changeset/1638 Log: Simplify hwaccess.c. Previously the code was focused on architectures which led to lots of duplicate code and spread the information regarding differences between the architectures accross the file. With this patch there is a single function header for any function and the differentiation between architectures (and OS where needed) happens in one place for each function. Also, this patch adds simple defines to bundle often used arch and os checks. A central check for unknown architectures and OSes has been added on top. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/hwaccess.c Modified: trunk/hwaccess.c ============================================================================== --- trunk/hwaccess.c Sat Dec 29 16:04:20 2012 (r1637) +++ trunk/hwaccess.c Sat Dec 29 20:26:55 2012 (r1638) @@ -18,6 +18,20 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#define IS_X86 (defined(__i386__) || defined(__x86_64__) || defined(__amd64__)) +#define IS_MIPS (defined (__mips) || defined (__mips__) || defined (__MIPS__) || defined (mips)) +#define IS_PPC (defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__)) +#define IS_ARM (defined (__arm__) || defined (_ARM)) +#if !(IS_X86 || IS_MIPS || IS_PPC || IS_ARM) +#error Unknown architecture +#endif + +#define IS_BSD (defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) || defined(__OpenBSD__)) +#define IS_LINUX (defined(__gnu_linux__) || defined(__linux__)) +#if !(IS_BSD || IS_LINUX || defined(__DJGPP__) || defined(__LIBPAYLOAD__) || defined(__sun)) +#error "Unknown operating system" +#endif + #include <stdint.h> #include <string.h> #include <stdlib.h> @@ -32,30 +46,39 @@ #include "flash.h" #include "hwaccess.h" -#if defined(__i386__) || defined(__x86_64__) +#if IS_X86 && IS_BSD +int io_fd; +#endif -/* sync primitive is not needed because x86 uses uncached accesses - * which have a strongly ordered memory model. +/* Prevent reordering and/or merging of reads/writes to hardware. + * Such reordering and/or merging would break device accesses which depend on the exact access order. */ static inline void sync_primitive(void) { -} - -#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) -int io_fd; +/* This is needed only on PowerPC because... + * - x86 uses uncached accesses which have a strongly ordered memory model and + * - MIPS uses uncached accesses in mode 2 on /dev/mem which has also a strongly ordered memory model + * - ARM uses a strongly ordered memory model for device memories. + */ +#if IS_PPC + asm("eieio" : : : "memory"); #endif +} -int release_io_perms(void *p) +static int release_io_perms(void *p) { +#if IS_X86 #if defined(__DJGPP__) || defined(__LIBPAYLOAD__) -#else -#if defined (__sun) && (defined(__i386) || defined(__amd64)) + /* Nothing to release */ +#elif defined (__sun) sysi86(SI86V86, V86SC_IOPL, 0); -#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__) +#elif IS_BSD close(io_fd); -#else +#elif IS_LINUX iopl(0); #endif +#else +/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */ #endif return 0; } @@ -63,81 +86,32 @@ /* Get I/O permissions with automatic permission release on shutdown. */ int rget_io_perms(void) { +#if IS_X86 #if defined(__DJGPP__) || defined(__LIBPAYLOAD__) /* We have full permissions by default. */ - return 0; -#else -#if defined (__sun) && (defined(__i386) || defined(__amd64)) +#elif defined (__sun) if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { -#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__) +#elif IS_BSD if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#else +#elif IS_LINUX if (iopl(3) != 0) { #endif msg_perr("ERROR: Could not get I/O privileges (%s).\n" "You need to be root.\n", strerror(errno)); #if defined (__OpenBSD__) - msg_perr("Please set securelevel=-1 in /etc/rc.securelevel " - "and reboot, or reboot into \n"); + msg_perr("Please set securelevel=-1 in /etc/rc.securelevel and reboot, or reboot into \n"); msg_perr("single user mode.\n"); #endif return 1; } else { register_shutdown(release_io_perms, NULL); } - return 0; +#else +/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */ #endif -} - -#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) - -static inline void sync_primitive(void) -{ - /* Prevent reordering and/or merging of reads/writes to hardware. - * Such reordering and/or merging would break device accesses which - * depend on the exact access order. - */ - ___asm___ volatile ("eieio" : : : "memory"); -} - -/* PCI port I/O is not yet implemented on PowerPC. */ -int rget_io_perms(void) -{ return 0; } -#elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips) - -/* sync primitive is not needed because /dev/mem on MIPS uses uncached accesses - * in mode 2 which has a strongly ordered memory model. - */ -static inline void sync_primitive(void) -{ -} - -/* PCI port I/O is not yet implemented on MIPS. */ -int rget_io_perms(void) -{ - return 0; -} - -#elif defined (__arm__) - -static inline void sync_primitive(void) -{ -} - -int rget_io_perms(void) -{ - return 0; -} - -#else - -#error Unknown architecture - -#endif - void mmio_writeb(uint8_t val, void *addr) { *(volatile uint8_t *) addr = val;

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