- flashrom - mail.coreboot.org

CH341 and W25Q80DV
by Philip Zahariev 16 Dec '22

16 Dec '22

Hello, I try to program W25Q80DV, but have issues. Before programming I read contents of chip, but file is not look to me good. Unfortunately I not pay enough attention on this fact. After unsuccessful first programming read chip again and contents of file was changed. After that I carefully check connection and found that some connection was not good. Attach probe one more time and have success on erase operation, but not on write. Currently chip is full with “FF”, but every try for writhing give me error. Exact chip model is Winbond 25Q80DVSIG and chip is soldered on Gigabyte GC-Titan Ridge board. I’m using image-assembling-programmer.png for programming. Strange for me is result for command > flashrom -p ch341a_spi -c W25Q80.V flashrom v1.2 on Darwin 20.6.0 (x86_64) flashrom is free software, get the source code at https://flashrom.org Calibrating delay loop... OK. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. But if I try command > flashrom -p ch341a_spi flashrom v1.2 on Darwin 20.6.0 (x86_64) flashrom is free software, get the source code at https://flashrom.org Calibrating delay loop... OK. Found Winbond flash chip "W25Q80.V" (1024 kB, SPI) on ch341a_spi. No operations were specified. Version of software was from today and compiled with "brew install flashrom” under MacOS Monterey 11.6.8 I’m waiting for your advice how to proceed further. Best regards Philip

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Canceled event with note: Flashrom Dev Meeting @ Thu Dec 29, 2022 8am - 9am (AEDT) (flashrom@flashrom.org)
by aklm＠chromium.org 15 Dec '22

15 Dec '22

This event has been canceled with a note: "Meeting cancelled for 28 December 2022: holidays! :) Next meeting 11 January 2023 runs as usual." Flashrom Dev Meeting Thursday Dec 29, 2022 ⋅ 8am – 9am Eastern Australia Time - Sydney Join with Google Meet https://meet.google.com/iuf-mtri-zva?hs=224 Join by phone (AU) +61 2 9051 6791 PIN: 304642402 More phone numbers https://tel.meet/iuf-mtri-zva?pin=9271993818880&hs=0 Regular meeting of Flashrom project developers. Meeting notes doc: https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZ… Guests aklm(a)chromium.org - creator felix.singer12(a)gmail.com david.hendricks(a)gmail.com quasisec(a)google.com nico.h(a)gmx.de src(a)posteo.de martonmiklosqdev(a)gmail.com piotr.krol(a)3mdeb.com Maciej Pijanowski michal.zygowski(a)3mdeb.com th3fanbus(a)gmail.com stefan.k.reinauer(a)gmail.com nartemiev(a)google.com arthur(a)aheymans.xyz evanbenn(a)google.com gaumless(a)gmail.com flashrom(a)flashrom.org c-d.hailfinger.devel.2006(a)gmx.net ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. To stop receiving future updates for this event, decline this event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

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flashrom dev meeting notes 14.12.2022
by Anastasia Klimchuk 15 Dec '22

15 Dec '22

# 14th December, 21:00 - 22:00 UTC+0 Attendees: Anastasia, Angel ## Decision summary * REMINDER: next meeting 11 Jan. Happy holidays!! * Angel will help with point releases (tag + announcement on flashrom ML). ## Agenda * Main thing until the end of year: release 1.3 * High-level list of what’s new? * ~1000 commits over 3 years * Maybe look very quickly through them? * [Angel] For the future, make a list of significant changes, like coreboot’s. * Aklm is away from 17 Dec and back at the meeting 11 Jan. Will read all emails when back! * Angel will help with point releases (tag + announcement on flashrom ML). * REMINDER: next meeting 11 Jan. Happy holidays!! * [aklm] There are several patches “in-flight” which are fixing scan-build warnings. Can we help to either get them finished and merged, or abandon if that’s false positive warning? Otherwise we can have people duplicating each other's effort (already started happening). * [Angel] aklm probably refers to [https://review.coreboot.org/67700](https://review.coreboot.org/67700) and [https://review.coreboot.org/66225](https://review.coreboot.org/66225). * Update: This is resolved. -- Anastasia.

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Why start over ( was Re: Starting over; how would you do it?)
by Nico Huber 12 Dec '22

12 Dec '22

Hi Richard, opening a new thread. Let's not derail the existing one before anything was discussed ;) On 19.11.22 21:18, Richard Hughes wrote: > On Sat, 19 Nov 2022 at 17:17, Nico Huber <nico.h(a)gmx.de> wrote: >> I've been thinking more and more about returning to a stable flashrom >> branch lately > > I'm missing the "why". To get back to work. To create something sustainable. As you and many others suggest, I also would like to have a branch that can be kept in a releasable state. First, we need a branch that is in a releasable state. You may have missed the decisions around the 1.3.x branch. The idea seems to be to clean things up on that release branch and for the time being do nothing about the open issues on the master branch. To me that's yet another sign that the current master branch is at a dead end. Nico

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Contributing in GSOC 2023
by ABHISHEK TIWARI 10 Dec '22

10 Dec '22

Hello, I am a full-stack developer looking for organisations to contribute to this summer(GSOC 2023). If you allow me, I would love to contribute to this project's UI/UX part. I have experience I react.js and web development-related technologies, and I am an open-source contributor too, and a contributor of layer5.io and meshery.io. Waiting for your reply Thanks Abhishek Tiwari

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gerrit settings
by Evan Benn 08 Dec '22

08 Dec '22

Hello, https://review.coreboot.org/admin/repos/flashrom,general https://gerrit-review.googlesource.com/Documentation/config-project-config.… I believe some small QOL improvements can be made in the flashrom settings: receive.requireSignedOffBy I think we can set this to true, I have been nagged by Ed enough times to remember to do this. 'Submit type' aka submit.action We use 'cherry pick'. This means each patch in a series says 'merge conflict' because it is being cherry picked without it's parent. It is tedious to submit a chain of patches (I hear) as each needs to wait for HEAD to sync and become the parent commit. The gerrit docs recommend NOT using cherry pick, and using 'rebase always' instead. Can we give it a try? https://gerrit-review.googlesource.com/Documentation/config-project-config.… "the rebase always action can be considered similar to the cherry pick action, but with the important distinction that rebase always does not ignore dependencies, which is why using the rebase always action should be preferred over the cherry pick submit action." Thanks Evan

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unknown 25VG32 + ft2232h
by Arne Jansen 07 Dec '22

07 Dec '22

Hi, I encountered a flash chip that is not known to flashrom. I built flashrom from git, HEAD 153359935aa5. Write reported a fail, the other operations suceeded. Command line was: LD_LIBRARY_PATH=/home/arne/libftdi/build/src/libftdi.so.2 /home/arne/flashrom/flashrom -p ft2232_spi:type=2232H,port=A -w rv901_orig_rom.bin on arch linux (i needed build libftdi from source due to missing symbols in libusb). The datasheet for the chip is probably https://semic-boutique.com/wp-content/uploads/2016/05/ZB25VQ32.pdf Attached are the -VV logs for id, erase, write and read. Repeating write always fail in different places. -Arne

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Project Proposal For GSOC 2023
by Yashashvi Mann 06 Dec '22

06 Dec '22

Respected Sir/Mam, My name is Yashashvi Mann and I am currently an undergraduate in Delhi technological University. I am a GSOC 2023 enthusiast. I have knowledge of HTML, CSS, Java script, Tailwind and React. I believe that I can contribute to the improvement of UI/UX of the flashrom website by specifically making the web site more user friendly and also ADC compliant by adding accesibility plugins as the current website framework majorly lacks it. I can provide more in depth information to it but not sure whom to contact for me to start? If you could guide me, I will be very grateful. Hope to hear from you soon. Regards.

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GD25LQ128C/D error
by Tim Tech 02 Dec '22

02 Dec '22

Hello, I have flashed this chip in the past but suddenly I keep getting this error when writing/verification. I tried two separate flashrom versions, I'll post both error messages below: agimb@agimb-electro:~$ sudo ./flashrom -p ch341a_spi -w rom.rom flashrom v1.2-99-gfbb2b25f61 on Linux 5.15.0-53-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found GigaDevice flash chip "GD25LQ128C/GD25LQ128D" (16384 kB, SPI) on ch341a_spi. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash chip. Please include the flashrom log file for all operations you tested (see the man page for details), and mention which mainboard or programmer you tested in the subject line. Thanks for your help! Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... FAILED at 0x00002fc3! Expected=0x44, Found=0x04, failed byte count from 0x00000000-0x00ffffff: 0x83 Your flash chip is in an unknown state. Please report this on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org, thanks! ----------------------------------------------------------------------------------------------------------------------- sudo ./flashrom -p ch341a_spi -w rom.rom flashrom v1.2-1028-gbd8a02de6c on Linux 5.15.0-53-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found GigaDevice flash chip "GD25LQ128C/GD25LQ128D/GD25LQ128E" (16384 kB, SPI) on ch341a_spi. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... FAILED at 0x000168e3! Expected=0x57, Found=0x17, failed byte count from 0x00000000-0x00ffffff: 0x37 Your flash chip is in an unknown state. Please report this to the mailing list at flashrom(a)flashrom.org or on IRC (see https://www.flashrom.org/Contact for details), thanks! Thank you, Tim

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flashrom dev meeting notes week 48/2022
by Felix Singer 30 Nov '22

30 Nov '22

# 30th November, 21:00 - 22:00 UTC+0 Attendees: Anastasia, Felix, Evan, Arthur ## Decision summary * Discussing the remaining issues from the 1.3 tracking ticket, all comments/updates are in the bugtracker * Meeting on 28th December will be canceled ## Agenda * [aklm] Lets go through bugs in the release list [https://ticket.coreboot.org/issues/353](https://ticket.coreboot.org/issues/… * We went through the bugs, end result: * 3 are on aklm * [https://ticket.coreboot.org/issues/354](https://ticket.coreboot.org/issues/… add a paragraph to README for RC1. * [https://ticket.coreboot.org/issues/356](https://ticket.coreboot.org/issues/… check with teammate(s) how is it going * [https://ticket.coreboot.org/issues/372](https://ticket.coreboot.org/issues/… finish two patches which are under review at the moment * 3 are on Felix * [https://ticket.coreboot.org/issues/374](https://ticket.coreboot.org/issues/… check with teammate, response needed * [https://ticket.coreboot.org/issues/375](https://ticket.coreboot.org/issues/… check with teammate, response needed * [https://ticket.coreboot.org/issues/408](https://ticket.coreboot.org/issues/… either do it quickly or re-link to 1.4 * We have some little number of patches to merge as of topic for_1.3.x and once it’s merged we can put a RC1 tag. After the tag is done, send an announcement on the mailing list. * Before 16 December (inclusive) aklm can send an announcement. If it happens later in December, Felix and Angel would need to do it. * Meeting on 28 Dec we cancel (holidays!!)

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What company can add me the flash support?
by Herman Brule 29 Nov '22

29 Nov '22

Hi, What company can add me the flash support? I wish add 400USD bounty for: if you can add 25N01GVZEIG Winbond WSON 8x6-mm support Regards -- alpha_one_x86/BRULE Herman<alpha_one_x86(a)first-world.info> Main developer of Supercopier/Ultracopier/CatchChallenger, Esourcing and server management IT, OS, technologies, research & development, security and business department

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new: XMC QH64AHIG PPA77200 18 2033C
by Eric Starke 29 Nov '22

29 Nov '22

flashrom reported to me, that it found an unknown chip. In the schematics the chip name is: W25Q64JVSSIQ_SO8, but the marking on the chip states: XMC QH64AHIG PPA77200 18 2033C. Reading the chip worked so far. If you need more information, please e-mail me and I see what I can do. Thanks for maintaining this awesome software

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"Intel P55" with PCI ID 8086:3b02 successful read / Apple iMac11,3 2010 firmware chip
by Wolf Dieter Brandt 29 Nov '22

29 Nov '22

flashrom v1.2 on Linux 5.10.0-8-amd64 (x86_64) flashrom is free software, get the source code at https://flashrom.org flashrom was built with libpci 3.6.4, GCC 9.2.1 20200224, little endian Command line (7 args): flashrom --programmer internal -V -c MX25L3273E -r UEV.bin Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Initializing internal programmer /sys/class/mtd/mtd0 does not exist No coreboot table found. Using Internal DMI decoder. No DMI table found. Found chipset "Intel P55" with PCI ID 8086:3b02. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... Root Complex Register Block address = 0xfed1c000 GCS = 0xc61: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI) Top Swap: not enabled 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x2 0x7fffffff/0x7fffffff FWH IDSEL: 0x2 0x7fffffff/0x7fffffff FWH IDSEL: 0x3 0x7fffffff/0x7fffffff FWH IDSEL: 0x3 0x7fffffff/0x7fffffff FWH IDSEL: 0x4 0x7fffffff/0x7fffffff FWH IDSEL: 0x5 0x7fffffff/0x7fffffff FWH IDSEL: 0x6 0x7fffffff/0x7fffffff FWH IDSEL: 0x7 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled 0x7fffffff/0x7fffffff FWH decode disabled Maximum FWH chip size: 0x100000 bytes SPI Read Configuration: prefetching disabled, caching enabled, BIOS_CNTL = 0x01: BIOS Lock Enable: disabled, BIOS Write Enable: enabled SPIBAR = 0x00007f5fce36a000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 SPI Configuration is locked down. Reading OPCODES... done 0x06: 0x0004 (HSFC) HSFC: FGO=0, FCYCLE=2, FDBC=0, SME=0 0x50: 0x0000ffff (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. 0x58: 0x03ff0021 FREG1: BIOS region (0x00021000-0x003fffff) is read-write. 0x5C: 0x00200001 FREG2: Management Engine region (0x00001000-0x00020fff) is read-write. 0x74: 0x82c10021 PR0: Warning: 0x00021000-0x002c1fff is read-only. 0x78: 0x9fff02e6 PR1: Warning: 0x002e6000-0x01ffffff is read-only. At least some flash regions are write protected. For write operations, you should use a flash layout and include only writable regions. See manpage for more details. 0x90: 0x04 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0xf97f20 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=2, DBC=63, SME=0, SCF=1 0x94: 0x5006 (PREOP) 0x96: 0x0c6c (OPTYPE) 0x98: 0x0103029f (OPMENU) 0x9c: 0x00002005 (OPMENU+4) 0xa0: 0x00000000 (BBAR) 0xc4: 0x00000000 (LVSCC) LVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x0, VCL=0 0xc8: 0x00002011 (UVSCC) UVSCC: BES=0x1, WG=0, WSR=0, WEWS=1, EO=0x20 0xd0: 0x00000000 (FPB) OK. The following protocols are supported: SPI. Probing for Macronix MX25L3273E, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016 Found Macronix flash chip "MX25L3273E" (4096 kB, SPI) mapped at physical address 0x00000000ffc00000. Chip status register is 0x00. Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). Reading flash... done. Restoring MMIO space at 0x7f5fce36d8a0 Restoring PCI config space for 00:1f:0 reg 0xdc

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Instructions for download, verify, and authenticate.
by 66Avanti＠outlook.com 28 Nov '22

28 Nov '22

To: flashrom(a)flashrom.org Hello, everyone! Here's a suggestion for a way to make flashrom easier to use: Please include simple and explicit instructions on how to verify and authenticate a download of flashrom. Linux Mint's installation instructions are an excellent example of clear instructions that non-technical users can follow easily. Linux Mint provides these steps: 1. Download the operating system (which is a ".iso" file), the sha256sum checksum (in a file named "sha256sum.txt"), and the Linux Mint digital signature/key (in a file named "sha256sum.txt.gpg"). All three files are available from the single download page. 2. Put the three files in the same folder in computer memory. 3. In a terminal screen, run "sha256sum *.iso". 4. Compare the result of the hash function in step 3 with the contents of the file named "sha256sum.txt". If they match, the iso has no errors. 5. Import the Linux Mint signing key by running this command in the terminal screen: "gpg --keyserver hkp://keyserver.ubuntu.com:80 --recv-key"27DE B156 44C6 B3CF 3BD7 D291 300F 846B A25B AE09". 6. In a terminal screen, run "gpg --verify sha256sum.txt.gpg sha256sum.txt". The results will say whether the source of the download is legitimate. The Linux Mint page is at: https://linux-mint-installation-guide.readthedocs.io/en/latest/verify.html The flashrom download page does not provide the sha256sum output. (I could not find it.) I ran "sha256sum flashrom" in a Linux terminal screen and used Google to search for the outcome and for more information. The Google search for the sha256sum (that I computed) returned seventeen hits. None of the hits was from an official flashrom.org man page. Most of them seem to be conversation between developers, not information for end-users. The "launchpad" webpage in the Google hits is from Ubuntu, but it has this note at the top: "flashrom (1.2-1) unstable; urgency=medium". That note suggests that the version of flashrom with the checksum "e1f8d..." is unstable and should not be used; at the least, it requires user care to install v. 1.2, not v. 1.2-1. The flashrom download page provides the "GPG signature" and a 40-digit hexadecimal number ("584A...") that seems to be related to the gpg signature, but neither one is in a readily usable form, and the correct instruction - with the correct syntax - to use them is not presented. (I read dozens of articles on "gpg" but did not find the necessary command to use. Like many people who need to use flashrom, I am not a computer code writer, so I need your help to get the command and syntax right.) Although I could download flashrom by using the Linux Mint Package Manager and then have reasonable confidence that the source of the file is legitimate, I would still need to confirm the sha256sum to be sure that the downloaded copy of the file is 100% correct. The final and reliable checksum should be posted on the manual's download page (along with instructions for signature verification) so that users won't need to search for the checksum and so that users can be certain that they have the right checksum and a reliable copy of flashrom. A defective operating system will cause problems, but it won't turn a computer into a brick. One mistake in the ROM could make the computer useless, so checking integrity and authenticity is a critical task. I sincerely appreciate all of the work that the flashrom team has put into a very worthwhile project, and I hope that these suggestions will make flashrom useful to many more people. - Joe

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FAILED: Protectli vp4650
by Omkhar Arasaratnam 27 Nov '22

27 Nov '22

git cloned https://github.com/protectli-root/protectli-firmware-updater/tree/070b83f4d… Attempted to run on my Protectcli vp4650 - it failed ______ ______ ______ ______ ______ ______ ______ __ __ /\ == \ /\ == \ /\ __ \ /\__ _\ /\ ___\ /\ ___\ /\__ _\ /\ \ /\ \ \ \ _-/ \ \ __< \ \ \/\ \ \/_/\ \/ \ \ __\ \ \ \____ \/_/\ \/ \ \ \____ \ \ \ \ \_\ \ \_\ \_\ \ \_____\ \ \_\ \ \_____\ \ \_____\ \ \_\ \ \_____\ \ \_\ \/_/ \/_/ /_/ \/_____/ \/_/ \/_____/ \/_____/ \/_/ \/_____/ \/_/ _________________________________________________________________________________________ =========================================FlashLi========================================= --Version 1.1.28-- Device: Protectli vp4650 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz BIOS Mode: EFI Available BIOS: [1]: ami (vp4650_YW6L2516_221102.bin) Enter the [#] of an image file, or [0] to quit. Flashing will not begin yet > 1 ********************************************!******************************************** Are you sure you would like to flash this device? Flashing new firmware onto any hardware is potentially dangerous in that if the procedure is interrupted or otherwise not able to complete, your hardware may be rendered useless. Please proceed with caution. If there are any questions, please contact Protectli support BEFORE proceeding. Unless there is a compelling reason to update the BIOS, we recommend to stay with your current known working BIOS version ********************************************!******************************************** Acknowledgement Yes [Y]: Y flashrom v1.2-326-gf57486e on Linux 6.0.0-4-amd64 (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found chipset "Intel Comet Lake U Premium". Enabling flash write... Warning: BIOS region SMM protection is enabled! Warning: Setting BIOS Control at 0xdc from 0xaa to 0x89 failed. New value is 0xaa. SPI Configuration is locked down. Enabling hardware sequencing because some important opcode is locked. PROBLEMS, continuing anyway Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000. Reading old flash chip contents... done. Erasing and writing flash chip... Transaction error between offset 0x00600000 and 0x00600fff (= 0x00600000 + 4095)! Reading current flash chip contents... done. Looking for another erase function. Looking for another erase function. Looking for another erase function. Looking for another erase function. Looking for another erase function. Looking for another erase function. Looking for another erase function. No usable erase functions left. FAILED! Uh oh. Erase/write failed. Checking if anything has changed. Reading current flash chip contents... done. Apparently at least some data has changed. Your flash chip is in an unknown state. Get help on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org with the subject "FAILED: <your board name>"! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! BIOS Flash failed, is this script running with root permissions? Please try again, but if problems persist, please contact Protectli. TODO: Collect info and display instructions on how to submit a Github issue. --oa

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flashrom dev meeting notes week 45/2022
by Anastasia Klimchuk 27 Nov '22

27 Nov '22

(apologies this one is sent out of chronological order, it was completely missed. but... better late than never) # 2th November, 21:00 - 22:00 UTC+0 Attendees: Felix, Angel, Edward, Anastasia, Stefan ## Decision summary * Angel: See the ALL CAPS text at the start of the page. Thanks to aklm for the idea. We do not talk about others if they’re not present on the call. Mentioning people who did something, for context, is fine. * We created the release branch today and will be doing all the fixes/reverts into the release branch. Meanwhile development continues on master. * Initially we wanted to create a release branch with the name “1.3.x” but then we discovered a branch with this name already exists (created an unknown number of months ago, and in an unknown state). Therefore, Angel created branch with name “1.3.x_infdev” and the plan is to rename the current 1.3.x to 1.3.x_old (to keep whatever is in there) and then rename 1.3.x_infdev to 1.3.x. * Angel made [https://review.coreboot.org/68823](https://review.coreboot.org/68823) to deal with the sb600spi problems (“Promontory” support is broken), at least for the v1.3 release. A long-term plan is to fix the code. ## Agenda * When can we make a release branch? * Aklm: can we make a plan? * Branch master ? * [Angel] We need this for the release: [https://review.coreboot.org/68823](https://review.coreboot.org/68823) * Angel decided to create the `1.3.x_infdev` branch ([“infdev” is a reference to a Minecraft version](https://minecraft.fandom.com/wiki/Java_Edition_Infdev)) to be used as flashrom v1.3 release candidate. The already-present `1.3.x` branch is left untouched as we don’t know for sure whose it is. When the v1.3 release is done, Angel suggests keeping the `1.3.x_infdev` branch as a memento of the struggle. * Felix will figure out the status of the 1.3.x branch and what’s about it. -- Anastasia.

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Starting over; how would you do it?
by Nico Huber 21 Nov '22

21 Nov '22

Hi flashrom folks, I've been thinking more and more about returning to a stable flashrom branch lately; starting over from v1.2 seems reasonable. The question is, how to proceed on such a branch? There are, of course, many cherries on the current master branch. But in what order should they be picked? And should they be picked first? What about even older patches? There are still many patches on patch- work [1] and also on Gerrit. Some of them probably also cherries. When I was still more of an official maintainer for flashrom, I tried to keep track of these things. And lately, a look at the wiki history told me that maintainers before me cared too [2]. But I guess nothing happened in that direction in the past 3 years. Depending on the progress with the 1.3 release, I'd suggest to either try to merge things in historical order, or start with the easy cher- ries on the current master branch (new chips and programmers that are ready; for a small release and then focus on a short release cycle). WDYT? Cheers, Nico [1] https://patchwork.coreboot.org/project/flashrom/list/ [2] https://www.flashrom.org/index.php?title=Development_Guidelines&oldid=2252#…

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flashrom dev meeting notes week 46/2022
by Felix Singer 21 Nov '22

21 Nov '22

# 16th November, 21:00 - 22:00 UTC+0 Attendees: Anastasia, Felix ## Decision summary * Everything is in the bugtracker: some tickets have been unlinked from release, some others are waiting for clarification. We added comments to all tickets that we went through. ## Agenda * [aklm] Lets go through bugs in the release list [https://ticket.coreboot.org/issues/353](https://ticket.coreboot.org/issues/… * We went through the list and stopped at 372

1 0

[PATCH] Add support for XMC XM25QH128A. Read/write tested.
by Stijn Segers 21 Nov '22

21 Nov '22

Signed-off-by: Stijn Segers <foss(a)volatilesystems.org> --- flashchips.c | 49 ++++++++++++++++++++++++++++++++++++++++++++ include/flashchips.h | 1 + 2 files changed, 50 insertions(+) diff --git a/flashchips.c b/flashchips.c index 47a37ee..e3fd368 100644 --- a/flashchips.c +++ b/flashchips.c @@ -19707,6 +19707,55 @@ const struct flashchip flashchips[] = { .voltage = {1650, 1950}, }, + { + .vendor = "XMC", + .name = "XM25QH128A", + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = XMC_XM25QH128A, + .total_size = 16384, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_WRSR2, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .srl = {STATUS2, 0, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}}, + .tb = {STATUS1, 5, RW}, + .sec = {STATUS1, 6, RW}, + .cmp = {STATUS2, 6, RW}, + }, + .decode_range = decode_range_spi25, + }, + + { .vendor = "XMC", .name = "XM25QH128C", diff --git a/include/flashchips.h b/include/flashchips.h index 5df42dc..8317da7 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -818,6 +818,7 @@ #define ST_M45PE16 0x4015 #define XMC_XM25QH64C 0x4017 #define XMC_XM25QU64C 0x4117 +#define XMC_XM25QH128A 0x7018 #define XMC_XM25QH128C 0x4018 #define XMC_XM25QU128C 0x4118 #define XMC_XM25QH256C 0x4019 -- 2.36.1

3 8

Status of Meson support, where are we? (was Re: Build systems and `uinstall` option)
by Nico Huber 14 Nov '22

14 Nov '22

Hi all, it feels like this deserves its own thread. I was a little surprised by the news that we are already ready to deprecate Make. Hopefully, I'm just not up to date and this is the case! If I'm horribly off track, please ignore the following. IIRC, we said this would be the case if we can do everything with Meson what we can do with Make (due to lack of knowing what the latter can, we made a list of target environments that we need to support at least) and Meson produces the same binaries as Make. Are we there yet? My last state wrt. the more special target environments like lib- payload was that it seems feasible, but I haven't seen a PoC yet. On 10.11.22 17:43, Felix Singer wrote: > The Make build system is going to be deprecated with the next release > and it is going to be dropped with the release after that. "next release" being the one that just started or the next after that? iow. does this mean deprecate with flashrom 1.3 and drop in 1.4? > We discussed the Make build system in many meetings now and we all > agreed that we won't add any more features to it. That means its > current feature state is frozen and it doesn't get any additional > functionality, just bug fixes, refactorings or adjustments as far as > they are really necessary. Was this ever discussed on / announced to the ML? My status was that this was of the "nobody objected during some meeting" decision kind. Nico

5 7

Build systems and `uinstall` option
by Joursoir 14 Nov '22

14 Nov '22

Hello everyone, I wonder why there is no 'uninstall' option in the flashrom's Makefile? Is it just an oversight? Or do we have a reason for that? The same question is related to the meson script. -- Joursoir

5 12

Future development and release process
by Nico Huber 11 Nov '22

11 Nov '22

Hi flashrom fellows, some of us have picked a new release process for flashrom 1.3 that ignores the problems of the master branch but will attend to them on a separate branch. This leaves us without a strategy to get future releases done with less hassle. It also feels quite frustrating be- cause I fear it takes incentive away to fix the master branch. And hence increases the incentive for myself to abandon said branch. During a phone call with Felix, I explained the options I see roughly as follows. There are probably more options, feel free to discuss others as well. These just came to my head. 1. Full reset: Branch off 1.2.x before the master branch started to make trouble. Also reset the Gerrit privileges to a state where only people got merge rights after they earned trust by the pre- existing maintainers (people with those rights); to prevent that history repeats itself. So far this seemed to be unacceptable by the Google team. The rest of this email will assume that we won't be doing this. If it turns out I'm wrong, this would be my preferred solution and we won't have to discuss anything below. 2. Try harder: Keep working on the current master branch. Try to fix the process as we go along. This is unacceptable to me. We have tried this already and I have not seen things getting better. Building up on a broken state is most often harder than rewinding to a good state and starting new things from scratch. Working on this branch has not been fun since flashrom 1.2. Beside that, the master branch hasn't provided any- thing that I could use in my day job for years (not as a develop- ment tool and definitely not in our products). 3. Compromise: The current situation evolved due to a highly dynamic development process that is roughly the opposite of what we had before we tried to converge upstream and chromium development. Also, adding many new developers that are used to a very different process requires a lot of communication (IMO) which didn't happen. We could accept these different development strategies and work on two branches. Not(!) competing branches but branches that complement each other. Something like this was actually proposed before [1]. The rough idea: we could have a 'stable' branch and a more dynamic one. Back then we called the latter 'staging'. Merging commits to the 'stable' branch would be limited to maintainers who know flash- rom well enough and trust each other. To be honest, I wouldn't care much what happens on the 'staging' branch, who gets to merge etc. There were often reservations if this could work without diverging the branches. But there are strategies to avoid it. For instance, a regular `git merge` onto the 'staging' branch could avoid that. To give it a good start, I would also suggest to base a 'stable' branch on 1.2.x. 4. Divide: If we don't find a compromise, I'll have to continue my work on a new branch. I wouldn't care then if things diverge. Details depend mostly on who would like to join the effort. It would likely start on 1.2.x with things added from the current master branch (might get things through review again, or also cherry pick real cherries directly without going through Gerrit). Quite unappealing because it would push contributors to choose a branch. And we would have to discuss how to deal with future releases. You may notice that most of my ideas suggest rewinding to 1.2.x. Beside easing further development on a reasonable code base, there is one more thing driving me: The master branch contains many commits that caused awkward feelings. I think it would help working together if we wouldn't be reminded of them all the time. Nico [1] https://www.flashrom.org/index.php?title=Development_Guidelines&oldid=2252#…

1 0

Documenting flashrom's guts
by Angel Pons 08 Nov '22

08 Nov '22

Hi list, There's several things regarding flashrom's structure that seem to be underdocumented (or *are* documented, but the information is extremely hard to find). It would be very helpful to have this information available somewhere easy to find, such as the Wiki. Some things that would greatly benefit from being documented are: - flashrom's layers: which layers there are, and how they interact with each other. - flashrom's structures: which structures there are, how they interact with each other, and how they "map" to layers. Surely there are more things that would benefit from being documented. Let's not discuss *who* is going to do what for now; first, let's collect information about these parts of flashrom. Best regards, Angel

3 2

Branch 1.3.x is being prepared for release candidate
by Anastasia Klimchuk 07 Nov '22

07 Nov '22

Good Day Flashrom community, We’ve got good news about the upcoming release v1.3. Branch 1.3.x is officially opened and being prepared for release candidate. The branch has been fast-forwarded to head as of Friday last week. We are now going through the list of what is critical to do for the release and patching 1.3.x accordingly. You can see the patches for 1.3.x by this link: https://review.coreboot.org/q/project:flashrom+branch:1.3.x The next step will be to put an RC1 tag for the branch (when ready for that) and write another announcement. If you know of any bugs, please report to us, and thank you! In any case, bugs will be reported in the bugtracker. And then we can decide what’s the urgency and whether the bug is blocking the release or not. Meanwhile, development continues on master branch. Specifically, there are few ongoing projects in various stages of development: all of that continues. And hopefully, could be included in the next release. Thanks everyone! -- Anastasia.

1 0

Re: [review] WP documentation for flashrom users
by Anastasia Klimchuk 04 Nov '22

04 Nov '22

I only noticed now that the mailing list got lost from the last two messages. I apologise for that, it was completely unintentional! Re-sending again, and now including the mailing list. Text below. On Wed, Nov 2, 2022 at 12:17 AM Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> wrote: > > On Tue, Nov 01, 2022 at 09:32:27AM +1100, Anastasia Klimchuk wrote: > > Sergii, you mentioned in the earlier thread, you can convert the text > > to mediawiki format? That would be great! > > Also, would you be able to update the wiki page by yourself? We can > > create an account for you. > > Then you can preview/correct the text , until the result looks good to you. > > > > As we agreed in the earlier thread, this should go to > > https://www.flashrom.org/Documentation#Using_flashrom section. > > > > Thank you so much for your contributions! > > Yes, I can deal with MediaWiki and handle formatting issues myself if > I'll get an account. > > Just for information, it's trivial to convert to Wiki automatically: > > pandoc -w mediawiki bootblock-protection.md -o bootblock-protection.wiki > > The important thing is to have empty lines before lists in Markdown, > pandoc doesn't recognize lists otherwise. There can be other minor > differences. -- Anastasia.

2 1

[review] WP documentation for flashrom users
by Sergii Dmytruk 27 Oct '22

27 Oct '22

Hi again, As previously discussed on this ML, posting documentation inline for review. ================================================================================ # Firmware updates vs. SPI write-protection Enabling write-protection of any kind is meant to obstruct changing data, but it also limits what you can do to the part of firmware that's still writable. This document is meant to cover some of the origins of such limitations and situations which might arise after part of a flash chip has been protected. ## Firmware updates after locking bootblock This section is primarily concerned with `coreboot`, but similar problems can happen for any kind of firmware. ### Risks of partial updates Partial updates can produce an unbootable image if an old bootblock doesn't work with a more recent version of `coreboot`. This can be manifested in various ways ranging from an old bootblock not being able to find new romstage to system booting successfully but data in `coreboot` tables being mangled or incomplete. The incompatibilities might happen when switching version of firmware or even when using the same version with a slightly different configuration. Another thing that can potentially cause trouble is CBFS layout. When bootblock is part of CBFS, it doesn't necessarily have a fixed address, moreover it can change location as well if it depends on file size (when bootblock's last byte must be the last byte of the image, which is the case on x86). If newer bootblock is smaller such that an old WP range now covers bootblock and some other file, this file won't be fully updated due to write-protection, potentially resulting in a corrupt image. Luckily, when bootblock is the last file it's normally preceded by a significant amount of empty space, which won't let this situation to occur. On top of that, last 4 bytes of the image contain offset to the master header of CBFS. Depending on the coreboot version this offset might be crucial for the loading of romstage, in which case moving CBFS within the image without updating the offset (when it's locked by WP) can also prevent the system from booting. ### Recovering from a broken state Since broken flash won't let the system to boot, the way to fix it is to flash the chip externally by connecting it to a different device. A possible alternative could be to have a backup flash created beforehand and swapping it for the broken one (mainly applicable if swapping doesn't require soldering). ## Flashing whole firmware image The function of the hardware protection mechanism (`W#` or `W/` pin of flash chips) is to lock state of software protection thus preventing it from being disabled. After the chip is physically unlocked by changing the state of the pin, the state of the write protection doesn't change. However, in this state the protection can be easily turned off programmatically, which is what `flashrom` tries to do before performing an operation on a chip. In other words, changing state of the WP pin might be enough to be able to flash the chip in full. If `flashrom` errors or you don't want to rely on the automatic behaviour, you can try to explicitly disable the protection by running `flashrom` like this: ``` flashrom --wp-disable ``` If you need to pass extra parameters to flash your chip (e.g., programmer or chip name), add them to the above command (order of such parameters shouldn't matter). Mind that in `flashrom` the code for disabling protection automatically is different from the code which handles `--wp-disable`. This means that they can sometimes produce different results, this is why you should be aware of both code paths that affect WP. ================================================================================ # Example of partial write-protection This document provides demonstration of how one can protect part of a flash chip from writing using `flashrom` and its support for manipulating SPI write protection (WP). This kind of protection requires changing connection of WP pin of the chip to prevent any attempt of disabling the protection by software alone. **Not to be confused** with protection by flash controller of your motherboard (PCH protection). ## `flashrom` version At the time of writing (11 October 2022) there hasn't been a `flashrom` release that includes WP manipulation facilities. You might have to build one from scratch (assuming you've already installed build dependencies): ``` git clone --depth 1 https://github.com/flashrom/flashrom cd flashrom # the simplest case of building using GNU make make # flashrom executable will appear in current directory ``` ## Programmer support of WP Not all programmers support manipulating WP configuration. A suitable programmer must either provide a dedicated API for working with WP or give sufficiently comprehensive access to the interface of the flash chip. In particular, on Intel platforms *internal* programmer might allow only limited access to WP feature of chips or effectively deny it. Read "Intel chipsets" section of `flashrom`'s manpage for details on how you can try choosing sequencing type to possibly make WP work for you. In some cases external flashing might be the only option and you need to unscrew your device, find the chip, connect it to another device through a suitable adapter and finally be able to configure it as you wish. ## Chip support in `flashrom` There is a great variety of chips with some not supporting write protection at all and others doing it in their own peculiar way of which `flashrom` has no idea. So the first thing to do is to make sure that `flashrom` knows how WP works for your chip and chipset doesn't get in the way. Run a command like (adjust this and similar commands below if you're not using *internal* programmer or need to specify other options): ``` flashrom --programmer internal --wp-status ``` Seeing this output line would mean that `flashrom` doesn't know how to use WP feature of the chip you have: ``` Failed to get WP status: WP operations are not implemented for this chip ``` Otherwise the output might contain something similar to this: ``` Protection range: start=0x00000000 length=0x00000000 (none) Protection mode: disabled ``` If so, you can continue with the rest of the instructions. ## Collecting information about the range You need to know where the area you want to protect starts and ends. The example below assumes you're trying to protect bootblock stored in CBFS at the end of some `coreboot` firmware. In other cases it might be a separate file which is put at the beginning of a chip. You need to have an idea of what you're doing here or have some reliable instructions to follow. In this case `cbfstool` can be used to list information about bootblock like this: ``` $ cbfstool rom print | sed -n '2p; /bootblock/p' Name Offset Type Size Comp bootblock 0x3ef100 bootblock 36544 none ``` However, the offset is relative to the start of CBFS region, so we also need to find out offset of CBFS: ``` $ cbfstool rom layout | grep CBFS 'COREBOOT' (CBFS, size 4161536, offset 12615680) ``` Now we can calculate: * start offset (CBFS offset + 64 + bootblock offset): \ `12615680 + 64 + 0x3ef100 = 0xff7140` \ (`printf "%#x\n" $(( 12615680 + 64 + 0x3ef100 ))`) * end offset (start offset + bootblock size - 1): \ `0xff7140 + 36544 - 1 = 0xffffff` \ (`printf "%#x\n" $(( 0xff7140 + 36544 - 1 ))`) Thus we need to write-protect the smallest area that covers the range from `0xff7140` to `0xffffff` (both bounds are inclusive). "64" in the computation of start offset is offset of booblock data. Unfortunately, current tooling doesn't provide a reliable way of determining actual offset, but 64 is the typical "extra offset" one needs to add to account for file metadata of CBFS (otherwise it can be its multiple 128 or bigger). Bootblock should normally end at the last byte of ROM on x86 systems, giving you a way to test the result of computations. ## Finding a matching range In most chips the list of supported ranges is fixed and you can't specify an arbitrary one. Some others allow more fine-grained control, but that feature is not supported by `flashrom` as of now. Obtain list of supported ranges from which we'll pick the best match: ``` $ flashrom --programmer internal --wp-list ... Available protection ranges: start=0x00000000 length=0x00000000 (none) start=0x00000000 length=0x00001000 (lower 1/4096) start=0x00fff000 length=0x00001000 (upper 1/4096) start=0x00000000 length=0x00002000 (lower 1/2048) start=0x00ffe000 length=0x00002000 (upper 1/2048) start=0x00000000 length=0x00004000 (lower 1/1024) start=0x00ffc000 length=0x00004000 (upper 1/1024) start=0x00000000 length=0x00008000 (lower 1/512) start=0x00ff8000 length=0x00008000 (upper 1/512) start=0x00000000 length=0x00040000 (lower 1/64) start=0x00fc0000 length=0x00040000 (upper 1/64) start=0x00000000 length=0x00080000 (lower 1/32) start=0x00f80000 length=0x00080000 (upper 1/32) start=0x00000000 length=0x00100000 (lower 1/16) start=0x00f00000 length=0x00100000 (upper 1/16) start=0x00000000 length=0x00200000 (lower 1/8) start=0x00e00000 length=0x00200000 (upper 1/8) start=0x00000000 length=0x00400000 (lower 1/4) start=0x00c00000 length=0x00400000 (upper 1/4) start=0x00000000 length=0x00800000 (lower 1/2) start=0x00800000 length=0x00800000 (upper 1/2) start=0x00000000 length=0x00c00000 (lower 3/4) start=0x00400000 length=0x00c00000 (upper 3/4) start=0x00000000 length=0x00e00000 (lower 7/8) start=0x00200000 length=0x00e00000 (upper 7/8) start=0x00000000 length=0x00f00000 (lower 15/16) start=0x00100000 length=0x00f00000 (upper 15/16) start=0x00000000 length=0x00f80000 (lower 31/32) start=0x00080000 length=0x00f80000 (upper 31/32) start=0x00000000 length=0x00fc0000 (lower 63/64) start=0x00040000 length=0x00fc0000 (upper 63/64) start=0x00000000 length=0x00ff8000 (lower 511/512) start=0x00008000 length=0x00ff8000 (upper 511/512) start=0x00000000 length=0x00ffc000 (lower 1023/1024) start=0x00004000 length=0x00ffc000 (upper 1023/1024) start=0x00000000 length=0x00ffe000 (lower 2047/2048) start=0x00002000 length=0x00ffe000 (upper 2047/2048) start=0x00000000 length=0x00fff000 (lower 4095/4096) start=0x00001000 length=0x00fff000 (upper 4095/4096) start=0x00000000 length=0x01000000 (all) ``` Pick a range by scanning the list in the top down order (because the smaller ranges come first): - if bootblock is at the start of a chip, look for the first lower range whose length is greater than the end offset - if bootblock is at the end of a chip, look for the first upper range which starts before or at the start offset - mind that you're unlikely to find an ideal match and will probably protect more than you need; this is fine if that's just an empty space, but can cause troubles with future updates if that's some data or metadata which changes with every release This is the first upper range starting before `0xff7140`: ``` start=0x00fc0000 length=0x00040000 (upper 1/64) ``` It covers `0x00fc0000 -- 0x00ffffff` which includes our bootblock. This area takes up 256 KiB, about 7 times bigger than our bootblock, but there is no better choice in this case and output of `cbfstool rom layout` shows that we additionally include a part of 876 KiB empty space which will hopefully remain there in future firmware versions (it's a good idea to check before a firmware update). ## Protection setup The following command sets the range and enables WP at the same time, the values are taken from the chosen range above: ``` flashrom --programmer internal --wp-range=0x00fc0000,0x00040000 --wp-enable ``` You can set the range and change WP status independently as well if needed (just specify one `--wp-*` option at a time). Make sure that hardware protection is off (state of `W#`/`W/` pin of the chip) or you won't be able to change WP configuration. On success, the output of the above command will include such lines: ``` Enabled hardware protection Activated protection range: start=0x00fc0000 length=0x00040000 (upper 1/64) ``` **Caveat**: `flashrom` automatically tries to disable WP before any operation on a chip (read, write, erase, verify), so double-check status of WP before changing state of WP pin on your chip! ## Verifying hardware protection Once you've happy with the configuration and changed state of WP pin, you can try disabling WP using `flashrom` to make sure that it fails now. ================================================================================ Regards, Sergii

3 4

Adding dev meeting info on flashrom wiki Contact page
by Anastasia Klimchuk 27 Oct '22

27 Oct '22

Hello Everyone, Around two months ago we decided to add information about dev meeting on the Contact page on the website (https://www.flashrom.org/Contact). Many apologies for the delay, but good news is that I finally got to this. So me and Felix composed the text for the Contact page (below). This information is not new, it reflects what’s already happening - the meeting runs since March and keeps going. However, the info was scattered in different places (various posts on the mailing list), so the goal is to document it and put it in a place that everyone knows where it is. Let us know if there is any feedback on the text. I plan to update Contact page around the end of week, but of course we can do amendments any time later if needed. === # Dev meeting Flashrom developers community runs an online meeting every two weeks. The main purpose of the meeting is to discuss development plans, ideas, current ongoing projects, pending patches, and sometimes organisational questions. Note this meeting is NOT: * troubleshooting session * tech support forum * user training session For questions above, please use [IRC](https://www.flashrom.org/Contact#IRC) or the [mailing list](https://www.flashrom.org/Contact#Mailing_List). ## Time of meeting It runs once every two weeks. IMPORTANT: please calculate meeting time for your local timezone. ### Between November and March (inclusive): **Wednesday 21:00-22:00 UTC+0** also known as * Wednesday 13.00-14.00 Pacific Standard Time UTC-8 * Wednesday 22.00-23.00 Central European Time UTC+1 * Thursday 8.00-9.00am Australian Eastern Daylight Time UTC+11 ### Between April and September (inclusive): **Thursday 6.00-7.00am UTC+0** also known as * Wednesday 11pm-midnight Pacific Daylight Time UTC-7 * Thursday 8.00-9.00am Central European Summer Time UTC+2 * Thursday 16.00-17.00 Australian Eastern Standard Time UTC+10 ### The last week of March and 4 weeks of October there are no meetings This is because daylight saving time changes are happening on different dates in different locations, and setting up meeting time becomes too complicated. ## FAQ ### When is the next meeting? Look into the meeting notes [document](https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZ…. The top entry, on the first page, with the date in the future, and empty list of attendees - is the next meeting. ### How to join the meeting? In the meeting notes [document](https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZ… , on the top it says “to join, click the link”, click the link. ### Do I need an invitation to join the meeting? No, just join. ### Do I need to create an account anywhere? No, you can join without an account, and view/comment on the meeting doc without an account. ### How do I add a topic to the agenda? Add comments/suggestions on the meeting doc, and they will be accepted shortly after. -- Anastasia.

1 0

Unsupported flash chip - EON (cFeon) EN25QX128A
by Olaf Drab 26 Oct '22

26 Oct '22

Hi, As you asked here is the output of flashrom -VV -p ch341a_spi >> EN25QX128A.txt. Maybe this will help you adding support for this chip. Best regards Olaf

1 0

Fwd: Gigabyte TRX40 Aorus Xtreme rev 1.0
by Aurélien Plancher 25 Oct '22

25 Oct '22

Hi, I'm trying to backup by BIOS from Linux (motherboard: Gigabyte TRX40 Aorus Xtreme rev 1.0) but I get an error. Any help appreciated. Here are the logs: *sudo flashrom -V -p internal* Flashrom v1.2 on Linux 5.13.0-39-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org flashrom was built with libpci 3.6.4, GCC 9.2.1 20200304, little endian Command line (3 args): flashrom -V -p internal Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Initializing internal programmer /sys/class/mtd/mtd0 does not exist No coreboot table found. Using Internal DMI decoder. No DMI table found. Found ITE Super I/O, ID 0x8688 on port 0x2e Found chipset "AMD FP4" with PCI ID 1022:790e. Enabling flash write... SPI base address is at 0xfec10000 FCH device found but SMBus revision 0x61 does not match known values. Please report this to flashrom(a)flashrom.org and include this log and the output of lspci -nnvx, thanks!. Could not determine chipset generation.ROM strap override is not active PROBLEMS, continuing anyway *lspci -nnvx* 00:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Flags: fast devsel 00: 22 10 80 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 80 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.2 IOMMU [0806]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Flags: fast devsel Capabilities: <access denied> 00: 22 10 81 14 40 00 10 00 00 00 06 08 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 81 14 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 00 00 00:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:01.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge [1022:1483] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 33 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: d2000000-d21fffff [size=2M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 83 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 f1 01 00 20 20: 00 d2 10 d2 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 00:01.2 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge [1022:1483] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 34 Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: d4200000-d42fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 83 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 f1 01 00 20 20: 20 d4 20 d4 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 00:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:05.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:07.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:07.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 36 Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 03 03 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 00:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 37 Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: d4100000-d41fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 04 04 00 f1 01 00 00 20: 10 d4 10 d4 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 00:14.0 SMBus [0c05]: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller [1022:790b] (rev 61) Subsystem: Gigabyte Technology Co., Ltd FCH SMBus Controller [1458:5001] Flags: 66MHz, medium devsel Kernel modules: i2c_piix4, sp5100_tco 00: 22 10 0b 79 03 04 20 02 61 00 05 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 01 50 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:14.3 ISA bridge [0601]: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge [1022:790e] (rev 51) Subsystem: Gigabyte Technology Co., Ltd FCH LPC Bridge [1458:5001] Flags: bus master, 66MHz, medium devsel, latency 0 00: 22 10 0e 79 0f 00 20 02 51 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 01 50 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 0 [1022:1490] Flags: fast devsel 00: 22 10 90 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.1 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 1 [1022:1491] Flags: fast devsel 00: 22 10 91 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.2 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 2 [1022:1492] Flags: fast devsel 00: 22 10 92 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.3 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 3 [1022:1493] Flags: fast devsel Kernel driver in use: k10temp Kernel modules: k10temp 00: 22 10 93 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.4 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 4 [1022:1494] Flags: fast devsel 00: 22 10 94 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.5 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 5 [1022:1495] Flags: fast devsel 00: 22 10 95 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.6 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 6 [1022:1496] Flags: fast devsel 00: 22 10 96 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.7 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 7 [1022:1497] Flags: fast devsel 00: 22 10 97 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01:00.0 Non-Volatile memory controller [0108]: Samsung Electronics Co Ltd NVMe SSD Controller PM173X [144d:a824] (prog-if 02 [NVM Express]) Subsystem: Samsung Electronics Co Ltd NVMe SSD Controller PM173X [144d:a801] Flags: bus master, fast devsel, latency 0, IRQ 78, NUMA node 0 Memory at d2010000 (64-bit, non-prefetchable) [size=32K] Expansion ROM at d2000000 [disabled] [size=64K] Capabilities: <access denied> Kernel driver in use: nvme Kernel modules: nvme 00: 4d 14 24 a8 06 04 10 00 00 02 08 01 00 00 00 00 10: 04 00 01 d2 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 4d 14 01 a8 30: 00 00 30 d4 40 00 00 00 00 00 00 00 ff 01 00 00 02:00.0 Non-Volatile memory controller [0108]: Micron Technology Inc Device [1344:51b1] (rev 02) (prog-if 02 [NVM Express]) Subsystem: Micron Technology Inc Device [1344:6000] Flags: bus master, fast devsel, latency 0, IRQ 80, NUMA node 0 Memory at d4220000 (64-bit, non-prefetchable) [size=16K] Expansion ROM at d4200000 [disabled] [size=128K] Capabilities: <access denied> Kernel driver in use: nvme Kernel modules: nvme 00: 44 13 b1 51 06 04 10 00 02 02 08 01 00 00 00 00 10: 04 00 22 d4 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 44 13 00 60 30: 00 00 20 d4 c0 00 00 00 00 00 00 00 ff 01 00 00 03:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Flags: fast devsel Capabilities: <access denied> 00: 22 10 8a 14 00 00 10 00 00 00 00 13 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 8a 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 04:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Flags: fast devsel Capabilities: <access denied> 00: 22 10 85 14 00 00 10 00 00 00 00 13 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 85 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 04:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Starship USB 3.0 Host Controller [1022:148c] (prog-if 30 [XHCI]) Subsystem: Gigabyte Technology Co., Ltd Starship USB 3.0 Host Controller [1458:5007] Flags: bus master, fast devsel, latency 0, IRQ 69 Memory at d4100000 (64-bit, non-prefetchable) [size=1M] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 22 10 8c 14 07 04 10 00 00 30 03 0c 10 00 80 00 10: 04 00 10 d4 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 07 50 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 03 00 00 20:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Flags: fast devsel 00: 22 10 80 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 80 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:00.2 IOMMU [0806]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Flags: fast devsel Capabilities: <access denied> 00: 22 10 81 14 40 00 10 00 00 00 06 08 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 81 14 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 00 00 20:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:03.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge [1022:1483] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 38 Bus: primary=20, secondary=21, subordinate=21, sec-latency=0 I/O behind bridge: 00006000-00006fff [size=4K] Memory behind bridge: b2000000-b30fffff [size=17M] Prefetchable memory behind bridge: 0000009000000000-0000009801ffffff [size=32800M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 83 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 20 21 21 00 61 61 00 20 20: 00 b2 00 b3 01 00 f1 01 90 00 00 00 98 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 20:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:05.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:07.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:07.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 40 Bus: primary=20, secondary=22, subordinate=22, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 20 22 22 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 20:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 41 Bus: primary=20, secondary=23, subordinate=23, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b3200000-b34fffff [size=3M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 20 23 23 00 f1 01 00 00 20: 20 b3 40 b3 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 21:00.0 VGA compatible controller [0300]: NVIDIA Corporation Device [10de:2684] (rev a1) (prog-if 00 [VGA controller]) Subsystem: CardExpert Technology Device [10b0:f297] Flags: bus master, fast devsel, latency 0, IRQ 629 Memory at b2000000 (32-bit, non-prefetchable) [size=16M] Memory at 9000000000 (64-bit, prefetchable) [size=32G] Memory at 9800000000 (64-bit, prefetchable) [size=32M] I/O ports at 6000 [size=128] Expansion ROM at b3000000 [virtual] [disabled] [size=512K] Capabilities: <access denied> Kernel driver in use: nvidia Kernel modules: nvidiafb, nouveau, nvidia_drm, nvidia 00: de 10 84 26 07 04 10 00 a1 00 00 03 00 00 80 00 10: 00 00 00 b2 0c 00 00 00 90 00 00 00 0c 00 00 00 20: 98 00 00 00 01 60 00 00 00 00 00 00 b0 10 97 f2 30: 00 00 00 00 60 00 00 00 00 00 00 00 ff 01 00 00 22:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Flags: fast devsel Capabilities: <access denied> 00: 22 10 8a 14 00 00 10 00 00 00 00 13 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 8a 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 23:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Flags: fast devsel Capabilities: <access denied> 00: 22 10 85 14 00 00 10 00 00 00 00 13 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 85 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 23:00.1 Encryption controller [1080]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Cryptographic Coprocessor PSPCPP [1022:1486] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Cryptographic Coprocessor PSPCPP [1022:1486] Flags: bus master, fast devsel, latency 0, IRQ 609 Memory at b3300000 (32-bit, non-prefetchable) [size=1M] Memory at b3400000 (32-bit, non-prefetchable) [size=8K] Capabilities: <access denied> Kernel driver in use: ccp Kernel modules: ccp 00: 22 10 86 14 06 04 10 00 00 00 80 10 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 30 b3 00 00 00 00 20: 00 00 00 00 00 00 40 b3 00 00 00 00 22 10 86 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 01 00 00 23:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Starship USB 3.0 Host Controller [1022:148c] (prog-if 30 [XHCI]) Subsystem: Gigabyte Technology Co., Ltd Starship USB 3.0 Host Controller [1458:5007] Flags: bus master, fast devsel, latency 0, IRQ 100 Memory at b3200000 (64-bit, non-prefetchable) [size=1M] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 22 10 8c 14 07 04 10 00 00 30 03 0c 10 00 80 00 10: 04 00 20 b3 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 07 50 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 03 00 00 40:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Flags: fast devsel 00: 22 10 80 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 80 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:00.2 IOMMU [0806]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Flags: fast devsel Capabilities: <access denied> 00: 22 10 81 14 40 00 10 00 00 00 06 08 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 81 14 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 00 00 40:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:01.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge [1022:1483] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 42 Bus: primary=40, secondary=41, subordinate=4a, sec-latency=0 I/O behind bridge: 00009000-00009fff [size=4K] Memory behind bridge: b6000000-b70fffff [size=17M] Prefetchable memory behind bridge: 00000000b8000000-00000000b88fffff [size=9M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 83 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 40 41 4a 00 91 91 00 20 20: 00 b6 00 b7 01 b8 81 b8 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 40:01.3 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge [1022:1483] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 43 Bus: primary=40, secondary=4b, subordinate=4b, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: cd700000-cd7fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 83 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 40 4b 4b 00 f1 01 00 20 20: 70 cd 70 cd f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 40:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:03.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge [1022:1483] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 44 Bus: primary=40, secondary=4c, subordinate=5d, sec-latency=0 I/O behind bridge: 00007000-00008fff [size=8K] Memory behind bridge: bcc00000-ccdfffff [size=258M] Prefetchable memory behind bridge: 00000000b8a00000-00000000bc9fffff [size=64M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 83 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 40 4c 5d 00 71 81 00 20 20: c0 bc d0 cc a1 b8 91 bc 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 40:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:05.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:07.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:07.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 46 Bus: primary=40, secondary=5e, subordinate=5e, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 40 5e 5e 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 40:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 48 Bus: primary=40, secondary=5f, subordinate=5f, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 40 5f 5f 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 41:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse Switch Upstream [1022:57ad] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 26 Bus: primary=41, secondary=42, subordinate=4a, sec-latency=0 I/O behind bridge: 00009000-00009fff [size=4K] Memory behind bridge: b6000000-b70fffff [size=17M] Prefetchable memory behind bridge: 00000000b8000000-00000000b88fffff [size=9M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 ad 57 07 00 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 41 42 4a 00 91 91 00 00 20: 00 b6 00 b7 01 b8 81 b8 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 42:01.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a3] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 49 Bus: primary=42, secondary=43, subordinate=43, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b6000000-b60fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a3 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 43 43 00 f1 01 00 00 20: 00 b6 00 b6 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 42:02.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a3] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 50 Bus: primary=42, secondary=44, subordinate=44, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b6100000-b69fffff [size=9M] Prefetchable memory behind bridge: 00000000b8000000-00000000b88fffff [size=9M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a3 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 44 44 00 f1 01 00 20 20: 10 b6 90 b6 01 b8 81 b8 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 42:03.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a3] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 51 Bus: primary=42, secondary=45, subordinate=45, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b6a00000-b6afffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a3 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 45 45 00 f1 01 00 00 20: a0 b6 a0 b6 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 42:04.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a3] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 52 Bus: primary=42, secondary=46, subordinate=46, sec-latency=0 I/O behind bridge: 00009000-00009fff [size=4K] Memory behind bridge: b6b00000-b6bfffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a3 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 46 46 00 91 91 00 20 20: b0 b6 b0 b6 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 42:05.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a3] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 53 Bus: primary=42, secondary=47, subordinate=47, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b6c00000-b6cfffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a3 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 47 47 00 f1 01 00 00 20: c0 b6 c0 b6 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 42:08.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a4] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 54 Bus: primary=42, secondary=48, subordinate=48, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b6d00000-b6efffff [size=2M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a4 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 48 48 00 f1 01 00 00 20: d0 b6 e0 b6 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 42:09.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a4] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 56 Bus: primary=42, secondary=49, subordinate=49, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b6f00000-b6ffffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a4 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 49 49 00 f1 01 00 00 20: f0 b6 f0 b6 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 42:0a.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a4] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 58 Bus: primary=42, secondary=4a, subordinate=4a, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b7000000-b70fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a4 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 4a 4a 00 f1 01 00 00 20: 00 b7 00 b7 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 43:00.0 Non-Volatile memory controller [0108]: Micron Technology Inc Device [1344:51b1] (rev 02) (prog-if 02 [NVM Express]) Subsystem: Micron Technology Inc Device [1344:6000] Flags: bus master, fast devsel, latency 0, IRQ 55, NUMA node 0 Memory at b6000000 (64-bit, non-prefetchable) [size=16K] Expansion ROM at <ignored> [disabled] Capabilities: <access denied> Kernel driver in use: nvme Kernel modules: nvme 00: 44 13 b1 51 06 04 10 00 02 02 08 01 00 00 00 00 10: 04 00 00 b6 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 44 13 00 60 30: 00 00 60 cd c0 00 00 00 00 00 00 00 ff 01 00 00 44:00.0 Ethernet controller [0200]: Intel Corporation Ethernet Controller 10G X550T [8086:1563] (rev 01) Subsystem: Gigabyte Technology Co., Ltd Ethernet Controller 10G X550T [1458:e000] Flags: bus master, fast devsel, latency 0, IRQ 57 Memory at b8400000 (64-bit, prefetchable) [size=4M] Memory at b8804000 (64-bit, prefetchable) [size=16K] Expansion ROM at b8880000 [disabled] [size=512K] Capabilities: <access denied> Kernel driver in use: ixgbe Kernel modules: ixgbe 00: 86 80 63 15 06 04 10 00 01 00 00 02 00 00 80 00 10: 0c 00 40 b8 00 00 00 00 00 00 00 00 00 00 00 00 20: 0c 40 80 b8 00 00 00 00 00 00 00 00 58 14 00 e0 30: 00 00 58 cd 40 00 00 00 00 00 00 00 ff 01 00 00 44:00.1 Ethernet controller [0200]: Intel Corporation Ethernet Controller 10G X550T [8086:1563] (rev 01) Subsystem: Gigabyte Technology Co., Ltd Ethernet Controller 10G X550T [1458:e000] Flags: bus master, fast devsel, latency 0, IRQ 204 Memory at b8000000 (64-bit, prefetchable) [size=4M] Memory at b8800000 (64-bit, prefetchable) [size=16K] Expansion ROM at <ignored> [disabled] Capabilities: <access denied> Kernel driver in use: ixgbe Kernel modules: ixgbe 00: 86 80 63 15 06 04 10 00 01 00 00 02 10 00 80 00 10: 0c 00 00 b8 00 00 00 00 00 00 00 00 00 00 00 00 20: 0c 00 80 b8 00 00 00 00 00 00 00 00 58 14 00 e0 30: 00 00 50 cd 40 00 00 00 00 00 00 00 ff 02 00 00 45:00.0 USB controller [0c03]: ASMedia Technology Inc. ASM2142 USB 3.1 Host Controller [1b21:2142] (prog-if 30 [XHCI]) Subsystem: Gigabyte Technology Co., Ltd ASM2142 USB 3.1 Host Controller [1458:5007] Flags: bus master, fast devsel, latency 0, IRQ 204 Memory at b6a00000 (64-bit, non-prefetchable) [size=32K] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 21 1b 42 21 06 04 10 00 00 30 03 0c 10 00 00 00 10: 04 00 a0 b6 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 07 50 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 46:00.0 SATA controller [0106]: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:0612] (rev 02) (prog-if 01 [AHCI 1.0]) DeviceName: Onboard LAN RTL8111 Subsystem: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:1060] Flags: bus master, fast devsel, latency 0, IRQ 88 I/O ports at 9050 [size=8] I/O ports at 9040 [size=4] I/O ports at 9030 [size=8] I/O ports at 9020 [size=4] I/O ports at 9000 [size=32] Memory at b6b00000 (32-bit, non-prefetchable) [size=512] Capabilities: <access denied> Kernel driver in use: ahci Kernel modules: ahci 00: 21 1b 12 06 07 04 10 00 02 01 06 01 00 00 00 00 10: 51 90 00 00 41 90 00 00 31 90 00 00 21 90 00 00 20: 01 90 00 00 00 00 b0 b6 00 00 00 00 21 1b 60 10 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 47:00.0 Network controller [0280]: Intel Corporation Wi-Fi 6 AX200 [8086:2723] (rev 1a) Subsystem: Intel Corporation Wi-Fi 6 AX200 [8086:0084] Flags: bus master, fast devsel, latency 0, IRQ 55 Memory at b6c00000 (64-bit, non-prefetchable) [size=16K] Capabilities: <access denied> Kernel driver in use: iwlwifi Kernel modules: iwlwifi 00: 86 80 23 27 06 04 10 00 1a 00 80 02 10 00 00 00 10: 04 00 c0 b6 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 84 00 30: 00 00 00 00 c8 00 00 00 00 00 00 00 ff 01 00 00 48:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Flags: fast devsel Capabilities: <access denied> 00: 22 10 85 14 00 00 10 00 00 00 00 13 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 85 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 48:00.1 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Matisse USB 3.0 Host Controller [1022:149c] (prog-if 30 [XHCI]) Subsystem: Advanced Micro Devices, Inc. [AMD] Matisse USB 3.0 Host Controller [1022:1486] Flags: bus master, fast devsel, latency 0, IRQ 213 Memory at b6d00000 (64-bit, non-prefetchable) [size=1M] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 22 10 9c 14 07 04 10 00 00 30 03 0c 10 00 80 00 10: 04 00 d0 b6 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 86 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 01 00 00 48:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Matisse USB 3.0 Host Controller [1022:149c] (prog-if 30 [XHCI]) Subsystem: Advanced Micro Devices, Inc. [AMD] Matisse USB 3.0 Host Controller [1022:148c] Flags: bus master, fast devsel, latency 0, IRQ 57 Memory at b6e00000 (64-bit, non-prefetchable) [size=1M] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 22 10 9c 14 07 04 10 00 00 30 03 0c 10 00 80 00 10: 04 00 e0 b6 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 8c 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 03 00 00 49:00.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7901] (rev 51) (prog-if 01 [AHCI 1.0]) DeviceName: X570/590 SATA0 Subsystem: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7901] Flags: bus master, fast devsel, latency 0, IRQ 109 Memory at b6f00000 (32-bit, non-prefetchable) [size=2K] Capabilities: <access denied> Kernel driver in use: ahci Kernel modules: ahci 00: 22 10 01 79 07 04 10 00 51 01 06 01 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 f0 b6 00 00 00 00 22 10 01 79 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 01 00 00 4a:00.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7901] (rev 51) (prog-if 01 [AHCI 1.0]) DeviceName: X570/590 SATA1 Subsystem: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7901] Flags: bus master, fast devsel, latency 0, IRQ 188 Memory at b7000000 (32-bit, non-prefetchable) [size=2K] Capabilities: <access denied> Kernel driver in use: ahci Kernel modules: ahci 00: 22 10 01 79 07 04 10 00 51 01 06 01 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 b7 00 00 00 00 22 10 01 79 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 01 00 00 4b:00.0 Multimedia video controller [0400]: Blackmagic Design DeckLink 4K Extreme 12G [bdbd:a136] Subsystem: Blackmagic Design DeckLink 4K Extreme 12G [bdbd:a136] Flags: bus master, fast devsel, latency 0, IRQ 608 Memory at cd700000 (64-bit, non-prefetchable) [size=1M] Capabilities: <access denied> Kernel driver in use: blackmagic-io Kernel modules: blackmagic_io 00: bd bd 36 a1 06 04 10 00 00 00 00 04 00 00 00 00 10: 04 00 70 cd 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 bd bd 36 a1 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 00 00 4c:00.0 PCI bridge [0604]: Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018] [8086:15ea] (rev 06) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 59 Bus: primary=4c, secondary=4d, subordinate=5d, sec-latency=0 I/O behind bridge: 00007000-00008fff [size=8K] Memory behind bridge: bcc00000-ccdfffff [size=258M] Prefetchable memory behind bridge: 00000000b8a00000-00000000bc9fffff [size=64M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 86 80 ea 15 07 04 10 00 06 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 4c 4d 5d 00 71 81 00 00 20: c0 bc d0 cc a1 b8 91 bc 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 02 00 4d:00.0 PCI bridge [0604]: Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018] [8086:15ea] (rev 06) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 60 Bus: primary=4d, secondary=4e, subordinate=4e, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: ccd00000-ccdfffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 86 80 ea 15 07 04 10 00 06 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 4d 4e 4e 00 f1 01 00 00 20: d0 cc d0 cc f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 02 00 4d:01.0 PCI bridge [0604]: Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018] [8086:15ea] (rev 06) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 62 Bus: primary=4d, secondary=4f, subordinate=55, sec-latency=0 I/O behind bridge: 00007000-00007fff [size=4K] Memory behind bridge: c4c00000-ccbfffff [size=128M] Prefetchable memory behind bridge: 00000000baa00000-00000000bc9fffff [size=32M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 86 80 ea 15 07 04 10 00 06 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 4d 4f 55 00 71 71 00 00 20: c0 c4 b0 cc a1 ba 91 bc 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 02 00 4d:02.0 PCI bridge [0604]: Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018] [8086:15ea] (rev 06) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 63 Bus: primary=4d, secondary=56, subordinate=56, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: ccc00000-cccfffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 86 80 ea 15 07 04 10 00 06 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 4d 56 56 00 f1 01 00 00 20: c0 cc c0 cc f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 02 00 4d:04.0 PCI bridge [0604]: Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018] [8086:15ea] (rev 06) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 64 Bus: primary=4d, secondary=57, subordinate=5d, sec-latency=0 I/O behind bridge: 00008000-00008fff [size=4K] Memory behind bridge: bcc00000-c4bfffff [size=128M] Prefetchable memory behind bridge: 00000000b8a00000-00000000ba9fffff [size=32M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 86 80 ea 15 07 04 10 00 06 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 4d 57 5d 00 81 81 00 00 20: c0 bc b0 c4 a1 b8 91 ba 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 02 00 4e:00.0 System peripheral [0880]: Intel Corporation JHL7540 Thunderbolt 3 NHI [Titan Ridge 4C 2018] [8086:15eb] (rev 06) Subsystem: Gigabyte Technology Co., Ltd JHL7540 Thunderbolt 3 NHI [Titan Ridge 4C 2018] [1458:a207] Flags: bus master, fast devsel, latency 0, IRQ 27 Memory at ccd00000 (32-bit, non-prefetchable) [size=256K] Memory at ccd40000 (32-bit, non-prefetchable) [size=4K] Capabilities: <access denied> Kernel driver in use: thunderbolt Kernel modules: thunderbolt 00: 86 80 eb 15 07 04 10 00 06 00 80 08 10 00 00 00 10: 00 00 d0 cc 00 00 d4 cc 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 07 a2 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 00 00 56:00.0 USB controller [0c03]: Intel Corporation JHL7540 Thunderbolt 3 USB Controller [Titan Ridge 4C 2018] [8086:15ec] (rev 06) (prog-if 30 [XHCI]) Subsystem: Gigabyte Technology Co., Ltd JHL7540 Thunderbolt 3 USB Controller [Titan Ridge 4C 2018] [1458:a207] Flags: fast devsel, IRQ 222 Memory at ccc00000 (32-bit, non-prefetchable) [size=64K] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 86 80 ec 15 03 04 10 00 06 30 03 0c 10 00 00 00 10: 00 00 c0 cc 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 07 a2 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 00 00 5e:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Flags: fast devsel Capabilities: <access denied> 00: 22 10 8a 14 00 00 10 00 00 00 00 13 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 8a 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 5f:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Flags: fast devsel Capabilities: <access denied> 00: 22 10 85 14 00 00 10 00 00 00 00 13 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 85 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 60:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Flags: fast devsel 00: 22 10 80 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 80 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:00.2 IOMMU [0806]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Flags: fast devsel Capabilities: <access denied> 00: 22 10 81 14 40 00 10 00 00 00 06 08 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 81 14 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 00 00 60:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:05.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:07.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:07.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 66 Bus: primary=60, secondary=61, subordinate=61, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 60 61 61 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 60:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 68 Bus: primary=60, secondary=62, subordinate=62, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 60 62 62 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 61:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Flags: fast devsel Capabilities: <access denied> 00: 22 10 8a 14 00 00 10 00 00 00 00 13 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 8a 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 62:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Flags: fast devsel Capabilities: <access denied> 00: 22 10 85 14 00 00 10 00 00 00 00 13 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 85 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00

1 0

Gigabyte TRX40 Aorus Xtreme rev 1.0
by Aurélien Plancher 23 Oct '22

23 Oct '22

Hi, I'm trying to backup by BIOS from Linux but it doesn't seem to recognize the chip (from a Gigabyte TRX40 Aorus Xtreme rev 1.0). Can you please update your software to support it? Tannk you very much. Here are the logs: sudo flashrom -V -p internal Flashrom v1.2 on Linux 5.13.0-39-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org flashrom was built with libpci 3.6.4, GCC 9.2.1 20200304, little endian Command line (3 args): flashrom -V -p internal Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Initializing internal programmer /sys/class/mtd/mtd0 does not exist No coreboot table found. Using Internal DMI decoder. No DMI table found. Found ITE Super I/O, ID 0x8688 on port 0x2e Found chipset "AMD FP4" with PCI ID 1022:790e. Enabling flash write... SPI base address is at 0xfec10000 FCH device found but SMBus revision 0x61 does not match known values. Please report this to flashrom(a)flashrom.org and include this log and the output of lspci -nnvx, thanks!. Could not determine chipset generation.ROM strap override is not active PROBLEMS, continuing anyway lspci -nnvx 00:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Flags: fast devsel 00: 22 10 80 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 80 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.2 IOMMU [0806]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Flags: fast devsel Capabilities: <access denied> 00: 22 10 81 14 40 00 10 00 00 00 06 08 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 81 14 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 00 00 00:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:01.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge [1022:1483] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 33 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: d2000000-d21fffff [size=2M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 83 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 f1 01 00 20 20: 00 d2 10 d2 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 00:01.2 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge [1022:1483] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 34 Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: d4200000-d42fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 83 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 f1 01 00 20 20: 20 d4 20 d4 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 00:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:05.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:07.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:07.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 36 Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 03 03 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 00:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 37 Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: d4100000-d41fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 04 04 00 f1 01 00 00 20: 10 d4 10 d4 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 00:14.0 SMBus [0c05]: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller [1022:790b] (rev 61) Subsystem: Gigabyte Technology Co., Ltd FCH SMBus Controller [1458:5001] Flags: 66MHz, medium devsel Kernel modules: i2c_piix4, sp5100_tco 00: 22 10 0b 79 03 04 20 02 61 00 05 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 01 50 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:14.3 ISA bridge [0601]: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge [1022:790e] (rev 51) Subsystem: Gigabyte Technology Co., Ltd FCH LPC Bridge [1458:5001] Flags: bus master, 66MHz, medium devsel, latency 0 00: 22 10 0e 79 0f 00 20 02 51 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 01 50 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 0 [1022:1490] Flags: fast devsel 00: 22 10 90 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.1 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 1 [1022:1491] Flags: fast devsel 00: 22 10 91 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.2 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 2 [1022:1492] Flags: fast devsel 00: 22 10 92 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.3 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 3 [1022:1493] Flags: fast devsel Kernel driver in use: k10temp Kernel modules: k10temp 00: 22 10 93 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.4 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 4 [1022:1494] Flags: fast devsel 00: 22 10 94 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.5 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 5 [1022:1495] Flags: fast devsel 00: 22 10 95 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.6 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 6 [1022:1496] Flags: fast devsel 00: 22 10 96 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.7 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship Device 24; Function 7 [1022:1497] Flags: fast devsel 00: 22 10 97 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01:00.0 Non-Volatile memory controller [0108]: Samsung Electronics Co Ltd NVMe SSD Controller PM173X [144d:a824] (prog-if 02 [NVM Express]) Subsystem: Samsung Electronics Co Ltd NVMe SSD Controller PM173X [144d:a801] Flags: bus master, fast devsel, latency 0, IRQ 78, NUMA node 0 Memory at d2010000 (64-bit, non-prefetchable) [size=32K] Expansion ROM at d2000000 [disabled] [size=64K] Capabilities: <access denied> Kernel driver in use: nvme Kernel modules: nvme 00: 4d 14 24 a8 06 04 10 00 00 02 08 01 00 00 00 00 10: 04 00 01 d2 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 4d 14 01 a8 30: 00 00 30 d4 40 00 00 00 00 00 00 00 ff 01 00 00 02:00.0 Non-Volatile memory controller [0108]: Micron Technology Inc Device [1344:51b1] (rev 02) (prog-if 02 [NVM Express]) Subsystem: Micron Technology Inc Device [1344:6000] Flags: bus master, fast devsel, latency 0, IRQ 80, NUMA node 0 Memory at d4220000 (64-bit, non-prefetchable) [size=16K] Expansion ROM at d4200000 [disabled] [size=128K] Capabilities: <access denied> Kernel driver in use: nvme Kernel modules: nvme 00: 44 13 b1 51 06 04 10 00 02 02 08 01 00 00 00 00 10: 04 00 22 d4 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 44 13 00 60 30: 00 00 20 d4 c0 00 00 00 00 00 00 00 ff 01 00 00 03:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Flags: fast devsel Capabilities: <access denied> 00: 22 10 8a 14 00 00 10 00 00 00 00 13 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 8a 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 04:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Flags: fast devsel Capabilities: <access denied> 00: 22 10 85 14 00 00 10 00 00 00 00 13 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 85 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 04:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Starship USB 3.0 Host Controller [1022:148c] (prog-if 30 [XHCI]) Subsystem: Gigabyte Technology Co., Ltd Starship USB 3.0 Host Controller [1458:5007] Flags: bus master, fast devsel, latency 0, IRQ 69 Memory at d4100000 (64-bit, non-prefetchable) [size=1M] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 22 10 8c 14 07 04 10 00 00 30 03 0c 10 00 80 00 10: 04 00 10 d4 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 07 50 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 03 00 00 20:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Flags: fast devsel 00: 22 10 80 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 80 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:00.2 IOMMU [0806]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Flags: fast devsel Capabilities: <access denied> 00: 22 10 81 14 40 00 10 00 00 00 06 08 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 81 14 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 00 00 20:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:03.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge [1022:1483] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 38 Bus: primary=20, secondary=21, subordinate=21, sec-latency=0 I/O behind bridge: 00006000-00006fff [size=4K] Memory behind bridge: b2000000-b30fffff [size=17M] Prefetchable memory behind bridge: 0000009000000000-0000009801ffffff [size=32800M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 83 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 20 21 21 00 61 61 00 20 20: 00 b2 00 b3 01 00 f1 01 90 00 00 00 98 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 20:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:05.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:07.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:07.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 40 Bus: primary=20, secondary=22, subordinate=22, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 20 22 22 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 20:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 41 Bus: primary=20, secondary=23, subordinate=23, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b3200000-b34fffff [size=3M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 20 23 23 00 f1 01 00 00 20: 20 b3 40 b3 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 21:00.0 VGA compatible controller [0300]: NVIDIA Corporation Device [10de:2684] (rev a1) (prog-if 00 [VGA controller]) Subsystem: CardExpert Technology Device [10b0:f297] Flags: bus master, fast devsel, latency 0, IRQ 629 Memory at b2000000 (32-bit, non-prefetchable) [size=16M] Memory at 9000000000 (64-bit, prefetchable) [size=32G] Memory at 9800000000 (64-bit, prefetchable) [size=32M] I/O ports at 6000 [size=128] Expansion ROM at b3000000 [virtual] [disabled] [size=512K] Capabilities: <access denied> Kernel driver in use: nvidia Kernel modules: nvidiafb, nouveau, nvidia_drm, nvidia 00: de 10 84 26 07 04 10 00 a1 00 00 03 00 00 80 00 10: 00 00 00 b2 0c 00 00 00 90 00 00 00 0c 00 00 00 20: 98 00 00 00 01 60 00 00 00 00 00 00 b0 10 97 f2 30: 00 00 00 00 60 00 00 00 00 00 00 00 ff 01 00 00 22:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Flags: fast devsel Capabilities: <access denied> 00: 22 10 8a 14 00 00 10 00 00 00 00 13 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 8a 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 23:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Flags: fast devsel Capabilities: <access denied> 00: 22 10 85 14 00 00 10 00 00 00 00 13 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 85 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 23:00.1 Encryption controller [1080]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Cryptographic Coprocessor PSPCPP [1022:1486] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Cryptographic Coprocessor PSPCPP [1022:1486] Flags: bus master, fast devsel, latency 0, IRQ 609 Memory at b3300000 (32-bit, non-prefetchable) [size=1M] Memory at b3400000 (32-bit, non-prefetchable) [size=8K] Capabilities: <access denied> Kernel driver in use: ccp Kernel modules: ccp 00: 22 10 86 14 06 04 10 00 00 00 80 10 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 30 b3 00 00 00 00 20: 00 00 00 00 00 00 40 b3 00 00 00 00 22 10 86 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 01 00 00 23:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Starship USB 3.0 Host Controller [1022:148c] (prog-if 30 [XHCI]) Subsystem: Gigabyte Technology Co., Ltd Starship USB 3.0 Host Controller [1458:5007] Flags: bus master, fast devsel, latency 0, IRQ 100 Memory at b3200000 (64-bit, non-prefetchable) [size=1M] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 22 10 8c 14 07 04 10 00 00 30 03 0c 10 00 80 00 10: 04 00 20 b3 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 07 50 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 03 00 00 40:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Flags: fast devsel 00: 22 10 80 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 80 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:00.2 IOMMU [0806]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Flags: fast devsel Capabilities: <access denied> 00: 22 10 81 14 40 00 10 00 00 00 06 08 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 81 14 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 00 00 40:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:01.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge [1022:1483] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 42 Bus: primary=40, secondary=41, subordinate=4a, sec-latency=0 I/O behind bridge: 00009000-00009fff [size=4K] Memory behind bridge: b6000000-b70fffff [size=17M] Prefetchable memory behind bridge: 00000000b8000000-00000000b88fffff [size=9M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 83 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 40 41 4a 00 91 91 00 20 20: 00 b6 00 b7 01 b8 81 b8 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 40:01.3 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge [1022:1483] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 43 Bus: primary=40, secondary=4b, subordinate=4b, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: cd700000-cd7fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 83 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 40 4b 4b 00 f1 01 00 20 20: 70 cd 70 cd f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 40:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:03.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge [1022:1483] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 44 Bus: primary=40, secondary=4c, subordinate=5d, sec-latency=0 I/O behind bridge: 00007000-00008fff [size=8K] Memory behind bridge: bcc00000-ccdfffff [size=258M] Prefetchable memory behind bridge: 00000000b8a00000-00000000bc9fffff [size=64M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 83 14 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 40 4c 5d 00 71 81 00 20 20: c0 bc d0 cc a1 b8 91 bc 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 40:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:05.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:07.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:07.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 46 Bus: primary=40, secondary=5e, subordinate=5e, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 40 5e 5e 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 40:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 48 Bus: primary=40, secondary=5f, subordinate=5f, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 40 5f 5f 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 41:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse Switch Upstream [1022:57ad] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 26 Bus: primary=41, secondary=42, subordinate=4a, sec-latency=0 I/O behind bridge: 00009000-00009fff [size=4K] Memory behind bridge: b6000000-b70fffff [size=17M] Prefetchable memory behind bridge: 00000000b8000000-00000000b88fffff [size=9M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 ad 57 07 00 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 41 42 4a 00 91 91 00 00 20: 00 b6 00 b7 01 b8 81 b8 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 42:01.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a3] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 49 Bus: primary=42, secondary=43, subordinate=43, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b6000000-b60fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a3 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 43 43 00 f1 01 00 00 20: 00 b6 00 b6 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 42:02.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a3] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 50 Bus: primary=42, secondary=44, subordinate=44, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b6100000-b69fffff [size=9M] Prefetchable memory behind bridge: 00000000b8000000-00000000b88fffff [size=9M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a3 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 44 44 00 f1 01 00 20 20: 10 b6 90 b6 01 b8 81 b8 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 42:03.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a3] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 51 Bus: primary=42, secondary=45, subordinate=45, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b6a00000-b6afffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a3 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 45 45 00 f1 01 00 00 20: a0 b6 a0 b6 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 42:04.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a3] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 52 Bus: primary=42, secondary=46, subordinate=46, sec-latency=0 I/O behind bridge: 00009000-00009fff [size=4K] Memory behind bridge: b6b00000-b6bfffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a3 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 46 46 00 91 91 00 20 20: b0 b6 b0 b6 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 42:05.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a3] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 53 Bus: primary=42, secondary=47, subordinate=47, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b6c00000-b6cfffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a3 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 47 47 00 f1 01 00 00 20: c0 b6 c0 b6 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 12 00 42:08.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a4] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 54 Bus: primary=42, secondary=48, subordinate=48, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b6d00000-b6efffff [size=2M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a4 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 48 48 00 f1 01 00 00 20: d0 b6 e0 b6 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 42:09.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a4] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 56 Bus: primary=42, secondary=49, subordinate=49, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b6f00000-b6ffffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a4 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 49 49 00 f1 01 00 00 20: f0 b6 f0 b6 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 42:0a.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Matisse PCIe GPP Bridge [1022:57a4] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 58 Bus: primary=42, secondary=4a, subordinate=4a, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: b7000000-b70fffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 a4 57 07 04 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 42 4a 4a 00 f1 01 00 00 20: 00 b7 00 b7 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 43:00.0 Non-Volatile memory controller [0108]: Micron Technology Inc Device [1344:51b1] (rev 02) (prog-if 02 [NVM Express]) Subsystem: Micron Technology Inc Device [1344:6000] Flags: bus master, fast devsel, latency 0, IRQ 55, NUMA node 0 Memory at b6000000 (64-bit, non-prefetchable) [size=16K] Expansion ROM at <ignored> [disabled] Capabilities: <access denied> Kernel driver in use: nvme Kernel modules: nvme 00: 44 13 b1 51 06 04 10 00 02 02 08 01 00 00 00 00 10: 04 00 00 b6 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 44 13 00 60 30: 00 00 60 cd c0 00 00 00 00 00 00 00 ff 01 00 00 44:00.0 Ethernet controller [0200]: Intel Corporation Ethernet Controller 10G X550T [8086:1563] (rev 01) Subsystem: Gigabyte Technology Co., Ltd Ethernet Controller 10G X550T [1458:e000] Flags: bus master, fast devsel, latency 0, IRQ 57 Memory at b8400000 (64-bit, prefetchable) [size=4M] Memory at b8804000 (64-bit, prefetchable) [size=16K] Expansion ROM at b8880000 [disabled] [size=512K] Capabilities: <access denied> Kernel driver in use: ixgbe Kernel modules: ixgbe 00: 86 80 63 15 06 04 10 00 01 00 00 02 00 00 80 00 10: 0c 00 40 b8 00 00 00 00 00 00 00 00 00 00 00 00 20: 0c 40 80 b8 00 00 00 00 00 00 00 00 58 14 00 e0 30: 00 00 58 cd 40 00 00 00 00 00 00 00 ff 01 00 00 44:00.1 Ethernet controller [0200]: Intel Corporation Ethernet Controller 10G X550T [8086:1563] (rev 01) Subsystem: Gigabyte Technology Co., Ltd Ethernet Controller 10G X550T [1458:e000] Flags: bus master, fast devsel, latency 0, IRQ 204 Memory at b8000000 (64-bit, prefetchable) [size=4M] Memory at b8800000 (64-bit, prefetchable) [size=16K] Expansion ROM at <ignored> [disabled] Capabilities: <access denied> Kernel driver in use: ixgbe Kernel modules: ixgbe 00: 86 80 63 15 06 04 10 00 01 00 00 02 10 00 80 00 10: 0c 00 00 b8 00 00 00 00 00 00 00 00 00 00 00 00 20: 0c 00 80 b8 00 00 00 00 00 00 00 00 58 14 00 e0 30: 00 00 50 cd 40 00 00 00 00 00 00 00 ff 02 00 00 45:00.0 USB controller [0c03]: ASMedia Technology Inc. ASM2142 USB 3.1 Host Controller [1b21:2142] (prog-if 30 [XHCI]) Subsystem: Gigabyte Technology Co., Ltd ASM2142 USB 3.1 Host Controller [1458:5007] Flags: bus master, fast devsel, latency 0, IRQ 204 Memory at b6a00000 (64-bit, non-prefetchable) [size=32K] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 21 1b 42 21 06 04 10 00 00 30 03 0c 10 00 00 00 10: 04 00 a0 b6 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 07 50 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 46:00.0 SATA controller [0106]: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:0612] (rev 02) (prog-if 01 [AHCI 1.0]) DeviceName: Onboard LAN RTL8111 Subsystem: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:1060] Flags: bus master, fast devsel, latency 0, IRQ 88 I/O ports at 9050 [size=8] I/O ports at 9040 [size=4] I/O ports at 9030 [size=8] I/O ports at 9020 [size=4] I/O ports at 9000 [size=32] Memory at b6b00000 (32-bit, non-prefetchable) [size=512] Capabilities: <access denied> Kernel driver in use: ahci Kernel modules: ahci 00: 21 1b 12 06 07 04 10 00 02 01 06 01 00 00 00 00 10: 51 90 00 00 41 90 00 00 31 90 00 00 21 90 00 00 20: 01 90 00 00 00 00 b0 b6 00 00 00 00 21 1b 60 10 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 47:00.0 Network controller [0280]: Intel Corporation Wi-Fi 6 AX200 [8086:2723] (rev 1a) Subsystem: Intel Corporation Wi-Fi 6 AX200 [8086:0084] Flags: bus master, fast devsel, latency 0, IRQ 55 Memory at b6c00000 (64-bit, non-prefetchable) [size=16K] Capabilities: <access denied> Kernel driver in use: iwlwifi Kernel modules: iwlwifi 00: 86 80 23 27 06 04 10 00 1a 00 80 02 10 00 00 00 10: 04 00 c0 b6 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 84 00 30: 00 00 00 00 c8 00 00 00 00 00 00 00 ff 01 00 00 48:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Flags: fast devsel Capabilities: <access denied> 00: 22 10 85 14 00 00 10 00 00 00 00 13 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 85 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 48:00.1 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Matisse USB 3.0 Host Controller [1022:149c] (prog-if 30 [XHCI]) Subsystem: Advanced Micro Devices, Inc. [AMD] Matisse USB 3.0 Host Controller [1022:1486] Flags: bus master, fast devsel, latency 0, IRQ 213 Memory at b6d00000 (64-bit, non-prefetchable) [size=1M] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 22 10 9c 14 07 04 10 00 00 30 03 0c 10 00 80 00 10: 04 00 d0 b6 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 86 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 01 00 00 48:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Matisse USB 3.0 Host Controller [1022:149c] (prog-if 30 [XHCI]) Subsystem: Advanced Micro Devices, Inc. [AMD] Matisse USB 3.0 Host Controller [1022:148c] Flags: bus master, fast devsel, latency 0, IRQ 57 Memory at b6e00000 (64-bit, non-prefetchable) [size=1M] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 22 10 9c 14 07 04 10 00 00 30 03 0c 10 00 80 00 10: 04 00 e0 b6 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 8c 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 03 00 00 49:00.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7901] (rev 51) (prog-if 01 [AHCI 1.0]) DeviceName: X570/590 SATA0 Subsystem: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7901] Flags: bus master, fast devsel, latency 0, IRQ 109 Memory at b6f00000 (32-bit, non-prefetchable) [size=2K] Capabilities: <access denied> Kernel driver in use: ahci Kernel modules: ahci 00: 22 10 01 79 07 04 10 00 51 01 06 01 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 f0 b6 00 00 00 00 22 10 01 79 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 01 00 00 4a:00.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7901] (rev 51) (prog-if 01 [AHCI 1.0]) DeviceName: X570/590 SATA1 Subsystem: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7901] Flags: bus master, fast devsel, latency 0, IRQ 188 Memory at b7000000 (32-bit, non-prefetchable) [size=2K] Capabilities: <access denied> Kernel driver in use: ahci Kernel modules: ahci 00: 22 10 01 79 07 04 10 00 51 01 06 01 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 b7 00 00 00 00 22 10 01 79 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 01 00 00 4b:00.0 Multimedia video controller [0400]: Blackmagic Design DeckLink 4K Extreme 12G [bdbd:a136] Subsystem: Blackmagic Design DeckLink 4K Extreme 12G [bdbd:a136] Flags: bus master, fast devsel, latency 0, IRQ 608 Memory at cd700000 (64-bit, non-prefetchable) [size=1M] Capabilities: <access denied> Kernel driver in use: blackmagic-io Kernel modules: blackmagic_io 00: bd bd 36 a1 06 04 10 00 00 00 00 04 00 00 00 00 10: 04 00 70 cd 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 bd bd 36 a1 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 00 00 4c:00.0 PCI bridge [0604]: Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018] [8086:15ea] (rev 06) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 59 Bus: primary=4c, secondary=4d, subordinate=5d, sec-latency=0 I/O behind bridge: 00007000-00008fff [size=8K] Memory behind bridge: bcc00000-ccdfffff [size=258M] Prefetchable memory behind bridge: 00000000b8a00000-00000000bc9fffff [size=64M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 86 80 ea 15 07 04 10 00 06 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 4c 4d 5d 00 71 81 00 00 20: c0 bc d0 cc a1 b8 91 bc 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 02 00 4d:00.0 PCI bridge [0604]: Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018] [8086:15ea] (rev 06) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 60 Bus: primary=4d, secondary=4e, subordinate=4e, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: ccd00000-ccdfffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 86 80 ea 15 07 04 10 00 06 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 4d 4e 4e 00 f1 01 00 00 20: d0 cc d0 cc f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 02 00 4d:01.0 PCI bridge [0604]: Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018] [8086:15ea] (rev 06) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 62 Bus: primary=4d, secondary=4f, subordinate=55, sec-latency=0 I/O behind bridge: 00007000-00007fff [size=4K] Memory behind bridge: c4c00000-ccbfffff [size=128M] Prefetchable memory behind bridge: 00000000baa00000-00000000bc9fffff [size=32M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 86 80 ea 15 07 04 10 00 06 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 4d 4f 55 00 71 71 00 00 20: c0 c4 b0 cc a1 ba 91 bc 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 02 00 4d:02.0 PCI bridge [0604]: Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018] [8086:15ea] (rev 06) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 63 Bus: primary=4d, secondary=56, subordinate=56, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: ccc00000-cccfffff [size=1M] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 86 80 ea 15 07 04 10 00 06 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 4d 56 56 00 f1 01 00 00 20: c0 cc c0 cc f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 02 00 4d:04.0 PCI bridge [0604]: Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018] [8086:15ea] (rev 06) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 64 Bus: primary=4d, secondary=57, subordinate=5d, sec-latency=0 I/O behind bridge: 00008000-00008fff [size=4K] Memory behind bridge: bcc00000-c4bfffff [size=128M] Prefetchable memory behind bridge: 00000000b8a00000-00000000ba9fffff [size=32M] Capabilities: <access denied> Kernel driver in use: pcieport 00: 86 80 ea 15 07 04 10 00 06 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 4d 57 5d 00 81 81 00 00 20: c0 bc b0 c4 a1 b8 91 ba 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 02 00 4e:00.0 System peripheral [0880]: Intel Corporation JHL7540 Thunderbolt 3 NHI [Titan Ridge 4C 2018] [8086:15eb] (rev 06) Subsystem: Gigabyte Technology Co., Ltd JHL7540 Thunderbolt 3 NHI [Titan Ridge 4C 2018] [1458:a207] Flags: bus master, fast devsel, latency 0, IRQ 27 Memory at ccd00000 (32-bit, non-prefetchable) [size=256K] Memory at ccd40000 (32-bit, non-prefetchable) [size=4K] Capabilities: <access denied> Kernel driver in use: thunderbolt Kernel modules: thunderbolt 00: 86 80 eb 15 07 04 10 00 06 00 80 08 10 00 00 00 10: 00 00 d0 cc 00 00 d4 cc 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 07 a2 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 00 00 56:00.0 USB controller [0c03]: Intel Corporation JHL7540 Thunderbolt 3 USB Controller [Titan Ridge 4C 2018] [8086:15ec] (rev 06) (prog-if 30 [XHCI]) Subsystem: Gigabyte Technology Co., Ltd JHL7540 Thunderbolt 3 USB Controller [Titan Ridge 4C 2018] [1458:a207] Flags: fast devsel, IRQ 222 Memory at ccc00000 (32-bit, non-prefetchable) [size=64K] Capabilities: <access denied> Kernel driver in use: xhci_hcd Kernel modules: xhci_pci 00: 86 80 ec 15 03 04 10 00 06 30 03 0c 10 00 00 00 10: 00 00 c0 cc 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 07 a2 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 00 00 5e:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Flags: fast devsel Capabilities: <access denied> 00: 22 10 8a 14 00 00 10 00 00 00 00 13 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 8a 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 5f:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Flags: fast devsel Capabilities: <access denied> 00: 22 10 85 14 00 00 10 00 00 00 00 13 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 85 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 60:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Root Complex [1022:1480] Flags: fast devsel 00: 22 10 80 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 80 14 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:00.2 IOMMU [0806]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse IOMMU [1022:1481] Flags: fast devsel Capabilities: <access denied> 00: 22 10 81 14 40 00 10 00 00 00 06 08 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 81 14 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 00 00 60:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:05.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:07.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:07.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 66 Bus: primary=60, secondary=61, subordinate=61, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 60 61 61 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 60:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Host Bridge [1022:1482] Flags: fast devsel 00: 22 10 82 14 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Internal PCIe GPP Bridge 0 to bus[E:B] [1022:1484] (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 68 Bus: primary=60, secondary=62, subordinate=62, sec-latency=0 I/O behind bridge: [disabled] Memory behind bridge: [disabled] Prefetchable memory behind bridge: [disabled] Capabilities: <access denied> Kernel driver in use: pcieport 00: 22 10 84 14 07 04 10 00 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 60 62 62 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 12 00 61:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse PCIe Dummy Function [1022:148a] Flags: fast devsel Capabilities: <access denied> 00: 22 10 8a 14 00 00 10 00 00 00 00 13 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 8a 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00 62:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Subsystem: Advanced Micro Devices, Inc. [AMD] Starship/Matisse Reserved SPP [1022:1485] Flags: fast devsel Capabilities: <access denied> 00: 22 10 85 14 00 00 10 00 00 00 00 13 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 85 14 30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 00 00

1 0

master state / potential release
by Nico Huber 18 Oct '22

18 Oct '22

Hi all, I haven't tracked all recent development closely, so here's a quick question to everyone currently working on the master branch: How is the current state wrt. to stability and a potential release from the master branch? Also, how does it look compared to the state half a year ago? I know some issues were fixed, but also new ones came up. What do people think, are we closer to / farther away from a release now? Nico

5 14

Winbond W25Q256JW
by Israel Toro 16 Oct '22

16 Oct '22

Hi, Is any work in progress in relation to the W25Q256JW winbond flash? I have a ASUS motherboard with a corrupted flash and I’m trying to re-flash it with a CH341 programmer but don’t find how to make it work. Thanks for any info or help you can provide, Toro -- Israel Toro 787-638-4175

1 0

Asus Z87-A
by Sami 16 Oct '22

16 Oct '22

Is there anything I can do anymore? // Sami flashrom --programmer internal --ifd -i bios --noverify-all -w Z87A.bin flashrom v1.2 on Linux 5.10.0-18-amd64 (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found chipset "Intel Z87". Enabling flash write... Warning: BIOS region SMM protection is enabled! Warning: Setting Bios Control at 0xdc from 0x2a to 0x09 failed. New value is 0x2a. SPI Configuration is locked down. FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only. FREG2: Management Engine region (0x00001000-0x0017ffff) is locked. Not all flash regions are freely accessible by flashrom. This is most likely due to an active ME. Please see https://flashrom.org/ME for details. At least some flash regions are read protected. You have to use a flash layout and include only accessible regions. For write operations, you'll additionally need the --noverify-all switch. See manpage for more details. OK. Found Winbond flash chip "W25Q64.V" (8192 kB, SPI) mapped at physical address 0x00000000ff800000. Reading ich descriptor... done. Using region: "bios". Reading old flash chip contents... done. Erasing and writing flash chip... Transaction error! spi_write_cmd failed during command execution at address 0x180000 Reading current flash chip contents... done. Looking for another erase function. spi_write_cmd failed during command execution at address 0x180000 Reading current flash chip contents... done. Looking for another erase function. spi_write_cmd failed during command execution at address 0x180000 Reading current flash chip contents... done. Looking for another erase function. Transaction error! Can't read! Aborting. FAILED! Uh oh. Erase/write failed. Your flash chip is in an unknown state. Get help on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org with the subject "FAILED: <your board name>"! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF!

2 2

[PATCH] Add support for XMC XM25QH128A. Read/write tested.
by Stijn Segers 13 Oct '22

13 Oct '22

Signed-off-by: Stijn Segers <foss(a)volatilesystems.org> --- flashchips.c | 49 ++++++++++++++++++++++++++++++++++++++++++++ include/flashchips.h | 1 + 2 files changed, 50 insertions(+) diff --git a/flashchips.c b/flashchips.c index 47a37ee..e3fd368 100644 --- a/flashchips.c +++ b/flashchips.c @@ -19707,6 +19707,55 @@ const struct flashchip flashchips[] = { .voltage = {1650, 1950}, }, + { + .vendor = "XMC", + .name = "XM25QH128A", + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = XMC_XM25QH128A, + .total_size = 16384, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_WRSR2, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .srl = {STATUS2, 0, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}}, + .tb = {STATUS1, 5, RW}, + .sec = {STATUS1, 6, RW}, + .cmp = {STATUS2, 6, RW}, + }, + .decode_range = decode_range_spi25, + }, + + { .vendor = "XMC", .name = "XM25QH128C", diff --git a/include/flashchips.h b/include/flashchips.h index 5df42dc..8317da7 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -818,6 +818,7 @@ #define ST_M45PE16 0x4015 #define XMC_XM25QH64C 0x4017 #define XMC_XM25QU64C 0x4117 +#define XMC_XM25QH128A 0x7018 #define XMC_XM25QH128C 0x4018 #define XMC_XM25QU128C 0x4118 #define XMC_XM25QH256C 0x4019 -- 2.36.1

1 0

Question on adding some WP documentation
by Sergii Dmytruk 11 Oct '22

11 Oct '22

Hi there, We have a bit of user documentation that shows how to lock a bootblock using WP [1] and what should be taken into account before you do it [2] and thought we can offer it to the upstream (after a bit of editing if there is interest). [1]: https://github.com/Dasharo/flashrom/blob/wp_integration/Documentation/heads… [2]: https://github.com/Dasharo/flashrom/blob/wp_integration/Documentation/bootb… There is Documentation/ directory in the repository, but I guess Wiki on www.flashrom.org might be more appropriate as it's not documentation for developers. The current format is Markdown, but `pandoc` can convert the files to MediaWiki without issues. Please check out the docs and say if they can be useful for the project. Cheers, Sergii

3 4

Reading from winbond on Thinkpad T14s G3A
by b83c 09 Oct '22

09 Oct '22

Hello, I have recently received a thinkpad T14s Gen 3 AMD (Ryzen 6850U) and given flashrom a try. However, the winbond chip inside wasn't detected. I wonder if the team at flashrom can work around it. For more infomation, I have attached the log as well as the images of the motherboard : https://postimg.cc/gallery/MqXWhHv. Thanks, B83C

1 0

Old IRC channel
by Nils Woeste 05 Oct '22

05 Oct '22

Hi, I encountered an Issue with flashing a BIOS and the message says "Get help on IRC at chat.freenode.net (channel #flashrom)" this points to an old server not monitored. The correct one (Libera.chat) should also be included in the error message. They could help me there. Version 1.2-5 Regards Nils --

3 3

Unknown flash chip
by Mbock Ernie 03 Oct '22

03 Oct '22

flashrom v1.2 on Linux 5.19.12-arch1-1 (x86_64) flashrom is free software, get the source code at https://flashrom.org flashrom was built with libpci 3.8.0, GCC 12.1.0, little endian Command line (3 args): flashrom -VV -p ch341a_spi Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Initializing ch341a_spi programmer Device revision is 3.0.4 The following protocols are supported: SPI. Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25LQ032/A25LQ32A, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25LQ16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for AMIC A25LQ64, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25DF021A, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25DL081, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25DL161, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25F1024(A), 128 kB: probe_spi_at25f: id1 0x00, id2 0x00 Probing for Atmel AT25F2048, 256 kB: probe_spi_at25f: id1 0x00, id2 0x00 Probing for Atmel AT25F4096, 512 kB: probe_spi_at25f: id1 0x00, id2 0x00 Probing for Atmel AT25F512, 64 kB: probe_spi_at25f: id1 0x00, id2 0x00 Probing for Atmel AT25F512A, 64 kB: probe_spi_at25f: id1 0x00, id2 0x00 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25SF041, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25SF081, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25SF161, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25SF321, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT25SL128A, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT45DB321E, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ESI ES25P16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ESI ES25P40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ESI ES25P80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ESMT F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ESMT F25L32PA, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25F64, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25P05, 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25P10, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25P16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25P20, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25P32, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25P40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25P64, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25P80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25QH128, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25QH64, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25S10, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25S16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25S20, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25S32, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25S40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25S64, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon EN25S80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25B128B/GD25Q128B, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25LQ128C/GD25LQ128D, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25LQ16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25LQ32, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25LQ40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25LQ64(B), 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25LQ80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25Q10, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25Q127C/GD25Q128C, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25Q16(B), 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25Q20(B), 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25Q256D, 32768 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25Q32(B), 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25Q40(B), 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25Q512, 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25Q64(B), 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25Q80(B), 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25T80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25VQ16C, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25VQ21B, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25VQ40C, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25VQ41B, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for GigaDevice GD25VQ80C, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ISSI IS25LP064, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ISSI IS25LP128, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ISSI IS25LP256, 32768 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ISSI IS25WP032, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ISSI IS25WP064, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ISSI IS25WP128, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ISSI IS25WP256, 32768 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Intel 25F160S33B8, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Intel 25F160S33T8, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Intel 25F320S33B8, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Intel 25F320S33T8, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Intel 25F640S33B8, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Intel 25F640S33T8, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX23L12854, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX23L1654, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX23L3254, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX23L6454, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L1005(C)/MX25L1006E, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L12805D, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L12835F/MX25L12845E/MX25L12865E, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L1605A/MX25L1606E/MX25L1608E, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L1605D/MX25L1608D/MX25L1673E, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L2005(C)/MX25L2006E, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L25635F/MX25L25645G, 32768 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L3205(A), 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L3205D/MX25L3208D, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L3206E/MX25L3208E, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L3273E, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L4005(A/C)/MX25L4006E, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L512(E)/MX25V512(C), 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L6405D, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L6406E/MX25L6408E, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E/MX25L6473F, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L6495F, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25L8005/MX25L8006E/MX25L8008E/MX25V8005, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25R6435F, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25U12835F, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25U1635E, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25U25635F, 32768 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25U3235E/F, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25U51245G, 65536 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25U6435E/F, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX25U8032E, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix MX66L51235F/MX25L51245G, 65536 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for Micron/Numonyx/ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for Micron/Numonyx/ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25P20-old, 256 kB: Ignoring RES in favour of RDID. Probing for Micron/Numonyx/ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for Micron/Numonyx/ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25PE10, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25PE20, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25PE40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M25PX80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M45PE10, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M45PE16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M45PE20, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M45PE40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST M45PE80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q00A..1G, 131072 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q00A..3G, 131072 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q016, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q032..1E, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q032..3E, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q064..1E, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q064..3E, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q128..1E, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q128..3E, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q256..1E, 32768 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q256..3E, 32768 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q512..1G, 65536 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron/Numonyx/ST N25Q512..3G, 65536 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron MT25QL01G, 131072 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron MT25QU01G, 131072 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron MT25QL02G, 262144 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron MT25QU02G, 262144 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron MT25QU128, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron MT25QL128, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron MT25QL256, 32768 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron MT25QU256, 32768 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron MT25QL512, 65536 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Micron MT25QU512, 65536 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Nantronics N25S10, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Nantronics N25S16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Nantronics N25S20, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Nantronics N25S40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Nantronics N25S80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LD010(C), 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LD020(C), 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LD040(C), 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LD256C, 32 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LD512(C), 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LQ016, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LQ020, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LQ032C, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LQ040, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LQ080, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LV010, 128 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for PMC Pm25LV010A, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC Pm25LV512(A), 64 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for SST SST25LF020A, 256 kB: probe_spi_rems: id1 0x68, id2 0x15 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for SST SST25LF080(A), 1024 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for SST SST25VF010(A), 128 kB: probe_spi_rems: id1 0x68, id2 0x15 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25VF020, 256 kB: probe_spi_rems: id1 0x68, id2 0x15 Probing for SST SST25VF020B, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0x68, id2 0x15 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0x68, id2 0x15 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25VF512(A), 64 kB: probe_spi_rems: id1 0x68, id2 0x15 Probing for SST SST25WF010, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25WF020, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25WF020A, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25WF040, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25WF040B, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25WF080, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25WF080B, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST25WF512, 64 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST26VF016B(A), 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST26VF032B(A), 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST SST26VF064B(A), 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ST M95M02, 256 kB: probe_spi_st95: id1 0xff, id2 0xffff Probing for Sanyo LE25FU106B, 128 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for Sanyo LE25FU206, 256 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for Sanyo LE25FU206A, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Sanyo LE25FU406B, 512 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for Sanyo LE25FU406C/LE25U40CMC, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Sanyo LE25FW106, 128 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for Sanyo LE25FW203A, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Sanyo LE25FW403A, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Sanyo LE25FW406A, 512 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for Sanyo LE25FW418A, 512 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for Sanyo LE25FW806, 1024 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for Sanyo LE25FW808, 1024 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL032A/P, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL064A/P, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL116K/S25FL216K, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL127S-256kB, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL127S-64kB, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL128P......0, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL128P......1, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL128S......0, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL128S......1, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL129P......0, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL129P......1, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL132K, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL164K, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL204K, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL208K, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL256S......0, 32768 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Spansion S25FL512S, 65536 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25P16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25P32, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25P80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q128.V, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q128.V..M, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q128.W, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q128.JW.DTR, 16384 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q16.V, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q16.W, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q20.W, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q256.V, 32768 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q256JV_M, 32768 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q32.V, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q32.W, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q40.V, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q40BW, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q40EW, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q64.V, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q64.W, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q80.V, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q80BW, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25Q80EW, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Zetta Device ZD25D20, 256 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Zetta Device ZD25D40, 512 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Unknown SFDP-capable chip, 0 kB: SFDP revision = 1.0 SFDP number of parameter headers is 2 (NPH = 1). SFDP parameter table header 0/1: ID 0x00, version 1.0 Length 36 B, Parameter Table Pointer 0x000030 Parsing JEDEC flash parameter table... 3-Byte only addressing. Status register is non-volatile and the standard does not allow vendors to tell us whether EWSR/WREN is needed for status register writes - assuming EWSR. Write chunk size is at least 64 B. Flash chip size is 4096 kB. Block eraser 0: 1024 x 4096 B with opcode 0x20 Tried to add a duplicate block eraser: 1024 x 4096 B with opcode 0x20. Block eraser 1: 128 x 32768 B with opcode 0x52 Block eraser 2: 64 x 65536 B with opcode 0xd8 done. SFDP parameter table header 1/1: ID 0x68, version 1.0 Length 12 B, Parameter Table Pointer 0x000060 === SFDP has autodetected a flash chip which is not natively supported by flashrom yet. All standard operations (read, verify, erase and write) should work, but to support all possible features we need to add them manually. You can help us by mailing us the output of the following command to flashrom(a)flashrom.org: 'flashrom -VV [plus the -p/--programmer parameter]' Thanks for your help! === Found Unknown flash chip "SFDP-capable chip" (4096 kB, SPI) on ch341a_spi. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Winbond unknown Winbond (ex Nexcom) SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0x68, id2 0x4016 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0x68, id2 0x15 Found Unknown flash chip "SFDP-capable chip" (4096 kB, SPI). No operations were specified. -- Regards, Mbock

1 0

Wish to contribute to your organisation
by Neelima Mohanty 02 Oct '22

02 Oct '22

Respected Sir/Madam, Myself Neelima Mohanty , an open source contributor and I wish to contribute to the projects of your organisation . I am sending my resume as an attachment with this email. Can you please have a look at it to see my skills and suggest me some open source projects which I will start contributing from now. Please send me the GitHub repo links of those projects . It will be also kind enough if you suggest me names of the mentors of those projects and their contact info so that I can get in touch with them for further details of the open source projects. Yours Sincerely Neelima Mohanty Resume <https://docs.google.com/document/d/1o0AfJa7IjTdqsRShADsC2uezgg-xMjF-Q2redeO…>

1 0

One Build System Working Group Meeting
by Thomas Heijligen 01 Oct '22

01 Oct '22

Hi flashrom community, In the last weeks we got some big improvements merged to build flashrom with meson. The programmer selection got an complete overhaul and now it's also possible to use meson on non linux systems. To plan the next step under this Topic we will meet us again on Friday October 14th, at 5:00 utc (7:00 Berlin) on https://meet.google.com/cnw-cegw-rad Everyone is welcome to join! The working document can be found on https://docs.google.com/document/d/1TVso_VbrLEbGc7BNrYxqlrP8jMxB23TuMqEI3Pn… -- Thomas

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"FAILED: GA-Q87M-D2H (rev. 1.x)"
by nils.woeste＠mailbox.org 01 Oct '22

01 Oct '22

Hi, I ran flashrom --programmer internal -w ./Q87MD2H.F8 -c "MX25L6405" Output is: root@px2:~# flashrom --programmer internal -w ./Q87MD2H.F8 -c "MX25L6405" flashrom v1.2 on Linux 5.15.39-4-pve (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found chipset "Intel Q87". This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... SPI Configuration is locked down. OK. Found Macronix flash chip "MX25L6405" (8192 kB, SPI) mapped at physical address 0x00000000ff800000. Reading old flash chip contents... done. Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x74, failed byte count from 0x00000000-0x0000ffff: 0x9d11 ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. spi_write_cmd failed during command execution at address 0x0 Reading current flash chip contents... done. Looking for another erase function. spi_simple_write_cmd failed during command execution Reading current flash chip contents... done. Looking for another erase function. spi_simple_write_cmd failed during command execution Reading current flash chip contents... done. Looking for another erase function. Looking for another erase function. Looking for another erase function. Looking for another erase function. No usable erase functions left. FAILED! Uh oh. Erase/write failed. Checking if anything has changed. Reading current flash chip contents... done. Apparently at least some data has changed. Your flash chip is in an unknown state. Get help on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org with the subject "FAILED: <your board name>"! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! Anyway I can fix this? Thanks

1 0

Wish to contribute to your organisation
by Neelima Mohanty 01 Oct '22

01 Oct '22

Respected Sir/Madam, Myself Neelima Mohanty , an open source contributor and I wish to contribute to the projects of your organisation . I am sending my resume as an attachment with this email. Can you please have a look at it to see my skills and suggest me some open source projects which I will start contributing from now. Please send me the GitHub repo links of those projects . It will be also kind enough if you suggest me names of the mentors of those projects and their contact info so that I can get in touch with them for further details of the open source projects. Yours Sincerely Neelima Mohanty Resume <https://docs.google.com/document/d/1o0AfJa7IjTdqsRShADsC2uezgg-xMjF-Q2redeO…>

1 0

GSOC'23
by Prakhar Agrawal 30 Sep '22

30 Sep '22

Hello, My name is Prakhar Agrawal and I am a final year undergraduate student at Amrita university with a major in Electronics and Communications Engineering. (2019-23). I am really interested in contributing to the flashrom community, I have some prior internship experience with PCB designing and programming. I am new to the open source world and I will be trying for GSOC'23. Can someone please guide me on how to start contributing to the community, and share referral materials if any? Eagerly awaiting your response! Best Regards -- Prakhar Agrawal Visiting Researcher Department of Mechanical and Industrial Engineering Toronto Metropolitan University, Toronto M2B 2M2, Ontario, Canada 4th-year Undergraduate Student Department of Electronics and Communications Engineering, Amrita Vishwa Vidhyapeetham, Amritapuri Kollam 690525, India m: (+91) 9653063821 e: prakharagrawal(a)am.students.amrita.edu

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No dev meetings in October, Changed meeting times
by Felix Singer 25 Sep '22

25 Sep '22

Hello all, You might have already noticed the changed flashrom dev meeting appointments on the mailing list. Due to the changing daylight saving times, we will have no dev meetings in October, but they will continue from early November with a different time again. So, starting from November the meeting time will be as follow for the next months: 21:00 - 22:00 UTC+0 The next meeting will be on *** 2./3. November *** (depending where you are located ;)). Save the date, see you there! :) // Felix

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flashrom dev meeting notes 38/2022
by Felix Singer 25 Sep '22

25 Sep '22

# 23th Sep 2022, 6:00 - 7:00 UTC+0 Attendees: Thomas, Edward, Felix, Alex, Anastasia ## Decision summary * No decisions but a reminder: no meetings for October. Next one is 2th November at 21:00 UTC+0 ## Agenda * Programmer delay , first 3 patches [https://review.coreboot.org/c/flashrom/+/67391](https://review.coreboot.org… can unblock removing global state for 2 programmers * Patches about flashchips , what is going on with them? [https://review.coreboot.org/c/flashrom/+/66781](https://review.coreboot.org… * Sb600spi needs to be fixed, there are some patches under review. Do we need to try getting documentation? * We need to coordinate the sequence on how the patches should go: there are several patches from different people on fixing Sb600spi * [Felix] Let’s introduce a specification how programmer parameters should look like * Yes this does need a spec * Lint? Might be complicated * Maybe just a set of rules, like we have coding style for example * We need to document the rules for programmer params (for example, use underscore and not hyphen) * And also we need to write more unit tests to cover the rules. Ideally every rule has a unit test to cover this rule (could be positive and error scenario) * Everyone please write tests ! * We need to extract parsing param code into the same function in each programmer: * `parse_params` as a name? * Can this be an Easy project (one per programmer) * TODO aklm will create a ticket * REMINDER: no meetings for October. Next one is 2th November at 21:00 UTC+0

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flashrom dev meeting notes 36/2022
by Felix Singer 25 Sep '22

25 Sep '22

# 8th Sep 2022, 6:00 - 7:00 UTC+0 Attendees: Thomas, Felix, Edward, Anastasia ## Decisions Summary * Felix gets submit rights * We need to document code review & merge rules (after the release) ## Agenda * [Felix / Anastasia] Giving Felix submit rights * I am already a submitter for the coreboot project since over a year * I commented and reviewed over [200 flashrom patches](https://review.coreboot.org/q/project:flashrom+commentby:felixsing… ) since autumn 2021 * Admin and Mentor for gsoc * YES, all approved! * [Felix]: What are the rules for submitting patches? 3 days? What else? * 3 days, but also * Needs +2 * Are there any other ongoing work that maybe should be merged first? * Are all comments resolved? * If there are several ongoing streams, which one is easier to rebase, easier to test? * Look for other people’s patches who don’t have submit rights, because they cannot do themselves. They might sit and wait, and will need to rebase many times. * All the rules need to be documented. * Maybe a small update on wiki to begin with * And after the release , do the proper documentation * [Felix] Urgent: We have to unbreak our tests in CI * I think updating the Docker containers will be done later (in ~2 weeks). coreboot release got rescheduled. * We should submit [this patch](https://review.coreboot.org/c/flashrom/+/67345) (and the follow- up) now to make unit tests with Jenkins working again. I don’t think we should wait any longer. * DONE! * [quasisec]: Can we get over the hump of reviewing the remaining [https://review.coreboot.org/c/flashrom/+/66720/](https://review.coreboot.or… flashrom.c/print.c cleanups And now most critically getting the bulk of the programmer init param plumbing patches reviewed and merged in the [https://review.coreboot.org/q/topic:programmer_init_param_globals](https://… topic. Keeping in review for a long time causes rebases that effectively nullify the work but the bulk of the patches are just boring plumbing that are nop. * Bringing the tree into consistent state: * Names for init functions * Start addr+offset VS start region + end region * chipoff_t and chipsize_t defined in flash.h * Layout regions * force_boardmismatch -> maybe it can be removed from flashctx and turned into a programmer param? * Checks for internal can be moved into internal maybe? * Internal is the most dangerous, and needs lots of checks * Cli * Needs to call libflashrom programmer init instead of programmer_init * Probe flash , the same * [Felix] Customized Buildbot commands using Gerrit comments * I am thinking about some use cases for user Buildbot commands, which are triggerable from Gerrit. Basically a Buildbot command is just a Gerrit comment, but Buildbot interprets it and can do something. * For example for build-testing if the binary is reproducible it could look like “@buildbot build reproducible”, which builds a binary before and after the specific patch and compares them. * I would like to know which ideas other people have or what their use cases would be. * Can we use flashrom_tester on buildbot? * Can we use EM100? * Can we have a command to retry build again?

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[PATCH] serial.c: support BAUD rates > 230400 on macOS
by Denis Ahrens 25 Sep '22

25 Sep '22

Signed-off-by: Denis Ahrens <denis(a)h3q.com> --- serial.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/serial.c b/serial.c index 72f9ef6..0f86e41 100644 --- a/serial.c +++ b/serial.c @@ -36,6 +36,10 @@ #include "programmer.h" #include "custom_baud.h" +#ifdef __APPLE__ +#include <IOKit/serial/ioss.h> +#endif + fdtype sp_fd = SER_INV_FD; /* There is no way defined by POSIX to use arbitrary baud rates. It only defines some macros that can be used to @@ -185,6 +189,14 @@ int serialport_config(fdtype fd, int baud) return 1; } wanted = observed; +#ifdef __APPLE__ + int fakebaud = 0; + if (baud > 230400) + { + fakebaud = baud; + baud = 115200; + } +#endif if (baud >= 0) { if (use_custom_baud(baud, sp_baudtable)) { if (set_custom_baudrate(fd, baud)) { @@ -244,6 +256,18 @@ int serialport_config(fdtype fd, int baud) } // FIXME: display actual baud rate - at least if none was specified by the user. #endif + +#ifdef __APPLE__ + if (fakebaud) + { + cfmakeraw(&wanted); + if (ioctl(fd, IOSSIOSPEED, &fakebaud) == -1) { + msg_perr("[WARN] ioctl(..., IOSSIOSPEED, %d).\n", fakebaud); + msg_perr_strerror("problem with IOSSIOSPEED"); + return 1; + } + } +#endif return 0; } -- 2.37.0 (Apple Git-136)

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Need help with "Easy Projects" issue
by Lakshminarayana Malyala 23 Sep '22

23 Sep '22

Hello Flashrom dev team, I am LN and I wanted to know how to start with Easy Projects/contributions in this project . I found some (Easy Projects) <https://ticket.coreboot.org/projects/flashrom/issues?utf8=%E2%9C%93&set_fil…> on Coreboot webpage and I just wanted to know if the mentioned issues from the attached page have been resolved or if they are open for contribution? As I notice the ‘Turn variable is_laptop into an enum <https://ticket.coreboot.org/issues/416>’ issue is open on the Coreboot page and seems to be an easy issue to resolve yet it appears to be solved on this page <https://review.coreboot.org/c/flashrom/+/66891>. I will be happy if someone can point me towards more such issues that are beginner friendly or to a developer guide to set up my workspace and read more about the project structure and source code, and I appreciate your help 🙂. Thanking you, LN

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Updated invitation with note: Flashrom Dev Meeting @ Every 2 weeks from 8am to 9am on Thursday (AEDT) (flashrom@flashrom.org)
by aklm＠chromium.org 23 Sep '22

23 Sep '22

This event has been updated with a note: "Moving to southern summer / northern winter time between November and March inclusive." Changed: title, time, description Flashrom Dev Meeting Every 2 weeks from 8am to 9am on Thursday Eastern Australia Time - Sydney Join with Google Meet https://meet.google.com/iuf-mtri-zva?hs=224 Join by phone (AU) +61 2 9051 6791 PIN: 304642402 More phone numbers https://tel.meet/iuf-mtri-zva?pin=9271993818880&hs=0 Regular meeting of Flashrom project developers. Meeting notes doc: https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZ… Guests aklm(a)chromium.org - creator felix.singer12(a)gmail.com david.hendricks(a)gmail.com quasisec(a)google.com nico.h(a)gmx.de src(a)posteo.de martonmiklosqdev(a)gmail.com piotr.krol(a)3mdeb.com Maciej Pijanowski michal.zygowski(a)3mdeb.com th3fanbus(a)gmail.com stefan.k.reinauer(a)gmail.com nartemiev(a)google.com arthur(a)aheymans.xyz flashrom(a)flashrom.org c-d.hailfinger.devel.2006(a)gmx.net evanbenn(a)google.com gaumless(a)gmail.com View all guest info https://calendar.google.com/calendar/event?action=VIEW&eid=MThuODBxZDAwZDZj… Reply for flashrom(a)flashrom.org and view more details https://calendar.google.com/calendar/event?action=VIEW&eid=MThuODBxZDAwZDZj… Your attendance is optional. ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. To stop receiving future updates for this event, decline this event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

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Updated invitation: Flashrom Dev Meeting (monthly) @ Every 2 weeks from 4pm to 5pm on Thursday from Thu Apr 7 to Wed Nov 2 (AEST) (flashrom@flashrom.org)
by aklm＠chromium.org 23 Sep '22

23 Sep '22

This event has been updated Changed: time Flashrom Dev Meeting (monthly) Every 2 weeks from 4pm to 5pm on Thursday from Thursday Apr 7 to Wednesday Nov 2 Eastern Australia Time - Sydney Join with Google Meet https://meet.google.com/iuf-mtri-zva?hs=224 Join by phone (AU) +61 2 9051 6791 PIN: 304642402 More phone numbers https://tel.meet/iuf-mtri-zva?pin=9271993818880&hs=0 Monthly meeting of Flashrom project developers. Meeting notes doc: https://docs.google.com/document/d/18qKvEbfPszjsJJGJhwi8kRVDUG3GZ… Guests aklm(a)chromium.org - creator felix.singer12(a)gmail.com david.hendricks(a)gmail.com quasisec(a)google.com nico.h(a)gmx.de Martin Roth src(a)posteo.de martonmiklosqdev(a)gmail.com piotr.krol(a)3mdeb.com Maciej Pijanowski michal.zygowski(a)3mdeb.com th3fanbus(a)gmail.com stefan.k.reinauer(a)gmail.com nartemiev(a)google.com arthur(a)aheymans.xyz flashrom(a)flashrom.org View all guest info https://calendar.google.com/calendar/event?action=VIEW&eid=MmVscGY2cjNsdTZw… Reply for flashrom(a)flashrom.org and view more details https://calendar.google.com/calendar/event?action=VIEW&eid=MmVscGY2cjNsdTZw… Your attendance is optional. ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. To stop receiving future updates for this event, decline this event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

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