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[commit] r880 - trunk
by svn＠flashrom.org 22 Jan '10

22 Jan '10

Author: stepan Date: 2010-01-22 11:49:33 +0100 (Fri, 22 Jan 2010) New Revision: 880 Modified: trunk/Makefile Log: backout unintentional chunk. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2010-01-22 02:53:30 UTC (rev 879) +++ trunk/Makefile 2010-01-22 10:49:33 UTC (rev 880) @@ -221,7 +221,7 @@ rm -f .dependencies .features .libdeps dep: - $(CC) $(CPPFLAGS) $(SVNDEF) -MM *.c > .dependencies + @$(CC) $(CPPFLAGS) $(SVNDEF) -MM *.c > .dependencies strip: $(PROGRAM) $(STRIP) $(STRIP_ARGS) $(PROGRAM)

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Re: [flashrom] [PATCH] Dediprog SF100 support
by Carl-Daniel Hailfinger 22 Jan '10

22 Jan '10

Hi Stefan, On 14.01.2010 14:08, Stefan Reinauer wrote: > On 1/14/10 5:24 AM, Carl-Daniel Hailfinger wrote: > >> Dediprog SF100 support. Very fragile, lots of stuff guessed from logs. >> May explode spontaneously. >> >> I think I know enough to actually use it to ID the chip, but that's it. >> A USB log with which includes writing an image from the original >> software (pretty much any image) would help clear up a few ambiguities. >> >> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> >> >> > > Awesome..! > Thanks! > It seems to be talking to the device and get through the initialization, > but it ends up with no "SPI" chips being "incompatible": > Actually, that's intentional. That way I could avoid hooking up the driver in the SPI core (which would mean I'd have to create dummy command functions) and still get initialization testing. > MacPro:flashrom stepan$ ./flashrom -p dediprog -V > flashrom v0.9.1-r862 > Found USB device (0483:dada). > Sending RDID > Receiving response: 20 20 16 10 00 00 00 00 00 00 00 00 00 00 00 00 Which flash chip is this? The response suggests a ST M25P32 flash chip, but the extra "10" at the end looks rather strange. > Not sure if this code is intended: > >> /* URB 9. Command Receive Device String. */ >> memset(buf, 0, sizeof(buf)); >> ret = usb_control_msg(dediprog_handle, 0xc2, 0x8, 0xff, 0xff, buf, >> 0x10, DEFAULT_TIMEOUT); >> if ((ret != 0x10) || !memcmp(buf, "SF100 V:2.1.1 ", 0x10)) { >> > This would bail out if the version string is "SF100 V:2.1.1 " > Right, that's a bug. Considering that this was coded at 5am, I'm surprised there was only one bug. >> msg_perr("Unexpected response 3!\n"); >> return 1; >> } >> > Here I added this: > >> buf[0xf]=0; >> msg_pdbg("Found a Dediprog %s\n", buf); >> That potentially truncates the string. I'll use strnlen/strncpy to write the string to a separate buffer which is big enough. > Which got me: > > flashrom v0.9.1-r862 > Found USB device (0483:dada). > Found a Dediprog SF100 V:3.1.8 > Hm. The best idea might be to match against the model name and the major version. > Let me know if you need more information > A log with SniffUsb 2.0.0006 from http://www.pcausa.com/Utilities/UsbSnoop/ would be very appreciated. I wrote a tool to decode the log generated with that SniffUsb version. Feel free to point me to a private upload via IRC (the log may contain programmer serial numbers). What the log should contain: - Plugging in the SF100 - Starting the programming software - SPI device detection/probe - Full read - Erase (optional) - Full write (optional) - No custom settings (but you can do a probe-only run with changed settings in another file if you want to help decode a few more commands) It would be cool if you could use a small SPI chip (4 Mbit or so) because the logs roughly have 4x-20x the size of the flash chip. Please do not use a SST chip (log would be at least 100x the size of the flash chip). Pretty much all other vendors are OK. I will post an updated patch soon. Regards, Carl-Daniel -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

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[commit] r879 - trunk
by svn＠flashrom.org 22 Jan '10

22 Jan '10

Author: hailfinger Date: 2010-01-22 03:53:30 +0100 (Fri, 22 Jan 2010) New Revision: 879 Modified: trunk/dediprog.c trunk/spi.c Log: Add write support. Speed up reads by a factor of 4 by switching block size from 4 to 16. Add support for 4 byte RDID. Add USB error decoding via usb_strerror. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/dediprog.c =================================================================== --- trunk/dediprog.c 2010-01-21 20:26:30 UTC (rev 878) +++ trunk/dediprog.c 2010-01-22 02:53:30 UTC (rev 879) @@ -145,8 +145,9 @@ int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { - /* Maximum read length is 4 bytes for now. */ - return spi_read_chunked(flash, buf, start, len, 4); + msg_pspew("%s, start=0x%x, len=0x%x\n", __func__, start, len); + /* Chosen read length is 16 bytes for now. */ + return spi_read_chunked(flash, buf, start, len, 16); } int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, @@ -154,19 +155,22 @@ { int ret; + msg_pspew("%s, writecnt=%i, readcnt=%i\n", __func__, writecnt, readcnt); /* Paranoid, but I don't want to be blamed if anything explodes. */ - if ((writecnt != 1) && (writecnt != 4)) + if (writecnt > 5) { msg_perr("Untested writecnt=%i, aborting.\n", writecnt); - if (readcnt > 4) + return 1; + } + /* 16 byte reads should work. */ + if (readcnt > 16) { msg_perr("Untested readcnt=%i, aborting.\n", readcnt); - if ((readcnt == 0) && (writecnt != 1)) - msg_perr("Untested writecnt=%i, readcnt=%i combination, " - "aborting.\n", writecnt, readcnt); + return 1; + } ret = usb_control_msg(dediprog_handle, 0x42, 0x1, 0xff, readcnt ? 0x1 : 0x0, (char *)writearr, writecnt, DEFAULT_TIMEOUT); if (ret != writecnt) { - msg_perr("Command Send SPI failed, ret=%i, expected %i!\n", - ret, writecnt); + msg_perr("Send SPI failed, expected %i, got %i %s!\n", + writecnt, ret, usb_strerror()); return 1; } if (!readcnt) @@ -174,8 +178,8 @@ memset(readarr, 0, readcnt); ret = usb_control_msg(dediprog_handle, 0xc2, 0x01, 0xbb8, 0x0000, (char *)readarr, readcnt, DEFAULT_TIMEOUT); if (ret != readcnt) { - msg_perr("Command Receive SPI failed, ret=%i, expected %i!\n", - ret, readcnt); + msg_perr("Receive SPI failed, expected %i, got %i %s!\n", + readcnt, ret, usb_strerror()); return 1; } return 0; Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2010-01-21 20:26:30 UTC (rev 878) +++ trunk/spi.c 2010-01-22 02:53:30 UTC (rev 879) @@ -335,6 +335,9 @@ #if BUSPIRATE_SPI_SUPPORT == 1 case SPI_CONTROLLER_BUSPIRATE: #endif +#if DEDIPROG_SUPPORT == 1 + case SPI_CONTROLLER_DEDIPROG: +#endif return probe_spi_rdid_generic(flash, 4); default: printf_debug("4b ID not supported on this SPI controller\n");

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FOSDEM DevRoom schedule completed.
by Luc Verhaegen 22 Jan '10

22 Jan '10

http://www.coreboot.org/FOSDEM_2010 Schedule is now complete: * 13:00 : Peter Stuge - coreboot introduction. * 14:00 : Peter Stuge - coreboot and PC technical details. * 15:00 : Rudolf Marek - ACPI and Suspend/Resume under coreboot. * 16:00 : Rudolf Marek - coreboot board porting. * 17:00 : Carl-Daniel Hailfinger - Flashrom. * 18:00 : Luc Verhaegen - Flash Enable BIOS Reverse Engineering. Hope to see tons of people there. Luc Verhaegen.

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[PATCH] Avoid bogus gcc warning
by Michael Karcher 21 Jan '10

21 Jan '10

recent gcc/glibc combinations warn about ignoring the fgets() result. The problem exists on Ubuntu 9.10 with current updates. This "fix" of the non-problem (as I check ferror() afterwards) should even be a (negligible) performance optimization. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- dmi.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/dmi.c b/dmi.c index ca75461..d165e9f 100644 --- a/dmi.c +++ b/dmi.c @@ -79,8 +79,8 @@ void dmi_init(void) printf_debug("DMI pipe open error\n"); goto out_free; } - fgets(answerbuf, DMI_MAX_ANSWER_LEN, dmidecode_pipe); - if (ferror(dmidecode_pipe)) + if (!fgets(answerbuf, DMI_MAX_ANSWER_LEN, dmidecode_pipe) && + ferror(dmidecode_pipe)) { printf_debug("DMI pipe read error\n"); pclose(dmidecode_pipe); -- 1.6.5

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[commit] r878 - trunk
by svn＠flashrom.org 21 Jan '10

21 Jan '10

Author: stepan Date: 2010-01-21 21:26:30 +0100 (Thu, 21 Jan 2010) New Revision: 878 Modified: trunk/Makefile Log: This patch fixes the use of CFLAGS and CPPFLAGS in the flashrom makefile Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2010-01-20 20:55:53 UTC (rev 877) +++ trunk/Makefile 2010-01-21 20:26:30 UTC (rev 878) @@ -33,11 +33,11 @@ STRIP_ARGS = -s endif ifeq ($(OS_ARCH), Darwin) -CFLAGS += -I/usr/local/include -LDFLAGS += -framework IOKit -framework DirectIO -L/usr/local/lib +CPPFLAGS += -I/opt/local/include -I/usr/local/include +LDFLAGS += -framework IOKit -framework DirectIO -L/opt/local/lib -L/usr/local/lib endif ifeq ($(OS_ARCH), FreeBSD) -CFLAGS += -I/usr/local/include +CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib endif @@ -221,7 +221,7 @@ rm -f .dependencies .features .libdeps dep: - @$(CC) $(CPPFLAGS) $(SVNDEF) -MM *.c > .dependencies + $(CC) $(CPPFLAGS) $(SVNDEF) -MM *.c > .dependencies strip: $(PROGRAM) $(STRIP) $(STRIP_ARGS) $(PROGRAM) @@ -230,7 +230,7 @@ @printf "Checking for a C compiler... " @$(shell ( echo "int main(int argc, char **argv)"; \ echo "{ return 0; }"; ) > .test.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .test.c -o .test >/dev/null && \ + @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test.c -o .test >/dev/null && \ echo "found." || ( echo "not found."; \ rm -f .test.c .test; exit 1) @rm -f .test.c .test @@ -242,7 +242,7 @@ echo "struct pci_access *pacc;"; \ echo "int main(int argc, char **argv)"; \ echo "{ pacc = pci_alloc(); return 0; }"; ) > .test.c ) - @$(CC) -c $(CFLAGS) .test.c -o .test.o >/dev/null 2>&1 && \ + @$(CC) -c $(CPPFLAGS) $(CFLAGS) .test.c -o .test.o >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; echo; \ echo "Please install libpci headers (package pciutils-devel)."; \ echo "See README for more information."; echo; \ @@ -251,7 +251,7 @@ @$(shell ( echo "#include <pci/pci.h>"; \ echo "int main(int argc, char **argv)"; \ echo "{ return 0; }"; ) > .test1.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 -lpci $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 -lpci $(LIBS) >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; echo; \ echo "Please install libpci (package pciutils)."; \ echo "See README for more information."; echo; \ @@ -282,7 +282,7 @@ echo "struct ftdi_context *ftdic = NULL;"; \ echo "int main(int argc, char **argv)"; \ echo "{ return ftdi_init(ftdic); }"; ) > .featuretest.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest $(FTDILIBS) $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest $(FTDILIBS) $(LIBS) >/dev/null 2>&1 && \ ( echo "found."; echo "FTDISUPPORT := yes" >> .features.tmp ) || \ ( echo "not found."; echo "FTDISUPPORT := no" >> .features.tmp ) @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features

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[Patch] Boards: Remove it8705_rom_write_enable.
by Luc Verhaegen 20 Jan '10

20 Jan '10

4 8

[Patch] Boards: Add max_rom_decode_parallel entry to board enable table.
by Luc Verhaegen 20 Jan '10

20 Jan '10

2 4

Re: [flashrom] [PATCH] Convert chips to block erasers: SST
by Sean Nelson 20 Jan '10

20 Jan '10

Convert the following chips to block_erasers: SST28SF040A SST29EE010 SST29LE010 SST29EE020A SST29LE020 SST39SF010A SST39SF020A SST39SF040 SST39VF512 SST39VF010 SST39VF020 SST39VF040 SST39VF080 SST49LF002A/B SST49LF003A/B SST49LF004C SST49LF008A SST49LF008C SST49LF016C SST49LF020 SST49LF020A SST49LF040 SST49LF040B SST49LF080A SST49LF160C Extend sst28sf040 to include chip and sector functions for block_eraser. Extend sst49lfxxxc to include chip, sector, block erasers functions for block_erasers. Extend sst_fwhub to include chip and sector functions for block_erasers. Add copyrights to changed files. Killed erase_sst_fwhub. Killed erase_49lfxxxc. NULL A/A mux mode full chip erasers. Ignore block locks in erase/write. Change comments from "PP mode" to "A/A mux mode" Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

2 2

[commit] r877 - trunk
by svn＠flashrom.org 20 Jan '10

20 Jan '10

Author: snelson Date: 2010-01-20 21:55:53 +0100 (Wed, 20 Jan 2010) New Revision: 877 Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/sst28sf040.c trunk/sst49lfxxxc.c trunk/sst_fwhub.c Log: Convert the following chips to block_erasers: SST28SF040A SST29EE010 SST29LE010 SST29EE020A SST29LE020 SST39SF010A SST39SF020A SST39SF040 SST39VF512 SST39VF010 SST39VF020 SST39VF040 SST39VF080 SST49LF002A/B SST49LF003A/B SST49LF004C SST49LF008A SST49LF008C SST49LF016C SST49LF020 SST49LF020A SST49LF040 SST49LF040B SST49LF080A SST49LF160C Extend sst28sf040 to include chip and sector functions for block_eraser. Extend sst49lfxxxc to include chip, sector, block erasers functions for block_erasers. Extend sst_fwhub to include chip and sector functions for block_erasers. Add copyrights to changed files. Killed erase_sst_fwhub. Killed erase_49lfxxxc. NULL A/A mux mode full chip erasers. Ignore block locks in erase/write. Change comments from "PP mode" to "A/A mux mode" Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/chipdrivers.h =================================================================== --- trunk/chipdrivers.h 2010-01-20 14:45:07 UTC (rev 876) +++ trunk/chipdrivers.h 2010-01-20 20:55:53 UTC (rev 877) @@ -126,7 +126,8 @@ /* sst28sf040.c */ int probe_28sf040(struct flashchip *flash); -int erase_28sf040(struct flashchip *flash); +int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen); +int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size); int write_28sf040(struct flashchip *flash, uint8_t *buf); /* sst39sf020.c */ @@ -140,12 +141,16 @@ /* sst49lfxxxc.c */ int probe_49lfxxxc(struct flashchip *flash); int erase_49lfxxxc(struct flashchip *flash); +int erase_sector_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int sector_size); +int erase_block_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int sector_size); +int erase_chip_49lfxxxc(struct flashchip *flash, unsigned int addr, unsigned int blocksize); int write_49lfxxxc(struct flashchip *flash, uint8_t *buf); /* sst_fwhub.c */ int probe_sst_fwhub(struct flashchip *flash); int erase_sst_fwhub(struct flashchip *flash); int erase_sst_fwhub_block(struct flashchip *flash, unsigned int offset, unsigned int page_size); +int erase_sst_fwhub_sector(struct flashchip *flash, unsigned int offset, unsigned int page_size); int write_sst_fwhub(struct flashchip *flash, uint8_t *buf); /* w39v040c.c */ Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-20 14:45:07 UTC (rev 876) +++ trunk/flashchips.c 2010-01-20 20:55:53 UTC (rev 877) @@ -3480,7 +3480,7 @@ .eraseblocks = { {1024 * 1024, 1} }, - .block_erase = NULL, /* 30 D0, only in PP mode */ + .block_erase = NULL, /* 30 D0, only in A/A mux mode */ }, }, .write = write_lhf00l04, @@ -3754,7 +3754,17 @@ .tested = TEST_UNTESTED, .probe = probe_28sf040, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst28sf040.c) */ - .erase = erase_28sf040, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {128, 4096} }, + .block_erase = erase_sector_28sf040, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_28sf040, + } + }, .write = write_28sf040, .read = read_memmapped, }, @@ -3767,10 +3777,17 @@ .model_id = SST_29EE010, .total_size = 128, .page_size = 128, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -3786,7 +3803,14 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -3799,10 +3823,17 @@ .model_id = SST_29EE020A, .total_size = 256, .page_size = 128, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -3818,7 +3849,14 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -3831,10 +3869,20 @@ .model_id = SST_39SF010, .total_size = 128, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3847,10 +3895,20 @@ .model_id = SST_39SF020, .total_size = 256, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3863,10 +3921,20 @@ .model_id = SST_39SF040, .total_size = 512, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3879,10 +3947,20 @@ .model_id = SST_39VF512, .total_size = 64, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns*/ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3895,10 +3973,20 @@ .model_id = SST_39VF010, .total_size = 128, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3911,10 +3999,20 @@ .model_id = SST_39VF020, .total_size = 256, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3930,7 +4028,17 @@ .tested = TEST_OK_PROBE, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3946,7 +4054,20 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3960,10 +4081,23 @@ .total_size = 256, .page_size = 16 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ - .erase = erase_sst_fwhub, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = erase_sst_fwhub_sector, + }, { + .eraseblocks = { {16 * 1024, 16} }, + .block_erase = erase_sst_fwhub_block, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ + } + }, .write = write_sst_fwhub, .read = read_memmapped, }, @@ -3980,7 +4114,20 @@ .tested = TEST_OK_PR, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ - .erase = erase_sst_fwhub, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 96} }, + .block_erase = erase_sst_fwhub_sector, + }, { + .eraseblocks = { {64 * 1024, 6} }, + .block_erase = erase_sst_fwhub_block, + }, { + .eraseblocks = { {384 * 1024, 1} }, + .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ + } + }, .write = write_sst_fwhub, .read = read_memmapped, }, @@ -4011,7 +4158,7 @@ .block_erase = erase_sst_fwhub_block, /* same as erase_block_jedec, but with unlock */ }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = NULL, /* AA 55 80 AA 55 10, only in PP mode */ + .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ }, }, .write = write_sst_fwhub, @@ -4029,7 +4176,22 @@ .tested = TEST_UNTESTED, .probe = probe_49lfxxxc, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ - .erase = erase_49lfxxxc, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_49lfxxxc, + }, { + .eraseblocks = { + {64 * 1024, 7}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_49lfxxxc, + } + }, .write = write_49lfxxxc, .read = read_memmapped, }, @@ -4043,10 +4205,23 @@ .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ - .erase = erase_sst_fwhub, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = erase_sst_fwhub_sector, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = erase_sst_fwhub_block, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ + } + }, .write = write_sst_fwhub, .read = read_memmapped, }, @@ -4062,7 +4237,22 @@ .tested = TEST_UNTESTED, .probe = probe_49lfxxxc, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ - .erase = erase_49lfxxxc, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = erase_sector_49lfxxxc, + }, { + .eraseblocks = { + {64 * 1024, 15}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_49lfxxxc, + } + }, .write = write_49lfxxxc, .read = read_memmapped, }, @@ -4075,10 +4265,25 @@ .model_id = SST_49LF016C, .total_size = 2048, .page_size = 4 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_49lfxxxc, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ - .erase = erase_49lfxxxc, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = erase_sector_49lfxxxc, + }, { + .eraseblocks = { + {64 * 1024, 31}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_49lfxxxc, + } + }, .write = write_49lfxxxc, .read = read_memmapped, }, @@ -4094,7 +4299,20 @@ .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_49lf040, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {16 * 1024, 16} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = NULL, + } + }, .write = write_49lf040, .read = read_memmapped, }, @@ -4107,10 +4325,23 @@ .model_id = SST_49LF020A, .total_size = 256, .page_size = 4 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_49lf040, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {16 * 1024, 16} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = NULL, + } + }, .write = write_49lf040, .read = read_memmapped, }, @@ -4123,10 +4354,23 @@ .model_id = SST_49LF040, .total_size = 512, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_49lf040, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = NULL, + } + }, .write = write_49lf040, .read = read_memmapped, }, @@ -4140,11 +4384,24 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, - .probe = probe_sst_fwhub, + .tested = TEST_UNTESTED, + .probe = probe_jedec, .probe_timing = 1, /* 150ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ - .erase = erase_sst_fwhub, - .write = write_sst_fwhub, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = NULL, + } + }, + .write = write_49lf040, .read = read_memmapped, }, @@ -4156,10 +4413,23 @@ .model_id = SST_49LF080A, .total_size = 1024, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_49lf040, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = NULL, + } + }, .write = write_49lf040, .read = read_memmapped, }, @@ -4172,10 +4442,26 @@ .model_id = SST_49LF160C, .total_size = 2048, .page_size = 4 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_49lfxxxc, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .erase = erase_49lfxxxc, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = erase_sector_49lfxxxc, + }, { + .eraseblocks = { + {64 * 1024, 31}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_49lfxxxc, + } + }, .write = write_49lfxxxc, .read = read_memmapped, }, Modified: trunk/sst28sf040.c =================================================================== --- trunk/sst28sf040.c 2010-01-20 14:45:07 UTC (rev 876) +++ trunk/sst28sf040.c 2010-01-20 20:55:53 UTC (rev 877) @@ -3,6 +3,7 @@ * * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2005 coresystems GmbH <stepan(a)openbios.org> + * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -50,7 +51,7 @@ chip_readb(bios + 0x041A); } -static int erase_sector_28sf040(struct flashchip *flash, unsigned long address, int sector_size) +int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size) { chipaddr bios = flash->virtual_memory; @@ -67,7 +68,7 @@ return 0; } -static int write_sector_28sf040(chipaddr bios, uint8_t *src, chipaddr dst, +int write_sector_28sf040(chipaddr bios, uint8_t *src, chipaddr dst, unsigned int page_size) { int i; @@ -162,3 +163,13 @@ return 0; } + +int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen) +{ + if ((addr != 0) || (blocklen != flash->total_size * 1024)) { + fprintf(stderr, "%s called with incorrect arguments\n", + __func__); + return -1; + } + return erase_28sf040(flash); +} Modified: trunk/sst49lfxxxc.c =================================================================== --- trunk/sst49lfxxxc.c 2010-01-20 14:45:07 UTC (rev 876) +++ trunk/sst49lfxxxc.c 2010-01-20 20:55:53 UTC (rev 877) @@ -3,6 +3,7 @@ * * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2005-2007 coresystems GmbH + * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -35,6 +36,15 @@ #define STATUS_ESS (1 << 6) #define STATUS_WSMS (1 << 7) +int unlock_block_49lfxxxc(struct flashchip *flash, unsigned long address, unsigned char bits) +{ + unsigned long lock = flash->virtual_registers + address + 2; + printf_debug("lockbits at address=0x%08lx is 0x%01x\n", lock, chip_readb(lock)); + chip_writeb(bits, lock); + + return 0; +} + static int write_lockbits_49lfxxxc(struct flashchip *flash, unsigned char bits) { chipaddr registers = flash->virtual_registers; @@ -72,7 +82,7 @@ return 0; } -static int erase_sector_49lfxxxc(struct flashchip *flash, unsigned long address, int sector_size) +int erase_sector_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int sector_size) { unsigned char status; chipaddr bios = flash->virtual_memory; @@ -97,6 +107,31 @@ return 0; } +int erase_block_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int block_size) +{ + unsigned char status; + chipaddr bios = flash->virtual_memory; + + chip_writeb(BLOCK_ERASE, bios); + chip_writeb(ERASE, bios + address); + + do { + status = chip_readb(bios); + if (status & (STATUS_ESS | STATUS_BPS)) { + printf("block erase FAILED at address=0x%08lx status=0x%01x\n", bios + address, status); + chip_writeb(CLEAR_STATUS, bios); + return (-1); + } + } while (!(status & STATUS_WSMS)); + chip_writeb(RESET, bios); + + if (check_erased_range(flash, address, block_size)) { + fprintf(stderr, "ERASE FAILED!\n"); + return -1; + } + return 0; +} + static int write_sector_49lfxxxc(chipaddr bios, uint8_t *src, chipaddr dst, unsigned int page_size) { Modified: trunk/sst_fwhub.c =================================================================== --- trunk/sst_fwhub.c 2010-01-20 14:45:07 UTC (rev 876) +++ trunk/sst_fwhub.c 2010-01-20 20:55:53 UTC (rev 877) @@ -3,6 +3,7 @@ * * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2009 Kontron Modular Computers + * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -114,6 +115,25 @@ return 0; } +int erase_sst_fwhub_sector(struct flashchip *flash, unsigned int offset, unsigned int page_size) +{ + uint8_t blockstatus = clear_sst_fwhub_block_lock(flash, offset); + + if (blockstatus) { + printf("Sector lock clearing failed, not erasing sector " + "at 0x%06x\n", offset); + return 1; + } + + if (erase_sector_jedec(flash, offset, page_size)) { + fprintf(stderr, "ERASE FAILED!\n"); + return -1; + } + toggle_ready_jedec(flash->virtual_memory); + + return 0; +} + int erase_sst_fwhub(struct flashchip *flash) { int i;

1 0

[PATCH] Replace PCI_OK/PCI_NT by OK/NT
by Michael Karcher 20 Jan '10

20 Jan '10

We don't need to duplicate OK and NT as PCI_OK and PCI_NT if the symbols are already there (defined for the chipset enable table). Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- drkaiser.c | 2 +- flash.h | 2 -- gfxnvidia.c | 46 +++++++++++++++++++++++----------------------- nic3com.c | 20 ++++++++++---------- satasii.c | 12 ++++++------ 5 files changed, 40 insertions(+), 42 deletions(-) diff --git a/drkaiser.c b/drkaiser.c index f13c13e..572fee3 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -29,7 +29,7 @@ #define PCI_MAGIC_DRKAISER_VALUE 0xa971 struct pcidev_status drkaiser_pcidev[] = { - {0x1803, 0x5057, PCI_OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"}, + {0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"}, {}, }; diff --git a/flash.h b/flash.h index 308e19b..ace2b1b 100644 --- a/flash.h +++ b/flash.h @@ -298,8 +298,6 @@ void internal_delay(int usecs); #if NEED_PCI == 1 /* pcidev.c */ -#define PCI_OK 0 -#define PCI_NT 1 /* Not tested */ extern uint32_t io_base_addr; extern struct pci_access *pacc; diff --git a/gfxnvidia.c b/gfxnvidia.c index cc66ace..ec41279 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -28,29 +28,29 @@ uint8_t *nvidia_bar; struct pcidev_status gfx_nvidia[] = { - {0x10de, 0x0010, PCI_NT, "NVIDIA", "Mutara V08 [NV2]" }, - {0x10de, 0x0018, PCI_NT, "NVIDIA", "RIVA 128" }, - {0x10de, 0x0020, PCI_NT, "NVIDIA", "RIVA TNT" }, - {0x10de, 0x0028, PCI_NT, "NVIDIA", "RIVA TNT2/TNT2 Pro" }, - {0x10de, 0x0029, PCI_NT, "NVIDIA", "RIVA TNT2 Ultra" }, - {0x10de, 0x002c, PCI_NT, "NVIDIA", "Vanta/Vanta LT" }, - {0x10de, 0x002d, PCI_OK, "NVIDIA", "RIVA TNT2 Model 64/Model 64 Pro" }, - {0x10de, 0x00a0, PCI_NT, "NVIDIA", "Aladdin TNT2" }, - {0x10de, 0x0100, PCI_NT, "NVIDIA", "GeForce 256" }, - {0x10de, 0x0101, PCI_NT, "NVIDIA", "GeForce DDR" }, - {0x10de, 0x0103, PCI_NT, "NVIDIA", "Quadro" }, - {0x10de, 0x0110, PCI_NT, "NVIDIA", "GeForce2 MX" }, - {0x10de, 0x0111, PCI_NT, "NVIDIA", "GeForce2 MX" }, - {0x10de, 0x0112, PCI_NT, "NVIDIA", "GeForce2 GO" }, - {0x10de, 0x0113, PCI_NT, "NVIDIA", "Quadro2 MXR" }, - {0x10de, 0x0150, PCI_NT, "NVIDIA", "GeForce2 GTS/Pro" }, - {0x10de, 0x0151, PCI_NT, "NVIDIA", "GeForce2 GTS" }, - {0x10de, 0x0152, PCI_NT, "NVIDIA", "GeForce2 Ultra" }, - {0x10de, 0x0153, PCI_NT, "NVIDIA", "Quadro2 Pro" }, - {0x10de, 0x0200, PCI_NT, "NVIDIA", "GeForce 3 nFX" }, - {0x10de, 0x0201, PCI_NT, "NVIDIA", "GeForce 3 nFX" }, - {0x10de, 0x0202, PCI_NT, "NVIDIA", "GeForce 3 nFX Ultra" }, - {0x10de, 0x0203, PCI_NT, "NVIDIA", "Quadro 3 DDC" }, + {0x10de, 0x0010, NT, "NVIDIA", "Mutara V08 [NV2]" }, + {0x10de, 0x0018, NT, "NVIDIA", "RIVA 128" }, + {0x10de, 0x0020, NT, "NVIDIA", "RIVA TNT" }, + {0x10de, 0x0028, NT, "NVIDIA", "RIVA TNT2/TNT2 Pro" }, + {0x10de, 0x0029, NT, "NVIDIA", "RIVA TNT2 Ultra" }, + {0x10de, 0x002c, NT, "NVIDIA", "Vanta/Vanta LT" }, + {0x10de, 0x002d, OK, "NVIDIA", "RIVA TNT2 Model 64/Model 64 Pro" }, + {0x10de, 0x00a0, NT, "NVIDIA", "Aladdin TNT2" }, + {0x10de, 0x0100, NT, "NVIDIA", "GeForce 256" }, + {0x10de, 0x0101, NT, "NVIDIA", "GeForce DDR" }, + {0x10de, 0x0103, NT, "NVIDIA", "Quadro" }, + {0x10de, 0x0110, NT, "NVIDIA", "GeForce2 MX" }, + {0x10de, 0x0111, NT, "NVIDIA", "GeForce2 MX" }, + {0x10de, 0x0112, NT, "NVIDIA", "GeForce2 GO" }, + {0x10de, 0x0113, NT, "NVIDIA", "Quadro2 MXR" }, + {0x10de, 0x0150, NT, "NVIDIA", "GeForce2 GTS/Pro" }, + {0x10de, 0x0151, NT, "NVIDIA", "GeForce2 GTS" }, + {0x10de, 0x0152, NT, "NVIDIA", "GeForce2 Ultra" }, + {0x10de, 0x0153, NT, "NVIDIA", "Quadro2 Pro" }, + {0x10de, 0x0200, NT, "NVIDIA", "GeForce 3 nFX" }, + {0x10de, 0x0201, NT, "NVIDIA", "GeForce 3 nFX" }, + {0x10de, 0x0202, NT, "NVIDIA", "GeForce 3 nFX Ultra" }, + {0x10de, 0x0203, NT, "NVIDIA", "Quadro 3 DDC" }, {}, }; diff --git a/nic3com.c b/nic3com.c index a4878d2..d3dcce5 100644 --- a/nic3com.c +++ b/nic3com.c @@ -36,20 +36,20 @@ uint16_t id; struct pcidev_status nics_3com[] = { /* 3C90xB */ - {0x10b7, 0x9055, PCI_OK, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"}, - {0x10b7, 0x9001, PCI_NT, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4" }, - {0x10b7, 0x9004, PCI_OK, "3COM", "3C90xB: PCI 10BASE-T (TPO)" }, - {0x10b7, 0x9005, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO)" }, - {0x10b7, 0x9006, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2 (TPC)" }, - {0x10b7, 0x900a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FL" }, - {0x10b7, 0x905a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FX" }, - {0x10b7, 0x9058, PCI_OK, "3COM", "3C905B: Cyclone 10/100/BNC" }, + {0x10b7, 0x9055, OK, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"}, + {0x10b7, 0x9001, NT, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4" }, + {0x10b7, 0x9004, OK, "3COM", "3C90xB: PCI 10BASE-T (TPO)" }, + {0x10b7, 0x9005, NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO)" }, + {0x10b7, 0x9006, NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2 (TPC)" }, + {0x10b7, 0x900a, NT, "3COM", "3C90xB: PCI 10BASE-FL" }, + {0x10b7, 0x905a, NT, "3COM", "3C90xB: PCI 10BASE-FX" }, + {0x10b7, 0x9058, OK, "3COM", "3C905B: Cyclone 10/100/BNC" }, /* 3C905C */ - {0x10b7, 0x9200, PCI_OK, "3COM", "3C905C: EtherLink 10/100 PCI (TX)" }, + {0x10b7, 0x9200, OK, "3COM", "3C905C: EtherLink 10/100 PCI (TX)" }, /* 3C980C */ - {0x10b7, 0x9805, PCI_NT, "3COM", "3C980C: EtherLink Server 10/100 PCI (TX)" }, + {0x10b7, 0x9805, NT, "3COM", "3C980C: EtherLink Server 10/100 PCI (TX)" }, {}, }; diff --git a/satasii.c b/satasii.c index 90995c9..90d38bd 100644 --- a/satasii.c +++ b/satasii.c @@ -30,12 +30,12 @@ uint8_t *sii_bar; uint16_t id; struct pcidev_status satas_sii[] = { - {0x1095, 0x0680, PCI_OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"}, - {0x1095, 0x3112, PCI_OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"}, - {0x1095, 0x3114, PCI_OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"}, - {0x1095, 0x3124, PCI_NT, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"}, - {0x1095, 0x3132, PCI_OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"}, - {0x1095, 0x3512, PCI_NT, "Silicon Image", "SiI 3512 [SATALink/SATARaid] SATA Ctrl"}, + {0x1095, 0x0680, OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"}, + {0x1095, 0x3112, OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"}, + {0x1095, 0x3114, OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"}, + {0x1095, 0x3124, NT, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"}, + {0x1095, 0x3132, OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"}, + {0x1095, 0x3512, NT, "Silicon Image", "SiI 3512 [SATALink/SATARaid] SATA Ctrl"}, {}, }; -- 1.6.5

1 0

[commit] r876 - trunk
by svn＠flashrom.org 20 Jan '10

20 Jan '10

Author: libv Date: 2010-01-20 15:45:07 +0100 (Wed, 20 Jan 2010) New Revision: 876 Modified: trunk/board_enable.c Log: Boards: Remove it8705_rom_write_enable. Should be functionally the same as it8705f_write_enable_2e. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2010-01-20 14:45:03 UTC (rev 875) +++ trunk/board_enable.c 2010-01-20 14:45:07 UTC (rev 876) @@ -205,8 +205,35 @@ return 0; } +/** + * + */ +static int it8705f_write_enable(uint8_t port, const char *name) +{ + enter_conf_mode_ite(port); + sio_mask(port, 0x24, 0x04, 0x04); /* Flash ROM I/F Writes Enable */ + exit_conf_mode_ite(port); + return 0; +} + /** + * Suited for: + * - AOpen vKM400Am-S: VIA KM400 + VT8237 + IT8705F. + * - Biostar P4M80-M4: VIA P4M800 + VT8237 + IT8705AF + * - Elitegroup K7S6A: SiS745 + ITE IT8705F + * - Elitegroup K7VTA3: VIA Apollo KT266/A/333 + VIA VT8235 + ITE IT8705F + * - GIGABYTE GA-7VT600: VIA KT600 + VT8237 + IT8705 + * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F + * + * SIS950 superio probably requires the same flash write enable. + */ +static int it8705f_write_enable_2e(const char *name) +{ + return it8705f_write_enable(0x2e, name); +} + +/** * VT823x: Set one of the GPIO pins. */ static int via_vt823x_gpio_set(uint8_t gpio, int raise) @@ -889,33 +916,6 @@ } /** - * Suited for: - * - Biostar P4M80-M4: VIA P4M800 + VT8237 + IT8705AF - * - GIGABYTE GA-7VT600: VIA KT600 + VT8237 + IT8705 - * - AOpen vKM400Am-S: VIA KM400 + VT8237 + IT8705F. - * - * SIS950 superio probably requires the same flash write enable. - */ -static int it8705_rom_write_enable(const char *name) -{ - /* enter IT87xx conf mode */ - enter_conf_mode_ite(0x2e); - - /* select right flash chip */ - sio_mask(0x2e, 0x22, 0x80, 0x80); - - /* bit 3: flash chip write enable - * bit 7: map flash chip at 1MB-128K (why though? ignoring this.) - */ - sio_mask(0x2e, 0x24, 0x04, 0x04); - - /* exit IT87xx conf mode */ - exit_conf_mode_ite(0x2e); - - return 0; -} - -/** * Suited for Soyo SY-7VCA: Pro133A + VT82C686. */ static int board_soyo_sy_7vca(const char *name) @@ -978,27 +978,7 @@ return 0; } -static int it8705f_write_enable(uint8_t port, const char *name) -{ - enter_conf_mode_ite(port); - sio_mask(port, 0x24, 0x04, 0x04); /* Flash ROM I/F Writes Enable */ - exit_conf_mode_ite(port); - - return 0; -} - /** - * Suited for: - * - Elitegroup K7S6A: SiS745 + ITE IT8705F - * - Elitegroup K7VTA3: VIA Apollo KT266/A/333 + VIA VT8235 + ITE IT8705F - * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F - */ -static int it8705f_write_enable_2e(const char *name) -{ - return it8705f_write_enable(0x2e, name); -} - -/** * Find the runtime registers of an SMSC Super I/O, after verifying its * chip ID. * @@ -1209,7 +1189,7 @@ {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, intel_ich_gpio23_raise}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", 0, w836xx_memw_enable_2e}, - {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705_rom_write_enable}, + {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705f_write_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, board_artecgroup_dbe6x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, board_asus_a7v600x}, @@ -1221,7 +1201,7 @@ {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, intel_ich_gpio21_raise}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, board_asus_p5a}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, nvidia_mcp_gpio10_raise}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705_rom_write_enable}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705f_write_enable_2e}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", 0, intel_ich_gpio23_raise}, {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", 0, it8705f_write_enable_2e}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, it8705f_write_enable_2e}, @@ -1229,7 +1209,7 @@ {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", 0, nvidia_mcp_gpio31_raise}, {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, board_epox_ep_bx3}, {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, it87xx_probe_spi_flash}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705_rom_write_enable}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705f_write_enable_2e}, {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, nvidia_mcp_gpio21_raise}, {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, it87xx_probe_spi_flash}, {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, it87xx_probe_spi_flash},

1 0

[commit] r875 - trunk
by svn＠flashrom.org 20 Jan '10

20 Jan '10

Author: libv Date: 2010-01-20 15:45:03 +0100 (Wed, 20 Jan 2010) New Revision: 875 Modified: trunk/board_enable.c trunk/flash.h Log: Boards: Add max_rom_decode_parallel entry to board enable table. This is a quick fix for board specific parallel addressing limits. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2010-01-20 14:14:11 UTC (rev 874) +++ trunk/board_enable.c 2010-01-20 14:45:03 UTC (rev 875) @@ -991,23 +991,14 @@ * Suited for: * - Elitegroup K7S6A: SiS745 + ITE IT8705F * - Elitegroup K7VTA3: VIA Apollo KT266/A/333 + VIA VT8235 + ITE IT8705F + * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F */ -static int elitegroup_k7vta3(const char *name) +static int it8705f_write_enable_2e(const char *name) { - max_rom_decode.parallel = 256 * 1024; return it8705f_write_enable(0x2e, name); } /** - * Suited for: Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F - */ -static int shuttle_ak38n(const char *name) -{ - max_rom_decode.parallel = 256 * 1024; - return it8705f_write_enable(0x2e, name); -} - -/** * Find the runtime registers of an SMSC Super I/O, after verifying its * chip ID. * @@ -1211,62 +1202,63 @@ /* Please keep this list alphabetically ordered by vendor/board name. */ struct board_pciid_enable board_pciid_enables[] = { - /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name flash enable */ - {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", intel_ich_gpio16_raise}, - {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", board_acorp_6a815epd}, - {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", intel_ich_gpio23_raise}, - {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", w83627hf_gpio24_raise_2e}, - {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", w836xx_memw_enable_2e}, - {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", it8705_rom_write_enable}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", board_artecgroup_dbe6x}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", board_artecgroup_dbe6x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", board_asus_a7v600x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", board_asus_a7v8x}, - {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", w836xx_memw_enable_2e}, - {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", via_vt823x_gpio5_raise}, - {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", intel_ich_gpio22_raise}, - {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", intel_ich_gpio21_raise}, - {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", intel_ich_gpio21_raise}, - {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", board_asus_p5a}, - {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", nvidia_mcp_gpio10_raise}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", it8705_rom_write_enable}, - {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", intel_ich_gpio23_raise}, - {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", elitegroup_k7vta3}, - {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", elitegroup_k7vta3}, - {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", w836xx_memw_enable_2e}, - {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", nvidia_mcp_gpio31_raise}, - {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", board_epox_ep_bx3}, - {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", it87xx_probe_spi_flash}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", it8705_rom_write_enable}, - {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", nvidia_mcp_gpio21_raise}, - {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", it87xx_probe_spi_flash}, - {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", it87xx_probe_spi_flash}, - {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", it87xx_probe_spi_flash}, - {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", board_hp_dl145_g3_enable}, - {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", board_ibm_x3455}, - {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", wbsio_check_for_spi}, - {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", w83627hf_gpio24_raise_2e}, - {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", board_kontron_986lcd_m}, - {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", board_mitac_6513wu}, - {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, - {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e}, - {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, - {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", board_msi_651ml}, - {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, - {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, - {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise}, - {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", w836xx_memw_enable_2e}, - {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", shuttle_ak38n}, - {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", board_shuttle_fn25}, - {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", board_soyo_sy_7vca}, - {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", w836xx_memw_enable_2e}, - {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", via_vt823x_gpio15_raise}, - {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", via_vt823x_gpio9_raise}, - {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, NULL, "VIA", "PC3500G", it87xx_probe_spi_flash}, - { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL}, /* end marker */ + /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... flash enable */ + {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, intel_ich_gpio16_raise}, + {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, board_acorp_6a815epd}, + {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, intel_ich_gpio23_raise}, + {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, w83627hf_gpio24_raise_2e}, + {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705_rom_write_enable}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, board_artecgroup_dbe6x}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, board_artecgroup_dbe6x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, board_asus_a7v600x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, board_asus_a7v8x}, + {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, w836xx_memw_enable_2e}, + {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, via_vt823x_gpio5_raise}, + {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", 0, intel_ich_gpio22_raise}, + {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", 0, intel_ich_gpio21_raise}, + {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, intel_ich_gpio21_raise}, + {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, board_asus_p5a}, + {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, nvidia_mcp_gpio10_raise}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705_rom_write_enable}, + {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", 0, intel_ich_gpio23_raise}, + {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", 0, it8705f_write_enable_2e}, + {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, it8705f_write_enable_2e}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", 0, w836xx_memw_enable_2e}, + {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", 0, nvidia_mcp_gpio31_raise}, + {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, board_epox_ep_bx3}, + {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, it87xx_probe_spi_flash}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705_rom_write_enable}, + {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, nvidia_mcp_gpio21_raise}, + {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, it87xx_probe_spi_flash}, + {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", 0, it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, it87xx_probe_spi_flash}, + {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, it87xx_probe_spi_flash}, + {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, board_hp_dl145_g3_enable}, + {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, board_ibm_x3455}, + {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, wbsio_check_for_spi}, + {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, w83627hf_gpio24_raise_2e}, + {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, board_kontron_986lcd_m}, + {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, board_mitac_6513wu}, + {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, board_msi_kt4v}, + {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, w83627thf_gpio4_4_raise_2e}, + {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, board_msi_kt4v}, + {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, board_msi_651ml}, + {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", 0, intel_ich_gpio19_raise}, + {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, w83627thf_gpio4_4_raise_4e}, + {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", 0, nvidia_mcp_gpio2_raise}, + {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", 256, it8705f_write_enable_2e}, + {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", 0, board_shuttle_fn25}, + {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", 0, board_soyo_sy_7vca}, + {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", 0, via_vt823x_gpio15_raise}, + {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", 0, via_vt823x_gpio9_raise}, + {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, NULL, "VIA", "PC3500G", 0, it87xx_probe_spi_flash}, + + { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, 0, NULL}, /* end marker */ }; /** @@ -1383,6 +1375,10 @@ board = board_match_pci_card_ids(); if (board) { + if (board->max_rom_decode_parallel) + max_rom_decode.parallel = + board->max_rom_decode_parallel * 1024; + printf("Disabling flash write protection for board \"%s %s\"... ", board->vendor_name, board->board_name); Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2010-01-20 14:14:11 UTC (rev 874) +++ trunk/flash.h 2010-01-20 14:45:03 UTC (rev 875) @@ -275,6 +275,7 @@ const char *vendor_name; const char *board_name; + int max_rom_decode_parallel; int (*enable) (const char *name); };

1 0

[PATCH] Convert chips to block erasers: SST
by Sean Nelson 20 Jan '10

20 Jan '10

Convert the following chips to block_erasers: SST28SF040A SST29EE010 SST29LE010 SST29EE020A SST29LE020 SST39SF010A SST39SF020A SST39SF040 SST39VF512 SST39VF010 SST39VF020 SST39VF040 SST39VF080 SST49LF002A/B SST49LF003A/B SST49LF004C SST49LF008A SST49LF008C SST49LF016C SST49LF020 SST49LF020A SST49LF040 SST49LF040B SST49LF080A SST49LF160C Extend sst28sf040 to include chip and sector functions for block_eraser. Extend sst49lfxxxc to include chip, sector, block erasers functions for block_erasers. Extend sst_fwhub to include chip and sector functions for block_erasers. Add copyrights to changed files. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

3 7

Re: [flashrom] [PATCH] Matching board via DMI
by Luc Verhaegen 20 Jan '10

20 Jan '10

On Tue, Jan 19, 2010 at 11:03:06AM +0100, Michael Karcher wrote: Acked-by: Luc Verhaegen <libv(a)skynet.be> Luc Verhaegen.

2 1

[commit] r874 - trunk
by svn＠flashrom.org 20 Jan '10

20 Jan '10

Author: mkarcher Date: 2010-01-20 15:14:11 +0100 (Wed, 20 Jan 2010) New Revision: 874 Added: trunk/dmi.c Modified: trunk/Makefile trunk/board_enable.c trunk/flash.h trunk/internal.c Log: Matching board via DMI If a board is not uniquely identifiable by PCI device/subsystem IDs, a string can be specified to be looked for (case-sensitive, substring or anchored) for now in one of the following DMI items in addition to matching the PCI IDs: - System Manufacturer - System Product Name - System Version - Baseboard Manufacturer - Baseboard Product Name - Baseboard Version Strings are anchored re-like (^ at the beginning, $ at the end), but there are no plans to support full regular expressions and matched to any of the mentioned fields. The match is only made if DMI info is available and the string matches. If no DMI info is available and the PCI IDs match, a warning is printed as the board can not be autodetected. It's still open to discussion whether we add an DMI override switch to specify a string that will definitely match, and whether this switch is only used if no DMI is available or whether it overrides or augments DMI data. DMI data is currently read using dmidecode. This tool is available for all major platforms except MacOS X. I heard that there also is a MacOS X version of dmidecode, but didn't investigate that. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2010-01-19 20:23:26 UTC (rev 873) +++ trunk/Makefile 2010-01-20 14:14:11 UTC (rev 874) @@ -104,7 +104,7 @@ ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'INTERNAL_SUPPORT=1' -PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o +PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o dmi.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o NEED_PCI := yes endif Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2010-01-19 20:23:26 UTC (rev 873) +++ trunk/board_enable.c 2010-01-20 14:14:11 UTC (rev 874) @@ -1193,6 +1193,13 @@ * provide an as complete set of pci ids as possible; autodetection is the * preferred behaviour and we would like to make sure that matches are unique. * + * If PCI IDs are not sufficient for board matching, the match can be further + * constrained by a string that has to be present in the DMI database for + * the baseboard or the system entry. The pattern is matched by case sensitve + * substring match, unless it is anchored to the beginning (with a ^ in front) + * or the end (with a $ at the end). Both anchors may be specified at the + * same time to match the full field. + * * The coreboot ids are used two fold. When running with a coreboot firmware, * the ids uniquely matches the coreboot board identification string. When a * legacy bios is installed and when autodetection is not possible, these ids @@ -1204,62 +1211,62 @@ /* Please keep this list alphabetically ordered by vendor/board name. */ struct board_pciid_enable board_pciid_enables[] = { - /* first pci-id set [4], second pci-id set [4], coreboot id [2], vendor name board name flash enable */ - {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, "Abit", "IP35", intel_ich_gpio16_raise}, - {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, "Acorp", "6A815EPD", board_acorp_6a815epd}, - {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, "ASRock", "P4i65GV", intel_ich_gpio23_raise}, - {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami", "Aruma", w83627hf_gpio24_raise_2e}, - {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, "Albatron", "PM266A", w836xx_memw_enable_2e}, - {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, "AOpen", "vKM400Am-S", it8705_rom_write_enable}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group", "DBE61", board_artecgroup_dbe6x}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group", "DBE62", board_artecgroup_dbe6x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, "ASUS", "A7V600-X", board_asus_a7v600x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, "ASUS", "A7V8X", board_asus_a7v8x}, - {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS", "A7V8X-MX SE", w836xx_memw_enable_2e}, - {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, "ASUS", "M2V-MX", via_vt823x_gpio5_raise}, - {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS", "P4B266", intel_ich_gpio22_raise}, - {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, "ASUS", "P4B266-LM", intel_ich_gpio21_raise}, - {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, "ASUS", "P4P800-E Deluxe", intel_ich_gpio21_raise}, - {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS", "P5A", board_asus_p5a}, - {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", nvidia_mcp_gpio10_raise}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", it8705_rom_write_enable}, - {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, "Dell", "PowerEdge 1850", intel_ich_gpio23_raise}, - {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, "Elitegroup", "K7S6A", elitegroup_k7vta3}, - {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", elitegroup_k7vta3}, - {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, "EPoX", "EP-8K5A2", w836xx_memw_enable_2e}, - {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, "EPoX", "EP-8RDA3+", nvidia_mcp_gpio31_raise}, - {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX", "EP-BX3", board_epox_ep_bx3}, - {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", it87xx_probe_spi_flash}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", it8705_rom_write_enable}, - {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", nvidia_mcp_gpio21_raise}, - {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", it87xx_probe_spi_flash}, - {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, "GIGABYTE", "GA-M61P-S3", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", it87xx_probe_spi_flash}, - {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", it87xx_probe_spi_flash}, - {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, "hp", "dl145_g3", "HP", "DL145 G3", board_hp_dl145_g3_enable}, - {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, "IBM", "x3455", board_ibm_x3455}, - {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, "Intel", "D201GLY", wbsio_check_for_spi}, - {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, "iwill", "dk8_htx", "IWILL", "DK8-HTX", w83627hf_gpio24_raise_2e}, - {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, "kontron", "986lcd-m", "Kontron", "986LCD-M", board_kontron_986lcd_m}, - {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, "Mitac", "6513WU", board_mitac_6513wu}, - {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, - {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e}, - {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, - {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, "MSI", "MS-7005 (651M-L)", board_msi_651ml}, - {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, - {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, - {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise}, - {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, "shuttle", "ak31", "Shuttle", "AK31", w836xx_memw_enable_2e}, - {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, "Shuttle", "AK38N", shuttle_ak38n}, - {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, "Shuttle", "FN25", board_shuttle_fn25}, - {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, "Soyo", "SY-7VCA", board_soyo_sy_7vca}, - {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", w836xx_memw_enable_2e}, - {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA", "EPIA M/MII/...", via_vt823x_gpio15_raise}, - {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, "VIA", "EPIA-N/NL", via_vt823x_gpio9_raise}, - {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, "VIA", "PC3500G", it87xx_probe_spi_flash}, + /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name flash enable */ + {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", intel_ich_gpio16_raise}, + {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", board_acorp_6a815epd}, + {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", intel_ich_gpio23_raise}, + {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", w83627hf_gpio24_raise_2e}, + {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", w836xx_memw_enable_2e}, + {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", it8705_rom_write_enable}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", board_artecgroup_dbe6x}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", board_artecgroup_dbe6x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", board_asus_a7v600x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", board_asus_a7v8x}, + {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", w836xx_memw_enable_2e}, + {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", via_vt823x_gpio5_raise}, + {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", intel_ich_gpio22_raise}, + {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", intel_ich_gpio21_raise}, + {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", intel_ich_gpio21_raise}, + {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", board_asus_p5a}, + {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", nvidia_mcp_gpio10_raise}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", it8705_rom_write_enable}, + {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", intel_ich_gpio23_raise}, + {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", elitegroup_k7vta3}, + {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", elitegroup_k7vta3}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", w836xx_memw_enable_2e}, + {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", nvidia_mcp_gpio31_raise}, + {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", board_epox_ep_bx3}, + {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", it87xx_probe_spi_flash}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", it8705_rom_write_enable}, + {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", nvidia_mcp_gpio21_raise}, + {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", it87xx_probe_spi_flash}, + {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", it87xx_probe_spi_flash}, + {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", it87xx_probe_spi_flash}, + {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", board_hp_dl145_g3_enable}, + {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", board_ibm_x3455}, + {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", wbsio_check_for_spi}, + {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", w83627hf_gpio24_raise_2e}, + {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", board_kontron_986lcd_m}, + {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", board_mitac_6513wu}, + {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, + {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e}, + {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, + {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", board_msi_651ml}, + {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, + {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, + {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise}, + {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", w836xx_memw_enable_2e}, + {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", shuttle_ak38n}, + {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", board_shuttle_fn25}, + {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", board_soyo_sy_7vca}, + {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", w836xx_memw_enable_2e}, + {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", via_vt823x_gpio15_raise}, + {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", via_vt823x_gpio9_raise}, + {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, NULL, "VIA", "PC3500G", it87xx_probe_spi_flash}, - { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL}, /* end marker */ + { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL}, /* end marker */ }; /** @@ -1346,6 +1353,18 @@ } } + if (board->dmi_pattern) { + if (!has_dmi_support) { + fprintf(stderr, "WARNING: Can't autodetect %s %s," + " DMI info unavailable.\n", + board->vendor_name, board->board_name); + continue; + } else { + if (!dmi_match(board->dmi_pattern)) + continue; + } + } + return board; } Added: trunk/dmi.c =================================================================== --- trunk/dmi.c (rev 0) +++ trunk/dmi.c 2010-01-20 14:14:11 UTC (rev 874) @@ -0,0 +1,168 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009,2010 Michael Karcher + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include <stdio.h> +#include <stdlib.h> + +#include "flash.h" + +enum dmi_strings { + DMI_SYS_MANUFACTURER, + DMI_SYS_PRODUCT, + DMI_SYS_VERSION, + DMI_BB_MANUFACTURER, + DMI_BB_PRODUCT, + DMI_BB_VERSION, + DMI_ID_INVALID /* This must always be the last entry */ +}; + +/* The short_id for baseboard starts with "m" as in mainboard to leave + "b" available for BIOS */ +struct { + const char *dmidecode_name; + char short_id[3]; +} dmi_properties[DMI_ID_INVALID] = { + {"system-manufacturer", "sm"}, + {"system-product-name", "sp"}, + {"system-version", "sv"}, + {"baseboard-manufacturer", "mm"}, + {"baseboard-product-name", "mp"}, + {"baseboard-version", "mv"} +}; + +#define DMI_COMMAND_LEN_MAX 260 +const char *dmidecode_command = "dmidecode"; + +int has_dmi_support = 0; +char *dmistrings[DMI_ID_INVALID]; + +/* strings longer than 4096 in DMI are just insane */ +#define DMI_MAX_ANSWER_LEN 4096 + +void dmi_init(void) +{ + FILE *dmidecode_pipe; + int i; + char *answerbuf = malloc(DMI_MAX_ANSWER_LEN); + if(!answerbuf) + { + fprintf(stderr, "DMI: couldn't alloc answer buffer\n"); + return; + } + for (i = 0; i < DMI_ID_INVALID; i++) + { + char commandline[DMI_COMMAND_LEN_MAX+40]; + snprintf(commandline, sizeof(commandline), + "%s -s %s", dmidecode_command, + dmi_properties[i].dmidecode_name); + dmidecode_pipe = popen(commandline, "r"); + if (!dmidecode_pipe) + { + printf_debug("DMI pipe open error\n"); + goto out_free; + } + fgets(answerbuf, DMI_MAX_ANSWER_LEN, dmidecode_pipe); + if (ferror(dmidecode_pipe)) + { + printf_debug("DMI pipe read error\n"); + pclose(dmidecode_pipe); + goto out_free; + } + /* Toss all output above DMI_MAX_ANSWER_LEN away to prevent + deadlock on pclose. */ + while (!feof(dmidecode_pipe)) + getc(dmidecode_pipe); + if (pclose(dmidecode_pipe) != 0) + { + printf_debug("DMI pipe close error\n"); + goto out_free; + } + + /* chomp trailing newline */ + if (answerbuf[0] != 0 && + answerbuf[strlen(answerbuf) - 1] == '\n') + answerbuf[strlen(answerbuf) - 1] = 0; + printf_debug("DMI string %d: \"%s\"\n", i, answerbuf); + dmistrings[i] = strdup(answerbuf); + } + has_dmi_support = 1; +out_free: + free(answerbuf); +} + +/** + * Does an substring/prefix/postfix/whole-string match. + * + * The pattern is matched as-is. The only metacharacters supported are '^' + * at the beginning and '$' at the end. So you can look for "^prefix", + * "suffix$", "substring" or "^complete string$". + * + * @param value The string to check. + * @param pattern The pattern. + * @return Nonzero if pattern matches. + */ +static int dmi_compare(const char *value, const char *pattern) +{ + int anchored = 0; + int patternlen; + printf_debug("matching %s against %s\n", value, pattern); + /* The empty string is part of all strings */ + if (pattern[0] == 0) + return 1; + + if (pattern[0] == '^') { + anchored = 1; + pattern++; + } + + patternlen = strlen(pattern); + if (pattern[patternlen - 1] == '$') { + int valuelen = strlen(value); + patternlen--; + if(patternlen > valuelen) + return 0; + + /* full string match: require same length */ + if(anchored && (valuelen != patternlen)) + return 0; + + /* start character to make ends match */ + value += valuelen - patternlen; + anchored = 1; + } + + if (anchored) + return strncmp(value, pattern, patternlen) == 0; + else + return strstr(value, pattern) != NULL; +} + +int dmi_match(const char *pattern) +{ + int i; + if (!has_dmi_support) + return 0; + + for (i = 0;i < DMI_ID_INVALID; i++) + return dmi_compare(dmistrings[i], pattern); + + return 0; +} Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2010-01-19 20:23:26 UTC (rev 873) +++ trunk/flash.h 2010-01-20 14:14:11 UTC (rev 874) @@ -265,6 +265,9 @@ uint16_t second_card_vendor; uint16_t second_card_device; + /* Pattern to match DMI entries */ + const char *dmi_pattern; + /* The vendor / part name from the coreboot table. */ const char *lb_vendor; const char *lb_part; @@ -343,6 +346,11 @@ extern char *lb_part, *lb_vendor; extern int partvendor_from_cbtable; +/* dmi.c */ +extern int has_dmi_support; +void dmi_init(void); +int dmi_match(const char *pattern); + /* internal.c */ #if NEED_PCI == 1 struct superio { Modified: trunk/internal.c =================================================================== --- trunk/internal.c 2010-01-19 20:23:26 UTC (rev 873) +++ trunk/internal.c 2010-01-20 14:14:11 UTC (rev 874) @@ -152,6 +152,7 @@ * mainboard specific flash enable sequence. */ coreboot_init(); + dmi_init(); /* Probe for the SuperI/O chip and fill global struct superio. */ probe_superio();

1 0

[PATCH] Abit KN8 Ultra erase/write support
by Chris 20 Jan '10

20 Jan '10

With instruction from twice11 in the IRC channel, I've created a patch enabling erase/write support for the Abit KN8 Ultra motherboard. Patch is attached. This motherboard uses the LPC protocol. -- http://zenthought.org/

2 1

Fwd: Flashrom report for Intel BOXDP45SG: Intel provided image is 3x size of Flash ROM!
by Thode, Lucas 19 Jan '10

19 Jan '10

---------- Forwarded message ---------- From: Thode, Lucas <lthode(a)unomaha.edu> Date: 2010/1/17 Subject: Flashrom report for Intel BOXDP45SG: Intel provided image is 3x size of Flash ROM! To: flashrom(a)flashrom.org Link to vendor image (.BIO file): http://downloadcenter.intel.com/confirm.aspx?httpDown=http://downloadmirror… -- (HTT-Bird@Freenode)

4 5

[PATCH] S29C51004T fixup
by Sean Nelson 19 Jan '10

19 Jan '10

Fix SyncMOS S29C51004T, which has 512 Uniform 1k sectors.

1 2

[commit] r873 - trunk
by svn＠flashrom.org 19 Jan '10

19 Jan '10

Author: snelson Date: 2010-01-19 21:23:26 +0100 (Tue, 19 Jan 2010) New Revision: 873 Modified: trunk/flashchips.c Log: Fix SyncMOS S29C51004T, which has 512 uniform 1k sectors. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-19 16:39:19 UTC (rev 872) +++ trunk/flashchips.c 2010-01-19 20:23:26 UTC (rev 873) @@ -5043,7 +5043,7 @@ .block_erasers = { { - .eraseblocks = { {1 * 1024, 496} }, + .eraseblocks = { {1 * 1024, 512} }, .block_erase = erase_sector_jedec, }, { .eraseblocks = { {512 * 1024, 1} },

1 0

[PATCH] Convert chips to block erasers: ST
by Sean Nelson 19 Jan '10

19 Jan '10

Convert ST to block erasers: ST M25P05-A ST M25P05.RES ST M25P10-A ST M25P10.RES ST M25P20 ST M25P40 ST M25P40-old ST M25P80 ST M25P16 ST M25P32 ST M25P64 ST M25P128 ST M29F002B ST M29F002T/NT ST M29F040B ST M29F400BT ST M29W010B ST M29W040B ST M50FLW040A ST M50FLW040B ST M50FLW080A ST M50FLW080B ST M50FW002 ST M50FW016 ST M50FW040 ST M50FW080 ST M50LPW116 Add erase_chip_stm50flw0x0x to stm50flw0x0x.c Add copyright to stm50flw0x0x Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

3 19

[commit] r872 - trunk
by svn＠flashrom.org 19 Jan '10

19 Jan '10

Author: snelson Date: 2010-01-19 17:39:19 +0100 (Tue, 19 Jan 2010) New Revision: 872 Modified: trunk/flashchips.c Log: Convert ST to block erasers: ST M25P05-A ST M25P05.RES ST M25P10-A ST M25P10.RES ST M25P20 ST M25P40 ST M25P40-old ST M25P80 ST M25P16 ST M25P32 ST M25P64 ST M25P128 ST M29F002B ST M29F002T/NT ST M29F040B ST M29F400BT ST M29W010B ST M29W040B ST M50FLW040A ST M50FLW040B ST M50FLW080A ST M50FLW080B ST M50FW002 ST M50FW016 ST M50FW040 ST M50FW080 ST M50LPW116 Add erase_chip_stm50flw0x0x to stm50flw0x0x.c Add copyright to stm50flw0x0x.c Fix block sizes and counts Omit M50FLW0x0x mixed sector/block eraser Convert the used 82802ab functions to their stm50flw0x0x equivalents Fix incorrect sizes as found by Carl-Daniel. Add back M50FLW0x0x mixed sector/block eraser sans function pointer. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-19 16:08:51 UTC (rev 871) +++ trunk/flashchips.c 2010-01-19 16:39:19 UTC (rev 872) @@ -4685,6 +4685,14 @@ .block_erasers = { { + .eraseblocks = { + {4 * 1024, 16}, /* sector */ + {64 * 1024, 5}, /* block */ + {4 * 1024, 16}, /* sector */ + {4 * 1024, 16}, /* sector */ + }, + .block_erase = NULL, + }, { .eraseblocks = { {64 * 1024, 8}, }, .block_erase = erase_block_stm50flw0x0x, }, { @@ -4712,6 +4720,14 @@ .block_erasers = { { + .eraseblocks = { + {4 * 1024, 16}, /* sector */ + {4 * 1024, 16}, /* sector */ + {64 * 1024, 5}, /* block */ + {4 * 1024, 16}, /* sector */ + }, + .block_erase = NULL, + }, { .eraseblocks = { {64 * 1024, 8}, }, .block_erase = erase_block_stm50flw0x0x, }, { @@ -4739,6 +4755,14 @@ .block_erasers = { { + .eraseblocks = { + {4 * 1024, 16}, /* sector */ + {64 * 1024, 13}, /* block */ + {4 * 1024, 16}, /* sector */ + {4 * 1024, 16}, /* sector */ + }, + .block_erase = NULL, + }, { .eraseblocks = { {64 * 1024, 16}, }, .block_erase = erase_block_stm50flw0x0x, }, { @@ -4766,6 +4790,14 @@ .block_erasers = { { + .eraseblocks = { + {4 * 1024, 16}, /* sector */ + {4 * 1024, 16}, /* sector */ + {64 * 1024, 13}, /* block */ + {4 * 1024, 16}, /* sector */ + }, + .block_erase = NULL, + }, { .eraseblocks = { {64 * 1024, 16}, }, .block_erase = erase_block_stm50flw0x0x, }, {

1 0

[PATCH] Convert chips to block erasers: SyncMOS and TI
by Sean Nelson 19 Jan '10

19 Jan '10

Convert chips to block_erasers: SyncMOS S29C31004T SyncMOS S29C51001T SyncMOS S29C51002T SyncMOS S29C51004T TI TMS29F002RT TI TMS29F002RB Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

2 4

[commit] r871 - trunk
by svn＠flashrom.org 19 Jan '10

19 Jan '10

Author: snelson Date: 2010-01-19 17:08:51 +0100 (Tue, 19 Jan 2010) New Revision: 871 Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/stm50flw0x0x.c Log: Convert chips to block_erasers: SyncMOS S29C31004T SyncMOS S29C51001T SyncMOS S29C51002T SyncMOS S29C51004T TI TMS29F002RT TI TMS29F002RB SyncMOS chips have Uniform sector; boot blocks on chips are made up of uniform sectors but have locking. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipdrivers.h =================================================================== --- trunk/chipdrivers.h 2010-01-19 11:15:48 UTC (rev 870) +++ trunk/chipdrivers.h 2010-01-19 16:08:51 UTC (rev 871) @@ -167,6 +167,9 @@ /* stm50flw0x0x.c */ int probe_stm50flw0x0x(struct flashchip *flash); int erase_stm50flw0x0x(struct flashchip *flash); +int erase_block_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize); +int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize); +int erase_chip_stm50flw0x0x(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf); #endif /* !__CHIPDRIVERS_H__ */ Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-19 11:15:48 UTC (rev 870) +++ trunk/flashchips.c 2010-01-19 16:08:51 UTC (rev 871) @@ -4191,7 +4191,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4212,7 +4222,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_res, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, }, @@ -4228,7 +4248,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4245,7 +4275,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_res, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, }, @@ -4261,7 +4301,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4274,10 +4324,20 @@ .model_id = ST_M25P40, .total_size = 512, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4293,7 +4353,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_res, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4306,10 +4376,20 @@ .model_id = ST_M25P80, .total_size = 1024, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4322,10 +4402,20 @@ .model_id = ST_M25P16, .total_size = 2048, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4338,10 +4428,20 @@ .model_id = ST_M25P32, .total_size = 4096, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4357,7 +4457,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4373,7 +4483,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {256 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4389,7 +4509,22 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_m29f002, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {16 * 1024, 1}, + {8 * 1024, 2}, + {32 * 1024, 1}, + {64 * 1024, 3}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_m29f002b, .read = read_memmapped, }, @@ -4402,10 +4537,25 @@ .model_id = ST_M29F002T, .total_size = 256, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_m29f002, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_m29f002t, .read = read_memmapped, }, @@ -4418,10 +4568,20 @@ .model_id = ST_M29F040B, .total_size = 512, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_29f040b, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ - .erase = erase_29f040b, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8}, }, + .block_erase = erase_sector_29f040b, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_29f040b, + } + }, .write = write_29f040b, .read = read_memmapped, }, @@ -4437,7 +4597,22 @@ .tested = TEST_UNTESTED, .probe = probe_m29f400bt, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ - .erase = erase_m29f400bt, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 7}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = block_erase_m29f400bt, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = block_erase_chip_m29f400bt, + } + }, .write = write_coreboot_m29f400bt, .read = read_memmapped, }, @@ -4453,7 +4628,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {16 * 1024, 8}, }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -4469,7 +4654,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8}, }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -4486,7 +4681,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_stm50flw0x0x, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4503,7 +4708,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_stm50flw0x0x, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4517,10 +4732,20 @@ .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_stm50flw0x0x, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4537,7 +4762,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_stm50flw0x0x, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4554,6 +4789,21 @@ .probe = probe_49lfxxxc, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, .write = NULL, .read = read_memmapped, }, @@ -4569,8 +4819,18 @@ .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ - .erase = erase_82802ab, - .write = write_82802ab, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 32}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, + .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4582,11 +4842,21 @@ .model_id = ST_M50FW040, .total_size = 512, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ - .erase = erase_82802ab, - .write = write_82802ab, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, + .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4598,11 +4868,21 @@ .model_id = ST_M50FW080, .total_size = 1024, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ - .erase = erase_82802ab, - .write = write_82802ab, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, + .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4617,7 +4897,23 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {4 * 1024, 16}, + {64 * 1024, 30}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -4633,7 +4929,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {1 * 1024, 512} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, .write = write_49f002, .read = read_memmapped, }, @@ -4649,7 +4955,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {512, 256} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, .write = write_49f002, .read = read_memmapped, }, @@ -4662,10 +4978,20 @@ .model_id = S29C51002T, .total_size = 256, .page_size = 128, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {512, 512} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, .write = write_49f002, .read = read_memmapped, }, @@ -4681,7 +5007,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {1 * 1024, 496} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, .write = write_49f002, .read = read_memmapped, }, @@ -4698,6 +5034,21 @@ .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {16 * 1024, 1}, + {8 * 1024, 2}, + {32 * 1024, 1}, + {64 * 1024, 3}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, .write = NULL, .read = read_memmapped, }, @@ -4714,6 +5065,21 @@ .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, .write = NULL, .read = read_memmapped, }, Modified: trunk/stm50flw0x0x.c =================================================================== --- trunk/stm50flw0x0x.c 2010-01-19 11:15:48 UTC (rev 870) +++ trunk/stm50flw0x0x.c 2010-01-19 16:08:51 UTC (rev 871) @@ -2,6 +2,7 @@ * This file is part of the flashrom project. * * Copyright (C) 2008 Claus Gindhart <claus.gindhart(a)kontron.com> + * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -99,9 +100,9 @@ return 0; } -int erase_block_stm50flw0x0x(struct flashchip *flash, int offset) +int erase_block_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize) { - chipaddr bios = flash->virtual_memory + offset; + chipaddr bios = flash->virtual_memory + block; // clear status register chip_writeb(0x50, bios); @@ -113,15 +114,38 @@ wait_stm50flw0x0x(flash->virtual_memory); - if (check_erased_range(flash, offset, flash->page_size)) { + if (check_erased_range(flash, block, blocksize)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } - printf("DONE BLOCK 0x%x\n", offset); + printf("DONE BLOCK 0x%x\n", block); return 0; } +int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int sector, unsigned int sectorsize) +{ + chipaddr bios = flash->virtual_memory + sector; + + // clear status register + chip_writeb(0x50, bios); + printf_debug("Erase at 0x%lx\n", bios); + // now start it + chip_writeb(0x32, bios); + chip_writeb(0xd0, bios); + programmer_delay(10); + + wait_stm50flw0x0x(flash->virtual_memory); + + if (check_erased_range(flash, sector, sectorsize)) { + fprintf(stderr, "ERASE FAILED!\n"); + return -1; + } + printf("DONE BLOCK 0x%x\n", sector); + + return 0; +} + int write_page_stm50flw0x0x(chipaddr bios, uint8_t *src, chipaddr dst, int page_size) { @@ -178,7 +202,7 @@ fprintf(stderr, "UNLOCK FAILED!\n"); return -1; } - if (erase_block_stm50flw0x0x(flash, i * page_size)) { + if (erase_block_stm50flw0x0x(flash, i * page_size, page_size)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } @@ -188,6 +212,16 @@ return 0; } +int erase_chip_stm50flw0x0x(struct flashchip *flash, unsigned int addr, unsigned int blocklen) +{ + if ((addr != 0) || (blocklen != flash->total_size * 1024)) { + msg_cerr("%s called with incorrect arguments\n", + __func__); + return -1; + } + return erase_stm50flw0x0x(flash); +} + int write_stm50flw0x0x(struct flashchip *flash, uint8_t * buf) { int i, rc = 0; @@ -221,7 +255,7 @@ rc = unlock_block_stm50flw0x0x(flash, i * page_size); if (!rc) - rc = erase_block_stm50flw0x0x(flash, i * page_size); + rc = erase_block_stm50flw0x0x(flash, i * page_size, page_size); if (!rc) write_page_stm50flw0x0x(bios, buf + i * page_size, bios + i * page_size, page_size);

1 0

Re: [flashrom] [coreboot] Paraflasher Competition
by Carl-Daniel Hailfinger 19 Jan '10

19 Jan '10

[added flashrom to CC] On 19.01.2010 15:44, Joseph Smith wrote: > Looks like the Paraflasher has some competition: > > http://cgi.ebay.com/NANO-BIOS-Programmer-for-PC-M-B-BIOS-repairing_W0QQitem… > > Possible external flasher for flashrom? > Doable, but painful. That thing is a parallel port flasher and uses USB only as power supply... > Although the Paraflasher is way better by design :-) > Sure. By the way, what's the status of Paraflasher? Does it work for flashing? Any interest in adding flashrom support for it (easy task)? Does someone want to check the Nano BIOS Programmer support list against the flashrom support list? Would be cool if we could list all chips they do. Regards, Carl-Daniel -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 1

[commit] r870 - trunk
by svn＠flashrom.org 19 Jan '10

19 Jan '10

Author: hailfinger Date: 2010-01-19 12:15:48 +0100 (Tue, 19 Jan 2010) New Revision: 870 Added: trunk/dediprog.c Modified: trunk/Makefile trunk/flash.h trunk/flashrom.c trunk/spi.c Log: Dediprog SF100 support. Reverse engineered from USB logs. I never touched that programmer nor did I ever see the associated software. Disabled by default until it is complete. The driver needs to be hooked up to the SPI core before it will do anything besides init and diagnostics. I successfully reverse engineered all commands, but some are still somewhat magic. Logs from "flashrom -p dediprog -V" are appreciated. Probe and read should work, erase/write is expected to explode. The programmer will set voltage to 0 on exit. Thanks a lot to Stefan Reinauer and Patrick Georgi for providing USB logs and for testing the result. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2010-01-19 06:42:46 UTC (rev 869) +++ trunk/Makefile 2010-01-19 11:15:48 UTC (rev 870) @@ -96,6 +96,9 @@ # Always enable Bus Pirate SPI for now. CONFIG_BUSPIRATESPI ?= yes +# Disable Dediprog SF100 until support is complete and tested. +CONFIG_DEDIPROG ?= no + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -160,6 +163,12 @@ PROGRAMMER_OBJS += buspirate_spi.o endif +ifeq ($(CONFIG_DEDIPROG), yes) +FEATURE_CFLAGS += -D'DEDIPROG_SUPPORT=1' +FEATURE_LIBS += -lusb +PROGRAMMER_OBJS += dediprog.o +endif + # Ugly, but there's no elif/elseif. ifeq ($(CONFIG_SERPROG), yes) LIB_OBJS += serial.o Added: trunk/dediprog.c =================================================================== --- trunk/dediprog.c (rev 0) +++ trunk/dediprog.c 2010-01-19 11:15:48 UTC (rev 870) @@ -0,0 +1,388 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include <stdlib.h> +#include <ctype.h> +#include <sys/types.h> +#include <usb.h> +#include "flash.h" +#include "spi.h" + +#define DEFAULT_TIMEOUT 3000 +usb_dev_handle *dediprog_handle; + +int dediprog_do_stuff(void); + +void print_hex(void *buf, size_t len) +{ + size_t i; + + for (i = 0; i < len; i++) + msg_pdbg(" %02x", ((uint8_t *)buf)[i]); +} + +struct usb_device *get_device_by_vid_pid(uint16_t vid, uint16_t pid) +{ + struct usb_bus *bus; + struct usb_device *dev; + + for (bus = usb_get_busses(); bus; bus = bus->next) + for (dev = bus->devices; dev; dev = dev->next) + if ((dev->descriptor.idVendor == vid) && + (dev->descriptor.idProduct == pid)) + return dev; + + return NULL; +} + +//int usb_control_msg(usb_dev_handle *dev, int requesttype, int request, int value, int index, char *bytes, int size, int timeout); + +int dediprog_set_spi_voltage(uint16_t voltage) +{ + int ret; + unsigned int mv; + + switch (voltage) { + case 0x0: + /* Admittedly this one is an assumption. */ + mv = 0; + break; + case 0x12: + mv = 1800; + break; + case 0x11: + mv = 2500; + break; + case 0x10: + mv = 3500; + break; + default: + msg_perr("Unknown voltage selector 0x%x! Aborting.\n", voltage); + return 1; + } + msg_pdbg("Setting SPI voltage to %u.%03u V\n", mv / 1000, mv % 1000); + + ret = usb_control_msg(dediprog_handle, 0x42, 0x9, voltage, 0xff, NULL, 0x0, DEFAULT_TIMEOUT); + if (ret != 0x0) { + msg_perr("Command Set SPI Voltage 0x%x failed!\n", voltage); + return 1; + } + return 0; +} + +/* After dediprog_set_spi_speed, the original app always calls + * dediprog_set_spi_voltage(0) and then + * dediprog_check_devicestring() four times in a row. + * After that, dediprog_command_a() is called. + * This looks suspiciously like the microprocessor in the SF100 has to be + * restarted/reinitialized in case the speed changes. + */ +int dediprog_set_spi_speed(uint16_t speed) +{ + int ret; + unsigned int khz; + + /* Case 1 and 2 are in weird order. Probably an organically "grown" + * interface. + * Base frequency is 24000 kHz, divisors are (in order) + * 1, 3, 2, 8, 11, 16, 32, 64. + */ + switch (speed) { + case 0x0: + khz = 24000; + break; + case 0x1: + khz = 8000; + break; + case 0x2: + khz = 12000; + break; + case 0x3: + khz = 3000; + break; + case 0x4: + khz = 2180; + break; + case 0x5: + khz = 1500; + break; + case 0x6: + khz = 750; + break; + case 0x7: + khz = 375; + break; + default: + msg_perr("Unknown frequency selector 0x%x! Aborting.\n", speed); + return 1; + } + msg_pdbg("Setting SPI speed to %u kHz\n", khz); + + ret = usb_control_msg(dediprog_handle, 0x42, 0x61, speed, 0xff, NULL, 0x0, DEFAULT_TIMEOUT); + if (ret != 0x0) { + msg_perr("Command Set SPI Speed 0x%x failed!\n", speed); + return 1; + } + return 0; +} + +int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + /* Maximum read length is 4 bytes for now. */ + return spi_read_chunked(flash, buf, start, len, 4); +} + +int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + int ret; + + /* Paranoid, but I don't want to be blamed if anything explodes. */ + if ((writecnt != 1) && (writecnt != 4)) + msg_perr("Untested writecnt=%i, aborting.\n", writecnt); + if (readcnt > 4) + msg_perr("Untested readcnt=%i, aborting.\n", readcnt); + if ((readcnt == 0) && (writecnt != 1)) + msg_perr("Untested writecnt=%i, readcnt=%i combination, " + "aborting.\n", writecnt, readcnt); + + ret = usb_control_msg(dediprog_handle, 0x42, 0x1, 0xff, readcnt ? 0x1 : 0x0, (char *)writearr, writecnt, DEFAULT_TIMEOUT); + if (ret != writecnt) { + msg_perr("Command Send SPI failed, ret=%i, expected %i!\n", + ret, writecnt); + return 1; + } + if (!readcnt) + return 0; + memset(readarr, 0, readcnt); + ret = usb_control_msg(dediprog_handle, 0xc2, 0x01, 0xbb8, 0x0000, (char *)readarr, readcnt, DEFAULT_TIMEOUT); + if (ret != readcnt) { + msg_perr("Command Receive SPI failed, ret=%i, expected %i!\n", + ret, readcnt); + return 1; + } + return 0; +} + +int dediprog_check_devicestring(void) +{ + int ret; + char buf[0x11]; + + /* Command Prepare Receive Device String. */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0xc3, 0x7, 0x0, 0xef03, buf, 0x1, DEFAULT_TIMEOUT); + /* The char casting is needed to stop gcc complaining about an always true comparison. */ + if ((ret != 0x1) || (buf[0] != (char)0xff)) { + msg_perr("Unexpected response to Command Prepare Receive Device" + " String!\n"); + return 1; + } + /* Command Receive Device String. */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0xc2, 0x8, 0xff, 0xff, buf, 0x10, DEFAULT_TIMEOUT); + if (ret != 0x10) { + msg_perr("Incomplete/failed Command Receive Device String!\n"); + return 1; + } + buf[0x10] = '\0'; + msg_pdbg("Found a %s\n", buf); + if (memcmp(buf, "SF100", 0x5)) { + msg_perr("Device not a SF100!\n"); + return 1; + } + /* Only these versions were tested. */ + if (memcmp(buf, "SF100 V:2.1.1 ", 0x10) && + memcmp(buf, "SF100 V:3.1.8 ", 0x10)) { + msg_perr("Unexpected firmware version!\n"); + return 1; + } + return 0; +} + +/* Command A seems to be some sort of device init. It is either followed by + * dediprog_check_devicestring (often) or Command A (often) or + * Command F (once). + */ +int dediprog_command_a(void) +{ + int ret; + char buf[0x1]; + + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0xc3, 0xb, 0x0, 0x0, buf, 0x1, DEFAULT_TIMEOUT); + if ((ret != 0x1) || (buf[0] != 0x6f)) { + msg_perr("Unexpected response to Command A!\n"); + return 1; + } + return 0; +} + +/* Command C is only sent after dediprog_check_devicestring, but not after every + * invocation of dediprog_check_devicestring. It is only sent after the first + * dediprog_command_a(); dediprog_check_devicestring() sequence in each session. + * I'm tempted to call this one start_SPI_engine or finish_init. + */ +int dediprog_command_c(void) +{ + int ret; + + ret = usb_control_msg(dediprog_handle, 0x42, 0x4, 0x0, 0x0, NULL, 0x0, DEFAULT_TIMEOUT); + if (ret != 0x0) { + msg_perr("Unexpected response to Command C!\n"); + return 1; + } + return 0; +} + +/* Very strange. Seems to be a programmer keepalive or somesuch. + * Wait unsuccessfully for timeout ms to read one byte. + * Is usually called after setting voltage to 0. + */ +int dediprog_command_f(int timeout) +{ + int ret; + char buf[0x1]; + + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0xc2, 0x11, 0xff, 0xff, buf, 0x1, timeout); + if (ret != 0x0) { + msg_perr("Unexpected response to Command F!\n"); + return 1; + } + return 0; +} + +/* URB numbers refer to the first log ever captured. */ +int dediprog_init(void) +{ + struct usb_device *dev; + + msg_pspew("%s\n", __func__); + + /* Here comes the USB stuff. */ + usb_init(); + usb_find_busses(); + usb_find_devices(); + dev = get_device_by_vid_pid(0x0483, 0xdada); + if (!dev) { + msg_perr("Could not find a Dediprog SF100 on USB!\n"); + return 1; + } + msg_pdbg("Found USB device (%04x:%04x).\n", + dev->descriptor.idVendor, + dev->descriptor.idProduct); + dediprog_handle = usb_open(dev); + /* URB 6. Command A. */ + if (dediprog_command_a()) + return 1; + /* URB 7. Command A. */ + if (dediprog_command_a()) + return 1; + /* URB 8. Command Prepare Receive Device String. */ + /* URB 9. Command Receive Device String. */ + if (dediprog_check_devicestring()) + return 1; + /* URB 10. Command C. */ + if (dediprog_command_c()) + return 1; + /* URB 11. Command Set SPI Voltage. */ + if (dediprog_set_spi_voltage(0x10)) + return 1; + + buses_supported = CHIP_BUSTYPE_SPI; + spi_controller = SPI_CONTROLLER_DEDIPROG; + + /* RE leftover, leave in until the driver is complete. */ +#if 0 + /* Execute RDID by hand if you want to test it. */ + dediprog_do_stuff(); +#endif + + return 0; +} + +/* Leftovers from reverse engineering. Keep for documentation purposes until + * completely understood. + */ +int dediprog_do_stuff(void) +{ + char buf[0x4]; + /* SPI command processing starts here. */ + + /* URB 12. Command Send SPI. */ + /* URB 13. Command Receive SPI. */ + memset(buf, 0, sizeof(buf)); + /* JEDEC RDID */ + msg_pdbg("Sending RDID\n"); + buf[0] = JEDEC_RDID; + if (dediprog_spi_send_command(JEDEC_RDID_OUTSIZE, JEDEC_RDID_INSIZE, (unsigned char *)buf, (unsigned char *)buf)) + return 1; + msg_pdbg("Receiving response: "); + print_hex(buf, JEDEC_RDID_INSIZE); +#if 0 + /* URB 14-27 are more SPI commands. */ + /* URB 28. Command Set SPI Voltage. */ + if (dediprog_set_spi_voltage(0x0)) + return 1; + /* URB 29-38. Command F, unsuccessful wait. */ + if (dediprog_command_f(544)) + return 1; + /* URB 39. Command Set SPI Voltage. */ + if (dediprog_set_spi_voltage(0x10)) + return 1; + /* URB 40. Command Set SPI Speed. */ + if (dediprog_set_spi_speed(0x2)) + return 1; + /* URB 41 is just URB 28. */ + /* URB 42,44,46,48,51,53 is just URB 8. */ + /* URB 43,45,47,49,52,54 is just URB 9. */ + /* URB 50 is just URB 6/7. */ + /* URB 55-131 is just URB 29-38. (wait unsuccessfully for 4695 (maybe 4751) ms)*/ + /* URB 132,134 is just URB 6/7. */ + /* URB 133 is just URB 29-38. */ + /* URB 135 is just URB 8. */ + /* URB 136 is just URB 9. */ + /* URB 137 is just URB 11. */ + + /* Command I is probably Start Bulk Read. Data is u16 blockcount, u16 blocksize. */ + /* Command J is probably Start Bulk Write. Data is u16 blockcount, u16 blocksize. */ + /* Bulk transfer sizes for Command I/J are always 512 bytes, rest is filled with 0xff. */ +#endif + + msg_pinfo("All probes will fail because this driver is not hooked up " + "to the SPI infrastructure yet."); + return 0; +} + +int dediprog_shutdown(void) +{ + msg_pspew("%s\n", __func__); + + /* URB 28. Command Set SPI Voltage to 0. */ + if (dediprog_set_spi_voltage(0x0)) + return 1; + + if (usb_close(dediprog_handle)) { + msg_perr("Couldn't close USB device!\n"); + return 1; + } + return 0; +} Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2010-01-19 06:42:46 UTC (rev 869) +++ trunk/flash.h 2010-01-19 11:15:48 UTC (rev 870) @@ -67,6 +67,9 @@ #if BUSPIRATE_SPI_SUPPORT == 1 PROGRAMMER_BUSPIRATESPI, #endif +#if DEDIPROG_SUPPORT == 1 + PROGRAMMER_DEDIPROG, +#endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -470,6 +473,12 @@ int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); +/* dediprog.c */ +int dediprog_init(void); +int dediprog_shutdown(void); +int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); +int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); + /* flashrom.c */ extern enum chipbustype buses_supported; struct decode_sizes { @@ -553,6 +562,9 @@ #if BUSPIRATE_SPI_SUPPORT == 1 SPI_CONTROLLER_BUSPIRATE, #endif +#if DEDIPROG_SUPPORT == 1 + SPI_CONTROLLER_DEDIPROG, +#endif SPI_CONTROLLER_INVALID /* This must always be the last entry. */ }; extern const int spi_programmer_count; Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2010-01-19 06:42:46 UTC (rev 869) +++ trunk/flashrom.c 2010-01-19 11:15:48 UTC (rev 870) @@ -44,7 +44,7 @@ * if more than one of them is selected. If only one is selected, it is clear * that the user wants that one to become the default. */ -#if NIC3COM_SUPPORT+GFXNVIDIA_SUPPORT+DRKAISER_SUPPORT+SATASII_SUPPORT+FT2232_SPI_SUPPORT+SERPROG_SUPPORT+BUSPIRATE_SPI_SUPPORT > 1 +#if NIC3COM_SUPPORT+GFXNVIDIA_SUPPORT+DRKAISER_SUPPORT+SATASII_SUPPORT+FT2232_SPI_SUPPORT+SERPROG_SUPPORT+BUSPIRATE_SPI_SUPPORT+DEDIPROG_SUPPORT > 1 #error Please enable either CONFIG_DUMMY or CONFIG_INTERNAL or disable support for all external programmers except one. #endif enum programmer programmer = @@ -69,6 +69,9 @@ #if BUSPIRATE_SPI_SUPPORT == 1 PROGRAMMER_BUSPIRATESPI #endif +#if DEDIPROG_SUPPORT == 1 + PROGRAMMER_DEDIPROG +#endif ; #endif @@ -283,6 +286,25 @@ }, #endif +#if DEDIPROG_SUPPORT == 1 + { + .name = "dediprog", + .init = dediprog_init, + .shutdown = dediprog_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = noop_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = noop_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, +#endif + {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2010-01-19 06:42:46 UTC (rev 869) +++ trunk/spi.c 2010-01-19 11:15:48 UTC (rev 870) @@ -111,6 +111,15 @@ }, #endif +#if DEDIPROG_SUPPORT == 1 + { /* SPI_CONTROLLER_DEDIPROG */ + .command = dediprog_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = dediprog_spi_read, + .write_256 = spi_chip_write_1, + }, +#endif + {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */ };

1 0

Re: [flashrom] [PATCH] Matching board via DMI
by Carl-Daniel Hailfinger 19 Jan '10

19 Jan '10

On 19.01.2010 11:03, Michael Karcher wrote: > If a board is not uniquely identifiable by PCI device/subsystem IDs, a > string can be specified to be looked for in one of the following DMI > [...] > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > Thanks for your patience with the conflicting reviews. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

1 0

DMI matching patch
by Michael Karcher 19 Jan '10

19 Jan '10

Hello flashrom developers, please find included the DMI matching patch. The patch has been tested to work on my Fujitsu S7110 laptop with fake board enable entries. Non-availability of dmidecode has also been tested to work as expected. Regards, Michael Karcher Matching via DMI: If a board is not uniquely identifiable by PCI device/subsystem IDs, a string can be specified to be looked for (case-sensitive, substring) for now in one of the following items: - System Manufacturer - System Product Name - System Version - Baseboard Manufacturer - Baseboard Product Name - Baseboard Version The match is only made if DMI info is available and the string matches. If no DMI info is available, a warning is printed as the board can not be autodetected. It's still open to discussion whether we add an DMI override switch to specify a string that will definitely match, and whether this switch is only used if no DMI is available or whether it overrides or augments DMI data. DMI data is currently read using dmidecode. This tool is available for all major platforms except MacOS X. I heard that there also is a MacOS X version of dmidecode, but didn't investigate that. Signed-Off-By: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Index: flash.h =================================================================== --- flash.h (Revision 824) +++ flash.h (Arbeitskopie) @@ -251,6 +251,9 @@ uint16_t second_card_vendor; uint16_t second_card_device; + /* String to appear in the DMI info */ + const char *dmi_identifier; + /* The vendor / part name from the coreboot table. */ const char *lb_vendor; const char *lb_part; @@ -330,6 +333,11 @@ extern char *lb_part, *lb_vendor; extern int partvendor_from_cbtable; +/* dmi.c */ +extern int has_dmi_support; +void dmi_init(void); +int dmi_match(const char * identifier); + /* internal.c */ #if NEED_PCI == 1 struct superio { Index: Makefile =================================================================== --- Makefile (Revision 824) +++ Makefile (Arbeitskopie) @@ -101,7 +101,7 @@ ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'INTERNAL_SUPPORT=1' -PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o +PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o dmi.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o NEED_PCI := yes endif Index: dmi.c =================================================================== --- dmi.c (Revision 0) +++ dmi.c (Revision 0) @@ -0,0 +1,82 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Michael Karcher + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include <stdio.h> + +#include "flash.h" + +enum dmi_strings {DMI_SYS_VENDOR, DMI_SYS_PRODUCT, DMI_SYS_VERSION, + DMI_BB_VENDOR, DMI_BB_PRODUCT, DMI_BB_VERSION, + DMI_MAX_ID = DMI_BB_VERSION}; + +const char * const dmidecode_names[DMI_MAX_ID+1] = + {"system-manufacturer", "system-product-name", + "system-version", "baseboard-manufacturer", + "baseboard-product-name", "baseboard-version"}; + +int has_dmi_support = 0; +char dmistrings[DMI_MAX_ID+1][80]; + +void dmi_init(void) +{ + FILE * dmidecode_pipe; + int i; + for(i = 0; i <= DMI_MAX_ID; i++) + { + char commandline[40]; + sprintf(commandline, "dmidecode -s %s", dmidecode_names[i]); + dmidecode_pipe = popen(commandline, "r"); + fgets(dmistrings[i], sizeof(dmistrings[i]), dmidecode_pipe); + if(ferror(dmidecode_pipe)) + { + printf_debug("DMI pipe read error"); + pclose(dmidecode_pipe); + return; + } + /* Toss all output above 80 characters away to prevent + deadlock on pclose. */ + while(!feof(dmidecode_pipe)) + getc(dmidecode_pipe); + if(pclose(dmidecode_pipe) != 0) + { + printf_debug("DMI pipe close error"); + return; + } + + /* chomp trailing newline */ + if(dmistrings[i][0] != 0 && + dmistrings[i][strlen(dmistrings[i]) - 1] == '\n') + dmistrings[i][strlen(dmistrings[i]) - 1] = 0; + printf_debug("DMI string %d: %s\n", i, dmistrings[i]); + } + has_dmi_support = 1; +} + +int dmi_match(const char * identifier) +{ + int i; + if(!has_dmi_support) + return 0; + for(i = 0;i <= DMI_MAX_ID; i++) + if(strstr(dmistrings[i], identifier)) + return 1; + return 0; +} Index: internal.c =================================================================== --- internal.c (Revision 824) +++ internal.c (Arbeitskopie) @@ -152,6 +152,7 @@ * mainboard specific flash enable sequence. */ coreboot_init(); + dmi_init(); /* Probe for the SuperI/O chip and fill global struct superio. */ probe_superio(); Index: board_enable.c =================================================================== --- board_enable.c (Revision 824) +++ board_enable.c (Arbeitskopie) @@ -1162,6 +1162,11 @@ * provide an as complete set of pci ids as possible; autodetection is the * preferred behaviour and we would like to make sure that matches are unique. * + * If PCI IDs are not sufficient for board matching, the match can be further + * constrained by a string that has to be present in the DMI database for + * the baseboard or the system entry. The match type is case-sensitive + * substring match. + * * The coreboot ids are used two fold. When running with a coreboot firmware, * the ids uniquely matches the coreboot board identification string. When a * legacy bios is installed and when autodetection is not possible, these ids @@ -1173,59 +1178,59 @@ /* Please keep this list alphabetically ordered by vendor/board name. */ struct board_pciid_enable board_pciid_enables[] = { - /* first pci-id set [4], second pci-id set [4], coreboot id [2], vendor name board name flash enable */ - {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, "Abit", "IP35", intel_ich_gpio16_raise}, - {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, "Acorp", "6A815EPD", board_acorp_6a815epd}, - {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, "ASRock", "P4i65GV", intel_ich_gpio23_raise}, - {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami", "Aruma", w83627hf_gpio24_raise_2e}, - {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, "Albatron", "PM266A", w836xx_memw_enable_2e}, - {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, "AOpen", "vKM400Am-S", it8705_rom_write_enable}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group", "DBE61", board_artecgroup_dbe6x}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group", "DBE62", board_artecgroup_dbe6x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, "ASUS", "A7V600-X", board_asus_a7v600x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, "ASUS", "A7V8X", board_asus_a7v8x}, - {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS", "A7V8X-MX SE", w836xx_memw_enable_2e}, - {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, "ASUS", "M2V-MX", via_vt823x_gpio5_raise}, - {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS", "P4B266", intel_ich_gpio22_raise}, - {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, "ASUS", "P4B266-LM", intel_ich_gpio21_raise}, - {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, "ASUS", "P4P800-E Deluxe", intel_ich_gpio21_raise}, - {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS", "P5A", board_asus_p5a}, - {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", nvidia_mcp_gpio10_raise}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", it8705_rom_write_enable}, - {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, "Dell", "PowerEdge 1850", intel_ich_gpio23_raise}, - {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, "Elitegroup", "K7S6A", elitegroup_k7vta3}, - {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", elitegroup_k7vta3}, - {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, "EPoX", "EP-8K5A2", w836xx_memw_enable_2e}, - {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, "EPoX", "EP-8RDA3+", nvidia_mcp_gpio31_raise}, - {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX", "EP-BX3", board_epox_ep_bx3}, - {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", it87xx_probe_spi_flash}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", it8705_rom_write_enable}, - {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", nvidia_mcp_gpio21_raise}, - {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", it87xx_probe_spi_flash}, - {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, "GIGABYTE", "GA-M61P-S3", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", it87xx_probe_spi_flash}, - {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", it87xx_probe_spi_flash}, - {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, "hp", "dl145_g3", "HP", "DL145 G3", board_hp_dl145_g3_enable}, - {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, "IBM", "x3455", board_ibm_x3455}, - {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, "Intel", "D201GLY", wbsio_check_for_spi}, - {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, "iwill", "dk8_htx", "IWILL", "DK8-HTX", w83627hf_gpio24_raise_2e}, - {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, "kontron", "986lcd-m", "Kontron", "986LCD-M", board_kontron_986lcd_m}, - {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, "Mitac", "6513WU", board_mitac_6513wu}, - {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, - {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e}, - {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, - {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, - {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, - {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise}, - {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, "shuttle", "ak31", "Shuttle", "AK31", w836xx_memw_enable_2e}, - {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, "Shuttle", "AK38N", shuttle_ak38n}, - {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, "Shuttle", "FN25", board_shuttle_fn25}, - {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, "Soyo", "SY-7VCA", board_soyo_sy_7vca}, - {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", w836xx_memw_enable_2e}, - {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA", "EPIA M/MII/...", via_vt823x_gpio15_raise}, - {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, "VIA", "EPIA-N/NL", via_vt823x_gpio9_raise}, - {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, "VIA", "PC3500G", it87xx_probe_spi_flash}, + /* first pci-id set [4], second pci-id set [4], dmi_identifier, coreboot id [2], vendor name board name flash enable */ + {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", intel_ich_gpio16_raise}, + {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", board_acorp_6a815epd}, + {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", intel_ich_gpio23_raise}, + {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", w83627hf_gpio24_raise_2e}, + {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", w836xx_memw_enable_2e}, + {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", it8705_rom_write_enable}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", board_artecgroup_dbe6x}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", board_artecgroup_dbe6x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", board_asus_a7v600x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", board_asus_a7v8x}, + {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", w836xx_memw_enable_2e}, + {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", via_vt823x_gpio5_raise}, + {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", intel_ich_gpio22_raise}, + {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", intel_ich_gpio21_raise}, + {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", intel_ich_gpio21_raise}, + {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, NULL, "asus", "p5a", "ASUS", "P5A", board_asus_p5a}, + {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", nvidia_mcp_gpio10_raise}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", it8705_rom_write_enable}, + {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", intel_ich_gpio23_raise}, + {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", elitegroup_k7vta3}, + {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", elitegroup_k7vta3}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", w836xx_memw_enable_2e}, + {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", nvidia_mcp_gpio31_raise}, + {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", board_epox_ep_bx3}, + {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", it87xx_probe_spi_flash}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", it8705_rom_write_enable}, + {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", nvidia_mcp_gpio21_raise}, + {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", it87xx_probe_spi_flash}, + {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", it87xx_probe_spi_flash}, + {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", it87xx_probe_spi_flash}, + {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", board_hp_dl145_g3_enable}, + {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", board_ibm_x3455}, + {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", wbsio_check_for_spi}, + {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", w83627hf_gpio24_raise_2e}, + {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", board_kontron_986lcd_m}, + {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", board_mitac_6513wu}, + {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, + {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e}, + {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, + {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, + {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, + {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise}, + {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", w836xx_memw_enable_2e}, + {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", shuttle_ak38n}, + {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", board_shuttle_fn25}, + {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", board_soyo_sy_7vca}, + {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", w836xx_memw_enable_2e}, + {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", via_vt823x_gpio15_raise}, + {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", via_vt823x_gpio9_raise}, + {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, NULL, "VIA", "PC3500G", it87xx_probe_spi_flash}, { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL}, /* end marker */ }; @@ -1314,6 +1319,18 @@ } } + if (board->dmi_identifier) { + if (!has_dmi_support) { + fprintf(stderr, "WARNING: Can't autodetect %s %s," + " DMI info unavailable.\n", + board->vendor_name, board->board_name); + continue; + } else { + if (!dmi_match(board->dmi_identifier)) + continue; + } + } + return board; }

3 36

Erase functions with non-expressable block layout
by Carl-Daniel Hailfinger 19 Jan '10

19 Jan '10

Hi, there are a few chips out there which have an eraseblock layout that can not be expressed in our current structure. For example, erase functions which only work in a small region of the chip and which are undefined/non-functional elsewhere. We don't have a way to express such constraints (well, I have a design in mind, but that's something we'd better do post 0.9.2), but losing that information is not exactly something I want to risk. Just specify an empty eraseblock layout, and associate the "evil" function with it. flashrom will issue a diagnostic on debug level SPEW, but flashrom will run perfectly fine. Example: .block_erasers = { { /* The working layout */ .eraseblocks = { {16 * 1024, 8} }, .block_erase = erase_sector_29f040b, }, { /* The weird layout*/ .eraseblocks = { }, .block_erase = erase_block_totallyweird_29f040b, }, }, This mail was motivated by the following problem: On 19.01.2010 00:30, Carl-Daniel Hailfinger wrote: > On 19.01.2010 00:21, Sean Nelson wrote: > >> On 1/18/2010 2:48 PM, Michael Karcher wrote: >> >>> I don't think this is going to work. erase_sector_stm50flw0x0x only >>> works on the 4K sectors and not on the 64k blocks inbetween, if I read >>> the datasheet correctly. As I already wrote in the first review: >>> flashrom is currently unable to represent this architecture (different >>> block sizes that have to be delete by different commands), so you better >>> leave it off. Another possible, but a bit hacky, version would be to >>> check sectorsize in erase_sector_stm50flw0x0x and call >>> erase_block_stm50flw0x0x if sectorsize is 64*1024. >>> >>> >> The datasheet doesn't state either way that it wouldn't work on the 5x >> 64k sectors between the 4k blocks, but I'm just going to remove the >> sector erasers and leave the function. >> > > Maybe add a comment in flashchips.c for that chip which says the > structure can't be expressed right now. > Regards, Carl-Daniel -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

1 0

[PATCH] Add eraseblock functions to self-check
by Carl-Daniel Hailfinger 19 Jan '10

19 Jan '10

Add eraseblock functions to self-check. It doesn't make sense to have different layouts for the same function on one chip. Keep going if an error is found, we want all errors to be reported in one fell swoop. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-selfcheck_eraseblocks_functions/flashrom.c =================================================================== --- flashrom-selfcheck_eraseblocks_functions/flashrom.c (Revision 866) +++ flashrom-selfcheck_eraseblocks_functions/flashrom.c (Arbeitskopie) @@ -833,10 +833,13 @@ return 0; } -/* This function shares a lot of its structure with erase_flash(). */ +/* This function shares a lot of its structure with erase_flash(). + * Even if an error is found, the function will keep going and check the rest. + */ int selfcheck_eraseblocks(struct flashchip *flash) { - int i, k; + int i, j, k; + int ret = 0; for (k = 0; k < NUM_ERASEFUNCTIONS; k++) { unsigned int done = 0; @@ -850,8 +853,7 @@ "%i region %i has size 0. Please report" " a bug at flashrom(a)flashrom.org\n", flash->name, k, i); - return 1; - break; + ret = 1; } /* Blocks with zero count are bugs in flashchips.c. */ if (!eraser.eraseblocks[i].count && @@ -860,13 +862,15 @@ "%i region %i has count 0. Please report" " a bug at flashrom(a)flashrom.org\n", flash->name, k, i); - return 1; - break; + ret = 1; } done += eraser.eraseblocks[i].count * eraser.eraseblocks[i].size; } - /* This erase function is completely empty. */ + /* Empty eraseblock definition with erase function. */ + if (!done && eraser.block_erase) + msg_pspew("Strange: Empty eraseblock definition with " + "non-empty erase function. Not an error.\n"); if (!done) continue; if (done != flash->total_size * 1024) { @@ -875,10 +879,25 @@ " expected 0x%06x bytes. Please report a bug at" " flashrom(a)flashrom.org\n", flash->name, k, done, flash->total_size * 1024); - return 1; + ret = 1; } + if (!eraser.block_erase) + continue; + /* Check if there are identical erase functions for different + * layouts. That would imply "magic" erase functions. The + * easiest way to check this is with function pointers. + */ + for (j = k + 1; j < NUM_ERASEFUNCTIONS; j++) + if (eraser.block_erase == + flash->block_erasers[j].block_erase) { + msg_gerr("ERROR: Flash chip %s erase function " + "%i and %i are identical. Please report" + " a bug at flashrom(a)flashrom.org\n", + flash->name, k, j); + ret = 1; + } } - return 0; + return ret; } int erase_flash(struct flashchip *flash) -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 2

[commit] r869 - trunk
by svn＠flashrom.org 19 Jan '10

19 Jan '10

Author: hailfinger Date: 2010-01-19 07:42:46 +0100 (Tue, 19 Jan 2010) New Revision: 869 Modified: trunk/flashrom.c Log: Add eraseblock functions to self-check. It doesn't make sense to have different layouts for the same function on one chip. Keep going if an error is found, we want all errors to be reported in one fell swoop. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2010-01-19 03:24:55 UTC (rev 868) +++ trunk/flashrom.c 2010-01-19 06:42:46 UTC (rev 869) @@ -833,10 +833,13 @@ return 0; } -/* This function shares a lot of its structure with erase_flash(). */ +/* This function shares a lot of its structure with erase_flash(). + * Even if an error is found, the function will keep going and check the rest. + */ int selfcheck_eraseblocks(struct flashchip *flash) { - int i, k; + int i, j, k; + int ret = 0; for (k = 0; k < NUM_ERASEFUNCTIONS; k++) { unsigned int done = 0; @@ -850,8 +853,7 @@ "%i region %i has size 0. Please report" " a bug at flashrom(a)flashrom.org\n", flash->name, k, i); - return 1; - break; + ret = 1; } /* Blocks with zero count are bugs in flashchips.c. */ if (!eraser.eraseblocks[i].count && @@ -860,13 +862,15 @@ "%i region %i has count 0. Please report" " a bug at flashrom(a)flashrom.org\n", flash->name, k, i); - return 1; - break; + ret = 1; } done += eraser.eraseblocks[i].count * eraser.eraseblocks[i].size; } - /* This erase function is completely empty. */ + /* Empty eraseblock definition with erase function. */ + if (!done && eraser.block_erase) + msg_pspew("Strange: Empty eraseblock definition with " + "non-empty erase function. Not an error.\n"); if (!done) continue; if (done != flash->total_size * 1024) { @@ -875,10 +879,25 @@ " expected 0x%06x bytes. Please report a bug at" " flashrom(a)flashrom.org\n", flash->name, k, done, flash->total_size * 1024); - return 1; + ret = 1; } + if (!eraser.block_erase) + continue; + /* Check if there are identical erase functions for different + * layouts. That would imply "magic" erase functions. The + * easiest way to check this is with function pointers. + */ + for (j = k + 1; j < NUM_ERASEFUNCTIONS; j++) + if (eraser.block_erase == + flash->block_erasers[j].block_erase) { + msg_gerr("ERROR: Flash chip %s erase function " + "%i and %i are identical. Please report" + " a bug at flashrom(a)flashrom.org\n", + flash->name, k, j); + ret = 1; + } } - return 0; + return ret; } int erase_flash(struct flashchip *flash)

1 0

[PATCH] Convert chips to block erasers: Winbond
by Sean Nelson 19 Jan '10

19 Jan '10

Converted chips to block_erasers: W_25X10 W_25X20 W_25X40 W_25X80 W_25X16 W_25X32 W_25X64 W_29C011 W_29C020C W_29C040P W_29EE011 W_39V040A W_39V040B W_39V040C W_39V040FA W_39V080A W_49F002U W_49V002A W_49V002FA W_39V080FA W_39V080FA_DM Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

2 2

[commit] r868 - trunk
by svn＠flashrom.org 19 Jan '10

19 Jan '10

Author: snelson Date: 2010-01-19 04:24:55 +0100 (Tue, 19 Jan 2010) New Revision: 868 Modified: trunk/flashchips.c Log: Converted chips to block_erasers: W_25X10 W_25X20 W_25X40 W_25X80 W_25X16 W_25X32 W_25X64 W_29C011 W_29C020C W_29C040P W_29EE011 W_39V040A W_39V040B W_39V040C W_39V040FA W_39V080A W_49F002U W_49V002A W_49V002FA W_39V080FA W_39V080FA_DM Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-19 03:23:07 UTC (rev 867) +++ trunk/flashchips.c 2010-01-19 03:24:55 UTC (rev 868) @@ -4729,7 +4729,26 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4745,7 +4764,26 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 8} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4758,10 +4796,29 @@ .model_id = W_25X40, .total_size = 512, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 16} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4774,10 +4831,29 @@ .model_id = W_25X80, .total_size = 1024, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4793,7 +4869,26 @@ .tested = TEST_OK_PR, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 64} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4809,7 +4904,26 @@ .tested = TEST_OK_PROBE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 128} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4825,7 +4939,26 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 256} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4838,10 +4971,17 @@ .model_id = W_29C011, .total_size = 128, .page_size = 128, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, /* used datasheet for the W29C011A */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -4854,10 +4994,17 @@ .model_id = W_29C020C, .total_size = 256, .page_size = 128, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -4870,10 +5017,17 @@ .model_id = W_29C040P, .total_size = 512, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -4886,10 +5040,17 @@ .model_id = W_29C011, .total_size = 128, .page_size = 128, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_w29ee011, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w29ee011.c) */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -4902,10 +5063,20 @@ .model_id = W_39V040A, .total_size = 512, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -4918,10 +5089,20 @@ .model_id = W_39V040B, .total_size = 512, .page_size = 64 * 1024, - .tested = TEST_OK_PR | TEST_BAD_ERASE | TEST_BAD_WRITE, + .tested = TEST_OK_PR | TEST_BAD_WRITE, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -4934,10 +5115,20 @@ .model_id = W_39V040C, .total_size = 512, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_w39v040c, .probe_timing = TIMING_FIXME, - .erase = erase_w39v040c, + .erase = NULL, /* Was erase_w39v040c */ + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_w39v040c, .read = read_memmapped, }, @@ -4950,10 +5141,23 @@ .model_id = W_39V040FA, .total_size = 512, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -4966,10 +5170,20 @@ .model_id = W_39V080A, .total_size = 1024, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -4982,10 +5196,25 @@ .model_id = W_49F002U, .total_size = 256, .page_size = 128, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {128 * 1024, 1}, + {96 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -4998,10 +5227,25 @@ .model_id = W_49V002A, .total_size = 256, .page_size = 128, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -5017,7 +5261,22 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -5031,10 +5290,20 @@ .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_winbond_fwhub, + .erase = NULL, /* Was erase_winbond_fwhub */ + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16}, }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_winbond_fwhub, .read = read_memmapped, }, @@ -5051,7 +5320,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_winbond_fwhub, + .erase = NULL, /* Was erase_winbond_fwhub */ + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8}, }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_winbond_fwhub, .read = read_memmapped, },

1 0

[PATCH] Convert chips to block erasers: Numonyx, PMC, Sanyo, Spansion
by Sean Nelson 19 Jan '10

19 Jan '10

Convert chips to block_erasers: ST_M25PE10 ST_M25PE20 ST_M25PE40 ST_M25PE80 ST_M25PE16 PMC_25LV010 PMC_25LV016B PMC_25LV020 PMC_25LV040 PMC_25LV080B PMC_25LV512 PMC_39F010 PMC_49FL002 PMC_49FL004 SANYO_LE25FW203A SPANSION_S25FL016A Added spi_block_erase_d7 for PMC chips. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

3 5

[commit] r867 - trunk
by svn＠flashrom.org 19 Jan '10

19 Jan '10

Author: snelson Date: 2010-01-19 04:23:07 +0100 (Tue, 19 Jan 2010) New Revision: 867 Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/spi.c trunk/spi.h Log: Convert chips to block_erasers: ST_M25PE10 ST_M25PE20 ST_M25PE40 ST_M25PE80 ST_M25PE16 PMC_25LV010 PMC_25LV016B PMC_25LV020 PMC_25LV040 PMC_25LV080B PMC_25LV512 PMC_39F010 PMC_49FL002 PMC_49FL004 SANYO_LE25FW203A SPANSION_S25FL016A Added spi_block_erase_d7 for PMC chips. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipdrivers.h =================================================================== --- trunk/chipdrivers.h 2010-01-19 02:19:27 UTC (rev 866) +++ trunk/chipdrivers.h 2010-01-19 03:23:07 UTC (rev 867) @@ -38,6 +38,7 @@ int spi_chip_erase_d8(struct flashchip *flash); int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_52(struct flashchip *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_d7(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_60(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_c7(struct flashchip *flash, unsigned int addr, unsigned int blocklen); Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-19 02:19:27 UTC (rev 866) +++ trunk/flashchips.c 2010-01-19 03:23:07 UTC (rev 867) @@ -2959,7 +2959,20 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_d8, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2975,7 +2988,20 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_d8, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -2986,12 +3012,25 @@ .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ST_ID, .model_id = ST_M25PE40, - .total_size = 256, + .total_size = 512, .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_d8, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3007,7 +3046,20 @@ .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_d8, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3023,7 +3075,20 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_d8, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3039,7 +3104,20 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3055,7 +3133,26 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3071,7 +3168,20 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3087,7 +3197,20 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3103,7 +3226,26 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3119,7 +3261,20 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3194,10 +3349,23 @@ .model_id = PMC_39F010, .total_size = 128, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {64 * 1024, 2} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3211,10 +3379,23 @@ .total_size = 256, .page_size = 16 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ - .erase = erase_49fl00x, + .erase = NULL, /* Was: erase_49fl00x */ + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {16 * 1024, 16} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49fl00x, .read = read_memmapped, }, @@ -3228,10 +3409,23 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ - .erase = erase_49fl00x, + .erase = NULL, /* Was: erase_49fl00x */ + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49fl00x, .read = read_memmapped, }, @@ -3247,7 +3441,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -3317,10 +3521,20 @@ .model_id = SPANSION_S25FL016A, .total_size = 2048, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2010-01-19 02:19:27 UTC (rev 866) +++ trunk/spi.c 2010-01-19 03:23:07 UTC (rev 867) @@ -701,6 +701,48 @@ return 0; } +/* Block size is usually + * 4k for PMC + */ +int spi_block_erase_d7(struct flashchip *flash, unsigned int addr, unsigned int blocklen) +{ + int result; + struct spi_command cmds[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BE_D7_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_BE_D7, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + result = spi_send_multicommand(cmds); + if (result) { + fprintf(stderr, "%s failed during command execution at address 0x%x\n", + __func__, addr); + return result; + } + /* Wait until the Write-In-Progress bit is cleared. + * This usually takes 100-4000 ms, so wait in 100 ms steps. + */ + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + programmer_delay(100 * 1000); + if (check_erased_range(flash, addr, blocklen)) { + fprintf(stderr, "ERASE FAILED!\n"); + return -1; + } + return 0; +} + int spi_chip_erase_d8(struct flashchip *flash) { int i, rc = 0; Modified: trunk/spi.h =================================================================== --- trunk/spi.h 2010-01-19 02:19:27 UTC (rev 866) +++ trunk/spi.h 2010-01-19 03:23:07 UTC (rev 867) @@ -74,6 +74,11 @@ #define JEDEC_BE_D8_OUTSIZE 0x04 #define JEDEC_BE_D8_INSIZE 0x00 +/* Block Erase 0xd7 is supported by PMC chips. */ +#define JEDEC_BE_D7 0xd7 +#define JEDEC_BE_D7_OUTSIZE 0x04 +#define JEDEC_BE_D7_INSIZE 0x00 + /* Sector Erase 0x20 is supported by Macronix/SST chips. */ #define JEDEC_SE 0x20 #define JEDEC_SE_OUTSIZE 0x04

1 0

[Patch] Add Intel NM10 Chipset ID
by David Hendricks 19 Jan '10

19 Jan '10

Trivial patch attached. Public chipset documentation available here<http://www.intel.com/Assets/PDF/datasheet/322896.pdf> . Signed-off-by: David Hendricks <dhendrix(a)google.com> -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

3 2

[commit] r866 - trunk
by svn＠flashrom.org 19 Jan '10

19 Jan '10

Author: hailfinger Date: 2010-01-19 03:19:27 +0100 (Tue, 19 Jan 2010) New Revision: 866 Modified: trunk/chipset_enable.c Log: Add Intel NM10 chipset enable. Public chipset documentation available at http://www.intel.com/Assets/PDF/datasheet/322896.pdf Tested on NM10-based customer reference board from Intel. Signed-off-by: David Hendricks <dhendrix(a)google.com> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2010-01-18 08:24:02 UTC (rev 865) +++ trunk/chipset_enable.c 2010-01-19 02:19:27 UTC (rev 866) @@ -1156,6 +1156,7 @@ {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, + {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8}, {0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8},

1 0

[PATCH] fix AMIC A25L40Px chips due to whole chip erase size being incorrect
by Sean Nelson 18 Jan '10

18 Jan '10

Fix A25L40PU and A25L40PT. Thanks to hailfinger's self-check-erase routine for catching this. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

2 3

[commit] r865 - trunk
by svn＠flashrom.org 18 Jan '10

18 Jan '10

Author: snelson Date: 2010-01-18 09:24:02 +0100 (Mon, 18 Jan 2010) New Revision: 865 Modified: trunk/flashchips.c Log: Fix A25L40PU and A2540PT due to incorrect full-chip block size is incorrect. Thanks to hailfinger's self-check-erase routine for catching this. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-18 08:14:43 UTC (rev 864) +++ trunk/flashchips.c 2010-01-18 08:24:02 UTC (rev 865) @@ -1181,7 +1181,7 @@ }, .block_erase = spi_block_erase_d8, }, { - .eraseblocks = { {256 * 1024, 1} }, + .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, @@ -1213,7 +1213,7 @@ }, .block_erase = spi_block_erase_d8, }, { - .eraseblocks = { {256 * 1024, 1} }, + .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, } },

1 0

[PATCH] Add eraseblock structure to self-checks
by Carl-Daniel Hailfinger 18 Jan '10

18 Jan '10

Flashrom performs a self-check on every startup before it even starts to initialize any programmer. That way, compiler errors and code errors will be caught before they can do any harm. This patch adds an eraseblock structure self-check. It also modifies the self-check code to consistently run all checks even if one check failed. I already found two errors with it: ERROR: Flash chip A25L40PT erase function 1 region walking resulted in 0x040000 bytes total, expected 0x080000 bytes. Please report a bug at flashrom(a)flashrom.org ERROR: Flash chip A25L40PU erase function 1 region walking resulted in 0x040000 bytes total, expected 0x080000 bytes. Please report a bug at flashrom(a)flashrom.org Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-selfcheck_eraseblocks/flashrom.c =================================================================== --- flashrom-selfcheck_eraseblocks/flashrom.c (Revision 863) +++ flashrom-selfcheck_eraseblocks/flashrom.c (Arbeitskopie) @@ -833,6 +833,54 @@ return 0; } +/* This function shares a lot of its structure with erase_flash(). */ +int selfcheck_eraseblocks(struct flashchip *flash) +{ + int i, k; + + for (k = 0; k < NUM_ERASEFUNCTIONS; k++) { + unsigned int done = 0; + struct block_eraser eraser = flash->block_erasers[k]; + + for (i = 0; i < NUM_ERASEREGIONS; i++) { + /* Blocks with zero size are bugs in flashchips.c. */ + if (eraser.eraseblocks[i].count && + !eraser.eraseblocks[i].size) { + msg_gerr("ERROR: Flash chip %s erase function " + "%i region %i has size 0. Please report" + " a bug at flashrom(a)flashrom.org\n", + flash->name, k, i); + return 1; + break; + } + /* Blocks with zero count are bugs in flashchips.c. */ + if (!eraser.eraseblocks[i].count && + eraser.eraseblocks[i].size) { + msg_gerr("ERROR: Flash chip %s erase function " + "%i region %i has count 0. Please report" + " a bug at flashrom(a)flashrom.org\n", + flash->name, k, i); + return 1; + break; + } + done += eraser.eraseblocks[i].count * + eraser.eraseblocks[i].size; + } + /* This erase function is completely empty. */ + if (!done) + continue; + if (done != flash->total_size * 1024) { + msg_gerr("ERROR: Flash chip %s erase function %i " + "region walking resulted in 0x%06x bytes total," + " expected 0x%06x bytes. Please report a bug at" + " flashrom(a)flashrom.org\n", flash->name, k, + done, flash->total_size * 1024); + return 1; + } + } + return 0; +} + int erase_flash(struct flashchip *flash) { int i, j, k, ret = 0, found = 0; @@ -864,17 +912,6 @@ found = 1; printf_debug("trying... "); for (i = 0; i < NUM_ERASEREGIONS; i++) { - /* Blocks with zero size are bugs in flashchips.c. - * FIXME: This check should be performed on startup. - */ - if (eraser.eraseblocks[i].count && - !eraser.eraseblocks[i].size) { - fprintf(stderr, "ERROR: Erase region with size " - "0 for this chip. Please report a bug " - "at flashrom(a)flashrom.org\n"); - ret = 1; - break; - } /* count==0 for all automatically initialized array * members so the loop below won't be executed for them. */ @@ -893,10 +930,6 @@ eraser.eraseblocks[i].size; } printf_debug("\n"); - if (done != flash->total_size * 1024) - fprintf(stderr, "ERROR: Erase region walking erased " - "0x%06x bytes total, expected 0x%06x bytes.", - done, flash->total_size * 1024); /* If everything is OK, don't try another erase function. */ if (!ret) break; @@ -948,22 +981,30 @@ int selfcheck(void) { - /* Safety check. */ + int ret = 0; + struct flashchip *flash; + + /* Safety check. Instead of aborting after the first error, check + * if more errors exist. + */ if (ARRAY_SIZE(programmer_table) - 1 != PROGRAMMER_INVALID) { fprintf(stderr, "Programmer table miscompilation!\n"); - return 1; + ret = 1; } if (spi_programmer_count - 1 != SPI_CONTROLLER_INVALID) { fprintf(stderr, "SPI programmer table miscompilation!\n"); - return 1; + ret = 1; } #if BITBANG_SPI_SUPPORT == 1 if (bitbang_spi_master_count - 1 != BITBANG_SPI_INVALID) { fprintf(stderr, "Bitbanging SPI master table miscompilation!\n"); - return 1; + ret = 1; } #endif - return 0; + for (flash = flashchips; flash && flash->name; flash++) + if (selfcheck_eraseblocks(flash)) + ret = 1; + return ret; } void check_chip_supported(struct flashchip *flash) -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 2

[commit] r864 - trunk
by svn＠flashrom.org 18 Jan '10

18 Jan '10

Author: hailfinger Date: 2010-01-18 09:14:43 +0100 (Mon, 18 Jan 2010) New Revision: 864 Modified: trunk/flashrom.c Log: Flashrom performs a self-check on every startup before it even starts to initialize any programmer. That way, compiler errors and code errors will be caught before they can do any harm. This patch adds an eraseblock structure self-check. It also modifies the self-check code to consistently run all checks even if one check failed. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2010-01-18 07:02:19 UTC (rev 863) +++ trunk/flashrom.c 2010-01-18 08:14:43 UTC (rev 864) @@ -833,6 +833,54 @@ return 0; } +/* This function shares a lot of its structure with erase_flash(). */ +int selfcheck_eraseblocks(struct flashchip *flash) +{ + int i, k; + + for (k = 0; k < NUM_ERASEFUNCTIONS; k++) { + unsigned int done = 0; + struct block_eraser eraser = flash->block_erasers[k]; + + for (i = 0; i < NUM_ERASEREGIONS; i++) { + /* Blocks with zero size are bugs in flashchips.c. */ + if (eraser.eraseblocks[i].count && + !eraser.eraseblocks[i].size) { + msg_gerr("ERROR: Flash chip %s erase function " + "%i region %i has size 0. Please report" + " a bug at flashrom(a)flashrom.org\n", + flash->name, k, i); + return 1; + break; + } + /* Blocks with zero count are bugs in flashchips.c. */ + if (!eraser.eraseblocks[i].count && + eraser.eraseblocks[i].size) { + msg_gerr("ERROR: Flash chip %s erase function " + "%i region %i has count 0. Please report" + " a bug at flashrom(a)flashrom.org\n", + flash->name, k, i); + return 1; + break; + } + done += eraser.eraseblocks[i].count * + eraser.eraseblocks[i].size; + } + /* This erase function is completely empty. */ + if (!done) + continue; + if (done != flash->total_size * 1024) { + msg_gerr("ERROR: Flash chip %s erase function %i " + "region walking resulted in 0x%06x bytes total," + " expected 0x%06x bytes. Please report a bug at" + " flashrom(a)flashrom.org\n", flash->name, k, + done, flash->total_size * 1024); + return 1; + } + } + return 0; +} + int erase_flash(struct flashchip *flash) { int i, j, k, ret = 0, found = 0; @@ -864,17 +912,6 @@ found = 1; printf_debug("trying... "); for (i = 0; i < NUM_ERASEREGIONS; i++) { - /* Blocks with zero size are bugs in flashchips.c. - * FIXME: This check should be performed on startup. - */ - if (eraser.eraseblocks[i].count && - !eraser.eraseblocks[i].size) { - fprintf(stderr, "ERROR: Erase region with size " - "0 for this chip. Please report a bug " - "at flashrom(a)flashrom.org\n"); - ret = 1; - break; - } /* count==0 for all automatically initialized array * members so the loop below won't be executed for them. */ @@ -893,10 +930,6 @@ eraser.eraseblocks[i].size; } printf_debug("\n"); - if (done != flash->total_size * 1024) - fprintf(stderr, "ERROR: Erase region walking erased " - "0x%06x bytes total, expected 0x%06x bytes.", - done, flash->total_size * 1024); /* If everything is OK, don't try another erase function. */ if (!ret) break; @@ -948,22 +981,30 @@ int selfcheck(void) { - /* Safety check. */ + int ret = 0; + struct flashchip *flash; + + /* Safety check. Instead of aborting after the first error, check + * if more errors exist. + */ if (ARRAY_SIZE(programmer_table) - 1 != PROGRAMMER_INVALID) { fprintf(stderr, "Programmer table miscompilation!\n"); - return 1; + ret = 1; } if (spi_programmer_count - 1 != SPI_CONTROLLER_INVALID) { fprintf(stderr, "SPI programmer table miscompilation!\n"); - return 1; + ret = 1; } #if BITBANG_SPI_SUPPORT == 1 if (bitbang_spi_master_count - 1 != BITBANG_SPI_INVALID) { fprintf(stderr, "Bitbanging SPI master table miscompilation!\n"); - return 1; + ret = 1; } #endif - return 0; + for (flash = flashchips; flash && flash->name; flash++) + if (selfcheck_eraseblocks(flash)) + ret = 1; + return ret; } void check_chip_supported(struct flashchip *flash)

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Erase failed on different chips using v0.9.1-r790
by joe black 18 Jan '10

18 Jan '10

Hi all, don't really know if it is the right list but I'll give it a shot (sorry for your inconvenient). I am doing research on different bios chips envolving rewriting of the flash chip. As time goes by, I stumbled into the same problem over and over again (increasing rapidly). At the beginning I thought it might be a Write Protection error but it seems to me that this error is too common to be a write protection kinda crap (as far as I know most of the boards nowadays don't come with write protection enabled by default). here is a couple of flashrom trys output on different chips: After finding out the right chipset and flash chip: "Intel ICH5/ICH5R" "Winbond W49V002FA" (256 KB, FWH) at physical address 0xfffc0000. I get (about) the same error when trying to write: ERASE FAILED at 0x00000000! Expected=0xff, Read-0x25, failed byte cout from 0x00000000-0x0003ffff: 0x35e74 ERASE FAILED! ERASE FAILED! FAILED! on most of the time it fails at 0x000000000 About the same error happend on: "Intel ICH6/ICH6R" "SST SST49LF003A/B" (384 KB, FWH) at physical address 0xfffa0000 page: 0000 at address: 0x00000000>>>>>>>>>0001 at address: 0x00010000>>>>>>>>>0002 at address: 0x00020000 ERASE FAILED at 0x00020000! Expected=0xff, read=0xdb, failed byte count from 0x00020000-0x0002ffff: 0xfee5 ERASE FAILED! ERASE FAILED! FAILED! Same goes for this one: "VIA VT8237" "PMC Pm49FL004" (512 KB, LPC,FWH) at physical address 0xfff80000 ERASE FAILED at 0x00000000! Expected=0xff, Read-0x49, failed byte cout from 0x00000000-0x0000ffff: 0x463 ERASE FAILED! ERASE FAILED! FAILED! Would really like some help, Thanks ahead!

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[PATCH] Fix wiki erase/write columns
by Carl-Daniel Hailfinger 18 Jan '10

18 Jan '10

The write and erase column in the --list-supported-wiki output were swapped. Thanks to Michael Karcher for noticing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-print_wiki_swap_erase_write/print_wiki.c =================================================================== --- flashrom-print_wiki_swap_erase_write/print_wiki.c (Revision 860) +++ flashrom-print_wiki_swap_erase_write/print_wiki.c (Arbeitskopie) @@ -75,7 +75,7 @@ ! align=\"left\" | Device\n! align=\"left\" | Size / KB\n\ ! align=\"left\" | Type\n! align=\"left\" colspan=\"4\" | Status\n\n\ |- bgcolor=\"#6699ff\"\n| colspan=\"4\" |  \n\ -| Probe\n| Read\n| Write\n| Erase\n\n"; +| Probe\n| Read\n| Erase\n| Write\n\n"; const char *programmer_section = "\ \n== Supported programmers ==\n\nThis is a list \ -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 2

[commit] r863 - trunk
by svn＠flashrom.org 18 Jan '10

18 Jan '10

Author: hailfinger Date: 2010-01-18 08:02:19 +0100 (Mon, 18 Jan 2010) New Revision: 863 Modified: trunk/print_wiki.c Log: The write and erase column in the --list-supported-wiki output were swapped. Thanks to Michael Karcher for noticing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/print_wiki.c =================================================================== --- trunk/print_wiki.c 2010-01-12 23:29:30 UTC (rev 862) +++ trunk/print_wiki.c 2010-01-18 07:02:19 UTC (rev 863) @@ -75,7 +75,7 @@ ! align=\"left\" | Device\n! align=\"left\" | Size / KB\n\ ! align=\"left\" | Type\n! align=\"left\" colspan=\"4\" | Status\n\n\ |- bgcolor=\"#6699ff\"\n| colspan=\"4\" |  \n\ -| Probe\n| Read\n| Write\n| Erase\n\n"; +| Probe\n| Read\n| Erase\n| Write\n\n"; const char *programmer_section = "\ \n== Supported programmers ==\n\nThis is a list \

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flashrom v0.9.1-r706 works with "Intel ICH10R" chipset and "Eon EN25F80" chip :)
by cam_daw＠fastmail.fm 18 Jan '10

18 Jan '10

Hello, This is to report that flashrom v0.9.1-r706 worked flawlessly for me - and as it is a system that has an unknown status in http://www.flashrom.org/Supported_hardware, could you please update flashrom to confirm that it now works. Details are as follows:- flashrom version: v0.9.1-r706 (that's in Ubuntu 9.10 x86_64 repositories) Board Manufacturer: Shuttle Board Model: SX58H7 Chipset: "Intel ICH10R" Chip: "Eon EN25F80" (1024 KB, SPI) at physical address 0xfff00000 The following flashrom commands work:- flashrom -V flashrom -rV saved.rom flashrom -EV flashrom -wV new.rom I've attached the output of these commands to this email. Note that the output from the "flashrom -wV new.rom" command generated a very large text file (1.8MB), but worked successfully as I verified my computer functioning with the new bios update past a cold boot. Also, after reading the updated bios rom to a file, and comparing the md5sums of the extracted rom and downloaded-from-the-web rom, the file's checksums match. So it wrote and read the rom files fine. Thanks for your excellent application flashrom - it's saved me a lot of time :) Regards, Cameron Dawdy -- cam_daw(a)fastmail.fm -- http://www.fastmail.fm - Does exactly what it says on the tin

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Re: [flashrom] [PATCH] Support Intel 82F004BE/BV-T chip
by Sean Nelson 17 Jan '10

17 Jan '10

On 1/16/2010 4:21 PM, Michael Karcher wrote: > This chip is found in the ThinkPad T20. Implementation is from datasheet only, > test welcome. Be prepared for eventual failures, and do not reboot if > verify after write fails. > > Signed-off-by: Michael Karcher<flashrom(a)mkarcher.dialup.fu-berlin.de> > --- > Makefile | 2 +- > chipdrivers.h | 4 ++ > flashchips.c | 31 +++++++++++++++++++ > flashchips.h | 2 + > i28f00x.c | 91 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > 5 files changed, 129 insertions(+), 1 deletions(-) > create mode 100644 i28f00x.c > > diff --git a/Makefile b/Makefile > index cdd45d1..2b882d4 100644 > --- a/Makefile > +++ b/Makefile > @@ -44,7 +44,7 @@ endif > CHIP_OBJS = jedec.o stm50flw0x0x.o w39v080fa.o sharplhf00l04.o w29ee011.o \ > sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o w39v040c.o \ > w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o m29f002.o \ > - sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o > + sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o i28f00x.o > > LIB_OBJS = layout.o > > diff --git a/chipdrivers.h b/chipdrivers.h > index e7261e0..be1d00b 100644 > --- a/chipdrivers.h > +++ b/chipdrivers.h > @@ -52,11 +52,15 @@ int spi_nbyte_read(int addr, uint8_t *bytes, int len); > int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); > int spi_aai_write(struct flashchip *flash, uint8_t *buf); > > +/* i28f00x.c */ > +int write_28f00x(struct flashchip *flash, uint8_t *buf); > + > /* 82802ab.c */ > uint8_t wait_82802ab(chipaddr bios); > int probe_82802ab(struct flashchip *flash); > int erase_82802ab(struct flashchip *flash); > int erase_82802ab_block(struct flashchip *flash, unsigned int page, unsigned int pagesize); > +void write_page_82802ab(chipaddr bios, uint8_t *src, chipaddr dst, int page_size); > int write_82802ab(struct flashchip *flash, uint8_t *buf); > > /* am29f040b.c */ > diff --git a/flashchips.c b/flashchips.c > index 8e90d2a..3698c8c 100644 > --- a/flashchips.c > +++ b/flashchips.c > @@ -2385,6 +2385,37 @@ struct flashchip flashchips[] = { > > { > .vendor = "Intel", > + .name = "28F004BV/BE-T", > + .bustype = CHIP_BUSTYPE_PARALLEL, > + .manufacture_id = INTEL_ID, > + .model_id = P28F004BT, > + .total_size = 512, > + .page_size = 128 * 1024, /* for write_i28f00x: maximal block size */ > + .tested = TEST_UNTESTED, > + .probe = probe_jedec, > + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ > + .erase = NULL, > + .block_erasers = > + { > + { > + /* Keep this the first block_erasers > + entry. The write functions spies here to > + get the chip layout */ > + .eraseblocks = { > + {128 * 1024, 3}, > + {96 * 1024, 1}, > + {8 * 1024, 2}, > + {16 * 1024, 1}, > + }, > + .block_erase = erase_82802ab_block, > + }, > + }, > + .write = write_28f00x, > + .read = read_memmapped, > + }, > + > + { > + .vendor = "Intel", > .name = "82802AB", > .bustype = CHIP_BUSTYPE_FWH, > .manufacture_id = INTEL_ID, > diff --git a/flashchips.h b/flashchips.h > index 2a4d93b..21d7ad5 100644 > --- a/flashchips.h > +++ b/flashchips.h > @@ -256,6 +256,8 @@ > #define I_82802AC 0xAC > #define P28F001BXT 0x94 /* 28F001BX-T */ > #define P28F001BXB 0x95 /* 28F001BX-B */ > +#define P28F004BT 0x78 /* 28F004BV/BE-T */ > +#define P28F004BB 0x79 /* 28F004BV/BE-B */ > #define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */ > #define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */ > > diff --git a/i28f00x.c b/i28f00x.c > new file mode 100644 > index 0000000..f312fb1 > --- /dev/null > +++ b/i28f00x.c > @@ -0,0 +1,91 @@ > +/* > + * This file is part of the flashrom project. > + * > + * Copyright (C) 2010 Michael Karcher<flashrom(a)mkarcher.dialup.fu-berlin.de> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA > + */ > + > +/* based on the Intel 82802A/B code which is > + * Copyright (C) 2000 Silicon Integrated System Corporation > + */ > + > +/* > + * Datasheet: > + * - Name: 4-Mbit (256K x 16, 512K x 8) SmartVoltage DataSheet > + * - URL: http://www.intel.com/design/archives/flash/docs/290530.HTM > + * - PDF: http://download.intel.com/design/archives/flash/docs/29053006.pdf > + * - Order number: 290430-006 > + */ > + > +#include<stdio.h> > +#include<stdlib.h> > +#include<string.h> > +#include "flash.h" > +#include "chipdrivers.h" > + > +int write_28f00x(struct flashchip *flash, uint8_t *buf) > +{ > + int i, j, blocknum; > + chipaddr bios = flash->virtual_memory; > + int blockoffset = 0; > + uint8_t *tmpbuf = malloc(flash->page_size); > + struct eraseblock * blocks = flash->block_erasers[0].eraseblocks; > + > + if (!tmpbuf) { > + printf("Could not allocate memory!\n"); > + exit(1); > + } > + printf("Programming block: \n"); > + blocknum = 0; > + for (i = 0; blocks[i].size != 0; i++) { > + for(j = 0; j< blocks[i].count; j++) { > + printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b" > + "\b\b\b\b\b\b\b\b\b\b\b\b\b"); > + printf("%04d at address: 0x%08x", blocknum, > + blockoffset); > + > + /* Auto Skip Blocks, which already contain the > + * desired data Faster, because we only write, what > + * has changed More secure, because blocks, which > + * are excluded (with the exclude or layout feature) > + * or not erased and rewritten; their data is > + * retained also in sudden power off situations > + */ > + chip_readn(tmpbuf, bios + blockoffset, blocks[i].size); > + if (!memcmp((void *)(buf + blockoffset), tmpbuf, > + blocks[i].size)) { > + printf("SKIPPED\n"); > + continue; > + } > + > + /* erase block by block and write block by block; > + this is the most secure way */ > + if (erase_82802ab_block(flash, blockoffset, > + blocks[i].size)) { > + fprintf(stderr, "ERASE FAILED!\n"); > + return -1; > + } > + write_page_82802ab(bios, buf + blockoffset, > + bios + blockoffset, blocks[i].size); > + blockoffset += blocks[i].size; > + blocknum++; > + } > + } > + printf("\n"); > + free(tmpbuf); > + > + return 0; > +} > It's great that you used block_erasers for the chip definition, but I don't understand the reason for write_28f00x. It looks exactly the same as write_82802 except for using erase blocks segments. i28f00x.c is completely unnecessary and extraneous in my opinion.

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[PATCH] Support Intel 82F004BE/BV-T chip
by Michael Karcher 17 Jan '10

17 Jan '10

This chip is found in the ThinkPad T20. Implementation is from datasheet only, test welcome. Be prepared for eventual failures, and do not reboot if verify after write fails. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- Makefile | 2 +- chipdrivers.h | 4 ++ flashchips.c | 31 +++++++++++++++++++ flashchips.h | 2 + i28f00x.c | 91 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 129 insertions(+), 1 deletions(-) create mode 100644 i28f00x.c diff --git a/Makefile b/Makefile index cdd45d1..2b882d4 100644 --- a/Makefile +++ b/Makefile @@ -44,7 +44,7 @@ endif CHIP_OBJS = jedec.o stm50flw0x0x.o w39v080fa.o sharplhf00l04.o w29ee011.o \ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o w39v040c.o \ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o m29f002.o \ - sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o + sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o i28f00x.o LIB_OBJS = layout.o diff --git a/chipdrivers.h b/chipdrivers.h index e7261e0..be1d00b 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -52,11 +52,15 @@ int spi_nbyte_read(int addr, uint8_t *bytes, int len); int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); int spi_aai_write(struct flashchip *flash, uint8_t *buf); +/* i28f00x.c */ +int write_28f00x(struct flashchip *flash, uint8_t *buf); + /* 82802ab.c */ uint8_t wait_82802ab(chipaddr bios); int probe_82802ab(struct flashchip *flash); int erase_82802ab(struct flashchip *flash); int erase_82802ab_block(struct flashchip *flash, unsigned int page, unsigned int pagesize); +void write_page_82802ab(chipaddr bios, uint8_t *src, chipaddr dst, int page_size); int write_82802ab(struct flashchip *flash, uint8_t *buf); /* am29f040b.c */ diff --git a/flashchips.c b/flashchips.c index 8e90d2a..3698c8c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2385,6 +2385,37 @@ struct flashchip flashchips[] = { { .vendor = "Intel", + .name = "28F004BV/BE-T", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = INTEL_ID, + .model_id = P28F004BT, + .total_size = 512, + .page_size = 128 * 1024, /* for write_i28f00x: maximal block size */ + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .erase = NULL, + .block_erasers = + { + { + /* Keep this the first block_erasers + entry. The write functions spies here to + get the chip layout */ + .eraseblocks = { + {128 * 1024, 3}, + {96 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_82802ab_block, + }, + }, + .write = write_28f00x, + .read = read_memmapped, + }, + + { + .vendor = "Intel", .name = "82802AB", .bustype = CHIP_BUSTYPE_FWH, .manufacture_id = INTEL_ID, diff --git a/flashchips.h b/flashchips.h index 2a4d93b..21d7ad5 100644 --- a/flashchips.h +++ b/flashchips.h @@ -256,6 +256,8 @@ #define I_82802AC 0xAC #define P28F001BXT 0x94 /* 28F001BX-T */ #define P28F001BXB 0x95 /* 28F001BX-B */ +#define P28F004BT 0x78 /* 28F004BV/BE-T */ +#define P28F004BB 0x79 /* 28F004BV/BE-B */ #define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */ #define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */ diff --git a/i28f00x.c b/i28f00x.c new file mode 100644 index 0000000..f312fb1 --- /dev/null +++ b/i28f00x.c @@ -0,0 +1,91 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* based on the Intel 82802A/B code which is + * Copyright (C) 2000 Silicon Integrated System Corporation + */ + +/* + * Datasheet: + * - Name: 4-Mbit (256K x 16, 512K x 8) SmartVoltage DataSheet + * - URL: http://www.intel.com/design/archives/flash/docs/290530.HTM + * - PDF: http://download.intel.com/design/archives/flash/docs/29053006.pdf + * - Order number: 290430-006 + */ + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include "flash.h" +#include "chipdrivers.h" + +int write_28f00x(struct flashchip *flash, uint8_t *buf) +{ + int i, j, blocknum; + chipaddr bios = flash->virtual_memory; + int blockoffset = 0; + uint8_t *tmpbuf = malloc(flash->page_size); + struct eraseblock * blocks = flash->block_erasers[0].eraseblocks; + + if (!tmpbuf) { + printf("Could not allocate memory!\n"); + exit(1); + } + printf("Programming block: \n"); + blocknum = 0; + for (i = 0; blocks[i].size != 0; i++) { + for(j = 0; j < blocks[i].count; j++) { + printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b" + "\b\b\b\b\b\b\b\b\b\b\b\b\b"); + printf("%04d at address: 0x%08x", blocknum, + blockoffset); + + /* Auto Skip Blocks, which already contain the + * desired data Faster, because we only write, what + * has changed More secure, because blocks, which + * are excluded (with the exclude or layout feature) + * or not erased and rewritten; their data is + * retained also in sudden power off situations + */ + chip_readn(tmpbuf, bios + blockoffset, blocks[i].size); + if (!memcmp((void *)(buf + blockoffset), tmpbuf, + blocks[i].size)) { + printf("SKIPPED\n"); + continue; + } + + /* erase block by block and write block by block; + this is the most secure way */ + if (erase_82802ab_block(flash, blockoffset, + blocks[i].size)) { + fprintf(stderr, "ERASE FAILED!\n"); + return -1; + } + write_page_82802ab(bios, buf + blockoffset, + bios + blockoffset, blocks[i].size); + blockoffset += blocks[i].size; + blocknum++; + } + } + printf("\n"); + free(tmpbuf); + + return 0; +} -- 1.6.5

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[PATCH] [rfc/demo] implementation of the Thinkpad T20/T21/T22 host
by Michael Karcher 16 Jan '10

16 Jan '10

This mainboard uses external pins for banking the ROM chip, which seems to be impossible to do with the "internal" programmer, yet I had to clone most of the init stuff from internal.c . Hints for a clean implementation will be appreciated. --- Makefile | 2 +- flash.h | 11 ++++++ flashrom.c | 19 ++++++++++ t20.c | 108 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 139 insertions(+), 1 deletions(-) create mode 100644 t20.c diff --git a/Makefile b/Makefile index 501f65a..cdd45d1 100644 --- a/Makefile +++ b/Makefile @@ -101,7 +101,7 @@ CONFIG_PRINT_WIKI ?= no ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'INTERNAL_SUPPORT=1' -PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o +PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o it87spi.o ichspi.o sb600spi.o t20.o wbsio_spi.o NEED_PCI := yes endif diff --git a/flash.h b/flash.h index 9a25c70..77b0d48 100644 --- a/flash.h +++ b/flash.h @@ -58,6 +58,9 @@ enum programmer { #if INTERNAL_SUPPORT == 1 PROGRAMMER_IT87SPI, #endif +#if INTERNAL_SUPPORT == 1 + PROGRAMMER_TPT20, +#endif #if FT2232_SPI_SUPPORT == 1 PROGRAMMER_FT2232SPI, #endif @@ -435,6 +438,14 @@ uint8_t drkaiser_chip_readb(const chipaddr addr); extern struct pcidev_status drkaiser_pcidev[]; #endif +/* t20.c */ +#if INTERNAL_SUPPORT == 1 +int t20_init(void); +int t20_shutdown(void); +void t20_chip_writeb(uint8_t val, chipaddr addr); +uint8_t t20_chip_readb(const chipaddr addr); +#endif + /* satasii.c */ #if SATASII_SUPPORT == 1 int satasii_init(void); diff --git a/flashrom.c b/flashrom.c index db44c2f..7f05eeb 100644 --- a/flashrom.c +++ b/flashrom.c @@ -226,6 +226,25 @@ const struct programmer_entry programmer_table[] = { }, #endif +#if INTERNAL_SUPPORT == 1 + { + .name = "t20", + .init = t20_init, + .shutdown = t20_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = t20_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = t20_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, +#endif + #if FT2232_SPI_SUPPORT == 1 { .name = "ft2232spi", diff --git a/t20.c b/t20.c new file mode 100644 index 0000000..d6841cc --- /dev/null +++ b/t20.c @@ -0,0 +1,108 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Base address of register IND1 in the Field IMGA in the DSDT */ +#define IMGA1_BASE 0x15EE + +#include "flash.h" + +static uint8_t *t20_base; + +#define MAX_COUNT 20 + +static void imga1_mask(uint8_t index, uint8_t mask, uint8_t value) +{ + uint16_t temp; + int count = 0; + /* Be careful, as ACPI might use these registers too, so check + that the index is still OK. */ + do { + OUTB(index, IMGA1_BASE); + temp = INW(IMGA1_BASE); + } + while ((temp & 0xff) != index && ++count < MAX_COUNT); + if(count == MAX_COUNT) + { + printf("error: IMGA1 index stuck at %02x\n", temp & 0xff); + return; + } + temp &= ~(mask << 8); + temp |= (value & mask) << 8; + OUTW(temp, IMGA1_BASE); +} + +int t20_init(void) +{ + pacc = pci_alloc(); + pci_init(pacc); + pci_scan_bus(pacc); /* We want to get the list of devices */ + get_io_perms(); + /* ID of the graphics chip in T20/T21/T22. The mainboards are + identical in these models */ + if (!pci_card_find(0x5333, 0x8c12, 0x1014, 0x017f)) + { + msg_perr("This is not a ThinkPad T20/T21/T22\n"); + return 1; + } + if (chipset_flash_enable() == -2) { + printf("WARNING: No chipset found. Flash detection " + "will most likely fail.\n"); + } + + imga1_mask(0, 4, 4); /* Enable flash writes */ + t20_base = physmap("IBM T20 mainboard flash", 0xFFFE0000, 0x20000); + buses_supported = CHIP_BUSTYPE_PARALLEL; + return 0; +} + +int t20_shutdown(void) +{ + physunmap(t20_base, 0x20000); + imga1_mask(0, 4, 4); /* Disable flash writes */ + release_io_perms(); + pci_cleanup(pacc); + return 0; +} + +static unsigned int currentbank = -1U; + +static void switchtobank(unsigned int banknum) +{ + if (banknum > 3) + { + msg_perr("Bad bank number %d\n", banknum); + return; + } + if(banknum != currentbank) + imga1_mask(0, 3, banknum); + currentbank = banknum; +} + +void t20_chip_writeb(uint8_t val, chipaddr addr) +{ + switchtobank(addr >> 17); + mmio_writeb(val, t20_base + (addr & 0x1FFFF)); +} + +uint8_t t20_chip_readb(chipaddr addr) +{ + switchtobank(addr >> 17); + return mmio_readb(t20_base + (addr & 0x1FFFF)); +} -- 1.6.5

1 0

[PATCH] Dediprog SF100 support
by Carl-Daniel Hailfinger 14 Jan '10

14 Jan '10

Dediprog SF100 support. Very fragile, lots of stuff guessed from logs. May explode spontaneously. I think I know enough to actually use it to ID the chip, but that's it. A USB log with which includes writing an image from the original software (pretty much any image) would help clear up a few ambiguities. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-dediprog/flash.h =================================================================== --- flashrom-dediprog/flash.h (Revision 862) +++ flashrom-dediprog/flash.h (Arbeitskopie) @@ -67,6 +67,9 @@ #if BUSPIRATE_SPI_SUPPORT == 1 PROGRAMMER_BUSPIRATESPI, #endif +#if DEDIPROG_SUPPORT == 1 + PROGRAMMER_DEDIPROG, +#endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -470,6 +473,10 @@ int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); +/* dediprog.c */ +int dediprog_init(void); +int dediprog_shutdown(void); + /* flashrom.c */ extern enum chipbustype buses_supported; struct decode_sizes { Index: flashrom-dediprog/Makefile =================================================================== --- flashrom-dediprog/Makefile (Revision 862) +++ flashrom-dediprog/Makefile (Arbeitskopie) @@ -96,6 +96,9 @@ # Always enable Bus Pirate SPI for now. CONFIG_BUSPIRATESPI ?= yes +# Always enable Dediprog SF100 for now. +CONFIG_DEDIPROG ?= yes + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -160,6 +163,12 @@ PROGRAMMER_OBJS += buspirate_spi.o endif +ifeq ($(CONFIG_DEDIPROG), yes) +FEATURE_CFLAGS += -D'DEDIPROG_SUPPORT=1' +FEATURE_LIBS += -lusb +PROGRAMMER_OBJS += dediprog.o +endif + # Ugly, but there's no elif/elseif. ifeq ($(CONFIG_SERPROG), yes) LIB_OBJS += serial.o Index: flashrom-dediprog/flashrom.c =================================================================== --- flashrom-dediprog/flashrom.c (Revision 862) +++ flashrom-dediprog/flashrom.c (Arbeitskopie) @@ -44,7 +44,7 @@ * if more than one of them is selected. If only one is selected, it is clear * that the user wants that one to become the default. */ -#if NIC3COM_SUPPORT+GFXNVIDIA_SUPPORT+DRKAISER_SUPPORT+SATASII_SUPPORT+FT2232_SPI_SUPPORT+SERPROG_SUPPORT+BUSPIRATE_SPI_SUPPORT > 1 +#if NIC3COM_SUPPORT+GFXNVIDIA_SUPPORT+DRKAISER_SUPPORT+SATASII_SUPPORT+FT2232_SPI_SUPPORT+SERPROG_SUPPORT+BUSPIRATE_SPI_SUPPORT+DEDIPROG_SUPPORT > 1 #error Please enable either CONFIG_DUMMY or CONFIG_INTERNAL or disable support for all external programmers except one. #endif enum programmer programmer = @@ -69,6 +69,9 @@ #if BUSPIRATE_SPI_SUPPORT == 1 PROGRAMMER_BUSPIRATESPI #endif +#if DEDIPROG_SUPPORT == 1 + PROGRAMMER_DEDIPROG +#endif ; #endif @@ -283,6 +286,25 @@ }, #endif +#if DEDIPROG_SUPPORT == 1 + { + .name = "dediprog", + .init = dediprog_init, + .shutdown = dediprog_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = noop_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = noop_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, +#endif + {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; Index: flashrom-dediprog/dediprog.c =================================================================== --- flashrom-dediprog/dediprog.c (Revision 0) +++ flashrom-dediprog/dediprog.c (Revision 0) @@ -0,0 +1,200 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include <stdlib.h> +#include <ctype.h> +#include <sys/types.h> +#include <usb.h> +#include "flash.h" + +#define DEFAULT_TIMEOUT 3000 +usb_dev_handle *dediprog_handle; + +void print_hex(void *buf, size_t len) +{ + size_t i; + + for (i = 0; i < len; i++) + msg_pdbg(" %02x", ((uint8_t *)buf)[i]); +} + +struct usb_device *get_device_by_vid_pid(uint16_t vid, uint16_t pid) +{ + struct usb_bus *bus; + struct usb_device *dev; + + for (bus = usb_get_busses(); bus; bus = bus->next) + for (dev = bus->devices; dev; dev = dev->next) + if ((dev->descriptor.idVendor == vid) && + (dev->descriptor.idProduct == pid)) + return dev; + + return NULL; +} + +int dediprog_init(void) +{ + struct usb_device *dev; + int ret; + char buf[0x10]; + + msg_pspew("%s\n", __func__); + + /* For now, just to make sure nothing is sent. */ + buses_supported = CHIP_BUSTYPE_NONE; + + /* Here comes the USB stuff. */ + usb_init(); + usb_find_busses(); + usb_find_devices(); + dev = get_device_by_vid_pid(0x0483, 0xdada); + if (!dev) { + msg_perr("Could not find a Dediprog SF100 on USB!\n"); + return 1; + } + msg_pdbg("Found USB device (%04x:%04x).\n", + dev->descriptor.idVendor, + dev->descriptor.idProduct); + dediprog_handle = usb_open(dev); +//int usb_control_msg(usb_dev_handle *dev, int requesttype, int request, int value, int index, char *bytes, int size, int timeout); + /* URB 6. Command A. */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0xc3, 0xb, 0x0, 0x0, buf, 0x1, DEFAULT_TIMEOUT); + if ((ret != 0x1) || (buf[0] != 0x6f)) { + msg_perr("Unexpected response 0!\n"); + return 1; + } + /* URB 7. Command A. */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0xc3, 0xb, 0x0, 0x0, buf, 0x1, DEFAULT_TIMEOUT); + if ((ret != 0x1) || (buf[0] != 0x6f)) { + msg_perr("Unexpected response 1!\n"); + return 1; + } + /* URB 8. Command B. */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0xc3, 0x7, 0x0, 0xef03, buf, 0x1, DEFAULT_TIMEOUT); + /* The char casting is needed to stop gcc complaining about an always true comparison. */ + if ((ret != 0x1) || (buf[0] != (char)0xff)) { + msg_perr("Unexpected response 2!\n"); + return 1; + } + /* URB 9. Command Receive Device String. */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0xc2, 0x8, 0xff, 0xff, buf, 0x10, DEFAULT_TIMEOUT); + if ((ret != 0x10) || !memcmp(buf, "SF100 V:2.1.1 ", 0x10)) { + msg_perr("Unexpected response 3!\n"); + return 1; + } + /* URB 10. No idea. */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0x42, 0x4, 0x0, 0x0, buf, 0x0, DEFAULT_TIMEOUT); + if (ret != 0x0) { + msg_perr("Unexpected response 4!\n"); + return 1; + } + /* URB 11. No idea. */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0x42, 0x9, 0x10, 0xff, buf, 0x0, DEFAULT_TIMEOUT); + if (ret != 0x0) { + msg_perr("Unexpected response 5!\n"); + return 1; + } + /* URB 12. Command Send SPI. */ + memset(buf, 0, sizeof(buf)); + /* JEDEC RDID */ + msg_pdbg("Sending RDID\n"); + buf[0] = 0x9f; + ret = usb_control_msg(dediprog_handle, 0x42, 0x1, 0xff, 0x1, buf, 0x1, DEFAULT_TIMEOUT); + if (ret != 0x1) { + msg_perr("Unexpected response 6!\n"); + return 1; + } + /* URB 13. Command Receive SPI. */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0xc2, 0x01, 0xbb8, 0x0000, buf, 0x4, DEFAULT_TIMEOUT); + if (ret != 0x4) { + msg_perr("Unexpected response 7!\n"); + return 1; + } + msg_pdbg("Receiving response: "); + print_hex(buf, 0x10); +#if 0 + /* URB 14+15,16+17 are just RDID again. URB 18-27 are more SPI commands. */ + /* URB 28. No idea. */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0x42, 0x09, 0x0, 0xff, buf, 0x0, DEFAULT_TIMEOUT); + if (ret != 0x0)) { + msg_perr("Unexpected response 8!\n"); + return 1; + } + /* URB 29-38. No idea. Wait unsuccessfully for 544 (maybe 600) ms to read one byte. + * Could also be a wait for 10 requests. + */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0xc2, 0x11, 0xff, 0xff, buf, 0x1, 544); + if (ret != 0x0) { + msg_perr("Unexpected response 9!\n"); + return 1; + } + /* URB 39 is just URB 11. */ + /* URB 40. No idea. */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0x42, 0x61, 0x2, 0xff, buf, 0x0, DEFAULT_TIMEOUT); + if (ret != 0x0) { + msg_perr("Unexpected response 10!\n"); + return 1; + } + /* URB 41 is just URB 28. */ + /* URB 42,44,46,48,51,53 is just URB 8. */ + /* URB 43,45,47,49,52,54 is just URB 9. */ + /* URB 50 is just URB 6/7. */ + /* URB 55-131 is just URB 29-38. (wait unsuccessfully for 4695 (maybe 4751) ms)*/ + /* URB 132,134 is just URB 6/7. */ + /* URB 133 is just URB 29-38. */ + /* URB 135 is just URB 8. */ + /* URB 136 is just URB 9. */ + /* URB 137 is just URB 11. */ + + /* Command I is probably Start Bulk Read. Data is u16 blockcount, u16 blocksize. */ + + /* URB is just URB . */ + /* URB . No idea. */ + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, , buf, , DEFAULT_TIMEOUT); + if ((ret != 0x1) || (buf[0] != )) { + msg_perr("Unexpected response 11!\n"); + return 1; + } +#endif + + return 0; +} + +int dediprog_shutdown(void) +{ + msg_pspew("%s\n", __func__); + + if (usb_close(dediprog_handle)) { + msg_perr("Couldn't close USB device!\n"); + return 1; + } + return 0; +} -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 1

Please help!
by Maxime Perron 14 Jan '10

14 Jan '10

Hi. I tried to flash my bios by I got these errors. What should I do? My mainboard is an MSI 865PE Neo2-P, chipset 6728v2. My previous bios was version 3.6. I tried to update to version 3.A maxime@bureau:~$ sudo flashrom -w BIOS3A.ROM flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH5/ICH5R", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... ERASE FAILED at 0x000008c2! Expected=0xff, Read=0x19, failed byte count from 0x00000000-0x0000ffff: 0xf648 ERASE FAILED! ERASE FAILED! ERASE FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net channel #flashrom or mail flashrom(a)flashrom.org ------------------------------------------------------------ DO NOT REBOOT OR POWEROFF! -- Maxime Perron

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