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[PATCH] nicintel_eeprom: Support for I210 emulated EEprom
by Ricardo Ribalda Delgado 23 Mar '17

23 Mar '17

On the I210 family there is no MAC EEprom, instead there is a big flash (typically around 16Mb) with contents of the old MAC plus other stuff. There is an interface to program the whole flash, but once it is programmed it enters a "Secure Mode" that disables the interface. Luckily, the section with the MAC can still be updated via the EEprom interface. This patch adds support for this interface. root@qt5022-fglrx:~# ./flashrom -p nicintel_eeprom:pci=01:0.0 -w kk.raw -V flashrom v0.9.9-unknown on Linux 4.10.0-qtec-standard (x86_64) flashrom is free software, get the source code at https://flashrom.org flashrom was built with libpci 3.4.1, GCC 5.3.0, little endian Command line (5 args): ./flashrom -p nicintel_eeprom:pci=01:0.0 -w kk.raw -V Calibrating delay loop... OS timer resolution is 1 usecs, 1856M loops per second, 10 myus = 10 us, 100 myus = 102 us, 1000 myus = 1017 us, 10000 myus = 10044 us, 4 myus = 4 us, OK. Initializing nicintel_eeprom programmer Found "Intel I210 Gigabit Network Connection" (8086:1533, BDF 01:00.0). Requested BAR is of type MEM, 32bit, not prefetchable Requested BAR is of type MEM, 32bit, not prefetchable The following protocols are supported: Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Found Programmer flash chip "Opaque flash chip" (4 kB, Programmer-specific) on nicintel_eeprom. Found Programmer flash chip "Opaque flash chip" (4 kB, Programmer-specific). Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:W Erase/write done. Verifying flash... VERIFIED. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)gmail.com> --- nicintel_eeprom.c | 172 ++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 166 insertions(+), 6 deletions(-) diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c index b5d4202b01e0..77754f0f2534 100644 --- a/nicintel_eeprom.c +++ b/nicintel_eeprom.c @@ -25,6 +25,12 @@ * 4.7: Access to shared resources (FIXME: we should probably use this semaphore interface) * 7.4: Register Descriptions */ +/* + * Datasheet: Intel Ethernet Controller I210: Datasheet + * 8.4.3: EEPROM-Mode Read Register + * 8.4.6: EEPROM-Mode Write Register + * Write process inspired on kernel e1000_i210.c + */ #include <stdlib.h> #include <unistd.h> @@ -34,10 +40,11 @@ #include "hwaccess.h" #define PCI_VENDOR_ID_INTEL 0x8086 -#define MEMMAP_SIZE (0x14 + 3) /* Only EEC and EERD are needed. */ +#define MEMMAP_SIZE 0x1c /* Only EEC, EERD and EEWR are needed. */ #define EEC 0x10 /* EEPROM/Flash Control Register */ #define EERD 0x14 /* EEPROM Read Register */ +#define EEWR 0x18 /* EEPROM Write Register */ /* EPROM/Flash Control Register bits */ #define EE_SCK 0 @@ -49,6 +56,8 @@ #define EE_PRES 8 #define EE_SIZE 11 #define EE_SIZE_MASK 0xf +#define EE_FLUPD 23 +#define EE_FLUDONE 26 /* EEPROM Read Register bits */ #define EERD_START 0 @@ -56,11 +65,18 @@ #define EERD_ADDR 2 #define EERD_DATA 16 +/* EEPROM Write Register bits */ +#define EEWR_CMDV 0 +#define EEWR_DONE 1 +#define EEWR_ADDR 2 +#define EEWR_DATA 16 + #define BIT(x) (1<<x) #define EE_PAGE_MASK 0x3f static uint8_t *nicintel_eebar; static struct pci_dev *nicintel_pci; +static bool done_i20_write = false; #define UNPROG_DEVICE 0x1509 @@ -71,10 +87,35 @@ const struct dev_entry nics_intel_ee[] = { {PCI_VENDOR_ID_INTEL, 0x1511, NT , "Intel", "82580 Quad Gigabit Ethernet Controller (Ext. PHY)"}, {PCI_VENDOR_ID_INTEL, 0x1511, NT , "Intel", "82580 Dual Gigabit Ethernet Controller (Copper)"}, {PCI_VENDOR_ID_INTEL, UNPROG_DEVICE, OK, "Intel", "Unprogrammed 82580 Quad/Dual Gigabit Ethernet Controller"}, + {PCI_VENDOR_ID_INTEL, 0x1531, NT, "Intel", "I210 Gigabit Network Connection Unprogrammed"}, + {PCI_VENDOR_ID_INTEL, 0x1532, NT, "Intel", "I211 Gigabit Network Connection Unprogrammed"}, + {PCI_VENDOR_ID_INTEL, 0x1533, OK, "Intel", "I210 Gigabit Network Connection"}, + {PCI_VENDOR_ID_INTEL, 0x1536, NT, "Intel", "I210 Gigabit Network Connection SERDES Fiber"}, + {PCI_VENDOR_ID_INTEL, 0x1537, NT, "Intel", "I210 Gigabit Network Connection SERDES Backplane"}, + {PCI_VENDOR_ID_INTEL, 0x1538, NT, "Intel", "I210 Gigabit Network Connection SGMII"}, + {PCI_VENDOR_ID_INTEL, 0x1539, NT, "Intel", "I211 Gigabit Network Connection"}, {0}, }; -static int nicintel_ee_probe(struct flashctx *flash) +static inline bool is_i210(uint16_t device_id) +{ + return (device_id & 0xff00) == 0x1500; +} + +static int nicintel_ee_probe_i210(struct flashctx *flash) +{ + /* Emulated eeprom has a fixed size of 4 KB */ + flash->chip->total_size = 4; + flash->chip->page_size = flash->chip->total_size * 1024; + flash->chip->tested = TEST_OK_PREW; + flash->chip->gran = write_gran_1byte_implicit_erase; + flash->chip->block_erasers->eraseblocks[0].size = flash->chip->page_size; + flash->chip->block_erasers->eraseblocks[0].count = 1; + + return 1; +} + +static int nicintel_ee_probe_82580(struct flashctx *flash) { if (nicintel_pci->device_id == UNPROG_DEVICE) flash->chip->total_size = 16; /* Fall back to minimum supported size. */ @@ -103,6 +144,15 @@ static int nicintel_ee_probe(struct flashctx *flash) return 1; } +static int nicintel_ee_probe(struct flashctx *flash) +{ + if (is_i210(nicintel_pci->device_id)) + return nicintel_ee_probe_i210(flash); + + retirm nicintel_ee_probe_82580(flash); +} + +#define MAX_ATEMPTS 10000000 static int nicintel_ee_read_word(unsigned int addr, uint16_t *data) { uint32_t tmp = BIT(EERD_START) | (addr << EERD_ADDR); @@ -110,7 +160,7 @@ static int nicintel_ee_read_word(unsigned int addr, uint16_t *data) /* Poll done flag. 10.000.000 cycles seem to be enough. */ uint32_t i; - for (i = 0; i < 10000000; i++) { + for (i = 0; i < MAX_ATEMPTS; i++) { tmp = pci_mmio_readl(nicintel_eebar + EERD); if (tmp & BIT(EERD_DONE)) { *data = (tmp >> EERD_DATA) & 0xffff; @@ -151,6 +201,80 @@ static int nicintel_ee_read(struct flashctx *flash, uint8_t *buf, unsigned int a return 0; } +static int nicintel_ee_write_word_i210(struct flashctx *flash, unsigned int addr, uint16_t data) +{ + uint32_t eewr; + + eewr = (addr/2) << EEWR_ADDR; + eewr |= data << EEWR_DATA; + eewr |= BIT(EEWR_CMDV); + pci_mmio_writel(eewr, nicintel_eebar + EEWR); + + programmer_delay(5); + for (int i = 0; i < MAX_ATEMPTS; i++) + if (pci_mmio_readl(nicintel_eebar + EEWR) & BIT(EEWR_DONE)) + return 0; + return -1; +} + +static int nicintel_ee_write_i210(struct flashctx *flash, const uint8_t *buf, unsigned int addr, unsigned int len) +{ + done_i20_write = true; + + if (addr & 1) { + uint16_t data; + + if (nicintel_ee_read_word(addr-1, &data)) { + msg_perr("Timeout reading heading byte\n"); + return -1; + } + + data &= 0xff; + data |= (buf ? (buf[0]) : 0xff) << 8; + + if (nicintel_ee_write_word_i210(flash, addr-1, data)) { + msg_perr("Timeout writing heading word\n"); + return -1; + } + + if (buf) + buf ++; + addr ++; + len ++; + } + + while (len > 0) { + uint16_t data; + + if (len == 1) { + if (nicintel_ee_read_word(addr-1, &data)) { + msg_perr("Timeout reading tail byte\n"); + return -1; + } + + data &= 0xff00; + data |= buf ? (buf[0]) : 0xff; + } else { + if (buf) + data = buf[0] | (buf[1] << 8); + else + data = 0xffff; + } + + if (nicintel_ee_write_word_i210(flash, addr, data)) { + msg_perr("Timeout writing Shadow RAM\n"); + return -1; + } + + if (buf) + buf += 2;; + len -= 2; + addr += 2; + } + + return 0; +} + static int nicintel_ee_bitset(int reg, int bit, bool val) { uint32_t tmp; @@ -224,7 +348,7 @@ static int nicintel_ee_req(void) return 0; } -static int nicintel_ee_write(struct flashctx *flash, const uint8_t *buf, unsigned int addr, unsigned int len) +static int nicintel_ee_write_82580(struct flashctx *flash, const uint8_t *buf, unsigned int addr, unsigned int len) { if (nicintel_ee_req()) return -1; @@ -262,6 +386,13 @@ out: nicintel_ee_bitset(EEC, EE_REQ, 0); /* Give up direct access. */ return ret; } +static int nicintel_ee_write(struct flashctx *flash, const uint8_t *buf, unsigned int addr, unsigned int len) +{ + if (is_i210(nicintel_pci->device_id)) + return nicintel_ee_write_i210(flash, buf, addr, len); + + return nicintel_ee_write_82580(flash, buf, addr, len); +} static int nicintel_ee_erase(struct flashctx *flash, unsigned int addr, unsigned int len) { @@ -275,6 +406,25 @@ static const struct opaque_master opaque_master_nicintel_ee = { .erase = nicintel_ee_erase, }; +static int nicintel_ee_shutdown_i210(void *arg) +{ + if (!done_i20_write) + return 0; + + uint32_t flup = pci_mmio_readl(nicintel_eebar + EEC); + + flup |= BIT(EE_FLUPD); + pci_mmio_writel(flup, nicintel_eebar + EEC); + + for (int i = 0; i < MAX_ATEMPTS; i++) + if (pci_mmio_readl(nicintel_eebar + EEC) & BIT(EE_FLUDONE)) + return 0; + + msg_perr("Flash update failed\n"); + + return -1; +} + static int nicintel_ee_shutdown(void *eecp) { uint32_t old_eec = *(uint32_t *)eecp; @@ -298,6 +448,7 @@ int nicintel_ee_init(void) if (rget_io_perms()) return 1; + struct pci_dev *dev = pcidev_init(nics_intel_ee, PCI_BASE_ADDRESS_0); if (!dev) return 1; @@ -306,9 +457,14 @@ int nicintel_ee_init(void) if (!io_base_addr) return 1; - nicintel_eebar = rphysmap("Intel Gigabit NIC w/ SPI EEPROM", io_base_addr, MEMMAP_SIZE); + nicintel_eebar = rphysmap("Intel Gigabit NIC w/ SPI EEPROM", + io_base_addr + (is_i210(dev->device_id) ? 0x12000 : 0), MEMMAP_SIZE); + if (!nicintel_eebar) + return 1; + nicintel_pci = dev; - if (dev->device_id != UNPROG_DEVICE) { + if ((dev->device_id != UNPROG_DEVICE) && ! is_i210(dev->device_id)) + { uint32_t eec = pci_mmio_readl(nicintel_eebar + EEC); /* C.f. 3.3.1.5 for the detection mechanism (maybe? contradicting the EE_PRES definition), @@ -327,5 +483,9 @@ int nicintel_ee_init(void) return 1; } + if (is_i210(dev->device_id)) + if (register_shutdown(nicintel_ee_shutdown_i210, NULL)) + return 1; + return register_opaque_master(&opaque_master_nicintel_ee); } -- 2.11.0

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Chip AT26DF321-SU is recognized as AT25DF321
by The_Raven Raven 23 Mar '17

23 Mar '17

Hello I discovered that the chip "AT26DF321-SU" is recognized as "AT25DF321". This is the output from a "AT26DF321-SU": Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Found Atmel flash chip "AT25DF321" (4096 kB, SPI) on serprog. Chip status register is 0x1c. Chip status register: Sector Protection Register Lock (SRPL) is not set Chip status register: Bit 6 is not set Chip status register: Erase/Program Error (EPE) is not set Chip status register: WP# pin (WPP) is not asserted Chip status register: Software Protection Status (SWP): all sectors are protected Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set It seems that both chips have the same ID's. I have readed and written the "AT26DF321-SU" and it worked. If you need more informations or if i should test something -> Let me know. Greetings Greetings

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Re: [flashrom] Problem with flashrom and FT2232 Port B
by Nico Huber 22 Mar '17

22 Mar '17

On 22.03.2017 14:08, Zak wrote: > Heya > > Thanks for the reply, I'm using the latest version 1.2 for windows and I > use this programmer with other softwares with that same dll and it works > fine on both ports > > But in case I tried with the old libftdi 0.18 and it's the same error Sorry, I'm just poking in the dark. Another idea: Some other driver or program might have claimed access to port B and is blocking it. flash- rom doesn't know how to handle that, maybe your "other softwares" do. Nico > > Regards > > Le 22 mars 2017 12:14, "Nico Huber" <nico.huber(a)secunet.com> a écrit : > >> Hi Zak, >> >> On 21.03.2017 17:28, Zak wrote: >>> Hello, >>> >>> I got flashrom compiled for windows and it works like a charm (has to >>> tweet the code a little, add data for the chips i want to work with, add >>> 4BA and fast rading for FT2232), it works perfectly fine but only for >>> the port A (flashrom -p ft2232_spi:type=2232H,port=A) >>> >>> Using default programmer "ft2232_spi" with arguments "type=2232H,port=A". >>> Calibrating delay loop... OK. >>> Found Macronix flash chip "flashrom -p >>> ft2232_spi:type=2232H,port=AMX25L25665E" (32768 kB, SPI) >>> on ft2232_spi. >>> Reading flash... (0% to done.) >>> >>> If i use the port B (flashrom -p ft2232_spi:type=2232H,port=B), i get >>> this error >>> >>> Calibrating delay loop... OK. >>> Unable to reset FTDI device (USB device unavailable). >>> Unable to set latency timer (USB device unavailable). >>> Unable to set bitmode to SPI (USB device unavailable). >>> ftdi_write_data: -666, USB device unavailable >>> Error: Programmer initialization failed. >>> >>> I get this error also if i try to compile with make >>> CONFIG_DEFAULT_PROGRAMMER=PROGRAMMER_FT2232_SPI >>> CONFIG_DEFAULT_PROGRAMMER_ARGS="type=2232H,port=B" to force port B >>> >>> I looked around i didn't find any solution to fix this, anyone could >>> give me a hand? >> >> the problem probably lies within your (windows) version of libftdi. I'd >> try another OS / libftdi to rule that out. >> >> Nico >> >> >

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[PATCH] nicintel_spi: Support for I210/I211 cards
by Ricardo Ribalda Delgado 22 Mar '17

22 Mar '17

Implements I210 "raw" flash access as detailed in: http://www.intel.com/content/www/us/en/embedded/products/networking/i210-et… Unfortunately, most of the time the card is in Secure Mode, which means that the raw access is not available. But his should be pretty useful for bringing up boards. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)gmail.com> --- nicintel_spi.c | 94 ++++++++++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 71 insertions(+), 23 deletions(-) diff --git a/nicintel_spi.c b/nicintel_spi.c index 9195c79e56c9..89f162f96e00 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -70,6 +70,9 @@ #define FL_SO 3 #define FL_REQ 4 #define FL_GNT 5 +#define FL_LOCKED 6 +#define FL_ABORT 7 +#define FL_CLR_ERR 8 /* Currently unused */ // #define FL_BUSY 30 // #define FL_ER 31 @@ -95,6 +98,14 @@ const struct dev_entry nics_intel_spi[] = { {PCI_VENDOR_ID_INTEL, 0x152a, NT, "Intel", "82599 10 Gigabit Dual Port Backplane Controller with FCoE"}, {PCI_VENDOR_ID_INTEL, 0x1557, NT, "Intel", "82599 10 Gigabit SFI Network Controller"}, + {PCI_VENDOR_ID_INTEL, 0x1531, OK, "Intel", "I210 Gigabit Network Connection Unprogrammed"}, + {PCI_VENDOR_ID_INTEL, 0x1532, NT, "Intel", "I211 Gigabit Network Connection Unprogrammed"}, + {PCI_VENDOR_ID_INTEL, 0x1533, NT, "Intel", "I210 Gigabit Network Connection"}, + {PCI_VENDOR_ID_INTEL, 0x1536, NT, "Intel", "I210 Gigabit Network Connection SERDES Fiber"}, + {PCI_VENDOR_ID_INTEL, 0x1537, NT, "Intel", "I210 Gigabit Network Connection SERDES Backplane"}, + {PCI_VENDOR_ID_INTEL, 0x1538, NT, "Intel", "I210 Gigabit Network Connection SGMII"}, + {PCI_VENDOR_ID_INTEL, 0x1539, NT, "Intel", "I211 Gigabit Network Connection"}, + {0}, }; @@ -182,32 +193,10 @@ static int nicintel_spi_shutdown(void *data) return 0; } -int nicintel_spi_init(void) +static int nicintel_spi_82599_enable_flash() { - struct pci_dev *dev = NULL; uint32_t tmp; - if (rget_io_perms()) - return 1; - - dev = pcidev_init(nics_intel_spi, PCI_BASE_ADDRESS_0); - if (!dev) - return 1; - - uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); - if (!io_base_addr) - return 1; - - if (dev->device_id < 0x10d8) { - nicintel_spibar = rphysmap("Intel Gigabit NIC w/ SPI flash", io_base_addr, - MEMMAP_SIZE); - } else { - nicintel_spibar = rphysmap("Intel 10 Gigabit NIC w/ SPI flash", io_base_addr + 0x10000, - MEMMAP_SIZE); - } - if (nicintel_spibar == ERROR_PTR) - return 1; - /* Automatic restore of EECD on shutdown is not possible because EECD * does not only contain FLASH_WRITES_DISABLED|FLASH_WRITES_ENABLED, * but other bits with side effects as well. Those other bits must be @@ -228,6 +217,65 @@ int nicintel_spi_init(void) if (register_shutdown(nicintel_spi_shutdown, NULL)) return 1; + return 0; +} + +static int nicintel_spi_i210_enable_flash() +{ + uint32_t tmp; + + tmp = pci_mmio_readl(nicintel_spibar + FLA); + if (tmp & (1 << FL_LOCKED)) { + msg_perr("Flash is in Secure Mode. Abort.\n"); + return 1; + } + + if (!(tmp & (1 << FL_ABORT))) + return 0; + + tmp |= (1 << FL_CLR_ERR); + pci_mmio_writel(tmp, nicintel_spibar + FLA); + tmp = pci_mmio_readl(nicintel_spibar + FLA); + if (!tmp & (1 << FL_ABORT)) { + msg_perr("Unable to clear Flash Access Error. Abort\n"); + return 1; + } + + return 0; +} + +int nicintel_spi_init(void) +{ + struct pci_dev *dev = NULL; + + if (rget_io_perms()) + return 1; + + dev = pcidev_init(nics_intel_spi, PCI_BASE_ADDRESS_0); + if (!dev) + return 1; + + uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + if (!io_base_addr) + return 1; + + if ((dev->device_id & 0xfff0) == 0x1530) { + nicintel_spibar = rphysmap("Intel I210 Gigabit w/ SPI flash", io_base_addr + 0x12000, + MEMMAP_SIZE); + if (!nicintel_spibar || nicintel_spi_i210_enable_flash()) + return 1; + } else if (dev->device_id < 0x10d8) { + nicintel_spibar = rphysmap("Intel Gigabit NIC w/ SPI flash", io_base_addr, + MEMMAP_SIZE); + if (!nicintel_spibar || nicintel_spi_82599_enable_flash()) + return 1; + } else { + nicintel_spibar = rphysmap("Intel 10 Gigabit NIC w/ SPI flash", io_base_addr + 0x10000, + MEMMAP_SIZE); + if (!nicintel_spibar || nicintel_spi_82599_enable_flash()) + return 1; + } + if (register_spi_bitbang_master(&bitbang_spi_master_nicintel)) return 1; -- 2.11.0

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[PATCH] sb600spi: Add support for Merlin Falcon Chipset
by Ricardo Ribalda Delgado 22 Mar '17

22 Mar '17

This patch has been tested on a board similar to AMD Bettong. 00:14.0 SMBus [0c05]: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller [1022:790b] (rev 4a) 00:14.3 ISA bridge [0601]: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge [1022:790e] (rev 11) root@qt5022-fglrx:~# ./flashrom -p internal -w kk.rom flashrom v0.9.9-unknown on Linux 4.10.0-qtec-standard (x86_64) flashrom is free software, get the source code at https://flashrom.org Calibrating delay loop... OK. coreboot table found at 0x9ffd6000. Found chipset "AMD FP4". Enabling flash write... OK. Found Micron/Numonyx/ST flash chip "N25Q128..1E" (16384 kB, SPI) mapped at physical address 0x00000000ff000000. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFIED. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)gmail.com> --- chipset_enable.c | 1 + sb600spi.c | 28 +++++++++++++++++++++++----- 2 files changed, 24 insertions(+), 5 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index b181b9349b02..82bac112a29c 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1492,6 +1492,7 @@ const struct penable chipset_enables[] = { {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd_768_8111}, {0x1022, 0x7468, OK, "AMD", "AMD-8111", enable_flash_amd_768_8111}, {0x1022, 0x780e, OK, "AMD", "FCH", enable_flash_sb600}, + {0x1022, 0x790e, OK, "AMD", "FP4", enable_flash_sb600}, {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, {0x1039, 0x0530, OK, "SiS", "530", enable_flash_sis530}, diff --git a/sb600spi.c b/sb600spi.c index 6bd56798e839..68f8d8ac532b 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -149,6 +149,23 @@ static void determine_generation(struct pci_dev *dev) "Please report this to flashrom(a)flashrom.org and include this log and\n" "the output of lspci -nnvx, thanks!.\n", rev); } + } else if (dev->device_id == 0x790e) { + struct pci_dev *smbus_dev = pci_dev_find(0x1022, 0x790B); + if (smbus_dev == NULL) { + msg_pdbg("No SMBus device with ID 1022:790B found.\n"); + return; + } + uint8_t rev = pci_read_byte(smbus_dev, PCI_REVISION_ID); + if (rev == 0x4a) { + amd_gen = CHIPSET_YANGTZE; + msg_pdbg("Yangtze detected.\n"); + } else { + msg_pwarn("FCH device found but SMBus revision 0x%02x does not match known values.\n" + "Please report this to flashrom(a)flashrom.org and include this log and\n" + "the output of lspci -nnvx, thanks!.\n", rev); + } + + #endif } else msg_pwarn("%s: Unknown LPC device %" PRIx16 ":%" PRIx16 ".\n" @@ -646,12 +663,13 @@ int sb600_probe_spi(struct pci_dev *dev) /* Look for the SMBus device. */ smbus_dev = pci_dev_find(0x1002, 0x4385); - if (!smbus_dev) { + if (!smbus_dev) smbus_dev = pci_dev_find(0x1022, 0x780b); /* AMD FCH */ - if (!smbus_dev) { - msg_perr("ERROR: SMBus device not found. Not enabling SPI.\n"); - return ERROR_NONFATAL; - } + if (!smbus_dev) + smbus_dev = pci_dev_find(0x1022, 0x790b); /* AMD FP4 */ + if (!smbus_dev) { + msg_perr("ERROR: SMBus device not found. Not enabling SPI.\n"); + return ERROR_NONFATAL; } /* Note about the bit tests below: If a bit is zero, the GPIO is SPI. */ -- 2.11.0

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Problem with flashrom and FT2232 Port B
by Zak 22 Mar '17

22 Mar '17

Hello, I got flashrom compiled for windows and it works like a charm (has to tweet the code a little, add data for the chips i want to work with, add 4BA and fast rading for FT2232), it works perfectly fine but only for the port A (flashrom -p ft2232_spi:type=2232H,port=A) Using default programmer "ft2232_spi" with arguments "type=2232H,port=A". Calibrating delay loop... OK. Found Macronix flash chip "flashrom -p ft2232_spi:type=2232H,port=AMX25L25665E" (32768 kB, SPI) on ft2232_spi. Reading flash... (0% to done.) If i use the port B (flashrom -p ft2232_spi:type=2232H,port=B), i get this error Calibrating delay loop... OK. Unable to reset FTDI device (USB device unavailable). Unable to set latency timer (USB device unavailable). Unable to set bitmode to SPI (USB device unavailable). ftdi_write_data: -666, USB device unavailable Error: Programmer initialization failed. I get this error also if i try to compile with make CONFIG_DEFAULT_PROGRAMMER=PROGRAMMER_FT2232_SPI CONFIG_DEFAULT_PROGRAMMER_ARGS="type=2232H,port=B" to force port B I looked around i didn't find any solution to fix this, anyone could give me a hand? Thanks a bunch Regards

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Re: [flashrom] Terminology to help distinguish different ways of using Flashrom
by Sam Kuper 21 Mar '17

21 Mar '17

On 19/03/2017, David Hendricks <david.hendricks(a)gmail.com> wrote: > On Sun, Mar 19, 2017 at 10:42 AM, Sam Kuper <sam.kuper(a)uclmail.net> wrote: >> Is there a term that unambiguously describes method 2(b)? > > Just to clarify, in that situation is the ROM is in a dedicated programmer > such as http://www.dediprog.com/pd/universal-programmer/progmaster-u4 ? I'd > describe it as "standalone." Good to know. Thank you!

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Re: [flashrom] Flashrom wiki: what license is the content under?
by Sam Kuper 21 Mar '17

21 Mar '17

On 20/03/2017, Sam Kuper <sam.kuper(a)uclmail.net> wrote: > On 20/03/2017, Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> > wrote: >> On 18.03.2017 17:50, Sam Kuper wrote: >>> Ideally, Flashrom would license the content under the GFDL and CC >>> BY-SA 3.0, making the content entirely license-compatible with content >>> from Wikipedia and from the Stack Exchange network of websites. >> >> Any licensing which inhibits moving code comments to the wiki or vice >> versa is a really bad idea. > > I doubt this would be a problem in practice. I think there are > standard exceptions for this sort of thing. But I'll try to remember > to look into it, because if there *aren't* exceptions for it, then > you're right: it could be a problem. Also, even if the wiki content were licensed under CC BY-SA 3.0, I don't see how there would be any more of an impediment to moving text between the code and the wiki than presently exists. Please correct me if you think I am mistaken.

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Re: [flashrom] Flashrom wiki: what license is the content under?
by Carl-Daniel Hailfinger 21 Mar '17

21 Mar '17

Hi Sam, welcome to the flashrom mailing list. Starting almost identical discussions on two different mailing lists is not productive. It _might_ make sense to revisit this after the discussion on the coreboot mailing list has come to a conclusion. On 18.03.2017 17:50, Sam Kuper wrote: > I have looked at a number of pages on the Flashrom wiki, though not all of them. > > None of the pages I have looked at mentioned the license (if any) > under which their content is available. > > My understanding is that means that much (maybe all) of the > documentation in the Flashrom wiki is proprietary (at least, in the > overwhelming majority of jurisdictions). IANAL, though. > > [...] > Alternatively, it would be great if the Flashrom wiki contributors > could license the documentation in the wiki under one or more free > culture licenses: https://freedomdefined.org/Licenses > > Ideally, Flashrom would license the content under the GFDL and CC > BY-SA 3.0, making the content entirely license-compatible with content > from Wikipedia and from the Stack Exchange network of websites. Why would we want to do that? The GFDL is pretty much the worst licensing choice: it is GPL incompatible, so we would hurt ourselves by using it. CC licensing might make sense, but I don't see the benefit from making the content license-compatible with wikipedia (anything copied from third-party websites to wikipedia is quickly marked as copyvio, and then reverted), and stackexchange questions about flashrom usually receive zero upvotes (maybe because people tend to look elsewhere for flashrom information). Any licensing which inhibits moving code comments to the wiki or vice versa is a really bad idea. > If you agree with the position I have taken above, please do reply to > this thread to say so, especially if you have suggestions about how to > best achieve the (re-)licensing. > > If you disagree with my position, please reply to explain your disagreement. It looks like you're trying to start a vote with special rules where only those who disagree with you have the burden of explaining their position. I'm afraid that's not how it works. Regards, Carl-Daniel

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Re: [flashrom] Terminology to help distinguish different ways of using Flashrom
by David Hendricks 19 Mar '17

19 Mar '17

On Sun, Mar 19, 2017 at 10:42 AM, Sam Kuper <sam.kuper(a)uclmail.net> wrote: > Is there a term that unambiguously describes method 2(b)? Just to clarify, in that situation is the ROM is in a dedicated programmer such as http://www.dediprog.com/pd/universal-programmer/progmaster-u4 ? I'd describe it as "standalone."

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Re: [flashrom] Terminology to help distinguish different ways of using Flashrom
by Patrick 'P. J.' McDermott 19 Mar '17

19 Mar '17

On 2017-03-18 at 18:47, Sam Kuper wrote: > My understanding is that there are, broadly speaking, two distinct > methods for using Flashrom: > > 1. The chip being read or flashed is part of the circuitry on the > motherboard that is hosting the OS that is running the Flashrom > instance. > > 2. The chip being read or flashed is *not* part of the circuitry on > the motherboard that is hosting the OS that is running the Flashrom > instance. Instead, that chip is being accessed via a programmer of > some kind (e.g. a Bus Pirate, or BeagleBone Black, or suchlike). > > This second method can be further subdivided: > > 2(a). The chip being read or flashed is connected to a circuit other > than the one being used to program it. For example, it might be a BIOS > EEPROM chip that was soldered to a motherboard by a PC manufacturer, > and which has not been removed from that motherboard. > > 2(b). The chip being read or flashed is *not* connected to a circuit > other than the one being used to program it. For example, it might be > a brand new chip that has been inserted into a programmer's ZIF socket > so that it can be programmed. > > > I would be grateful to know if terminology exists that would > unambiguously identify which method is being referred to, out of 1, > 2(a), and 2(b). > > The closest I have come to finding such a vocabulary is the page at > https://www.flashrom.org/ISP . This doesn't go very far, though. It > implies that, at least within the Flashrom project, the phrase > "in-system programming" *usually* refers to 2(a), but it might also > refer to 1. ISP (or sometimes ICSP) refers to 2(a). Method 1 would be internal programming (cf. flashrom's "internal" programmer), software programming, or specifically programming from the host CPU (vs. programming from another in-circuit flash master like the Intel Management Engine). Any of these terms are likely to be understood, though flashrom typically goes with "internal" programming. In any case, these flashing methods and terms also aren't specific to flashrom and can apply in other flash memory programming contexts. -- Patrick "P. J." McDermott: http://www.pehjota.net/ Lead Developer, ProteanOS: http://www.proteanos.com/ Founder and CEO, Libiquity: http://www.libiquity.com/

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Terminology to help distinguish different ways of using Flashrom
by Sam Kuper 18 Mar '17

18 Mar '17

My understanding is that there are, broadly speaking, two distinct methods for using Flashrom: 1. The chip being read or flashed is part of the circuitry on the motherboard that is hosting the OS that is running the Flashrom instance. 2. The chip being read or flashed is *not* part of the circuitry on the motherboard that is hosting the OS that is running the Flashrom instance. Instead, that chip is being accessed via a programmer of some kind (e.g. a Bus Pirate, or BeagleBone Black, or suchlike). This second method can be further subdivided: 2(a). The chip being read or flashed is connected to a circuit other than the one being used to program it. For example, it might be a BIOS EEPROM chip that was soldered to a motherboard by a PC manufacturer, and which has not been removed from that motherboard. 2(b). The chip being read or flashed is *not* connected to a circuit other than the one being used to program it. For example, it might be a brand new chip that has been inserted into a programmer's ZIF socket so that it can be programmed. I would be grateful to know if terminology exists that would unambiguously identify which method is being referred to, out of 1, 2(a), and 2(b). The closest I have come to finding such a vocabulary is the page at https://www.flashrom.org/ISP . This doesn't go very far, though. It implies that, at least within the Flashrom project, the phrase "in-system programming" *usually* refers to 2(a), but it might also refer to 1. Can anyone point me towards, or suggest, a more accurate terminology? Many thanks!

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Write access to wiki (Was: Re: Flashrom wiki "Supported programmers" page: Beaglebone Black not listed.)
by Sam Kuper 18 Mar '17

18 Mar '17

On 18/03/2017, Luc Verhaegen <libv(a)skynet.be> wrote: > On Sat, Mar 18, 2017 at 05:52:28PM +0000, Sam Kuper wrote: >> On 18/03/2017, Luc Verhaegen <libv(a)skynet.be> wrote: >> > Also, Sam, it's a wiki. >> >> Yes, but it has no obvious way to create an account ;) I guess I could >> request one, here on the mailing list, but [...] > > This is currently an issue with both coreboot and flashrom. People > cannot easily get a wiki account, and those more involved are all > whining that the wiki is not useful. There's a connection. I didn't find it an issue with Coreboot. https://www.coreboot.org/Special:UserLogin has information about how to request an account, and the process worked smoothly. https://www.flashrom.org/index.php?title=Special:UserLogin doesn't have information about how to request an account. *It should do.* But, as I say, the main reason I don't have an account on the Flashrom wiki is not that I couldn't guess how to request one, but rather that I haven't requested one. (I hope that if I did request one, and gave a good reason for doing so, the request would be granted.) Anyway, thanks :)

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Re: [flashrom] Flashrom wiki "Supported programmers" page: Beaglebone Black not listed.
by Luc Verhaegen 18 Mar '17

18 Mar '17

On Sat, Mar 18, 2017 at 05:52:28PM +0000, Sam Kuper wrote: > On 18/03/2017, Luc Verhaegen <libv(a)skynet.be> wrote: > > On Sat, Mar 18, 2017 at 05:52:15PM +0100, Stefan Tauner wrote: > >> On Sat, 18 Mar 2017 16:45:14 +0000 > >> Sam Kuper <sam.kuper(a)uclmail.net> wrote: > >> The existence of that page is rather a mistake. It has been > >> unmaintained for a long time and should be replaced. Instead the > >> Supported_hardware page (which is generated from flashrom's source > >> semi-automatically) should note the BBB and directly link to its page. > >> Will be like that... sometimes in the future. > > > > Add a programmer category, and have the categories listed on the > > supported hardware page. > > Sounds reasonable. > > > Also, Sam, it's a wiki. > > Yes, but it has no obvious way to create an account ;) I guess I could > request one, here on the mailing list, but: > > - I don't own a BBB, so wouldn't be the ideal person to add any > documentation for that; and > > - it didn't seem sensible to request a wiki account, if I did not have > a good use to which to put it. This is currently an issue with both coreboot and flashrom. People cannot easily get a wiki account, and those more involved are all whining that the wiki is not useful. There's a connection. Luc Verhaegen. Who made the linux-sunxi wiki that useful.

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Re: [flashrom] Flashrom wiki "Supported programmers" page: Beaglebone Black not listed.
by Stefan Tauner 18 Mar '17

18 Mar '17

On Sat, 18 Mar 2017 16:45:14 +0000 Sam Kuper <sam.kuper(a)uclmail.net> wrote: > The BeagleBone Black (aka "BBB") is recommended by the Libreboot > developers for use with Flashrom: "We recommend this product because > we know that it works well for our purposes and doesn't require any > non-free software." https://libreboot.org/docs/install/bbb_setup.html > > However, it is missing from the "Supported programmers" page of the > Flashrom wiki: https://www.flashrom.org/Supported_programmers > Hi! The existence of that page is rather a mistake. It has been unmaintained for a long time and should be replaced. Instead the Supported_hardware page (which is generated from flashrom's source semi-automatically) should note the BBB and directly link to its page. Will be like that... sometimes in the future. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Flashrom wiki: what license is the content under?
by Sam Kuper 18 Mar '17

18 Mar '17

Hi folks, I have looked at a number of pages on the Flashrom wiki, though not all of them. None of the pages I have looked at mentioned the license (if any) under which their content is available. My understanding is that means that much (maybe all) of the documentation in the Flashrom wiki is proprietary (at least, in the overwhelming majority of jurisdictions). IANAL, though. If my understanding is incorrect, please could you point me towards information that should correct it? Alternatively, it would be great if the Flashrom wiki contributors could license the documentation in the wiki under one or more free culture licenses: https://freedomdefined.org/Licenses Ideally, Flashrom would license the content under the GFDL and CC BY-SA 3.0, making the content entirely license-compatible with content from Wikipedia and from the Stack Exchange network of websites. If you agree with the position I have taken above, please do reply to this thread to say so, especially if you have suggestions about how to best achieve the (re-)licensing. If you disagree with my position, please reply to explain your disagreement. Thanks, Sam P.S. For a parallel discussion of the license for Coreboot wiki content, please see: https://www.coreboot.org/pipermail/coreboot/2017-March/083607.html

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Flashrom wiki "Supported programmers" page: Beaglebone Black not listed.
by Sam Kuper 18 Mar '17

18 Mar '17

The BeagleBone Black (aka "BBB") is recommended by the Libreboot developers for use with Flashrom: "We recommend this product because we know that it works well for our purposes and doesn't require any non-free software." https://libreboot.org/docs/install/bbb_setup.html However, it is missing from the "Supported programmers" page of the Flashrom wiki: https://www.flashrom.org/Supported_programmers This is quite a surprising omission, given the fact that it is recommended by Libreboot. It does seem to have been given some cursory attention on the Flashrom wiki here: https://www.flashrom.org/BBB . If anyone who has a BBB and has write access to the Flashrom wiki feels like fleshing out the latter page and linking it from the "Supported programmers" page, this would probably be very helpful for (potential) BBB owners who might not otherwise realise that Flashrom supports the BBB.

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flashrom and W25Q128FV
by Connor Illian 16 Mar '17

16 Mar '17

the winbond W25Q128FV is listed as supported by flashrom. i have attempted to communicate with this chip via raspberry pi spidev as well as buspirate from ubuntu. i have one chip pulled from a working machine and three brand new blanks. no EEPROM is found no matter what i try with any chip. i cannot specify chip, and reading with -f results in an empty bin. i can remove the winbond chip from the socket and place a macronix mx25L6406e and flashrom identifies the chip immediately. i have compared data sheets between the macronix and winbond chips, and they are identical in terms of power, pinout, op codes, etc. the only difference is the macronix is 64mbit and the winbond is 128mbit. how can i proceed?

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Re: [flashrom] Layout Aware Flash Reading and Erase Blocks
by Nico Huber 16 Mar '17

16 Mar '17

On 16.03.2017 00:08, David Hendricks wrote: > On Fri, Mar 10, 2017 at 8:02 AM, Nico Huber <nico.huber(a)secunet.com> wrote: >> >> Hi, >> >> I've just updated my solution to _the_ layout problem that I wrote last >> year [1]. I'm not asking for a review at this moment. There are at least >> two competing approaches that I want to discuss first (I couldn't start >> a discussion before I wrote it, due to time constraints). >> >> We can >> >> 1) walk over the given layout regions in an outer loop and >> walk over the erase blocks in each region in an inner loop >> >> This is how my patch tackles it. >> >> or >> >> 2) walk over all erase blocks in an outer loop and >> walk over the touched layout regions in an inner loop >> >> Thoughts? >> >> Both sounds easy to do but it gets really complicated when you account >> for a) regions that are not erase block aligned, b) our fallback to dif- >> ferent erase functions (and blocks thereby) and c) read-locks that might >> render a) impossible. > > > I think the second approach results in an extra layer of logic that really > isn't needed. With the first, we: > 1. We find what needs to change > 2. Select the appropriate block eraser Until now, I kept flashrom's fallback mechanism: it just tries all erase functions until one succeeds. I think that's very questionable though. So far I've only seen it triggered in two scenarios only: 1. Wrong flash chip selected (i.e. wrong opcode or wrong block size). => Might be a bug in flashrom that gets never reported. 2. Unreliable reads that made it look like the erase didn't work. => Fallback made things even worse, resulting in a full chip erase. So I'd agree to remove that fallback mechanism. > 3. Do the work. > > The second approach requires selecting a block erase size beforehand for > the outer loop, and that blockerase size might not be the one we want to > use to actually do the work (especially with the unaligned and optimized > cases). Agreed. In the long run, we'll want to choose the erase function more dynamically. > >> >> One pretty simple solution would be to exclude unaligned layout regions. >> How about this? anybody ever needed it? > > Historically some ChromeOS devices have had unaligned layout regions. > Generally speaking, excluding them would impose an artificial limitation on > the images that flashrom can handle that will just bite users. Layout > regions might be defined automatically by a firmware's build system without > awareness of a particular flash chip's blockerase sizes, or some users may > want to use unaligned regions to avoid wasting space (like putting multiple > small regions into a 64KB block). Ok, ok, I'm convinced. Never asked for it ;) > >> >> Another related thing is an optimization that I have in mind since ever >> I used flashrom: Selection of the biggest possible erase block size. >> Currently, if we erase/write say 16 blocks of 4KiB, we waste a lot of >> time because most chips would erase a 64KiB block much faster. If we >> ever add something like this, I guess it would be easier with approach >> 1). But maybe it'd be so invasive that it doesn't matter much... > > I'd like this as well, and agree that it would be easier with the first > approach. As far as invasiveness goes, the tricky part IMO is updating > portions of read logic to deal with unaligned layout regions to ensure data > outside the targeted region is restored, which requires knowing the > eraseblock size in advance. Otherwise you end up with hacks like this: > https://chromium-review.googlesource.com/c/240176/ I handle this at erase-block level (first code-block in read_erase_ write_block(), https://review.coreboot.org/#/c/17945/2/flashrom.c). It's not pretty but reduces the assumptions you have to take care of in higher levels. Nico

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Layout Aware Flash Reading and Erase Blocks
by Nico Huber 16 Mar '17

16 Mar '17

Hi, I've just updated my solution to _the_ layout problem that I wrote last year [1]. I'm not asking for a review at this moment. There are at least two competing approaches that I want to discuss first (I couldn't start a discussion before I wrote it, due to time constraints). We can 1) walk over the given layout regions in an outer loop and walk over the erase blocks in each region in an inner loop This is how my patch tackles it. or 2) walk over all erase blocks in an outer loop and walk over the touched layout regions in an inner loop Thoughts? Both sounds easy to do but it gets really complicated when you account for a) regions that are not erase block aligned, b) our fallback to dif- ferent erase functions (and blocks thereby) and c) read-locks that might render a) impossible. a) will always be the case when b) results in the erase chip function. One pretty simple solution would be to exclude unaligned layout regions. How about this? anybody ever needed it? Another related thing is an optimization that I have in mind since ever I used flashrom: Selection of the biggest possible erase block size. Currently, if we erase/write say 16 blocks of 4KiB, we waste a lot of time because most chips would erase a 64KiB block much faster. If we ever add something like this, I guess it would be easier with approach 1). But maybe it'd be so invasive that it doesn't matter much... Best regards, Nico [1] https://review.coreboot.org/#/c/17945/

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[PATCH] Add support for AMD Promonotory (Ryzen)
by Stefan Tauner 05 Mar '17

05 Mar '17

To that end, this patch refines determine_generation() to find the respective SMBUS device too. Additionally, remove the (unused) heuristics to identify Yangtze. Signed-off-by: Stefan Tauner <stefan.tauner(a)gmx.at> --- chipset_enable.c | 1 + sb600spi.c | 85 ++++++++++++++++++++++++++------------------------------ 2 files changed, 41 insertions(+), 45 deletions(-) This version refines sb600spi.c's handling of SMBUS and puts it into determine_generation() and has some higher hopes of getting somewhere on Ryzen. diff --git a/chipset_enable.c b/chipset_enable.c index b181b93..72bf15b 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1492,6 +1492,7 @@ const struct penable chipset_enables[] = { {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd_768_8111}, {0x1022, 0x7468, OK, "AMD", "AMD-8111", enable_flash_amd_768_8111}, {0x1022, 0x780e, OK, "AMD", "FCH", enable_flash_sb600}, + {0x1022, 0x790e, OK, "AMD", "Promontory", enable_flash_sb600}, {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, {0x1039, 0x0530, OK, "SiS", "530", enable_flash_sis530}, diff --git a/sb600spi.c b/sb600spi.c index 6bd5679..ebed87f 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -53,6 +53,7 @@ enum amd_chipset { CHIPSET_HUDSON234, CHIPSET_BOLTON, CHIPSET_YANGTZE, + CHIPSET_PROMONTORY, }; static enum amd_chipset amd_gen = CHIPSET_AMD_UNKNOWN; @@ -86,18 +87,31 @@ static struct spi_master spi_master_yangtze = { .write_aai = default_spi_write_aai, }; -static void determine_generation(struct pci_dev *dev) +static int find_smbus (struct pci_dev **smbus_dev, uint16_t vendor, uint16_t device) +{ + *smbus_dev = pci_dev_find(vendor, device); + if (*smbus_dev == NULL) { + msg_pdbg("No SMBus device with ID %04X:%04X found.\n", vendor, device); + msg_perr("ERROR: SMBus device not found. Not enabling SPI.\n"); + return 1; + } + return 0; +} + +/* Determine the chipset's version and identify the respective SMBUS device. */ +static int determine_generation(struct pci_dev *dev, struct pci_dev **smbus_dev) { amd_gen = CHIPSET_AMD_UNKNOWN; msg_pdbg2("Trying to determine the generation of the SPI interface... "); if (dev->device_id == 0x438d) { + if (find_smbus(smbus_dev, 0x1002, 0x4385) != 0) + return 1; amd_gen = CHIPSET_SB6XX; msg_pdbg("SB6xx detected.\n"); } else if (dev->device_id == 0x439d) { - struct pci_dev *smbus_dev = pci_dev_find(0x1002, 0x4385); - if (smbus_dev == NULL) - return; - uint8_t rev = pci_read_byte(smbus_dev, PCI_REVISION_ID); + if (find_smbus(smbus_dev, 0x1002, 0x4385) != 0) + return 1; + uint8_t rev = pci_read_byte(*smbus_dev, PCI_REVISION_ID); if (rev >= 0x39 && rev <= 0x3D) { amd_gen = CHIPSET_SB7XX; msg_pdbg("SB7xx/SP5100 detected.\n"); @@ -113,28 +127,9 @@ static void determine_generation(struct pci_dev *dev) } else if (dev->device_id == 0x780e) { /* The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash) * although they use different SPI interfaces. */ -#ifdef USE_YANGTZE_HEURISTICS - /* This heuristic accesses the SPI interface MMIO BAR at locations beyond those supported by - * Hudson in the hope of getting 0xff readback on older chipsets and non-0xff readback on - * Yangtze (and newer, compatible chipsets). */ - int i; - msg_pdbg("Checking for AMD Yangtze (Kabini/Temash) or later... "); - for (i = 0x20; i <= 0x4f; i++) { - if (mmio_readb(sb600_spibar + i) != 0xff) { - amd_gen = CHIPSET_YANGTZE; - msg_pdbg("found.\n"); - return; - } - } - msg_pdbg("not found. Assuming Hudson.\n"); - amd_gen = CHIPSET_HUDSON234; -#else - struct pci_dev *smbus_dev = pci_dev_find(0x1022, 0x780B); - if (smbus_dev == NULL) { - msg_pdbg("No SMBus device with ID 1022:780B found.\n"); - return; - } - uint8_t rev = pci_read_byte(smbus_dev, PCI_REVISION_ID); + if (find_smbus(smbus_dev, 0x1022, 0x780b) != 0) + return 1; + uint8_t rev = pci_read_byte(*smbus_dev, PCI_REVISION_ID); if (rev >= 0x11 && rev <= 0x15) { amd_gen = CHIPSET_HUDSON234; msg_pdbg("Hudson-2/3/4 detected.\n"); @@ -149,12 +144,23 @@ static void determine_generation(struct pci_dev *dev) "Please report this to flashrom(a)flashrom.org and include this log and\n" "the output of lspci -nnvx, thanks!.\n", rev); } -#endif + } else if (dev->device_id == 0x790e) { + if (find_smbus(smbus_dev, 0x1022, 0x790b) != 0) + return 1; + amd_gen = CHIPSET_PROMONTORY; + msg_pdbg("Promontory (Ryzen) detected.\n"); } else msg_pwarn("%s: Unknown LPC device %" PRIx16 ":%" PRIx16 ".\n" "Please report this to flashrom(a)flashrom.org and include this log and\n" "the output of lspci -nnvx, thanks!\n", __func__, dev->vendor_id, dev->device_id); + + if (amd_gen == CHIPSET_AMD_UNKNOWN) { + msg_perr("Could not determine chipset generation."); + return 1; + } + return 0; + } static void reset_internal_fifo_pointer(void) @@ -550,9 +556,7 @@ int sb600_probe_spi(struct pci_dev *dev) */ sb600_spibar += tmp & 0xfff; - determine_generation(dev); - if (amd_gen == CHIPSET_AMD_UNKNOWN) { - msg_perr("Could not determine chipset generation."); + if (determine_generation(dev, &smbus_dev) != 0) { return ERROR_NONFATAL; } @@ -577,7 +581,7 @@ int sb600_probe_spi(struct pci_dev *dev) msg_pdbg("SpiRomEnable=%i", (tmp >> 1) & 0x1); if (amd_gen == CHIPSET_SB7XX) msg_pdbg(", AltSpiCSEnable=%i, AbortEnable=%i", tmp & 0x1, (tmp >> 2) & 0x1); - else if (amd_gen == CHIPSET_YANGTZE) + else if (amd_gen >= CHIPSET_YANGTZE) msg_pdbg(", RouteTpm2Sp=%i", (tmp >> 3) & 0x1); tmp = pci_read_byte(dev, 0xba); @@ -613,13 +617,13 @@ int sb600_probe_spi(struct pci_dev *dev) */ tmp = mmio_readl(sb600_spibar + 0x00); msg_pdbg("(0x%08" PRIx32 ") SpiArbEnable=%i", tmp, (tmp >> 19) & 0x1); - if (amd_gen == CHIPSET_YANGTZE) + if (amd_gen >= CHIPSET_YANGTZE) msg_pdbg(", IllegalAccess=%i", (tmp >> 21) & 0x1); msg_pdbg(", SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i", (tmp >> 22) & 0x1, (tmp >> 23) & 0x1, (tmp >> 24) & 0x7); - if (amd_gen != CHIPSET_YANGTZE) + if (amd_gen < CHIPSET_YANGTZE) msg_pdbg(", SpiBridgeDisable=%i", (tmp >> 27) & 0x1); switch (amd_gen) { @@ -628,6 +632,7 @@ int sb600_probe_spi(struct pci_dev *dev) case CHIPSET_SB89XX: case CHIPSET_HUDSON234: case CHIPSET_YANGTZE: + case CHIPSET_PROMONTORY: msg_pdbg(", SpiBusy=%i", (tmp >> 31) & 0x1); default: break; } @@ -644,16 +649,6 @@ int sb600_probe_spi(struct pci_dev *dev) /* FIXME: Handle SpiProtect* configuration on Yangtze. */ } - /* Look for the SMBus device. */ - smbus_dev = pci_dev_find(0x1002, 0x4385); - if (!smbus_dev) { - smbus_dev = pci_dev_find(0x1022, 0x780b); /* AMD FCH */ - if (!smbus_dev) { - msg_perr("ERROR: SMBus device not found. Not enabling SPI.\n"); - return ERROR_NONFATAL; - } - } - /* Note about the bit tests below: If a bit is zero, the GPIO is SPI. */ /* GPIO11/SPI_DO and GPIO12/SPI_DI status */ reg = pci_read_byte(smbus_dev, 0xAB); @@ -690,7 +685,7 @@ int sb600_probe_spi(struct pci_dev *dev) return ERROR_FATAL; /* Starting with Yangtze the SPI controller got a different interface with a much bigger buffer. */ - if (amd_gen != CHIPSET_YANGTZE) + if (amd_gen < CHIPSET_YANGTZE) register_spi_master(&spi_master_sb600); else register_spi_master(&spi_master_yangtze); -- Kind regards, Stefan Tauner

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[PATCH] Add support for AMD Promonotory (Ryzen)
by Stefan Tauner 05 Mar '17

05 Mar '17

Signed-off-by: Stefan Tauner <stefan.tauner(a)gmx.at> --- chipset_enable.c | 1 + sb600spi.c | 13 +++++++++---- 2 files changed, 10 insertions(+), 4 deletions(-) This is the first and very crude version of a patch to support Ryzen. I have no datasheet (neither does the internet AFAICT). The patch prepares sb600_spi.c for Propmonotry support distinct from Yangtze but does not implement any differences so far (because we don't know any yet). diff --git a/chipset_enable.c b/chipset_enable.c index b181b93..72bf15b 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1492,6 +1492,7 @@ const struct penable chipset_enables[] = { {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd_768_8111}, {0x1022, 0x7468, OK, "AMD", "AMD-8111", enable_flash_amd_768_8111}, {0x1022, 0x780e, OK, "AMD", "FCH", enable_flash_sb600}, + {0x1022, 0x790e, OK, "AMD", "Promontory", enable_flash_sb600}, {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, {0x1039, 0x0530, OK, "SiS", "530", enable_flash_sis530}, diff --git a/sb600spi.c b/sb600spi.c index 6bd5679..c4b844e 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -53,6 +53,7 @@ enum amd_chipset { CHIPSET_HUDSON234, CHIPSET_BOLTON, CHIPSET_YANGTZE, + CHIPSET_PROMONTORY, }; static enum amd_chipset amd_gen = CHIPSET_AMD_UNKNOWN; @@ -150,6 +151,9 @@ static void determine_generation(struct pci_dev *dev) "the output of lspci -nnvx, thanks!.\n", rev); } #endif + } else if (dev->device_id == 0x790e) { + amd_gen = CHIPSET_PROMONTORY; + msg_pdbg("Promontory (Ryzen) detected.\n"); } else msg_pwarn("%s: Unknown LPC device %" PRIx16 ":%" PRIx16 ".\n" "Please report this to flashrom(a)flashrom.org and include this log and\n" @@ -577,7 +581,7 @@ int sb600_probe_spi(struct pci_dev *dev) msg_pdbg("SpiRomEnable=%i", (tmp >> 1) & 0x1); if (amd_gen == CHIPSET_SB7XX) msg_pdbg(", AltSpiCSEnable=%i, AbortEnable=%i", tmp & 0x1, (tmp >> 2) & 0x1); - else if (amd_gen == CHIPSET_YANGTZE) + else if (amd_gen >= CHIPSET_YANGTZE) msg_pdbg(", RouteTpm2Sp=%i", (tmp >> 3) & 0x1); tmp = pci_read_byte(dev, 0xba); @@ -613,13 +617,13 @@ int sb600_probe_spi(struct pci_dev *dev) */ tmp = mmio_readl(sb600_spibar + 0x00); msg_pdbg("(0x%08" PRIx32 ") SpiArbEnable=%i", tmp, (tmp >> 19) & 0x1); - if (amd_gen == CHIPSET_YANGTZE) + if (amd_gen >= CHIPSET_YANGTZE) msg_pdbg(", IllegalAccess=%i", (tmp >> 21) & 0x1); msg_pdbg(", SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i", (tmp >> 22) & 0x1, (tmp >> 23) & 0x1, (tmp >> 24) & 0x7); - if (amd_gen != CHIPSET_YANGTZE) + if (amd_gen < CHIPSET_YANGTZE) msg_pdbg(", SpiBridgeDisable=%i", (tmp >> 27) & 0x1); switch (amd_gen) { @@ -628,6 +632,7 @@ int sb600_probe_spi(struct pci_dev *dev) case CHIPSET_SB89XX: case CHIPSET_HUDSON234: case CHIPSET_YANGTZE: + case CHIPSET_PROMONTORY: msg_pdbg(", SpiBusy=%i", (tmp >> 31) & 0x1); default: break; } @@ -690,7 +695,7 @@ int sb600_probe_spi(struct pci_dev *dev) return ERROR_FATAL; /* Starting with Yangtze the SPI controller got a different interface with a much bigger buffer. */ - if (amd_gen != CHIPSET_YANGTZE) + if (amd_gen < CHIPSET_YANGTZE) register_spi_master(&spi_master_sb600); else register_spi_master(&spi_master_yangtze); -- Kind regards, Stefan Tauner

1 0

please add support MX25L25635F
by master ps 04 Mar '17

04 Mar '17

Hi please add support for MX25L25635F and W25Q256FV. Thanks!

1 0

flashrom Gigabyte Q77M-D2H report
by Basil Marmer 03 Mar '17

03 Mar '17

run under Ubuntu 16.10 - sudo flashrom -p internal -c "MX25L6406E/MX25L6408E" -V -w Q77MD2H.F2 flashrom v0.9.9-r1954 on Linux 4.8.0-34-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org flashrom was built with libpci 3.3.1, GCC 5.3.1 20160424, little endian Command line (7 args): flashrom -p internal -c MX25L6406E/MX25L6408E -V -w Q77MD2H.F2 Calibrating delay loop... OS timer resolution is 1 usecs, 3279M loops per second, 10 myus = 10 us, 100 myus = 102 us, 1000 myus = 1022 us, 10000 myus = 10112 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. Using Internal DMI decoder. DMI string chassis-type: "Desktop" DMI string system-manufacturer: "ARBYTE COMPUTERS" DMI string system-product-name: "Arbyte Quint B M4D3A-Q77 vPro" DMI string system-version: "AC275311" DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd." DMI string baseboard-product-name: "Q77M-D2H" DMI string baseboard-version: "x.x" Found ITE Super I/O, ID 0x8728 on port 0x2e Found chipset "Intel Q77" with PCI ID 8086:1e47. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... Root Complex Register Block address = 0xfed1c000 GCS = 0xc64: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (SPI) Top Swap: not enabled 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode enabled 0xff600000/0xff200000 FWH decode enabled 0xff500000/0xff100000 FWH decode enabled 0xff400000/0xff000000 FWH decode enabled Maximum FWH chip size: 0x100000 bytes SPI Read Configuration: prefetching enabled, caching enabled, BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled SPIBAR = 0x00007fdce0032000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 Warning: SPI Configuration Lockdown activated. Reading OPCODES... done 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x50: 0x0000ffff (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. 0x58: 0x07ff0500 FREG1: BIOS region (0x00500000-0x007fffff) is read-write. 0x5C: 0x04ff0003 FREG2: Management Engine region (0x00003000-0x004fffff) is read-write. 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) is read-write. 0x90: 0x84 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0xf94130 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=3, DBC=1, SME=0, SCF=1 0x94: 0x0006 (PREOP) 0x96: 0x043b (OPTYPE) 0x98: 0x05200302 (OPMENU) 0x9C: 0x0000019f (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00802005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20 0xD0: 0x00000000 (FPB) OK. No IT87* serial flash segment enabled. The following protocols are supported: FWH, SPI. Probing for Macronix MX25L6406E/MX25L6408E, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Found Macronix flash chip "MX25L6406E/MX25L6408E" (8192 kB, SPI) mapped at physical address 0x00000000ff800000. Chip status register is 0x00. Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:S, 0x001000-0x001fff:EW, 0x002000-0x002fff:E, 0x003000-0x003fff:EW, 0x004000-0x004fff:E, 0x005000-0x005fff:S, 0x006000-0x006fff:EW, 0x007000-0x007fff:E, 0x008000-0x008fff:E, 0x009000-0x009fff:E, 0x00a000-0x00afff:EW, 0x00b000-0x00bfff:EW, 0x00c000-0x00cfff:EW, 0x00d000-0x00dfff:EW, 0x00e000-0x00efff:EW, 0x00f000-0x00ffff:EW, 0x010000-0x010fff:S, 0x011000-0x011fff:EW, 0x012000-0x012fff:EW, 0x013000-0x013fff:E, 0x014000-0x014fff:E, 0x015000-0x015fff:E, 0x016000-0x016fff:EW, 0x017000-0x017fff:E, 0x018000-0x018fff:E, 0x019000-0x019fff:E, 0x01a000-0x01afff:EW, 0x01b000-0x01bfff:E, 0x01c000-0x01cfff:E, 0x01d000-0x01dfff:E, 0x01e000-0x01efff:EW, 0x01f000-0x01ffff:E, 0x020000-0x020fff:E, 0x021000-0x021fff:E, 0x022000-0x022fff:EW, 0x023000-0x023fff:E, 0x024000-0x024fff:E, 0x025000-0x025fff:E, 0x026000-0x026fff:EW, 0x027000-0x027fff:E, 0x028000-0x028fff:E, 0x029000-0x029fff:E, 0x02a000-0x02afff:EW, 0x02b000-0x02bfff:S, 0x02c000-0x02cfff:S, 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0x05c000-0x05cfff:E, 0x05d000-0x05dfff:E, 0x05e000-0x05efff:EW, 0x05f000-0x05ffff:E, 0x060000-0x060fff:E, 0x061000-0x061fff:E, 0x062000-0x062fff:EW, 0x063000-0x063fff:E, 0x064000-0x064fff:E, 0x065000-0x065fff:E, 0x066000-0x066fff:EW, 0x067000-0x067fff:E, 0x068000-0x068fff:E, 0x069000-0x069fff:E, 0x06a000-0x06afff:EW, 0x06b000-0x06bfff:E, 0x06c000-0x06cfff:E, 0x06d000-0x06dfff:E, 0x06e000-0x06efff:EW, 0x06f000-0x06ffff:E, 0x070000-0x070fff:E, 0x071000-0x071fff:E, 0x072000-0x072fff:EW, 0x073000-0x073fff:E, 0x074000-0x074fff:E, 0x075000-0x075fff:E, 0x076000-0x076fff:EW, 0x077000-0x077fff:E, 0x078000-0x078fff:E, 0x079000-0x079fff:E, 0x07a000-0x07afff:EW, 0x07b000-0x07bfff:E, 0x07c000-0x07cfff:E, 0x07d000-0x07dfff:E, 0x07e000-0x07efff:EW, 0x07f000-0x07ffff:E, 0x080000-0x080fff:E, 0x081000-0x081fff:E, 0x082000-0x082fff:EW, 0x083000-0x083fff:E, 0x084000-0x084fff:E, 0x085000-0x085fff:E, 0x086000-0x086fff:EW, 0x087000-0x087fff:E, 0x088000-0x088fff:E, 0x089000-0x089fff:E, 0x08a000-0x08afff:EW, 0x08b000-0x08bfff:E, 0x08c000-0x08cfff:E, 0x08d000-0x08dfff:E, 0x08e000-0x08efff:EW, 0x08f000-0x08ffff:E, 0x090000-0x090fff:E, 0x091000-0x091fff:E, 0x092000-0x092fff:EW, 0x093000-0x093fff:E, 0x094000-0x094fff:S, 0x095000-0x095fff:S, 0x096000-0x096fff:EW, 0x097000-0x097fff:E, 0x098000-0x098fff:E, 0x099000-0x099fff:E, 0x09a000-0x09afff:EW, 0x09b000-0x09bfff:E, 0x09c000-0x09cfff:E, 0x09d000-0x09dfff:E, 0x09e000-0x09efff:EW, 0x09f000-0x09ffff:E, 0x0a0000-0x0a0fff:E, 0x0a1000-0x0a1fff:E, 0x0a2000-0x0a2fff:EW, 0x0a3000-0x0a3fff:E, 0x0a4000-0x0a4fff:E, 0x0a5000-0x0a5fff:E, 0x0a6000-0x0a6fff:EW, 0x0a7000-0x0a7fff:E, 0x0a8000-0x0a8fff:E, 0x0a9000-0x0a9fff:E, 0x0aa000-0x0aafff:EW, 0x0ab000-0x0abfff:E, 0x0ac000-0x0acfff:E, 0x0ad000-0x0adfff:E, 0x0ae000-0x0aefff:EW, 0x0af000-0x0affff:E, 0x0b0000-0x0b0fff:E, 0x0b1000-0x0b1fff:E, 0x0b2000-0x0b2fff:EW, 0x0b3000-0x0b3fff:E, 0x0b4000-0x0b4fff:E, 0x0b5000-0x0b5fff:E, 0x0b6000-0x0b6fff:EW, 0x0b7000-0x0b7fff:E, 0x0b8000-0x0b8fff:E, 0x0b9000-0x0b9fff:E, 0x0ba000-0x0bafff:EW, 0x0bb000-0x0bbfff:E, 0x0bc000-0x0bcfff:E, 0x0bd000-0x0bdfff:E, 0x0be000-0x0befff:EW, 0x0bf000-0x0bffff:E, 0x0c0000-0x0c0fff:E, 0x0c1000-0x0c1fff:E, 0x0c2000-0x0c2fff:EW, 0x0c3000-0x0c3fff:E, 0x0c4000-0x0c4fff:E, 0x0c5000-0x0c5fff:E, 0x0c6000-0x0c6fff:EW, 0x0c7000-0x0c7fff:E, 0x0c8000-0x0c8fff:E, 0x0c9000-0x0c9fff:E, 0x0ca000-0x0cafff:EW, 0x0cb000-0x0cbfff:E, 0x0cc000-0x0ccfff:S, 0x0cd000-0x0cdfff:S, 0x0ce000-0x0cefff:EW, 0x0cf000-0x0cffff:E, 0x0d0000-0x0d0fff:E, 0x0d1000-0x0d1fff:E, 0x0d2000-0x0d2fff:EW, 0x0d3000-0x0d3fff:E, 0x0d4000-0x0d4fff:E, 0x0d5000-0x0d5fff:E, 0x0d6000-0x0d6fff:EW, 0x0d7000-0x0d7fff:E, 0x0d8000-0x0d8fff:E, 0x0d9000-0x0d9fff:E, 0x0da000-0x0dafff:EW, 0x0db000-0x0dbfff:E, 0x0dc000-0x0dcfff:E, 0x0dd000-0x0ddfff:E, 0x0de000-0x0defff:EW, 0x0df000-0x0dffff:E, 0x0e0000-0x0e0fff:E, 0x0e1000-0x0e1fff:E, 0x0e2000-0x0e2fff:EW, 0x0e3000-0x0e3fff:EW, 0x0e4000-0x0e4fff:EW, 0x0e5000-0x0e5fff:EW, 0x0e6000-0x0e6fff:EW, 0x0e7000-0x0e7fff:E, 0x0e8000-0x0e8fff:S, 0x0e9000-0x0e9fff:S, 0x0ea000-0x0eafff:EW, 0x0eb000-0x0ebfff:EW, 0x0ec000-0x0ecfff:EW, 0x0ed000-0x0edfff:EW, 0x0ee000-0x0eefff:EW, 0x0ef000-0x0effff:EW, 0x0f0000-0x0f0fff:EW, 0x0f1000-0x0f1fff:EW, 0x0f2000-0x0f2fff:EW, 0x0f3000-0x0f3fff:EW, 0x0f4000-0x0f4fff:EW, 0x0f5000-0x0f5fff:EW, 0x0f6000-0x0f6fff:EW, 0x0f7000-0x0f7fff:EW, 0x0f8000-0x0f8fff:EW, 0x0f9000-0x0f9fff:EW, 0x0fa000-0x0fafff:EW, 0x0fb000-0x0fbfff:EW, 0x0fc000-0x0fcfff:EW, 0x0fd000-0x0fdfff:EW, 0x0fe000-0x0fefff:EW, 0x0ff000-0x0fffff:EW, 0x100000-0x100fff:EW, 0x101000-0x101fff:EW, 0x102000-0x102fff:EW, 0x103000-0x103fff:EW, 0x104000-0x104fff:EW, 0x105000-0x105fff:EW, 0x106000-0x106fff:EW, 0x107000-0x107fff:EW, 0x108000-0x108fff:EW, 0x109000-0x109fff:EW, 0x10a000-0x10afff:EW, 0x10b000-0x10bfff:EW, 0x10c000-0x10cfff:EW, 0x10d000-0x10dfff:EW, 0x10e000-0x10efff:EW, 0x10f000-0x10ffff:EW, 0x110000-0x110fff:EW, 0x111000-0x111fff:EW, 0x112000-0x112fff:EW, 0x113000-0x113fff:EW, 0x114000-0x114fff:EW, 0x115000-0x115fff:EW, 0x116000-0x116fff:EW, 0x117000-0x117fff:EW, 0x118000-0x118fff:EW, 0x119000-0x119fff:EW, 0x11a000-0x11afff:EW, 0x11b000-0x11bfff:EW, 0x11c000-0x11cfff:EW, 0x11d000-0x11dfff:EW, 0x11e000-0x11efff:EW, 0x11f000-0x11ffff:EW, 0x120000-0x120fff:EW, 0x121000-0x121fff:EW, 0x122000-0x122fff:EW, 0x123000-0x123fff:EW, 0x124000-0x124fff:EW, 0x125000-0x125fff:EW, 0x126000-0x126fff:EW, 0x127000-0x127fff:EW, 0x128000-0x128fff:EW, 0x129000-0x129fff:EW, 0x12a000-0x12afff:EW, 0x12b000-0x12bfff:EW, 0x12c000-0x12cfff:EW, 0x12d000-0x12dfff:EW, 0x12e000-0x12efff:EW, 0x12f000-0x12ffff:S, 0x130000-0x130fff:S, 0x131000-0x131fff:S, 0x132000-0x132fff:S, 0x133000-0x133fff:S, 0x134000-0x134fff:S, 0x135000-0x135fff:S, 0x136000-0x136fff:S, 0x137000-0x137fff:S, 0x138000-0x138fff:S, 0x139000-0x139fff:S, 0x13a000-0x13afff:S, 0x13b000-0x13bfff:S, 0x13c000-0x13cfff:S, 0x13d000-0x13dfff:S, 0x13e000-0x13efff:S, 0x13f000-0x13ffff:S, 0x140000-0x140fff:S, 0x141000-0x141fff:S, 0x142000-0x142fff:S, 0x143000-0x143fff:EW, 0x144000-0x144fff:EW, 0x145000-0x145fff:EW, 0x146000-0x146fff:EW, 0x147000-0x147fff:EW, 0x148000-0x148fff:EW, 0x149000-0x149fff:EW, 0x14a000-0x14afff:EW, 0x14b000-0x14bfff:EW, 0x14c000-0x14cfff:EW, 0x14d000-0x14dfff:EW, 0x14e000-0x14efff:EW, 0x14f000-0x14ffff:EW, 0x150000-0x150fff:EW, 0x151000-0x151fff:EW, 0x152000-0x152fff:EW, 0x153000-0x153fff:EW, 0x154000-0x154fff:EW, 0x155000-0x155fff:EW, 0x156000-0x156fff:EW, 0x157000-0x157fff:EW, 0x158000-0x158fff:EW, 0x159000-0x159fff:EW, 0x15a000-0x15afff:EW, 0x15b000-0x15bfff:EW, 0x15c000-0x15cfff:EW, 0x15d000-0x15dfff:EW, 0x15e000-0x15efff:EW, 0x15f000-0x15ffff:EW, 0x160000-0x160fff:EW, 0x161000-0x161fff:EW, 0x162000-0x162fff:EW, 0x163000-0x163fff:EW, 0x164000-0x164fff:EW, 0x165000-0x165fff:EW, 0x166000-0x166fff:EW, 0x167000-0x167fff:EW, 0x168000-0x168fff:EW, 0x169000-0x169fff:EW, 0x16a000-0x16afff:EW, 0x16b000-0x16bfff:EW, 0x16c000-0x16cfff:EW, 0x16d000-0x16dfff:EW, 0x16e000-0x16efff:EW, 0x16f000-0x16ffff:EW, 0x170000-0x170fff:EW, 0x171000-0x171fff:EW, 0x172000-0x172fff:W, 0x173000-0x173fff:S, 0x174000-0x174fff:S, 0x175000-0x175fff:S, 0x176000-0x176fff:S, 0x177000-0x177fff:S, 0x178000-0x178fff:S, 0x179000-0x179fff:S, 0x17a000-0x17afff:S, 0x17b000-0x17bfff:S, 0x17c000-0x17cfff:S, 0x17d000-0x17dfff:S, 0x17e000-0x17efff:S, 0x17f000-0x17ffff:S, 0x180000-0x180fff:S, 0x181000-0x181fff:S, 0x182000-0x182fff:S, 0x183000-0x183fff:EW, 0x184000-0x184fff:EW, 0x185000-0x185fff:EW, 0x186000-0x186fff:EW, 0x187000-0x187fff:EW, 0x188000-0x188fff:EW, 0x189000-0x189fff:EW, 0x18a000-0x18afff:EW, 0x18b000-0x18bfff:EW, 0x18c000-0x18cfff:EW, 0x18d000-0x18dfff:EW, 0x18e000-0x18efff:EW, 0x18f000-0x18ffff:EW, 0x190000-0x190fff:EW, 0x191000-0x191fff:EW, 0x192000-0x192fff:EW, 0x193000-0x193fff:EW, 0x194000-0x194fff:EW, 0x195000-0x195fff:EW, 0x196000-0x196fff:EW, 0x197000-0x197fff:EW, 0x198000-0x198fff:EW, 0x199000-0x199fff:EW, 0x19a000-0x19afff:EW, 0x19b000-0x19bfff:EW, 0x19c000-0x19cfff:EW, 0x19d000-0x19dfff:EW, 0x19e000-0x19efff:EW, 0x19f000-0x19ffff:EW, 0x1a0000-0x1a0fff:EW, 0x1a1000-0x1a1fff:EW, 0x1a2000-0x1a2fff:EW, 0x1a3000-0x1a3fff:EW, 0x1a4000-0x1a4fff:EW, 0x1a5000-0x1a5fff:EW, 0x1a6000-0x1a6fff:EW, 0x1a7000-0x1a7fff:EW, 0x1a8000-0x1a8fff:EW, 0x1a9000-0x1a9fff:EW, 0x1aa000-0x1aafff:EW, 0x1ab000-0x1abfff:EW, 0x1ac000-0x1acfff:EW, 0x1ad000-0x1adfff:EW, 0x1ae000-0x1aefff:EW, 0x1af000-0x1affff:EW, 0x1b0000-0x1b0fff:EW, 0x1b1000-0x1b1fff:EW, 0x1b2000-0x1b2fff:EW, 0x1b3000-0x1b3fff:EW, 0x1b4000-0x1b4fff:EW, 0x1b5000-0x1b5fff:EW, 0x1b6000-0x1b6fff:EW, 0x1b7000-0x1b7fff:EW, 0x1b8000-0x1b8fff:EW, 0x1b9000-0x1b9fff:EW, 0x1ba000-0x1bafff:EW, 0x1bb000-0x1bbfff:EW, 0x1bc000-0x1bcfff:EW, 0x1bd000-0x1bdfff:EW, 0x1be000-0x1befff:EW, 0x1bf000-0x1bffff:EW, 0x1c0000-0x1c0fff:EW, 0x1c1000-0x1c1fff:EW, 0x1c2000-0x1c2fff:EW, 0x1c3000-0x1c3fff:EW, 0x1c4000-0x1c4fff:EW, 0x1c5000-0x1c5fff:EW, 0x1c6000-0x1c6fff:EW, 0x1c7000-0x1c7fff:EW, 0x1c8000-0x1c8fff:EW, 0x1c9000-0x1c9fff:EW, 0x1ca000-0x1cafff:EW, 0x1cb000-0x1cbfff:EW, 0x1cc000-0x1ccfff:EW, 0x1cd000-0x1cdfff:EW, 0x1ce000-0x1cefff:EW, 0x1cf000-0x1cffff:EW, 0x1d0000-0x1d0fff:EW, 0x1d1000-0x1d1fff:EW, 0x1d2000-0x1d2fff:EW, 0x1d3000-0x1d3fff:EW, 0x1d4000-0x1d4fff:EW, 0x1d5000-0x1d5fff:EW, 0x1d6000-0x1d6fff:EW, 0x1d7000-0x1d7fff:EW, 0x1d8000-0x1d8fff:EW, 0x1d9000-0x1d9fff:EW, 0x1da000-0x1dafff:EW, 0x1db000-0x1dbfff:EW, 0x1dc000-0x1dcfff:EW, 0x1dd000-0x1ddfff:EW, 0x1de000-0x1defff:EW, 0x1df000-0x1dffff:EW, 0x1e0000-0x1e0fff:EW, 0x1e1000-0x1e1fff:EW, 0x1e2000-0x1e2fff:EW, 0x1e3000-0x1e3fff:EW, 0x1e4000-0x1e4fff:EW, 0x1e5000-0x1e5fff:EW, 0x1e6000-0x1e6fff:EW, 0x1e7000-0x1e7fff:EW, 0x1e8000-0x1e8fff:EW, 0x1e9000-0x1e9fff:EW, 0x1ea000-0x1eafff:EW, 0x1eb000-0x1ebfff:EW, 0x1ec000-0x1ecfff:EW, 0x1ed000-0x1edfff:EW, 0x1ee000-0x1eefff:EW, 0x1ef000-0x1effff:EW, 0x1f0000-0x1f0fff:EW, 0x1f1000-0x1f1fff:EW, 0x1f2000-0x1f2fff:EW, 0x1f3000-0x1f3fff:EW, 0x1f4000-0x1f4fff:EW, 0x1f5000-0x1f5fff:W, 0x1f6000-0x1f6fff:W, 0x1f7000-0x1f7fff:S, 0x1f8000-0x1f8fff:S, 0x1f9000-0x1f9fff:S, 0x1fa000-0x1fafff:S, 0x1fb000-0x1fbfff:S, 0x1fc000-0x1fcfff:S, 0x1fd000-0x1fdfff:S, 0x1fe000-0x1fefff:S, 0x1ff000-0x1fffff:S, 0x200000-0x200fff:S, 0x201000-0x201fff:S, 0x202000-0x202fff:S, 0x203000-0x203fff:S, 0x204000-0x204fff:S, 0x205000-0x205fff:S, 0x206000-0x206fff:S, 0x207000-0x207fff:S, 0x208000-0x208fff:S, 0x209000-0x209fff:S, 0x20a000-0x20afff:S, 0x20b000-0x20bfff:S, 0x20c000-0x20cfff:S, 0x20d000-0x20dfff:S, 0x20e000-0x20efff:S, 0x20f000-0x20ffff:S, 0x210000-0x210fff:S, 0x211000-0x211fff:S, 0x212000-0x212fff:S, 0x213000-0x213fff:S, 0x214000-0x214fff:S, 0x215000-0x215fff:S, 0x216000-0x216fff:S, 0x217000-0x217fff:S, 0x218000-0x218fff:S, 0x219000-0x219fff:S, 0x21a000-0x21afff:S, 0x21b000-0x21bfff:S, 0x21c000-0x21cfff:S, 0x21d000-0x21dfff:S, 0x21e000-0x21efff:S, 0x21f000-0x21ffff:S, 0x220000-0x220fff:S, 0x221000-0x221fff:S, 0x222000-0x222fff:S, 0x223000-0x223fff:S, 0x224000-0x224fff:S, 0x225000-0x225fff:S, 0x226000-0x226fff:S, 0x227000-0x227fff:S, 0x228000-0x228fff:S, 0x229000-0x229fff:S, 0x22a000-0x22afff:S, 0x22b000-0x22bfff:S, 0x22c000-0x22cfff:S, 0x22d000-0x22dfff:S, 0x22e000-0x22efff:S, 0x22f000-0x22ffff:S, 0x230000-0x230fff:S, 0x231000-0x231fff:S, 0x232000-0x232fff:S, 0x233000-0x233fff:S, 0x234000-0x234fff:S, 0x235000-0x235fff:S, 0x236000-0x236fff:S, 0x237000-0x237fff:S, 0x238000-0x238fff:S, 0x239000-0x239fff:S, 0x23a000-0x23afff:S, 0x23b000-0x23bfff:S, 0x23c000-0x23cfff:S, 0x23d000-0x23dfff:S, 0x23e000-0x23efff:S, 0x23f000-0x23ffff:S, 0x240000-0x240fff:S, 0x241000-0x241fff:S, 0x242000-0x242fff:S, 0x243000-0x243fff:S, 0x244000-0x244fff:S, 0x245000-0x245fff:S, 0x246000-0x246fff:S, 0x247000-0x247fff:S, 0x248000-0x248fff:S, 0x249000-0x249fff:S, 0x24a000-0x24afff:S, 0x24b000-0x24bfff:S, 0x24c000-0x24cfff:S, 0x24d000-0x24dfff:EW, 0x24e000-0x24efff:EW, 0x24f000-0x24ffff:EW, 0x250000-0x250fff:EW, 0x251000-0x251fff:EW, 0x252000-0x252fff:EW, 0x253000-0x253fff:EW, 0x254000-0x254fff:EW, 0x255000-0x255fff:EW, 0x256000-0x256fff:EW, 0x257000-0x257fff:EW, 0x258000-0x258fff:EW, 0x259000-0x259fff:EW, 0x25a000-0x25afff:EW, 0x25b000-0x25bfff:EW, 0x25c000-0x25cfff:EW, 0x25d000-0x25dfff:EW, 0x25e000-0x25efff:EW, 0x25f000-0x25ffff:EW, 0x260000-0x260fff:EW, 0x261000-0x261fff:EW, 0x262000-0x262fff:EW, 0x263000-0x263fff:EW, 0x264000-0x264fff:EW, 0x265000-0x265fff:EW, 0x266000-0x266fff:EW, 0x267000-0x267fff:EW, 0x268000-0x268fff:EW, 0x269000-0x269fff:EW, 0x26a000-0x26afff:EW, 0x26b000-0x26bfff:EW, 0x26c000-0x26cfff:EW, 0x26d000-0x26dfff:EW, 0x26e000-0x26efff:EW, 0x26f000-0x26ffff:EW, 0x270000-0x270fff:EW, 0x271000-0x271fff:EW, 0x272000-0x272fff:EW, 0x273000-0x273fff:EW, 0x274000-0x274fff:EW, 0x275000-0x275fff:EW, 0x276000-0x276fff:EW, 0x277000-0x277fff:EW, 0x278000-0x278fff:EW, 0x279000-0x279fff:EW, 0x27a000-0x27afff:EW, 0x27b000-0x27bfff:EW, 0x27c000-0x27cfff:EW, 0x27d000-0x27dfff:EW, 0x27e000-0x27efff:EW, 0x27f000-0x27ffff:EW, 0x280000-0x280fff:EW, 0x281000-0x281fff:EW, 0x282000-0x282fff:EW, 0x283000-0x283fff:EW, 0x284000-0x284fff:EW, 0x285000-0x285fff:EW, 0x286000-0x286fff:EW, 0x287000-0x287fff:EW, 0x288000-0x288fff:EW, 0x289000-0x289fff:EW, 0x28a000-0x28afff:EW, 0x28b000-0x28bfff:EW, 0x28c000-0x28cfff:EW, 0x28d000-0x28dfff:EW, 0x28e000-0x28efff:EW, 0x28f000-0x28ffff:EW, 0x290000-0x290fff:EW, 0x291000-0x291fff:EW, 0x292000-0x292fff:EW, 0x293000-0x293fff:EW, 0x294000-0x294fff:EW, 0x295000-0x295fff:EW, 0x296000-0x296fff:EW, 0x297000-0x297fff:EW, 0x298000-0x298fff:EW, 0x299000-0x299fff:EW, 0x29a000-0x29afff:EW, 0x29b000-0x29bfff:EW, 0x29c000-0x29cfff:EW, 0x29d000-0x29dfff:EW, 0x29e000-0x29efff:EW, 0x29f000-0x29ffff:EW, 0x2a0000-0x2a0fff:EW, 0x2a1000-0x2a1fff:EW, 0x2a2000-0x2a2fff:EW, 0x2a3000-0x2a3fff:EW, 0x2a4000-0x2a4fff:EW, 0x2a5000-0x2a5fff:EW, 0x2a6000-0x2a6fff:EW, 0x2a7000-0x2a7fff:EW, 0x2a8000-0x2a8fff:EW, 0x2a9000-0x2a9fff:EW, 0x2aa000-0x2aafff:EW, 0x2ab000-0x2abfff:EW, 0x2ac000-0x2acfff:EW, 0x2ad000-0x2adfff:EW, 0x2ae000-0x2aefff:EW, 0x2af000-0x2affff:EW, 0x2b0000-0x2b0fff:EW, 0x2b1000-0x2b1fff:EW, 0x2b2000-0x2b2fff:EW, 0x2b3000-0x2b3fff:EW, 0x2b4000-0x2b4fff:EW, 0x2b5000-0x2b5fff:EW, 0x2b6000-0x2b6fff:EW, 0x2b7000-0x2b7fff:EW, 0x2b8000-0x2b8fff:EW, 0x2b9000-0x2b9fff:EW, 0x2ba000-0x2bafff:EW, 0x2bb000-0x2bbfff:EW, 0x2bc000-0x2bcfff:EW, 0x2bd000-0x2bdfff:EW, 0x2be000-0x2befff:EW, 0x2bf000-0x2bffff:EW, 0x2c0000-0x2c0fff:EW, 0x2c1000-0x2c1fff:EW, 0x2c2000-0x2c2fff:EW, 0x2c3000-0x2c3fff:EW, 0x2c4000-0x2c4fff:EW, 0x2c5000-0x2c5fff:EW, 0x2c6000-0x2c6fff:EW, 0x2c7000-0x2c7fff:EW, 0x2c8000-0x2c8fff:EW, 0x2c9000-0x2c9fff:EW, 0x2ca000-0x2cafff:EW, 0x2cb000-0x2cbfff:EW, 0x2cc000-0x2ccfff:EW, 0x2cd000-0x2cdfff:EW, 0x2ce000-0x2cefff:EW, 0x2cf000-0x2cffff:EW, 0x2d0000-0x2d0fff:EW, 0x2d1000-0x2d1fff:EW, 0x2d2000-0x2d2fff:EW, 0x2d3000-0x2d3fff:EW, 0x2d4000-0x2d4fff:EW, 0x2d5000-0x2d5fff:EW, 0x2d6000-0x2d6fff:EW, 0x2d7000-0x2d7fff:EW, 0x2d8000-0x2d8fff:EW, 0x2d9000-0x2d9fff:EW, 0x2da000-0x2dafff:EW, 0x2db000-0x2dbfff:EW, 0x2dc000-0x2dcfff:EW, 0x2dd000-0x2ddfff:EW, 0x2de000-0x2defff:EW, 0x2df000-0x2dffff:EW, 0x2e0000-0x2e0fff:EW, 0x2e1000-0x2e1fff:EW, 0x2e2000-0x2e2fff:EW, 0x2e3000-0x2e3fff:EW, 0x2e4000-0x2e4fff:EW, 0x2e5000-0x2e5fff:EW, 0x2e6000-0x2e6fff:EW, 0x2e7000-0x2e7fff:EW, 0x2e8000-0x2e8fff:EW, 0x2e9000-0x2e9fff:EW, 0x2ea000-0x2eafff:EW, 0x2eb000-0x2ebfff:EW, 0x2ec000-0x2ecfff:EW, 0x2ed000-0x2edfff:EW, 0x2ee000-0x2eefff:EW, 0x2ef000-0x2effff:EW, 0x2f0000-0x2f0fff:EW, 0x2f1000-0x2f1fff:EW, 0x2f2000-0x2f2fff:EW, 0x2f3000-0x2f3fff:EW, 0x2f4000-0x2f4fff:EW, 0x2f5000-0x2f5fff:EW, 0x2f6000-0x2f6fff:EW, 0x2f7000-0x2f7fff:EW, 0x2f8000-0x2f8fff:EW, 0x2f9000-0x2f9fff:EW, 0x2fa000-0x2fafff:EW, 0x2fb000-0x2fbfff:EW, 0x2fc000-0x2fcfff:EW, 0x2fd000-0x2fdfff:EW, 0x2fe000-0x2fefff:EW, 0x2ff000-0x2fffff:EW, 0x300000-0x300fff:EW, 0x301000-0x301fff:EW, 0x302000-0x302fff:EW, 0x303000-0x303fff:EW, 0x304000-0x304fff:EW, 0x305000-0x305fff:EW, 0x306000-0x306fff:EW, 0x307000-0x307fff:EW, 0x308000-0x308fff:EW, 0x309000-0x309fff:EW, 0x30a000-0x30afff:EW, 0x30b000-0x30bfff:EW, 0x30c000-0x30cfff:EW, 0x30d000-0x30dfff:EW, 0x30e000-0x30efff:EW, 0x30f000-0x30ffff:EW, 0x310000-0x310fff:EW, 0x311000-0x311fff:EW, 0x312000-0x312fff:EW, 0x313000-0x313fff:EW, 0x314000-0x314fff:EW, 0x315000-0x315fff:EW, 0x316000-0x316fff:EW, 0x317000-0x317fff:EW, 0x318000-0x318fff:EW, 0x319000-0x319fff:EW, 0x31a000-0x31afff:EW, 0x31b000-0x31bfff:EW, 0x31c000-0x31cfff:EW, 0x31d000-0x31dfff:EW, 0x31e000-0x31efff:EW, 0x31f000-0x31ffff:EW, 0x320000-0x320fff:EW, 0x321000-0x321fff:EW, 0x322000-0x322fff:EW, 0x323000-0x323fff:EW, 0x324000-0x324fff:EW, 0x325000-0x325fff:EW, 0x326000-0x326fff:EW, 0x327000-0x327fff:EW, 0x328000-0x328fff:EW, 0x329000-0x329fff:EW, 0x32a000-0x32afff:EW, 0x32b000-0x32bfff:EW, 0x32c000-0x32cfff:EW, 0x32d000-0x32dfff:EW, 0x32e000-0x32efff:EW, 0x32f000-0x32ffff:EW, 0x330000-0x330fff:EW, 0x331000-0x331fff:EW, 0x332000-0x332fff:EW, 0x333000-0x333fff:EW, 0x334000-0x334fff:EW, 0x335000-0x335fff:EW, 0x336000-0x336fff:EW, 0x337000-0x337fff:EW, 0x338000-0x338fff:EW, 0x339000-0x339fff:EW, 0x33a000-0x33afff:EW, 0x33b000-0x33bfff:EW, 0x33c000-0x33cfff:EW, 0x33d000-0x33dfff:EW, 0x33e000-0x33efff:EW, 0x33f000-0x33ffff:EW, 0x340000-0x340fff:EW, 0x341000-0x341fff:EW, 0x342000-0x342fff:EW, 0x343000-0x343fff:EW, 0x344000-0x344fff:EW, 0x345000-0x345fff:EW, 0x346000-0x346fff:EW, 0x347000-0x347fff:EW, 0x348000-0x348fff:EW, 0x349000-0x349fff:EW, 0x34a000-0x34afff:EW, 0x34b000-0x34bfff:EW, 0x34c000-0x34cfff:EW, 0x34d000-0x34dfff:EW, 0x34e000-0x34efff:EW, 0x34f000-0x34ffff:EW, 0x350000-0x350fff:EW, 0x351000-0x351fff:EW, 0x352000-0x352fff:EW, 0x353000-0x353fff:EW, 0x354000-0x354fff:EW, 0x355000-0x355fff:EW, 0x356000-0x356fff:EW, 0x357000-0x357fff:EW, 0x358000-0x358fff:EW, 0x359000-0x359fff:EW, 0x35a000-0x35afff:EW, 0x35b000-0x35bfff:EW, 0x35c000-0x35cfff:EW, 0x35d000-0x35dfff:EW, 0x35e000-0x35efff:EW, 0x35f000-0x35ffff:EW, 0x360000-0x360fff:EW, 0x361000-0x361fff:EW, 0x362000-0x362fff:EW, 0x363000-0x363fff:EW, 0x364000-0x364fff:EW, 0x365000-0x365fff:EW, 0x366000-0x366fff:EW, 0x367000-0x367fff:EW, 0x368000-0x368fff:EW, 0x369000-0x369fff:EW, 0x36a000-0x36afff:EW, 0x36b000-0x36bfff:EW, 0x36c000-0x36cfff:EW, 0x36d000-0x36dfff:EW, 0x36e000-0x36efff:EW, 0x36f000-0x36ffff:EW, 0x370000-0x370fff:EW, 0x371000-0x371fff:EW, 0x372000-0x372fff:EW, 0x373000-0x373fff:EW, 0x374000-0x374fff:EW, 0x375000-0x375fff:EW, 0x376000-0x376fff:EW, 0x377000-0x377fff:EW, 0x378000-0x378fff:EW, 0x379000-0x379fff:EW, 0x37a000-0x37afff:EW, 0x37b000-0x37bfff:EW, 0x37c000-0x37cfff:EW, 0x37d000-0x37dfff:EW, 0x37e000-0x37efff:EW, 0x37f000-0x37ffff:EW, 0x380000-0x380fff:EW, 0x381000-0x381fff:EW, 0x382000-0x382fff:EW, 0x383000-0x383fff:EW, 0x384000-0x384fff:EW, 0x385000-0x385fff:EW, 0x386000-0x386fff:EW, 0x387000-0x387fff:EW, 0x388000-0x388fff:EW, 0x389000-0x389fff:EW, 0x38a000-0x38afff:EW, 0x38b000-0x38bfff:EW, 0x38c000-0x38cfff:EW, 0x38d000-0x38dfff:EW, 0x38e000-0x38efff:EW, 0x38f000-0x38ffff:EW, 0x390000-0x390fff:EW, 0x391000-0x391fff:EW, 0x392000-0x392fff:EW, 0x393000-0x393fff:EW, 0x394000-0x394fff:EW, 0x395000-0x395fff:EW, 0x396000-0x396fff:EW, 0x397000-0x397fff:EW, 0x398000-0x398fff:EW, 0x399000-0x399fff:EW, 0x39a000-0x39afff:EW, 0x39b000-0x39bfff:EW, 0x39c000-0x39cfff:EW, 0x39d000-0x39dfff:EW, 0x39e000-0x39efff:EW, 0x39f000-0x39ffff:EW, 0x3a0000-0x3a0fff:EW, 0x3a1000-0x3a1fff:EW, 0x3a2000-0x3a2fff:EW, 0x3a3000-0x3a3fff:EW, 0x3a4000-0x3a4fff:EW, 0x3a5000-0x3a5fff:EW, 0x3a6000-0x3a6fff:EW, 0x3a7000-0x3a7fff:EW, 0x3a8000-0x3a8fff:EW, 0x3a9000-0x3a9fff:EW, 0x3aa000-0x3aafff:EW, 0x3ab000-0x3abfff:EW, 0x3ac000-0x3acfff:EW, 0x3ad000-0x3adfff:EW, 0x3ae000-0x3aefff:EW, 0x3af000-0x3affff:EW, 0x3b0000-0x3b0fff:EW, 0x3b1000-0x3b1fff:EW, 0x3b2000-0x3b2fff:EW, 0x3b3000-0x3b3fff:EW, 0x3b4000-0x3b4fff:EW, 0x3b5000-0x3b5fff:EW, 0x3b6000-0x3b6fff:EW, 0x3b7000-0x3b7fff:EW, 0x3b8000-0x3b8fff:EW, 0x3b9000-0x3b9fff:EW, 0x3ba000-0x3bafff:EW, 0x3bb000-0x3bbfff:EW, 0x3bc000-0x3bcfff:EW, 0x3bd000-0x3bdfff:EW, 0x3be000-0x3befff:EW, 0x3bf000-0x3bffff:EW, 0x3c0000-0x3c0fff:EW, 0x3c1000-0x3c1fff:EW, 0x3c2000-0x3c2fff:EW, 0x3c3000-0x3c3fff:EW, 0x3c4000-0x3c4fff:EW, 0x3c5000-0x3c5fff:EW, 0x3c6000-0x3c6fff:EW, 0x3c7000-0x3c7fff:EW, 0x3c8000-0x3c8fff:EW, 0x3c9000-0x3c9fff:EW, 0x3ca000-0x3cafff:EW, 0x3cb000-0x3cbfff:EW, 0x3cc000-0x3ccfff:EW, 0x3cd000-0x3cdfff:EW, 0x3ce000-0x3cefff:EW, 0x3cf000-0x3cffff:EW, 0x3d0000-0x3d0fff:EW, 0x3d1000-0x3d1fff:EW, 0x3d2000-0x3d2fff:EW, 0x3d3000-0x3d3fff:EW, 0x3d4000-0x3d4fff:EW, 0x3d5000-0x3d5fff:EW, 0x3d6000-0x3d6fff:EW, 0x3d7000-0x3d7fff:EW, 0x3d8000-0x3d8fff:EW, 0x3d9000-0x3d9fff:EW, 0x3da000-0x3dafff:EW, 0x3db000-0x3dbfff:EW, 0x3dc000-0x3dcfff:EW, 0x3dd000-0x3ddfff:EW, 0x3de000-0x3defff:EW, 0x3df000-0x3dffff:EW, 0x3e0000-0x3e0fff:EW, 0x3e1000-0x3e1fff:EW, 0x3e2000-0x3e2fff:EW, 0x3e3000-0x3e3fff:EW, 0x3e4000-0x3e4fff:EW, 0x3e5000-0x3e5fff:EW, 0x3e6000-0x3e6fff:EW, 0x3e7000-0x3e7fff:EW, 0x3e8000-0x3e8fff:EW, 0x3e9000-0x3e9fff:EW, 0x3ea000-0x3eafff:EW, 0x3eb000-0x3ebfff:EW, 0x3ec000-0x3ecfff:EW, 0x3ed000-0x3edfff:EW, 0x3ee000-0x3eefff:EW, 0x3ef000-0x3effff:EW, 0x3f0000-0x3f0fff:EW, 0x3f1000-0x3f1fff:EW, 0x3f2000-0x3f2fff:EW, 0x3f3000-0x3f3fff:EW, 0x3f4000-0x3f4fff:EW, 0x3f5000-0x3f5fff:EW, 0x3f6000-0x3f6fff:EW, 0x3f7000-0x3f7fff:EW, 0x3f8000-0x3f8fff:EW, 0x3f9000-0x3f9fff:EW, 0x3fa000-0x3fafff:EW, 0x3fb000-0x3fbfff:W, 0x3fc000-0x3fcfff:W, 0x3fd000-0x3fdfff:W, 0x3fe000-0x3fefff:W, 0x3ff000-0x3fffff:W, 0x400000-0x400fff:W, 0x401000-0x401fff:W, 0x402000-0x402fff:W, 0x403000-0x403fff:W, 0x404000-0x404fff:W, 0x405000-0x405fff:W, 0x406000-0x406fff:S, 0x407000-0x407fff:S, 0x408000-0x408fff:S, 0x409000-0x409fff:S, 0x40a000-0x40afff:S, 0x40b000-0x40bfff:S, 0x40c000-0x40cfff:S, 0x40d000-0x40dfff:S, 0x40e000-0x40efff:S, 0x40f000-0x40ffff:S, 0x410000-0x410fff:S, 0x411000-0x411fff:S, 0x412000-0x412fff:S, 0x413000-0x413fff:S, 0x414000-0x414fff:S, 0x415000-0x415fff:S, 0x416000-0x416fff:S, 0x417000-0x417fff:S, 0x418000-0x418fff:S, 0x419000-0x419fff:S, 0x41a000-0x41afff:S, 0x41b000-0x41bfff:S, 0x41c000-0x41cfff:S, 0x41d000-0x41dfff:S, 0x41e000-0x41efff:S, 0x41f000-0x41ffff:S, 0x420000-0x420fff:S, 0x421000-0x421fff:S, 0x422000-0x422fff:S, 0x423000-0x423fff:S, 0x424000-0x424fff:S, 0x425000-0x425fff:S, 0x426000-0x426fff:S, 0x427000-0x427fff:S, 0x428000-0x428fff:S, 0x429000-0x429fff:S, 0x42a000-0x42afff:S, 0x42b000-0x42bfff:S, 0x42c000-0x42cfff:S, 0x42d000-0x42dfff:S, 0x42e000-0x42efff:S, 0x42f000-0x42ffff:S, 0x430000-0x430fff:S, 0x431000-0x431fff:S, 0x432000-0x432fff:S, 0x433000-0x433fff:S, 0x434000-0x434fff:S, 0x435000-0x435fff:S, 0x436000-0x436fff:S, 0x437000-0x437fff:S, 0x438000-0x438fff:S, 0x439000-0x439fff:S, 0x43a000-0x43afff:S, 0x43b000-0x43bfff:S, 0x43c000-0x43cfff:S, 0x43d000-0x43dfff:S, 0x43e000-0x43efff:S, 0x43f000-0x43ffff:S, 0x440000-0x440fff:S, 0x441000-0x441fff:S, 0x442000-0x442fff:S, 0x443000-0x443fff:S, 0x444000-0x444fff:S, 0x445000-0x445fff:S, 0x446000-0x446fff:S, 0x447000-0x447fff:S, 0x448000-0x448fff:S, 0x449000-0x449fff:S, 0x44a000-0x44afff:S, 0x44b000-0x44bfff:S, 0x44c000-0x44cfff:S, 0x44d000-0x44dfff:S, 0x44e000-0x44efff:S, 0x44f000-0x44ffff:S, 0x450000-0x450fff:S, 0x451000-0x451fff:S, 0x452000-0x452fff:S, 0x453000-0x453fff:S, 0x454000-0x454fff:S, 0x455000-0x455fff:S, 0x456000-0x456fff:S, 0x457000-0x457fff:S, 0x458000-0x458fff:S, 0x459000-0x459fff:S, 0x45a000-0x45afff:S, 0x45b000-0x45bfff:S, 0x45c000-0x45cfff:S, 0x45d000-0x45dfff:S, 0x45e000-0x45efff:S, 0x45f000-0x45ffff:S, 0x460000-0x460fff:S, 0x461000-0x461fff:S, 0x462000-0x462fff:S, 0x463000-0x463fff:S, 0x464000-0x464fff:S, 0x465000-0x465fff:S, 0x466000-0x466fff:S, 0x467000-0x467fff:S, 0x468000-0x468fff:S, 0x469000-0x469fff:S, 0x46a000-0x46afff:S, 0x46b000-0x46bfff:S, 0x46c000-0x46cfff:S, 0x46d000-0x46dfff:S, 0x46e000-0x46efff:S, 0x46f000-0x46ffff:S, 0x470000-0x470fff:S, 0x471000-0x471fff:S, 0x472000-0x472fff:S, 0x473000-0x473fff:S, 0x474000-0x474fff:S, 0x475000-0x475fff:S, 0x476000-0x476fff:S, 0x477000-0x477fff:S, 0x478000-0x478fff:S, 0x479000-0x479fff:S, 0x47a000-0x47afff:S, 0x47b000-0x47bfff:S, 0x47c000-0x47cfff:S, 0x47d000-0x47dfff:S, 0x47e000-0x47efff:S, 0x47f000-0x47ffff:S, 0x480000-0x480fff:S, 0x481000-0x481fff:S, 0x482000-0x482fff:S, 0x483000-0x483fff:S, 0x484000-0x484fff:S, 0x485000-0x485fff:S, 0x486000-0x486fff:S, 0x487000-0x487fff:S, 0x488000-0x488fff:S, 0x489000-0x489fff:S, 0x48a000-0x48afff:S, 0x48b000-0x48bfff:S, 0x48c000-0x48cfff:S, 0x48d000-0x48dfff:S, 0x48e000-0x48efff:S, 0x48f000-0x48ffff:S, 0x490000-0x490fff:S, 0x491000-0x491fff:S, 0x492000-0x492fff:S, 0x493000-0x493fff:S, 0x494000-0x494fff:S, 0x495000-0x495fff:S, 0x496000-0x496fff:S, 0x497000-0x497fff:S, 0x498000-0x498fff:S, 0x499000-0x499fff:S, 0x49a000-0x49afff:S, 0x49b000-0x49bfff:S, 0x49c000-0x49cfff:S, 0x49d000-0x49dfff:S, 0x49e000-0x49efff:S, 0x49f000-0x49ffff:S, 0x4a0000-0x4a0fff:S, 0x4a1000-0x4a1fff:S, 0x4a2000-0x4a2fff:S, 0x4a3000-0x4a3fff:S, 0x4a4000-0x4a4fff:S, 0x4a5000-0x4a5fff:S, 0x4a6000-0x4a6fff:S, 0x4a7000-0x4a7fff:S, 0x4a8000-0x4a8fff:S, 0x4a9000-0x4a9fff:S, 0x4aa000-0x4aafff:S, 0x4ab000-0x4abfff:S, 0x4ac000-0x4acfff:S, 0x4ad000-0x4adfff:S, 0x4ae000-0x4aefff:S, 0x4af000-0x4affff:S, 0x4b0000-0x4b0fff:S, 0x4b1000-0x4b1fff:S, 0x4b2000-0x4b2fff:S, 0x4b3000-0x4b3fff:S, 0x4b4000-0x4b4fff:S, 0x4b5000-0x4b5fff:S, 0x4b6000-0x4b6fff:S, 0x4b7000-0x4b7fff:S, 0x4b8000-0x4b8fff:S, 0x4b9000-0x4b9fff:S, 0x4ba000-0x4bafff:S, 0x4bb000-0x4bbfff:S, 0x4bc000-0x4bcfff:S, 0x4bd000-0x4bdfff:S, 0x4be000-0x4befff:S, 0x4bf000-0x4bffff:S, 0x4c0000-0x4c0fff:S, 0x4c1000-0x4c1fff:S, 0x4c2000-0x4c2fff:S, 0x4c3000-0x4c3fff:S, 0x4c4000-0x4c4fff:S, 0x4c5000-0x4c5fff:S, 0x4c6000-0x4c6fff:S, 0x4c7000-0x4c7fff:S, 0x4c8000-0x4c8fff:S, 0x4c9000-0x4c9fff:S, 0x4ca000-0x4cafff:S, 0x4cb000-0x4cbfff:S, 0x4cc000-0x4ccfff:S, 0x4cd000-0x4cdfff:S, 0x4ce000-0x4cefff:S, 0x4cf000-0x4cffff:S, 0x4d0000-0x4d0fff:S, 0x4d1000-0x4d1fff:S, 0x4d2000-0x4d2fff:S, 0x4d3000-0x4d3fff:S, 0x4d4000-0x4d4fff:S, 0x4d5000-0x4d5fff:S, 0x4d6000-0x4d6fff:S, 0x4d7000-0x4d7fff:S, 0x4d8000-0x4d8fff:S, 0x4d9000-0x4d9fff:S, 0x4da000-0x4dafff:S, 0x4db000-0x4dbfff:S, 0x4dc000-0x4dcfff:S, 0x4dd000-0x4ddfff:S, 0x4de000-0x4defff:S, 0x4df000-0x4dffff:S, 0x4e0000-0x4e0fff:S, 0x4e1000-0x4e1fff:S, 0x4e2000-0x4e2fff:S, 0x4e3000-0x4e3fff:S, 0x4e4000-0x4e4fff:S, 0x4e5000-0x4e5fff:S, 0x4e6000-0x4e6fff:S, 0x4e7000-0x4e7fff:S, 0x4e8000-0x4e8fff:S, 0x4e9000-0x4e9fff:S, 0x4ea000-0x4eafff:S, 0x4eb000-0x4ebfff:S, 0x4ec000-0x4ecfff:S, 0x4ed000-0x4edfff:S, 0x4ee000-0x4eefff:S, 0x4ef000-0x4effff:S, 0x4f0000-0x4f0fff:S, 0x4f1000-0x4f1fff:S, 0x4f2000-0x4f2fff:S, 0x4f3000-0x4f3fff:S, 0x4f4000-0x4f4fff:S, 0x4f5000-0x4f5fff:S, 0x4f6000-0x4f6fff:S, 0x4f7000-0x4f7fff:S, 0x4f8000-0x4f8fff:S, 0x4f9000-0x4f9fff:S, 0x4fa000-0x4fafff:S, 0x4fb000-0x4fbfff:S, 0x4fc000-0x4fcfff:S, 0x4fd000-0x4fdfff:S, 0x4fe000-0x4fefff:S, 0x4ff000-0x4fffff:S, 0x500000-0x500fff:EW, 0x501000-0x501fff:E, 0x502000-0x502fff:E, 0x503000-0x503fff:E, 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0x533000-0x533fff:E, 0x534000-0x534fff:E, 0x535000-0x535fff:E, 0x536000-0x536fff:E, 0x537000-0x537fff:E, 0x538000-0x538fff:E, 0x539000-0x539fff:E, 0x53a000-0x53afff:E, 0x53b000-0x53bfff:E, 0x53c000-0x53cfff:E, 0x53d000-0x53dfff:E, 0x53e000-0x53efff:E, 0x53f000-0x53ffff:E, 0x540000-0x540fff:S, 0x541000-0x541fff:S, 0x542000-0x542fff:S, 0x543000-0x543fff:S, 0x544000-0x544fff:S, 0x545000-0x545fff:S, 0x546000-0x546fff:S, 0x547000-0x547fff:S, 0x548000-0x548fff:S, 0x549000-0x549fff:S, 0x54a000-0x54afff:S, 0x54b000-0x54bfff:S, 0x54c000-0x54cfff:S, 0x54d000-0x54dfff:S, 0x54e000-0x54efff:S, 0x54f000-0x54ffff:S, 0x550000-0x550fff:S, 0x551000-0x551fff:S, 0x552000-0x552fff:S, 0x553000-0x553fff:S, 0x554000-0x554fff:S, 0x555000-0x555fff:S, 0x556000-0x556fff:S, 0x557000-0x557fff:S, 0x558000-0x558fff:S, 0x559000-0x559fff:S, 0x55a000-0x55afff:S, 0x55b000-0x55bfff:S, 0x55c000-0x55cfff:S, 0x55d000-0x55dfff:S, 0x55e000-0x55efff:S, 0x55f000-0x55ffff:S, 0x560000-0x560fff:S, 0x561000-0x561fff:S, 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0x6da000-0x6dafff:S, 0x6db000-0x6dbfff:S, 0x6dc000-0x6dcfff:S, 0x6dd000-0x6ddfff:S, 0x6de000-0x6defff:S, 0x6df000-0x6dffff:S, 0x6e0000-0x6e0fff:S, 0x6e1000-0x6e1fff:S, 0x6e2000-0x6e2fff:S, 0x6e3000-0x6e3fff:S, 0x6e4000-0x6e4fff:S, 0x6e5000-0x6e5fff:S, 0x6e6000-0x6e6fff:S, 0x6e7000-0x6e7fff:S, 0x6e8000-0x6e8fff:S, 0x6e9000-0x6e9fff:S, 0x6ea000-0x6eafff:S, 0x6eb000-0x6ebfff:S, 0x6ec000-0x6ecfff:S, 0x6ed000-0x6edfff:S, 0x6ee000-0x6eefff:S, 0x6ef000-0x6effff:S, 0x6f0000-0x6f0fff:S, 0x6f1000-0x6f1fff:S, 0x6f2000-0x6f2fff:S, 0x6f3000-0x6f3fff:S, 0x6f4000-0x6f4fff:S, 0x6f5000-0x6f5fff:S, 0x6f6000-0x6f6fff:S, 0x6f7000-0x6f7fff:S, 0x6f8000-0x6f8fff:S, 0x6f9000-0x6f9fff:S, 0x6fa000-0x6fafff:S, 0x6fb000-0x6fbfff:S, 0x6fc000-0x6fcfff:S, 0x6fd000-0x6fdfff:S, 0x6fe000-0x6fefff:S, 0x6ff000-0x6fffff:S, 0x700000-0x700fff:S, 0x701000-0x701fff:S, 0x702000-0x702fff:S, 0x703000-0x703fff:S, 0x704000-0x704fff:S, 0x705000-0x705fff:S, 0x706000-0x706fff:S, 0x707000-0x707fff:S, 0x708000-0x708fff:S, 0x709000-0x709fff:S, 0x70a000-0x70afff:S, 0x70b000-0x70bfff:S, 0x70c000-0x70cfff:S, 0x70d000-0x70dfff:S, 0x70e000-0x70efff:S, 0x70f000-0x70ffff:S, 0x710000-0x710fff:S, 0x711000-0x711fff:S, 0x712000-0x712fff:S, 0x713000-0x713fff:S, 0x714000-0x714fff:S, 0x715000-0x715fff:S, 0x716000-0x716fff:S, 0x717000-0x717fff:S, 0x718000-0x718fff:S, 0x719000-0x719fff:S, 0x71a000-0x71afff:S, 0x71b000-0x71bfff:S, 0x71c000-0x71cfff:S, 0x71d000-0x71dfff:S, 0x71e000-0x71efff:S, 0x71f000-0x71ffff:S, 0x720000-0x720fff:S, 0x721000-0x721fff:S, 0x722000-0x722fff:S, 0x723000-0x723fff:S, 0x724000-0x724fff:S, 0x725000-0x725fff:S, 0x726000-0x726fff:S, 0x727000-0x727fff:S, 0x728000-0x728fff:S, 0x729000-0x729fff:S, 0x72a000-0x72afff:S, 0x72b000-0x72bfff:S, 0x72c000-0x72cfff:S, 0x72d000-0x72dfff:S, 0x72e000-0x72efff:S, 0x72f000-0x72ffff:S, 0x730000-0x730fff:S, 0x731000-0x731fff:S, 0x732000-0x732fff:S, 0x733000-0x733fff:S, 0x734000-0x734fff:S, 0x735000-0x735fff:S, 0x736000-0x736fff:S, 0x737000-0x737fff:S, 0x738000-0x738fff:S, 0x739000-0x739fff:S, 0x73a000-0x73afff:S, 0x73b000-0x73bfff:S, 0x73c000-0x73cfff:S, 0x73d000-0x73dfff:S, 0x73e000-0x73efff:S, 0x73f000-0x73ffff:S, 0x740000-0x740fff:S, 0x741000-0x741fff:S, 0x742000-0x742fff:S, 0x743000-0x743fff:S, 0x744000-0x744fff:S, 0x745000-0x745fff:S, 0x746000-0x746fff:S, 0x747000-0x747fff:S, 0x748000-0x748fff:S, 0x749000-0x749fff:S, 0x74a000-0x74afff:S, 0x74b000-0x74bfff:S, 0x74c000-0x74cfff:S, 0x74d000-0x74dfff:S, 0x74e000-0x74efff:S, 0x74f000-0x74ffff:S, 0x750000-0x750fff:S, 0x751000-0x751fff:S, 0x752000-0x752fff:S, 0x753000-0x753fff:S, 0x754000-0x754fff:S, 0x755000-0x755fff:S, 0x756000-0x756fff:S, 0x757000-0x757fff:S, 0x758000-0x758fff:S, 0x759000-0x759fff:S, 0x75a000-0x75afff:S, 0x75b000-0x75bfff:S, 0x75c000-0x75cfff:S, 0x75d000-0x75dfff:S, 0x75e000-0x75efff:S, 0x75f000-0x75ffff:S, 0x760000-0x760fff:S, 0x761000-0x761fff:S, 0x762000-0x762fff:S, 0x763000-0x763fff:S, 0x764000-0x764fff:S, 0x765000-0x765fff:S, 0x766000-0x766fff:S, 0x767000-0x767fff:S, 0x768000-0x768fff:S, 0x769000-0x769fff:S, 0x76a000-0x76afff:S, 0x76b000-0x76bfff:S, 0x76c000-0x76cfff:S, 0x76d000-0x76dfff:S, 0x76e000-0x76efff:S, 0x76f000-0x76ffff:S, 0x770000-0x770fff:S, 0x771000-0x771fff:S, 0x772000-0x772fff:S, 0x773000-0x773fff:S, 0x774000-0x774fff:S, 0x775000-0x775fff:S, 0x776000-0x776fff:S, 0x777000-0x777fff:S, 0x778000-0x778fff:S, 0x779000-0x779fff:S, 0x77a000-0x77afff:S, 0x77b000-0x77bfff:S, 0x77c000-0x77cfff:S, 0x77d000-0x77dfff:S, 0x77e000-0x77efff:S, 0x77f000-0x77ffff:S, 0x780000-0x780fff:S, 0x781000-0x781fff:S, 0x782000-0x782fff:S, 0x783000-0x783fff:S, 0x784000-0x784fff:S, 0x785000-0x785fff:S, 0x786000-0x786fff:S, 0x787000-0x787fff:S, 0x788000-0x788fff:S, 0x789000-0x789fff:S, 0x78a000-0x78afff:S, 0x78b000-0x78bfff:S, 0x78c000-0x78cfff:S, 0x78d000-0x78dfff:S, 0x78e000-0x78efff:S, 0x78f000-0x78ffff:S, 0x790000-0x790fff:S, 0x791000-0x791fff:S, 0x792000-0x792fff:S, 0x793000-0x793fff:S, 0x794000-0x794fff:S, 0x795000-0x795fff:S, 0x796000-0x796fff:S, 0x797000-0x797fff:S, 0x798000-0x798fff:S, 0x799000-0x799fff:S, 0x79a000-0x79afff:S, 0x79b000-0x79bfff:S, 0x79c000-0x79cfff:S, 0x79d000-0x79dfff:S, 0x79e000-0x79efff:S, 0x79f000-0x79ffff:S, 0x7a0000-0x7a0fff:S, 0x7a1000-0x7a1fff:S, 0x7a2000-0x7a2fff:S, 0x7a3000-0x7a3fff:S, 0x7a4000-0x7a4fff:S, 0x7a5000-0x7a5fff:S, 0x7a6000-0x7a6fff:S, 0x7a7000-0x7a7fff:S, 0x7a8000-0x7a8fff:S, 0x7a9000-0x7a9fff:S, 0x7aa000-0x7aafff:S, 0x7ab000-0x7abfff:S, 0x7ac000-0x7acfff:S, 0x7ad000-0x7adfff:S, 0x7ae000-0x7aefff:S, 0x7af000-0x7affff:S, 0x7b0000-0x7b0fff:S, 0x7b1000-0x7b1fff:S, 0x7b2000-0x7b2fff:S, 0x7b3000-0x7b3fff:S, 0x7b4000-0x7b4fff:S, 0x7b5000-0x7b5fff:S, 0x7b6000-0x7b6fff:S, 0x7b7000-0x7b7fff:S, 0x7b8000-0x7b8fff:S, 0x7b9000-0x7b9fff:S, 0x7ba000-0x7bafff:S, 0x7bb000-0x7bbfff:S, 0x7bc000-0x7bcfff:S, 0x7bd000-0x7bdfff:S, 0x7be000-0x7befff:S, 0x7bf000-0x7bffff:S, 0x7c0000-0x7c0fff:S, 0x7c1000-0x7c1fff:S, 0x7c2000-0x7c2fff:S, 0x7c3000-0x7c3fff:S, 0x7c4000-0x7c4fff:S, 0x7c5000-0x7c5fff:S, 0x7c6000-0x7c6fff:S, 0x7c7000-0x7c7fff:S, 0x7c8000-0x7c8fff:S, 0x7c9000-0x7c9fff:S, 0x7ca000-0x7cafff:S, 0x7cb000-0x7cbfff:S, 0x7cc000-0x7ccfff:S, 0x7cd000-0x7cdfff:EW, 0x7ce000-0x7cefff:S, 0x7cf000-0x7cffff:S, 0x7d0000-0x7d0fff:S, 0x7d1000-0x7d1fff:S, 0x7d2000-0x7d2fff:S, 0x7d3000-0x7d3fff:S, 0x7d4000-0x7d4fff:S, 0x7d5000-0x7d5fff:S, 0x7d6000-0x7d6fff:S, 0x7d7000-0x7d7fff:S, 0x7d8000-0x7d8fff:S, 0x7d9000-0x7d9fff:S, 0x7da000-0x7dafff:S, 0x7db000-0x7dbfff:S, 0x7dc000-0x7dcfff:S, 0x7dd000-0x7ddfff:S, 0x7de000-0x7defff:S, 0x7df000-0x7dffff:S, 0x7e0000-0x7e0fff:S, 0x7e1000-0x7e1fff:S, 0x7e2000-0x7e2fff:EW, 0x7e3000-0x7e3fff:S, 0x7e4000-0x7e4fff:S, 0x7e5000-0x7e5fff:S, 0x7e6000-0x7e6fff:S, 0x7e7000-0x7e7fff:S, 0x7e8000-0x7e8fff:S, 0x7e9000-0x7e9fff:S, 0x7ea000-0x7eafff:S, 0x7eb000-0x7ebfff:S, 0x7ec000-0x7ecfff:S, 0x7ed000-0x7edfff:S, 0x7ee000-0x7eefff:S, 0x7ef000-0x7effff:S, 0x7f0000-0x7f0fff:S, 0x7f1000-0x7f1fff:S, 0x7f2000-0x7f2fff:S, 0x7f3000-0x7f3fff:S, 0x7f4000-0x7f4fff:S, 0x7f5000-0x7f5fff:S, 0x7f6000-0x7f6fff:S, 0x7f7000-0x7f7fff:S, 0x7f8000-0x7f8fff:S, 0x7f9000-0x7f9fff:S, 0x7fa000-0x7fafff:S, 0x7fb000-0x7fbfff:S, 0x7fc000-0x7fcfff:S, 0x7fd000-0x7fdfff:S, 0x7fe000-0x7fefff:S, 0x7ff000-0x7fffff:S Erase/write done. Verifying flash... VERIFIED. Restoring MMIO space at 0x7fdce00358a0 Restoring PCI config space for 00:1f:0 reg 0xdc

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MSI H87-G43 flash success
by Alexandr Paliy 01 Mar '17

01 Mar '17

Hello and thanks for your software. Motherboard: MSI H87-G43 ( https://msi.com/Motherboard/H87-G43.html ) Old BIOS version: 2.2 New BIOS version: 2.A (2.10) Remarks: Just followed your instructions, created backup of old ROM and then wrote new image. No troubles at all. Did not save logs of flashrom, so sorry if you would like to see them.

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