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[commit] r880 - trunk
by svn＠flashrom.org 22 Jan '10

22 Jan '10

Author: stepan Date: 2010-01-22 11:49:33 +0100 (Fri, 22 Jan 2010) New Revision: 880 Modified: trunk/Makefile Log: backout unintentional chunk. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2010-01-22 02:53:30 UTC (rev 879) +++ trunk/Makefile 2010-01-22 10:49:33 UTC (rev 880) @@ -221,7 +221,7 @@ rm -f .dependencies .features .libdeps dep: - $(CC) $(CPPFLAGS) $(SVNDEF) -MM *.c > .dependencies + @$(CC) $(CPPFLAGS) $(SVNDEF) -MM *.c > .dependencies strip: $(PROGRAM) $(STRIP) $(STRIP_ARGS) $(PROGRAM)

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Re: [flashrom] [PATCH] Dediprog SF100 support
by Carl-Daniel Hailfinger 22 Jan '10

22 Jan '10

Hi Stefan, On 14.01.2010 14:08, Stefan Reinauer wrote: > On 1/14/10 5:24 AM, Carl-Daniel Hailfinger wrote: > >> Dediprog SF100 support. Very fragile, lots of stuff guessed from logs. >> May explode spontaneously. >> >> I think I know enough to actually use it to ID the chip, but that's it. >> A USB log with which includes writing an image from the original >> software (pretty much any image) would help clear up a few ambiguities. >> >> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> >> >> > > Awesome..! > Thanks! > It seems to be talking to the device and get through the initialization, > but it ends up with no "SPI" chips being "incompatible": > Actually, that's intentional. That way I could avoid hooking up the driver in the SPI core (which would mean I'd have to create dummy command functions) and still get initialization testing. > MacPro:flashrom stepan$ ./flashrom -p dediprog -V > flashrom v0.9.1-r862 > Found USB device (0483:dada). > Sending RDID > Receiving response: 20 20 16 10 00 00 00 00 00 00 00 00 00 00 00 00 Which flash chip is this? The response suggests a ST M25P32 flash chip, but the extra "10" at the end looks rather strange. > Not sure if this code is intended: > >> /* URB 9. Command Receive Device String. */ >> memset(buf, 0, sizeof(buf)); >> ret = usb_control_msg(dediprog_handle, 0xc2, 0x8, 0xff, 0xff, buf, >> 0x10, DEFAULT_TIMEOUT); >> if ((ret != 0x10) || !memcmp(buf, "SF100 V:2.1.1 ", 0x10)) { >> > This would bail out if the version string is "SF100 V:2.1.1 " > Right, that's a bug. Considering that this was coded at 5am, I'm surprised there was only one bug. >> msg_perr("Unexpected response 3!\n"); >> return 1; >> } >> > Here I added this: > >> buf[0xf]=0; >> msg_pdbg("Found a Dediprog %s\n", buf); >> That potentially truncates the string. I'll use strnlen/strncpy to write the string to a separate buffer which is big enough. > Which got me: > > flashrom v0.9.1-r862 > Found USB device (0483:dada). > Found a Dediprog SF100 V:3.1.8 > Hm. The best idea might be to match against the model name and the major version. > Let me know if you need more information > A log with SniffUsb 2.0.0006 from http://www.pcausa.com/Utilities/UsbSnoop/ would be very appreciated. I wrote a tool to decode the log generated with that SniffUsb version. Feel free to point me to a private upload via IRC (the log may contain programmer serial numbers). What the log should contain: - Plugging in the SF100 - Starting the programming software - SPI device detection/probe - Full read - Erase (optional) - Full write (optional) - No custom settings (but you can do a probe-only run with changed settings in another file if you want to help decode a few more commands) It would be cool if you could use a small SPI chip (4 Mbit or so) because the logs roughly have 4x-20x the size of the flash chip. Please do not use a SST chip (log would be at least 100x the size of the flash chip). Pretty much all other vendors are OK. I will post an updated patch soon. Regards, Carl-Daniel -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

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[commit] r879 - trunk
by svn＠flashrom.org 22 Jan '10

22 Jan '10

Author: hailfinger Date: 2010-01-22 03:53:30 +0100 (Fri, 22 Jan 2010) New Revision: 879 Modified: trunk/dediprog.c trunk/spi.c Log: Add write support. Speed up reads by a factor of 4 by switching block size from 4 to 16. Add support for 4 byte RDID. Add USB error decoding via usb_strerror. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/dediprog.c =================================================================== --- trunk/dediprog.c 2010-01-21 20:26:30 UTC (rev 878) +++ trunk/dediprog.c 2010-01-22 02:53:30 UTC (rev 879) @@ -145,8 +145,9 @@ int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { - /* Maximum read length is 4 bytes for now. */ - return spi_read_chunked(flash, buf, start, len, 4); + msg_pspew("%s, start=0x%x, len=0x%x\n", __func__, start, len); + /* Chosen read length is 16 bytes for now. */ + return spi_read_chunked(flash, buf, start, len, 16); } int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, @@ -154,19 +155,22 @@ { int ret; + msg_pspew("%s, writecnt=%i, readcnt=%i\n", __func__, writecnt, readcnt); /* Paranoid, but I don't want to be blamed if anything explodes. */ - if ((writecnt != 1) && (writecnt != 4)) + if (writecnt > 5) { msg_perr("Untested writecnt=%i, aborting.\n", writecnt); - if (readcnt > 4) + return 1; + } + /* 16 byte reads should work. */ + if (readcnt > 16) { msg_perr("Untested readcnt=%i, aborting.\n", readcnt); - if ((readcnt == 0) && (writecnt != 1)) - msg_perr("Untested writecnt=%i, readcnt=%i combination, " - "aborting.\n", writecnt, readcnt); + return 1; + } ret = usb_control_msg(dediprog_handle, 0x42, 0x1, 0xff, readcnt ? 0x1 : 0x0, (char *)writearr, writecnt, DEFAULT_TIMEOUT); if (ret != writecnt) { - msg_perr("Command Send SPI failed, ret=%i, expected %i!\n", - ret, writecnt); + msg_perr("Send SPI failed, expected %i, got %i %s!\n", + writecnt, ret, usb_strerror()); return 1; } if (!readcnt) @@ -174,8 +178,8 @@ memset(readarr, 0, readcnt); ret = usb_control_msg(dediprog_handle, 0xc2, 0x01, 0xbb8, 0x0000, (char *)readarr, readcnt, DEFAULT_TIMEOUT); if (ret != readcnt) { - msg_perr("Command Receive SPI failed, ret=%i, expected %i!\n", - ret, readcnt); + msg_perr("Receive SPI failed, expected %i, got %i %s!\n", + readcnt, ret, usb_strerror()); return 1; } return 0; Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2010-01-21 20:26:30 UTC (rev 878) +++ trunk/spi.c 2010-01-22 02:53:30 UTC (rev 879) @@ -335,6 +335,9 @@ #if BUSPIRATE_SPI_SUPPORT == 1 case SPI_CONTROLLER_BUSPIRATE: #endif +#if DEDIPROG_SUPPORT == 1 + case SPI_CONTROLLER_DEDIPROG: +#endif return probe_spi_rdid_generic(flash, 4); default: printf_debug("4b ID not supported on this SPI controller\n");

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FOSDEM DevRoom schedule completed.
by Luc Verhaegen 22 Jan '10

22 Jan '10

http://www.coreboot.org/FOSDEM_2010 Schedule is now complete: * 13:00 : Peter Stuge - coreboot introduction. * 14:00 : Peter Stuge - coreboot and PC technical details. * 15:00 : Rudolf Marek - ACPI and Suspend/Resume under coreboot. * 16:00 : Rudolf Marek - coreboot board porting. * 17:00 : Carl-Daniel Hailfinger - Flashrom. * 18:00 : Luc Verhaegen - Flash Enable BIOS Reverse Engineering. Hope to see tons of people there. Luc Verhaegen.

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[PATCH] Avoid bogus gcc warning
by Michael Karcher 21 Jan '10

21 Jan '10

recent gcc/glibc combinations warn about ignoring the fgets() result. The problem exists on Ubuntu 9.10 with current updates. This "fix" of the non-problem (as I check ferror() afterwards) should even be a (negligible) performance optimization. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- dmi.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/dmi.c b/dmi.c index ca75461..d165e9f 100644 --- a/dmi.c +++ b/dmi.c @@ -79,8 +79,8 @@ void dmi_init(void) printf_debug("DMI pipe open error\n"); goto out_free; } - fgets(answerbuf, DMI_MAX_ANSWER_LEN, dmidecode_pipe); - if (ferror(dmidecode_pipe)) + if (!fgets(answerbuf, DMI_MAX_ANSWER_LEN, dmidecode_pipe) && + ferror(dmidecode_pipe)) { printf_debug("DMI pipe read error\n"); pclose(dmidecode_pipe); -- 1.6.5

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[commit] r878 - trunk
by svn＠flashrom.org 21 Jan '10

21 Jan '10

Author: stepan Date: 2010-01-21 21:26:30 +0100 (Thu, 21 Jan 2010) New Revision: 878 Modified: trunk/Makefile Log: This patch fixes the use of CFLAGS and CPPFLAGS in the flashrom makefile Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2010-01-20 20:55:53 UTC (rev 877) +++ trunk/Makefile 2010-01-21 20:26:30 UTC (rev 878) @@ -33,11 +33,11 @@ STRIP_ARGS = -s endif ifeq ($(OS_ARCH), Darwin) -CFLAGS += -I/usr/local/include -LDFLAGS += -framework IOKit -framework DirectIO -L/usr/local/lib +CPPFLAGS += -I/opt/local/include -I/usr/local/include +LDFLAGS += -framework IOKit -framework DirectIO -L/opt/local/lib -L/usr/local/lib endif ifeq ($(OS_ARCH), FreeBSD) -CFLAGS += -I/usr/local/include +CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib endif @@ -221,7 +221,7 @@ rm -f .dependencies .features .libdeps dep: - @$(CC) $(CPPFLAGS) $(SVNDEF) -MM *.c > .dependencies + $(CC) $(CPPFLAGS) $(SVNDEF) -MM *.c > .dependencies strip: $(PROGRAM) $(STRIP) $(STRIP_ARGS) $(PROGRAM) @@ -230,7 +230,7 @@ @printf "Checking for a C compiler... " @$(shell ( echo "int main(int argc, char **argv)"; \ echo "{ return 0; }"; ) > .test.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .test.c -o .test >/dev/null && \ + @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test.c -o .test >/dev/null && \ echo "found." || ( echo "not found."; \ rm -f .test.c .test; exit 1) @rm -f .test.c .test @@ -242,7 +242,7 @@ echo "struct pci_access *pacc;"; \ echo "int main(int argc, char **argv)"; \ echo "{ pacc = pci_alloc(); return 0; }"; ) > .test.c ) - @$(CC) -c $(CFLAGS) .test.c -o .test.o >/dev/null 2>&1 && \ + @$(CC) -c $(CPPFLAGS) $(CFLAGS) .test.c -o .test.o >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; echo; \ echo "Please install libpci headers (package pciutils-devel)."; \ echo "See README for more information."; echo; \ @@ -251,7 +251,7 @@ @$(shell ( echo "#include <pci/pci.h>"; \ echo "int main(int argc, char **argv)"; \ echo "{ return 0; }"; ) > .test1.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 -lpci $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 -lpci $(LIBS) >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; echo; \ echo "Please install libpci (package pciutils)."; \ echo "See README for more information."; echo; \ @@ -282,7 +282,7 @@ echo "struct ftdi_context *ftdic = NULL;"; \ echo "int main(int argc, char **argv)"; \ echo "{ return ftdi_init(ftdic); }"; ) > .featuretest.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest $(FTDILIBS) $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest $(FTDILIBS) $(LIBS) >/dev/null 2>&1 && \ ( echo "found."; echo "FTDISUPPORT := yes" >> .features.tmp ) || \ ( echo "not found."; echo "FTDISUPPORT := no" >> .features.tmp ) @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features

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[Patch] Boards: Remove it8705_rom_write_enable.
by Luc Verhaegen 20 Jan '10

20 Jan '10

4 8

[Patch] Boards: Add max_rom_decode_parallel entry to board enable table.
by Luc Verhaegen 20 Jan '10

20 Jan '10

2 4

Re: [flashrom] [PATCH] Convert chips to block erasers: SST
by Sean Nelson 20 Jan '10

20 Jan '10

Convert the following chips to block_erasers: SST28SF040A SST29EE010 SST29LE010 SST29EE020A SST29LE020 SST39SF010A SST39SF020A SST39SF040 SST39VF512 SST39VF010 SST39VF020 SST39VF040 SST39VF080 SST49LF002A/B SST49LF003A/B SST49LF004C SST49LF008A SST49LF008C SST49LF016C SST49LF020 SST49LF020A SST49LF040 SST49LF040B SST49LF080A SST49LF160C Extend sst28sf040 to include chip and sector functions for block_eraser. Extend sst49lfxxxc to include chip, sector, block erasers functions for block_erasers. Extend sst_fwhub to include chip and sector functions for block_erasers. Add copyrights to changed files. Killed erase_sst_fwhub. Killed erase_49lfxxxc. NULL A/A mux mode full chip erasers. Ignore block locks in erase/write. Change comments from "PP mode" to "A/A mux mode" Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

2 2

[commit] r877 - trunk
by svn＠flashrom.org 20 Jan '10

20 Jan '10

Author: snelson Date: 2010-01-20 21:55:53 +0100 (Wed, 20 Jan 2010) New Revision: 877 Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/sst28sf040.c trunk/sst49lfxxxc.c trunk/sst_fwhub.c Log: Convert the following chips to block_erasers: SST28SF040A SST29EE010 SST29LE010 SST29EE020A SST29LE020 SST39SF010A SST39SF020A SST39SF040 SST39VF512 SST39VF010 SST39VF020 SST39VF040 SST39VF080 SST49LF002A/B SST49LF003A/B SST49LF004C SST49LF008A SST49LF008C SST49LF016C SST49LF020 SST49LF020A SST49LF040 SST49LF040B SST49LF080A SST49LF160C Extend sst28sf040 to include chip and sector functions for block_eraser. Extend sst49lfxxxc to include chip, sector, block erasers functions for block_erasers. Extend sst_fwhub to include chip and sector functions for block_erasers. Add copyrights to changed files. Killed erase_sst_fwhub. Killed erase_49lfxxxc. NULL A/A mux mode full chip erasers. Ignore block locks in erase/write. Change comments from "PP mode" to "A/A mux mode" Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/chipdrivers.h =================================================================== --- trunk/chipdrivers.h 2010-01-20 14:45:07 UTC (rev 876) +++ trunk/chipdrivers.h 2010-01-20 20:55:53 UTC (rev 877) @@ -126,7 +126,8 @@ /* sst28sf040.c */ int probe_28sf040(struct flashchip *flash); -int erase_28sf040(struct flashchip *flash); +int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen); +int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size); int write_28sf040(struct flashchip *flash, uint8_t *buf); /* sst39sf020.c */ @@ -140,12 +141,16 @@ /* sst49lfxxxc.c */ int probe_49lfxxxc(struct flashchip *flash); int erase_49lfxxxc(struct flashchip *flash); +int erase_sector_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int sector_size); +int erase_block_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int sector_size); +int erase_chip_49lfxxxc(struct flashchip *flash, unsigned int addr, unsigned int blocksize); int write_49lfxxxc(struct flashchip *flash, uint8_t *buf); /* sst_fwhub.c */ int probe_sst_fwhub(struct flashchip *flash); int erase_sst_fwhub(struct flashchip *flash); int erase_sst_fwhub_block(struct flashchip *flash, unsigned int offset, unsigned int page_size); +int erase_sst_fwhub_sector(struct flashchip *flash, unsigned int offset, unsigned int page_size); int write_sst_fwhub(struct flashchip *flash, uint8_t *buf); /* w39v040c.c */ Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-20 14:45:07 UTC (rev 876) +++ trunk/flashchips.c 2010-01-20 20:55:53 UTC (rev 877) @@ -3480,7 +3480,7 @@ .eraseblocks = { {1024 * 1024, 1} }, - .block_erase = NULL, /* 30 D0, only in PP mode */ + .block_erase = NULL, /* 30 D0, only in A/A mux mode */ }, }, .write = write_lhf00l04, @@ -3754,7 +3754,17 @@ .tested = TEST_UNTESTED, .probe = probe_28sf040, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst28sf040.c) */ - .erase = erase_28sf040, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {128, 4096} }, + .block_erase = erase_sector_28sf040, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_28sf040, + } + }, .write = write_28sf040, .read = read_memmapped, }, @@ -3767,10 +3777,17 @@ .model_id = SST_29EE010, .total_size = 128, .page_size = 128, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -3786,7 +3803,14 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -3799,10 +3823,17 @@ .model_id = SST_29EE020A, .total_size = 256, .page_size = 128, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -3818,7 +3849,14 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = 10, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -3831,10 +3869,20 @@ .model_id = SST_39SF010, .total_size = 128, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3847,10 +3895,20 @@ .model_id = SST_39SF020, .total_size = 256, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3863,10 +3921,20 @@ .model_id = SST_39SF040, .total_size = 512, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3879,10 +3947,20 @@ .model_id = SST_39VF512, .total_size = 64, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns*/ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3895,10 +3973,20 @@ .model_id = SST_39VF010, .total_size = 128, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3911,10 +3999,20 @@ .model_id = SST_39VF020, .total_size = 256, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3930,7 +4028,17 @@ .tested = TEST_OK_PROBE, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3946,7 +4054,20 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_49f002, .read = read_memmapped, }, @@ -3960,10 +4081,23 @@ .total_size = 256, .page_size = 16 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ - .erase = erase_sst_fwhub, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = erase_sst_fwhub_sector, + }, { + .eraseblocks = { {16 * 1024, 16} }, + .block_erase = erase_sst_fwhub_block, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ + } + }, .write = write_sst_fwhub, .read = read_memmapped, }, @@ -3980,7 +4114,20 @@ .tested = TEST_OK_PR, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ - .erase = erase_sst_fwhub, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 96} }, + .block_erase = erase_sst_fwhub_sector, + }, { + .eraseblocks = { {64 * 1024, 6} }, + .block_erase = erase_sst_fwhub_block, + }, { + .eraseblocks = { {384 * 1024, 1} }, + .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ + } + }, .write = write_sst_fwhub, .read = read_memmapped, }, @@ -4011,7 +4158,7 @@ .block_erase = erase_sst_fwhub_block, /* same as erase_block_jedec, but with unlock */ }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = NULL, /* AA 55 80 AA 55 10, only in PP mode */ + .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ }, }, .write = write_sst_fwhub, @@ -4029,7 +4176,22 @@ .tested = TEST_UNTESTED, .probe = probe_49lfxxxc, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ - .erase = erase_49lfxxxc, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_49lfxxxc, + }, { + .eraseblocks = { + {64 * 1024, 7}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_49lfxxxc, + } + }, .write = write_49lfxxxc, .read = read_memmapped, }, @@ -4043,10 +4205,23 @@ .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ - .erase = erase_sst_fwhub, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = erase_sst_fwhub_sector, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = erase_sst_fwhub_block, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = NULL, /* AA 55 80 AA 55 10, only in A/A mux mode */ + } + }, .write = write_sst_fwhub, .read = read_memmapped, }, @@ -4062,7 +4237,22 @@ .tested = TEST_UNTESTED, .probe = probe_49lfxxxc, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ - .erase = erase_49lfxxxc, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = erase_sector_49lfxxxc, + }, { + .eraseblocks = { + {64 * 1024, 15}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_49lfxxxc, + } + }, .write = write_49lfxxxc, .read = read_memmapped, }, @@ -4075,10 +4265,25 @@ .model_id = SST_49LF016C, .total_size = 2048, .page_size = 4 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_49lfxxxc, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ - .erase = erase_49lfxxxc, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = erase_sector_49lfxxxc, + }, { + .eraseblocks = { + {64 * 1024, 31}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_49lfxxxc, + } + }, .write = write_49lfxxxc, .read = read_memmapped, }, @@ -4094,7 +4299,20 @@ .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_49lf040, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {16 * 1024, 16} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = NULL, + } + }, .write = write_49lf040, .read = read_memmapped, }, @@ -4107,10 +4325,23 @@ .model_id = SST_49LF020A, .total_size = 256, .page_size = 4 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_49lf040, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {16 * 1024, 16} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = NULL, + } + }, .write = write_49lf040, .read = read_memmapped, }, @@ -4123,10 +4354,23 @@ .model_id = SST_49LF040, .total_size = 512, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ - .erase = erase_49lf040, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = NULL, + } + }, .write = write_49lf040, .read = read_memmapped, }, @@ -4140,11 +4384,24 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, - .probe = probe_sst_fwhub, + .tested = TEST_UNTESTED, + .probe = probe_jedec, .probe_timing = 1, /* 150ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ - .erase = erase_sst_fwhub, - .write = write_sst_fwhub, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = NULL, + } + }, + .write = write_49lf040, .read = read_memmapped, }, @@ -4156,10 +4413,23 @@ .model_id = SST_49LF080A, .total_size = 1024, .page_size = 4096, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_49lf040, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = NULL, + } + }, .write = write_49lf040, .read = read_memmapped, }, @@ -4172,10 +4442,26 @@ .model_id = SST_49LF160C, .total_size = 2048, .page_size = 4 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_49lfxxxc, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .erase = erase_49lfxxxc, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = erase_sector_49lfxxxc, + }, { + .eraseblocks = { + {64 * 1024, 31}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_49lfxxxc, + } + }, .write = write_49lfxxxc, .read = read_memmapped, }, Modified: trunk/sst28sf040.c =================================================================== --- trunk/sst28sf040.c 2010-01-20 14:45:07 UTC (rev 876) +++ trunk/sst28sf040.c 2010-01-20 20:55:53 UTC (rev 877) @@ -3,6 +3,7 @@ * * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2005 coresystems GmbH <stepan(a)openbios.org> + * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -50,7 +51,7 @@ chip_readb(bios + 0x041A); } -static int erase_sector_28sf040(struct flashchip *flash, unsigned long address, int sector_size) +int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size) { chipaddr bios = flash->virtual_memory; @@ -67,7 +68,7 @@ return 0; } -static int write_sector_28sf040(chipaddr bios, uint8_t *src, chipaddr dst, +int write_sector_28sf040(chipaddr bios, uint8_t *src, chipaddr dst, unsigned int page_size) { int i; @@ -162,3 +163,13 @@ return 0; } + +int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen) +{ + if ((addr != 0) || (blocklen != flash->total_size * 1024)) { + fprintf(stderr, "%s called with incorrect arguments\n", + __func__); + return -1; + } + return erase_28sf040(flash); +} Modified: trunk/sst49lfxxxc.c =================================================================== --- trunk/sst49lfxxxc.c 2010-01-20 14:45:07 UTC (rev 876) +++ trunk/sst49lfxxxc.c 2010-01-20 20:55:53 UTC (rev 877) @@ -3,6 +3,7 @@ * * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2005-2007 coresystems GmbH + * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -35,6 +36,15 @@ #define STATUS_ESS (1 << 6) #define STATUS_WSMS (1 << 7) +int unlock_block_49lfxxxc(struct flashchip *flash, unsigned long address, unsigned char bits) +{ + unsigned long lock = flash->virtual_registers + address + 2; + printf_debug("lockbits at address=0x%08lx is 0x%01x\n", lock, chip_readb(lock)); + chip_writeb(bits, lock); + + return 0; +} + static int write_lockbits_49lfxxxc(struct flashchip *flash, unsigned char bits) { chipaddr registers = flash->virtual_registers; @@ -72,7 +82,7 @@ return 0; } -static int erase_sector_49lfxxxc(struct flashchip *flash, unsigned long address, int sector_size) +int erase_sector_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int sector_size) { unsigned char status; chipaddr bios = flash->virtual_memory; @@ -97,6 +107,31 @@ return 0; } +int erase_block_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int block_size) +{ + unsigned char status; + chipaddr bios = flash->virtual_memory; + + chip_writeb(BLOCK_ERASE, bios); + chip_writeb(ERASE, bios + address); + + do { + status = chip_readb(bios); + if (status & (STATUS_ESS | STATUS_BPS)) { + printf("block erase FAILED at address=0x%08lx status=0x%01x\n", bios + address, status); + chip_writeb(CLEAR_STATUS, bios); + return (-1); + } + } while (!(status & STATUS_WSMS)); + chip_writeb(RESET, bios); + + if (check_erased_range(flash, address, block_size)) { + fprintf(stderr, "ERASE FAILED!\n"); + return -1; + } + return 0; +} + static int write_sector_49lfxxxc(chipaddr bios, uint8_t *src, chipaddr dst, unsigned int page_size) { Modified: trunk/sst_fwhub.c =================================================================== --- trunk/sst_fwhub.c 2010-01-20 14:45:07 UTC (rev 876) +++ trunk/sst_fwhub.c 2010-01-20 20:55:53 UTC (rev 877) @@ -3,6 +3,7 @@ * * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2009 Kontron Modular Computers + * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -114,6 +115,25 @@ return 0; } +int erase_sst_fwhub_sector(struct flashchip *flash, unsigned int offset, unsigned int page_size) +{ + uint8_t blockstatus = clear_sst_fwhub_block_lock(flash, offset); + + if (blockstatus) { + printf("Sector lock clearing failed, not erasing sector " + "at 0x%06x\n", offset); + return 1; + } + + if (erase_sector_jedec(flash, offset, page_size)) { + fprintf(stderr, "ERASE FAILED!\n"); + return -1; + } + toggle_ready_jedec(flash->virtual_memory); + + return 0; +} + int erase_sst_fwhub(struct flashchip *flash) { int i;

1 0

[PATCH] Replace PCI_OK/PCI_NT by OK/NT
by Michael Karcher 20 Jan '10

20 Jan '10

We don't need to duplicate OK and NT as PCI_OK and PCI_NT if the symbols are already there (defined for the chipset enable table). Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- drkaiser.c | 2 +- flash.h | 2 -- gfxnvidia.c | 46 +++++++++++++++++++++++----------------------- nic3com.c | 20 ++++++++++---------- satasii.c | 12 ++++++------ 5 files changed, 40 insertions(+), 42 deletions(-) diff --git a/drkaiser.c b/drkaiser.c index f13c13e..572fee3 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -29,7 +29,7 @@ #define PCI_MAGIC_DRKAISER_VALUE 0xa971 struct pcidev_status drkaiser_pcidev[] = { - {0x1803, 0x5057, PCI_OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"}, + {0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"}, {}, }; diff --git a/flash.h b/flash.h index 308e19b..ace2b1b 100644 --- a/flash.h +++ b/flash.h @@ -298,8 +298,6 @@ void internal_delay(int usecs); #if NEED_PCI == 1 /* pcidev.c */ -#define PCI_OK 0 -#define PCI_NT 1 /* Not tested */ extern uint32_t io_base_addr; extern struct pci_access *pacc; diff --git a/gfxnvidia.c b/gfxnvidia.c index cc66ace..ec41279 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -28,29 +28,29 @@ uint8_t *nvidia_bar; struct pcidev_status gfx_nvidia[] = { - {0x10de, 0x0010, PCI_NT, "NVIDIA", "Mutara V08 [NV2]" }, - {0x10de, 0x0018, PCI_NT, "NVIDIA", "RIVA 128" }, - {0x10de, 0x0020, PCI_NT, "NVIDIA", "RIVA TNT" }, - {0x10de, 0x0028, PCI_NT, "NVIDIA", "RIVA TNT2/TNT2 Pro" }, - {0x10de, 0x0029, PCI_NT, "NVIDIA", "RIVA TNT2 Ultra" }, - {0x10de, 0x002c, PCI_NT, "NVIDIA", "Vanta/Vanta LT" }, - {0x10de, 0x002d, PCI_OK, "NVIDIA", "RIVA TNT2 Model 64/Model 64 Pro" }, - {0x10de, 0x00a0, PCI_NT, "NVIDIA", "Aladdin TNT2" }, - {0x10de, 0x0100, PCI_NT, "NVIDIA", "GeForce 256" }, - {0x10de, 0x0101, PCI_NT, "NVIDIA", "GeForce DDR" }, - {0x10de, 0x0103, PCI_NT, "NVIDIA", "Quadro" }, - {0x10de, 0x0110, PCI_NT, "NVIDIA", "GeForce2 MX" }, - {0x10de, 0x0111, PCI_NT, "NVIDIA", "GeForce2 MX" }, - {0x10de, 0x0112, PCI_NT, "NVIDIA", "GeForce2 GO" }, - {0x10de, 0x0113, PCI_NT, "NVIDIA", "Quadro2 MXR" }, - {0x10de, 0x0150, PCI_NT, "NVIDIA", "GeForce2 GTS/Pro" }, - {0x10de, 0x0151, PCI_NT, "NVIDIA", "GeForce2 GTS" }, - {0x10de, 0x0152, PCI_NT, "NVIDIA", "GeForce2 Ultra" }, - {0x10de, 0x0153, PCI_NT, "NVIDIA", "Quadro2 Pro" }, - {0x10de, 0x0200, PCI_NT, "NVIDIA", "GeForce 3 nFX" }, - {0x10de, 0x0201, PCI_NT, "NVIDIA", "GeForce 3 nFX" }, - {0x10de, 0x0202, PCI_NT, "NVIDIA", "GeForce 3 nFX Ultra" }, - {0x10de, 0x0203, PCI_NT, "NVIDIA", "Quadro 3 DDC" }, + {0x10de, 0x0010, NT, "NVIDIA", "Mutara V08 [NV2]" }, + {0x10de, 0x0018, NT, "NVIDIA", "RIVA 128" }, + {0x10de, 0x0020, NT, "NVIDIA", "RIVA TNT" }, + {0x10de, 0x0028, NT, "NVIDIA", "RIVA TNT2/TNT2 Pro" }, + {0x10de, 0x0029, NT, "NVIDIA", "RIVA TNT2 Ultra" }, + {0x10de, 0x002c, NT, "NVIDIA", "Vanta/Vanta LT" }, + {0x10de, 0x002d, OK, "NVIDIA", "RIVA TNT2 Model 64/Model 64 Pro" }, + {0x10de, 0x00a0, NT, "NVIDIA", "Aladdin TNT2" }, + {0x10de, 0x0100, NT, "NVIDIA", "GeForce 256" }, + {0x10de, 0x0101, NT, "NVIDIA", "GeForce DDR" }, + {0x10de, 0x0103, NT, "NVIDIA", "Quadro" }, + {0x10de, 0x0110, NT, "NVIDIA", "GeForce2 MX" }, + {0x10de, 0x0111, NT, "NVIDIA", "GeForce2 MX" }, + {0x10de, 0x0112, NT, "NVIDIA", "GeForce2 GO" }, + {0x10de, 0x0113, NT, "NVIDIA", "Quadro2 MXR" }, + {0x10de, 0x0150, NT, "NVIDIA", "GeForce2 GTS/Pro" }, + {0x10de, 0x0151, NT, "NVIDIA", "GeForce2 GTS" }, + {0x10de, 0x0152, NT, "NVIDIA", "GeForce2 Ultra" }, + {0x10de, 0x0153, NT, "NVIDIA", "Quadro2 Pro" }, + {0x10de, 0x0200, NT, "NVIDIA", "GeForce 3 nFX" }, + {0x10de, 0x0201, NT, "NVIDIA", "GeForce 3 nFX" }, + {0x10de, 0x0202, NT, "NVIDIA", "GeForce 3 nFX Ultra" }, + {0x10de, 0x0203, NT, "NVIDIA", "Quadro 3 DDC" }, {}, }; diff --git a/nic3com.c b/nic3com.c index a4878d2..d3dcce5 100644 --- a/nic3com.c +++ b/nic3com.c @@ -36,20 +36,20 @@ uint16_t id; struct pcidev_status nics_3com[] = { /* 3C90xB */ - {0x10b7, 0x9055, PCI_OK, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"}, - {0x10b7, 0x9001, PCI_NT, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4" }, - {0x10b7, 0x9004, PCI_OK, "3COM", "3C90xB: PCI 10BASE-T (TPO)" }, - {0x10b7, 0x9005, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO)" }, - {0x10b7, 0x9006, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2 (TPC)" }, - {0x10b7, 0x900a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FL" }, - {0x10b7, 0x905a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FX" }, - {0x10b7, 0x9058, PCI_OK, "3COM", "3C905B: Cyclone 10/100/BNC" }, + {0x10b7, 0x9055, OK, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"}, + {0x10b7, 0x9001, NT, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4" }, + {0x10b7, 0x9004, OK, "3COM", "3C90xB: PCI 10BASE-T (TPO)" }, + {0x10b7, 0x9005, NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO)" }, + {0x10b7, 0x9006, NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2 (TPC)" }, + {0x10b7, 0x900a, NT, "3COM", "3C90xB: PCI 10BASE-FL" }, + {0x10b7, 0x905a, NT, "3COM", "3C90xB: PCI 10BASE-FX" }, + {0x10b7, 0x9058, OK, "3COM", "3C905B: Cyclone 10/100/BNC" }, /* 3C905C */ - {0x10b7, 0x9200, PCI_OK, "3COM", "3C905C: EtherLink 10/100 PCI (TX)" }, + {0x10b7, 0x9200, OK, "3COM", "3C905C: EtherLink 10/100 PCI (TX)" }, /* 3C980C */ - {0x10b7, 0x9805, PCI_NT, "3COM", "3C980C: EtherLink Server 10/100 PCI (TX)" }, + {0x10b7, 0x9805, NT, "3COM", "3C980C: EtherLink Server 10/100 PCI (TX)" }, {}, }; diff --git a/satasii.c b/satasii.c index 90995c9..90d38bd 100644 --- a/satasii.c +++ b/satasii.c @@ -30,12 +30,12 @@ uint8_t *sii_bar; uint16_t id; struct pcidev_status satas_sii[] = { - {0x1095, 0x0680, PCI_OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"}, - {0x1095, 0x3112, PCI_OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"}, - {0x1095, 0x3114, PCI_OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"}, - {0x1095, 0x3124, PCI_NT, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"}, - {0x1095, 0x3132, PCI_OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"}, - {0x1095, 0x3512, PCI_NT, "Silicon Image", "SiI 3512 [SATALink/SATARaid] SATA Ctrl"}, + {0x1095, 0x0680, OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"}, + {0x1095, 0x3112, OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"}, + {0x1095, 0x3114, OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"}, + {0x1095, 0x3124, NT, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"}, + {0x1095, 0x3132, OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"}, + {0x1095, 0x3512, NT, "Silicon Image", "SiI 3512 [SATALink/SATARaid] SATA Ctrl"}, {}, }; -- 1.6.5

1 0

[commit] r876 - trunk
by svn＠flashrom.org 20 Jan '10

20 Jan '10

Author: libv Date: 2010-01-20 15:45:07 +0100 (Wed, 20 Jan 2010) New Revision: 876 Modified: trunk/board_enable.c Log: Boards: Remove it8705_rom_write_enable. Should be functionally the same as it8705f_write_enable_2e. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2010-01-20 14:45:03 UTC (rev 875) +++ trunk/board_enable.c 2010-01-20 14:45:07 UTC (rev 876) @@ -205,8 +205,35 @@ return 0; } +/** + * + */ +static int it8705f_write_enable(uint8_t port, const char *name) +{ + enter_conf_mode_ite(port); + sio_mask(port, 0x24, 0x04, 0x04); /* Flash ROM I/F Writes Enable */ + exit_conf_mode_ite(port); + return 0; +} + /** + * Suited for: + * - AOpen vKM400Am-S: VIA KM400 + VT8237 + IT8705F. + * - Biostar P4M80-M4: VIA P4M800 + VT8237 + IT8705AF + * - Elitegroup K7S6A: SiS745 + ITE IT8705F + * - Elitegroup K7VTA3: VIA Apollo KT266/A/333 + VIA VT8235 + ITE IT8705F + * - GIGABYTE GA-7VT600: VIA KT600 + VT8237 + IT8705 + * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F + * + * SIS950 superio probably requires the same flash write enable. + */ +static int it8705f_write_enable_2e(const char *name) +{ + return it8705f_write_enable(0x2e, name); +} + +/** * VT823x: Set one of the GPIO pins. */ static int via_vt823x_gpio_set(uint8_t gpio, int raise) @@ -889,33 +916,6 @@ } /** - * Suited for: - * - Biostar P4M80-M4: VIA P4M800 + VT8237 + IT8705AF - * - GIGABYTE GA-7VT600: VIA KT600 + VT8237 + IT8705 - * - AOpen vKM400Am-S: VIA KM400 + VT8237 + IT8705F. - * - * SIS950 superio probably requires the same flash write enable. - */ -static int it8705_rom_write_enable(const char *name) -{ - /* enter IT87xx conf mode */ - enter_conf_mode_ite(0x2e); - - /* select right flash chip */ - sio_mask(0x2e, 0x22, 0x80, 0x80); - - /* bit 3: flash chip write enable - * bit 7: map flash chip at 1MB-128K (why though? ignoring this.) - */ - sio_mask(0x2e, 0x24, 0x04, 0x04); - - /* exit IT87xx conf mode */ - exit_conf_mode_ite(0x2e); - - return 0; -} - -/** * Suited for Soyo SY-7VCA: Pro133A + VT82C686. */ static int board_soyo_sy_7vca(const char *name) @@ -978,27 +978,7 @@ return 0; } -static int it8705f_write_enable(uint8_t port, const char *name) -{ - enter_conf_mode_ite(port); - sio_mask(port, 0x24, 0x04, 0x04); /* Flash ROM I/F Writes Enable */ - exit_conf_mode_ite(port); - - return 0; -} - /** - * Suited for: - * - Elitegroup K7S6A: SiS745 + ITE IT8705F - * - Elitegroup K7VTA3: VIA Apollo KT266/A/333 + VIA VT8235 + ITE IT8705F - * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F - */ -static int it8705f_write_enable_2e(const char *name) -{ - return it8705f_write_enable(0x2e, name); -} - -/** * Find the runtime registers of an SMSC Super I/O, after verifying its * chip ID. * @@ -1209,7 +1189,7 @@ {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, intel_ich_gpio23_raise}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", 0, w836xx_memw_enable_2e}, - {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705_rom_write_enable}, + {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705f_write_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, board_artecgroup_dbe6x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, board_asus_a7v600x}, @@ -1221,7 +1201,7 @@ {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, intel_ich_gpio21_raise}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, board_asus_p5a}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, nvidia_mcp_gpio10_raise}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705_rom_write_enable}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705f_write_enable_2e}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", 0, intel_ich_gpio23_raise}, {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", 0, it8705f_write_enable_2e}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, it8705f_write_enable_2e}, @@ -1229,7 +1209,7 @@ {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", 0, nvidia_mcp_gpio31_raise}, {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, board_epox_ep_bx3}, {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, it87xx_probe_spi_flash}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705_rom_write_enable}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705f_write_enable_2e}, {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, nvidia_mcp_gpio21_raise}, {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, it87xx_probe_spi_flash}, {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, it87xx_probe_spi_flash},

1 0

[commit] r875 - trunk
by svn＠flashrom.org 20 Jan '10

20 Jan '10

Author: libv Date: 2010-01-20 15:45:03 +0100 (Wed, 20 Jan 2010) New Revision: 875 Modified: trunk/board_enable.c trunk/flash.h Log: Boards: Add max_rom_decode_parallel entry to board enable table. This is a quick fix for board specific parallel addressing limits. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2010-01-20 14:14:11 UTC (rev 874) +++ trunk/board_enable.c 2010-01-20 14:45:03 UTC (rev 875) @@ -991,23 +991,14 @@ * Suited for: * - Elitegroup K7S6A: SiS745 + ITE IT8705F * - Elitegroup K7VTA3: VIA Apollo KT266/A/333 + VIA VT8235 + ITE IT8705F + * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F */ -static int elitegroup_k7vta3(const char *name) +static int it8705f_write_enable_2e(const char *name) { - max_rom_decode.parallel = 256 * 1024; return it8705f_write_enable(0x2e, name); } /** - * Suited for: Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F - */ -static int shuttle_ak38n(const char *name) -{ - max_rom_decode.parallel = 256 * 1024; - return it8705f_write_enable(0x2e, name); -} - -/** * Find the runtime registers of an SMSC Super I/O, after verifying its * chip ID. * @@ -1211,62 +1202,63 @@ /* Please keep this list alphabetically ordered by vendor/board name. */ struct board_pciid_enable board_pciid_enables[] = { - /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name flash enable */ - {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", intel_ich_gpio16_raise}, - {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", board_acorp_6a815epd}, - {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", intel_ich_gpio23_raise}, - {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", w83627hf_gpio24_raise_2e}, - {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", w836xx_memw_enable_2e}, - {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", it8705_rom_write_enable}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", board_artecgroup_dbe6x}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", board_artecgroup_dbe6x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", board_asus_a7v600x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", board_asus_a7v8x}, - {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", w836xx_memw_enable_2e}, - {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", via_vt823x_gpio5_raise}, - {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", intel_ich_gpio22_raise}, - {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", intel_ich_gpio21_raise}, - {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", intel_ich_gpio21_raise}, - {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", board_asus_p5a}, - {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", nvidia_mcp_gpio10_raise}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", it8705_rom_write_enable}, - {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", intel_ich_gpio23_raise}, - {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", elitegroup_k7vta3}, - {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", elitegroup_k7vta3}, - {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", w836xx_memw_enable_2e}, - {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", nvidia_mcp_gpio31_raise}, - {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", board_epox_ep_bx3}, - {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", it87xx_probe_spi_flash}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", it8705_rom_write_enable}, - {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", nvidia_mcp_gpio21_raise}, - {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", it87xx_probe_spi_flash}, - {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", it87xx_probe_spi_flash}, - {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", it87xx_probe_spi_flash}, - {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", board_hp_dl145_g3_enable}, - {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", board_ibm_x3455}, - {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", wbsio_check_for_spi}, - {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", w83627hf_gpio24_raise_2e}, - {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", board_kontron_986lcd_m}, - {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", board_mitac_6513wu}, - {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, - {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e}, - {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, - {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", board_msi_651ml}, - {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, - {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, - {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise}, - {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", w836xx_memw_enable_2e}, - {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", shuttle_ak38n}, - {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", board_shuttle_fn25}, - {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", board_soyo_sy_7vca}, - {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", w836xx_memw_enable_2e}, - {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", via_vt823x_gpio15_raise}, - {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", via_vt823x_gpio9_raise}, - {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, NULL, "VIA", "PC3500G", it87xx_probe_spi_flash}, - { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL}, /* end marker */ + /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... flash enable */ + {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, intel_ich_gpio16_raise}, + {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, board_acorp_6a815epd}, + {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, intel_ich_gpio23_raise}, + {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, w83627hf_gpio24_raise_2e}, + {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705_rom_write_enable}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, board_artecgroup_dbe6x}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, board_artecgroup_dbe6x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, board_asus_a7v600x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, board_asus_a7v8x}, + {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, w836xx_memw_enable_2e}, + {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, via_vt823x_gpio5_raise}, + {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", 0, intel_ich_gpio22_raise}, + {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", 0, intel_ich_gpio21_raise}, + {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, intel_ich_gpio21_raise}, + {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, board_asus_p5a}, + {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, nvidia_mcp_gpio10_raise}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705_rom_write_enable}, + {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", 0, intel_ich_gpio23_raise}, + {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", 0, it8705f_write_enable_2e}, + {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, it8705f_write_enable_2e}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", 0, w836xx_memw_enable_2e}, + {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", 0, nvidia_mcp_gpio31_raise}, + {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, board_epox_ep_bx3}, + {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, it87xx_probe_spi_flash}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705_rom_write_enable}, + {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, nvidia_mcp_gpio21_raise}, + {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, it87xx_probe_spi_flash}, + {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", 0, it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, it87xx_probe_spi_flash}, + {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, it87xx_probe_spi_flash}, + {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, board_hp_dl145_g3_enable}, + {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, board_ibm_x3455}, + {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, wbsio_check_for_spi}, + {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, w83627hf_gpio24_raise_2e}, + {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, board_kontron_986lcd_m}, + {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, board_mitac_6513wu}, + {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, board_msi_kt4v}, + {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, w83627thf_gpio4_4_raise_2e}, + {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, board_msi_kt4v}, + {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, board_msi_651ml}, + {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", 0, intel_ich_gpio19_raise}, + {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, w83627thf_gpio4_4_raise_4e}, + {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", 0, nvidia_mcp_gpio2_raise}, + {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", 256, it8705f_write_enable_2e}, + {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", 0, board_shuttle_fn25}, + {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", 0, board_soyo_sy_7vca}, + {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", 0, via_vt823x_gpio15_raise}, + {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", 0, via_vt823x_gpio9_raise}, + {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, NULL, "VIA", "PC3500G", 0, it87xx_probe_spi_flash}, + + { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, 0, NULL}, /* end marker */ }; /** @@ -1383,6 +1375,10 @@ board = board_match_pci_card_ids(); if (board) { + if (board->max_rom_decode_parallel) + max_rom_decode.parallel = + board->max_rom_decode_parallel * 1024; + printf("Disabling flash write protection for board \"%s %s\"... ", board->vendor_name, board->board_name); Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2010-01-20 14:14:11 UTC (rev 874) +++ trunk/flash.h 2010-01-20 14:45:03 UTC (rev 875) @@ -275,6 +275,7 @@ const char *vendor_name; const char *board_name; + int max_rom_decode_parallel; int (*enable) (const char *name); };

1 0

[PATCH] Convert chips to block erasers: SST
by Sean Nelson 20 Jan '10

20 Jan '10

Convert the following chips to block_erasers: SST28SF040A SST29EE010 SST29LE010 SST29EE020A SST29LE020 SST39SF010A SST39SF020A SST39SF040 SST39VF512 SST39VF010 SST39VF020 SST39VF040 SST39VF080 SST49LF002A/B SST49LF003A/B SST49LF004C SST49LF008A SST49LF008C SST49LF016C SST49LF020 SST49LF020A SST49LF040 SST49LF040B SST49LF080A SST49LF160C Extend sst28sf040 to include chip and sector functions for block_eraser. Extend sst49lfxxxc to include chip, sector, block erasers functions for block_erasers. Extend sst_fwhub to include chip and sector functions for block_erasers. Add copyrights to changed files. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

3 7

Re: [flashrom] [PATCH] Matching board via DMI
by Luc Verhaegen 20 Jan '10

20 Jan '10

On Tue, Jan 19, 2010 at 11:03:06AM +0100, Michael Karcher wrote: Acked-by: Luc Verhaegen <libv(a)skynet.be> Luc Verhaegen.

2 1

[commit] r874 - trunk
by svn＠flashrom.org 20 Jan '10

20 Jan '10

Author: mkarcher Date: 2010-01-20 15:14:11 +0100 (Wed, 20 Jan 2010) New Revision: 874 Added: trunk/dmi.c Modified: trunk/Makefile trunk/board_enable.c trunk/flash.h trunk/internal.c Log: Matching board via DMI If a board is not uniquely identifiable by PCI device/subsystem IDs, a string can be specified to be looked for (case-sensitive, substring or anchored) for now in one of the following DMI items in addition to matching the PCI IDs: - System Manufacturer - System Product Name - System Version - Baseboard Manufacturer - Baseboard Product Name - Baseboard Version Strings are anchored re-like (^ at the beginning, $ at the end), but there are no plans to support full regular expressions and matched to any of the mentioned fields. The match is only made if DMI info is available and the string matches. If no DMI info is available and the PCI IDs match, a warning is printed as the board can not be autodetected. It's still open to discussion whether we add an DMI override switch to specify a string that will definitely match, and whether this switch is only used if no DMI is available or whether it overrides or augments DMI data. DMI data is currently read using dmidecode. This tool is available for all major platforms except MacOS X. I heard that there also is a MacOS X version of dmidecode, but didn't investigate that. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2010-01-19 20:23:26 UTC (rev 873) +++ trunk/Makefile 2010-01-20 14:14:11 UTC (rev 874) @@ -104,7 +104,7 @@ ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'INTERNAL_SUPPORT=1' -PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o +PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o dmi.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o NEED_PCI := yes endif Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2010-01-19 20:23:26 UTC (rev 873) +++ trunk/board_enable.c 2010-01-20 14:14:11 UTC (rev 874) @@ -1193,6 +1193,13 @@ * provide an as complete set of pci ids as possible; autodetection is the * preferred behaviour and we would like to make sure that matches are unique. * + * If PCI IDs are not sufficient for board matching, the match can be further + * constrained by a string that has to be present in the DMI database for + * the baseboard or the system entry. The pattern is matched by case sensitve + * substring match, unless it is anchored to the beginning (with a ^ in front) + * or the end (with a $ at the end). Both anchors may be specified at the + * same time to match the full field. + * * The coreboot ids are used two fold. When running with a coreboot firmware, * the ids uniquely matches the coreboot board identification string. When a * legacy bios is installed and when autodetection is not possible, these ids @@ -1204,62 +1211,62 @@ /* Please keep this list alphabetically ordered by vendor/board name. */ struct board_pciid_enable board_pciid_enables[] = { - /* first pci-id set [4], second pci-id set [4], coreboot id [2], vendor name board name flash enable */ - {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, "Abit", "IP35", intel_ich_gpio16_raise}, - {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, "Acorp", "6A815EPD", board_acorp_6a815epd}, - {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, "ASRock", "P4i65GV", intel_ich_gpio23_raise}, - {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami", "Aruma", w83627hf_gpio24_raise_2e}, - {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, "Albatron", "PM266A", w836xx_memw_enable_2e}, - {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, "AOpen", "vKM400Am-S", it8705_rom_write_enable}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group", "DBE61", board_artecgroup_dbe6x}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group", "DBE62", board_artecgroup_dbe6x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, "ASUS", "A7V600-X", board_asus_a7v600x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, "ASUS", "A7V8X", board_asus_a7v8x}, - {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS", "A7V8X-MX SE", w836xx_memw_enable_2e}, - {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, "ASUS", "M2V-MX", via_vt823x_gpio5_raise}, - {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS", "P4B266", intel_ich_gpio22_raise}, - {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, "ASUS", "P4B266-LM", intel_ich_gpio21_raise}, - {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, "ASUS", "P4P800-E Deluxe", intel_ich_gpio21_raise}, - {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS", "P5A", board_asus_p5a}, - {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", nvidia_mcp_gpio10_raise}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", it8705_rom_write_enable}, - {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, "Dell", "PowerEdge 1850", intel_ich_gpio23_raise}, - {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, "Elitegroup", "K7S6A", elitegroup_k7vta3}, - {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", elitegroup_k7vta3}, - {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, "EPoX", "EP-8K5A2", w836xx_memw_enable_2e}, - {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, "EPoX", "EP-8RDA3+", nvidia_mcp_gpio31_raise}, - {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX", "EP-BX3", board_epox_ep_bx3}, - {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", it87xx_probe_spi_flash}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", it8705_rom_write_enable}, - {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", nvidia_mcp_gpio21_raise}, - {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", it87xx_probe_spi_flash}, - {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, "GIGABYTE", "GA-M61P-S3", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", it87xx_probe_spi_flash}, - {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", it87xx_probe_spi_flash}, - {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, "hp", "dl145_g3", "HP", "DL145 G3", board_hp_dl145_g3_enable}, - {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, "IBM", "x3455", board_ibm_x3455}, - {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, "Intel", "D201GLY", wbsio_check_for_spi}, - {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, "iwill", "dk8_htx", "IWILL", "DK8-HTX", w83627hf_gpio24_raise_2e}, - {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, "kontron", "986lcd-m", "Kontron", "986LCD-M", board_kontron_986lcd_m}, - {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, "Mitac", "6513WU", board_mitac_6513wu}, - {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, - {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e}, - {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, - {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, "MSI", "MS-7005 (651M-L)", board_msi_651ml}, - {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, - {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, - {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise}, - {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, "shuttle", "ak31", "Shuttle", "AK31", w836xx_memw_enable_2e}, - {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, "Shuttle", "AK38N", shuttle_ak38n}, - {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, "Shuttle", "FN25", board_shuttle_fn25}, - {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, "Soyo", "SY-7VCA", board_soyo_sy_7vca}, - {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", w836xx_memw_enable_2e}, - {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA", "EPIA M/MII/...", via_vt823x_gpio15_raise}, - {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, "VIA", "EPIA-N/NL", via_vt823x_gpio9_raise}, - {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, "VIA", "PC3500G", it87xx_probe_spi_flash}, + /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name flash enable */ + {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", intel_ich_gpio16_raise}, + {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", board_acorp_6a815epd}, + {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", intel_ich_gpio23_raise}, + {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", w83627hf_gpio24_raise_2e}, + {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", w836xx_memw_enable_2e}, + {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", it8705_rom_write_enable}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", board_artecgroup_dbe6x}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", board_artecgroup_dbe6x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", board_asus_a7v600x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", board_asus_a7v8x}, + {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", w836xx_memw_enable_2e}, + {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", via_vt823x_gpio5_raise}, + {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", intel_ich_gpio22_raise}, + {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", intel_ich_gpio21_raise}, + {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", intel_ich_gpio21_raise}, + {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", board_asus_p5a}, + {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", nvidia_mcp_gpio10_raise}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", it8705_rom_write_enable}, + {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", intel_ich_gpio23_raise}, + {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", elitegroup_k7vta3}, + {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", elitegroup_k7vta3}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", w836xx_memw_enable_2e}, + {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", nvidia_mcp_gpio31_raise}, + {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", board_epox_ep_bx3}, + {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, NULL, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", it87xx_probe_spi_flash}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, NULL, "GIGABYTE", "GA-7VT600", it8705_rom_write_enable}, + {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", nvidia_mcp_gpio21_raise}, + {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", it87xx_probe_spi_flash}, + {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", it87xx_probe_spi_flash}, + {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", it87xx_probe_spi_flash}, + {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", board_hp_dl145_g3_enable}, + {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", board_ibm_x3455}, + {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", wbsio_check_for_spi}, + {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", w83627hf_gpio24_raise_2e}, + {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", board_kontron_986lcd_m}, + {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", board_mitac_6513wu}, + {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, + {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e}, + {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, + {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", board_msi_651ml}, + {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, + {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, + {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise}, + {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", w836xx_memw_enable_2e}, + {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", shuttle_ak38n}, + {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", board_shuttle_fn25}, + {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", board_soyo_sy_7vca}, + {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", w836xx_memw_enable_2e}, + {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, "VIA", "EPIA M/MII/...", via_vt823x_gpio15_raise}, + {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, "VIA", "EPIA-N/NL", via_vt823x_gpio9_raise}, + {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, NULL, "VIA", "PC3500G", it87xx_probe_spi_flash}, - { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL}, /* end marker */ + { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL}, /* end marker */ }; /** @@ -1346,6 +1353,18 @@ } } + if (board->dmi_pattern) { + if (!has_dmi_support) { + fprintf(stderr, "WARNING: Can't autodetect %s %s," + " DMI info unavailable.\n", + board->vendor_name, board->board_name); + continue; + } else { + if (!dmi_match(board->dmi_pattern)) + continue; + } + } + return board; } Added: trunk/dmi.c =================================================================== --- trunk/dmi.c (rev 0) +++ trunk/dmi.c 2010-01-20 14:14:11 UTC (rev 874) @@ -0,0 +1,168 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009,2010 Michael Karcher + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include <stdio.h> +#include <stdlib.h> + +#include "flash.h" + +enum dmi_strings { + DMI_SYS_MANUFACTURER, + DMI_SYS_PRODUCT, + DMI_SYS_VERSION, + DMI_BB_MANUFACTURER, + DMI_BB_PRODUCT, + DMI_BB_VERSION, + DMI_ID_INVALID /* This must always be the last entry */ +}; + +/* The short_id for baseboard starts with "m" as in mainboard to leave + "b" available for BIOS */ +struct { + const char *dmidecode_name; + char short_id[3]; +} dmi_properties[DMI_ID_INVALID] = { + {"system-manufacturer", "sm"}, + {"system-product-name", "sp"}, + {"system-version", "sv"}, + {"baseboard-manufacturer", "mm"}, + {"baseboard-product-name", "mp"}, + {"baseboard-version", "mv"} +}; + +#define DMI_COMMAND_LEN_MAX 260 +const char *dmidecode_command = "dmidecode"; + +int has_dmi_support = 0; +char *dmistrings[DMI_ID_INVALID]; + +/* strings longer than 4096 in DMI are just insane */ +#define DMI_MAX_ANSWER_LEN 4096 + +void dmi_init(void) +{ + FILE *dmidecode_pipe; + int i; + char *answerbuf = malloc(DMI_MAX_ANSWER_LEN); + if(!answerbuf) + { + fprintf(stderr, "DMI: couldn't alloc answer buffer\n"); + return; + } + for (i = 0; i < DMI_ID_INVALID; i++) + { + char commandline[DMI_COMMAND_LEN_MAX+40]; + snprintf(commandline, sizeof(commandline), + "%s -s %s", dmidecode_command, + dmi_properties[i].dmidecode_name); + dmidecode_pipe = popen(commandline, "r"); + if (!dmidecode_pipe) + { + printf_debug("DMI pipe open error\n"); + goto out_free; + } + fgets(answerbuf, DMI_MAX_ANSWER_LEN, dmidecode_pipe); + if (ferror(dmidecode_pipe)) + { + printf_debug("DMI pipe read error\n"); + pclose(dmidecode_pipe); + goto out_free; + } + /* Toss all output above DMI_MAX_ANSWER_LEN away to prevent + deadlock on pclose. */ + while (!feof(dmidecode_pipe)) + getc(dmidecode_pipe); + if (pclose(dmidecode_pipe) != 0) + { + printf_debug("DMI pipe close error\n"); + goto out_free; + } + + /* chomp trailing newline */ + if (answerbuf[0] != 0 && + answerbuf[strlen(answerbuf) - 1] == '\n') + answerbuf[strlen(answerbuf) - 1] = 0; + printf_debug("DMI string %d: \"%s\"\n", i, answerbuf); + dmistrings[i] = strdup(answerbuf); + } + has_dmi_support = 1; +out_free: + free(answerbuf); +} + +/** + * Does an substring/prefix/postfix/whole-string match. + * + * The pattern is matched as-is. The only metacharacters supported are '^' + * at the beginning and '$' at the end. So you can look for "^prefix", + * "suffix$", "substring" or "^complete string$". + * + * @param value The string to check. + * @param pattern The pattern. + * @return Nonzero if pattern matches. + */ +static int dmi_compare(const char *value, const char *pattern) +{ + int anchored = 0; + int patternlen; + printf_debug("matching %s against %s\n", value, pattern); + /* The empty string is part of all strings */ + if (pattern[0] == 0) + return 1; + + if (pattern[0] == '^') { + anchored = 1; + pattern++; + } + + patternlen = strlen(pattern); + if (pattern[patternlen - 1] == '$') { + int valuelen = strlen(value); + patternlen--; + if(patternlen > valuelen) + return 0; + + /* full string match: require same length */ + if(anchored && (valuelen != patternlen)) + return 0; + + /* start character to make ends match */ + value += valuelen - patternlen; + anchored = 1; + } + + if (anchored) + return strncmp(value, pattern, patternlen) == 0; + else + return strstr(value, pattern) != NULL; +} + +int dmi_match(const char *pattern) +{ + int i; + if (!has_dmi_support) + return 0; + + for (i = 0;i < DMI_ID_INVALID; i++) + return dmi_compare(dmistrings[i], pattern); + + return 0; +} Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2010-01-19 20:23:26 UTC (rev 873) +++ trunk/flash.h 2010-01-20 14:14:11 UTC (rev 874) @@ -265,6 +265,9 @@ uint16_t second_card_vendor; uint16_t second_card_device; + /* Pattern to match DMI entries */ + const char *dmi_pattern; + /* The vendor / part name from the coreboot table. */ const char *lb_vendor; const char *lb_part; @@ -343,6 +346,11 @@ extern char *lb_part, *lb_vendor; extern int partvendor_from_cbtable; +/* dmi.c */ +extern int has_dmi_support; +void dmi_init(void); +int dmi_match(const char *pattern); + /* internal.c */ #if NEED_PCI == 1 struct superio { Modified: trunk/internal.c =================================================================== --- trunk/internal.c 2010-01-19 20:23:26 UTC (rev 873) +++ trunk/internal.c 2010-01-20 14:14:11 UTC (rev 874) @@ -152,6 +152,7 @@ * mainboard specific flash enable sequence. */ coreboot_init(); + dmi_init(); /* Probe for the SuperI/O chip and fill global struct superio. */ probe_superio();

1 0

[PATCH] Abit KN8 Ultra erase/write support
by Chris 20 Jan '10

20 Jan '10

With instruction from twice11 in the IRC channel, I've created a patch enabling erase/write support for the Abit KN8 Ultra motherboard. Patch is attached. This motherboard uses the LPC protocol. -- http://zenthought.org/

2 1

Fwd: Flashrom report for Intel BOXDP45SG: Intel provided image is 3x size of Flash ROM!
by Thode, Lucas 19 Jan '10

19 Jan '10

---------- Forwarded message ---------- From: Thode, Lucas <lthode(a)unomaha.edu> Date: 2010/1/17 Subject: Flashrom report for Intel BOXDP45SG: Intel provided image is 3x size of Flash ROM! To: flashrom(a)flashrom.org Link to vendor image (.BIO file): http://downloadcenter.intel.com/confirm.aspx?httpDown=http://downloadmirror… -- (HTT-Bird@Freenode)

4 5

[PATCH] S29C51004T fixup
by Sean Nelson 19 Jan '10

19 Jan '10

Fix SyncMOS S29C51004T, which has 512 Uniform 1k sectors.

1 2

[commit] r873 - trunk
by svn＠flashrom.org 19 Jan '10

19 Jan '10

Author: snelson Date: 2010-01-19 21:23:26 +0100 (Tue, 19 Jan 2010) New Revision: 873 Modified: trunk/flashchips.c Log: Fix SyncMOS S29C51004T, which has 512 uniform 1k sectors. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-19 16:39:19 UTC (rev 872) +++ trunk/flashchips.c 2010-01-19 20:23:26 UTC (rev 873) @@ -5043,7 +5043,7 @@ .block_erasers = { { - .eraseblocks = { {1 * 1024, 496} }, + .eraseblocks = { {1 * 1024, 512} }, .block_erase = erase_sector_jedec, }, { .eraseblocks = { {512 * 1024, 1} },

1 0

[PATCH] Convert chips to block erasers: ST
by Sean Nelson 19 Jan '10

19 Jan '10

Convert ST to block erasers: ST M25P05-A ST M25P05.RES ST M25P10-A ST M25P10.RES ST M25P20 ST M25P40 ST M25P40-old ST M25P80 ST M25P16 ST M25P32 ST M25P64 ST M25P128 ST M29F002B ST M29F002T/NT ST M29F040B ST M29F400BT ST M29W010B ST M29W040B ST M50FLW040A ST M50FLW040B ST M50FLW080A ST M50FLW080B ST M50FW002 ST M50FW016 ST M50FW040 ST M50FW080 ST M50LPW116 Add erase_chip_stm50flw0x0x to stm50flw0x0x.c Add copyright to stm50flw0x0x Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

3 19

[commit] r872 - trunk
by svn＠flashrom.org 19 Jan '10

19 Jan '10

Author: snelson Date: 2010-01-19 17:39:19 +0100 (Tue, 19 Jan 2010) New Revision: 872 Modified: trunk/flashchips.c Log: Convert ST to block erasers: ST M25P05-A ST M25P05.RES ST M25P10-A ST M25P10.RES ST M25P20 ST M25P40 ST M25P40-old ST M25P80 ST M25P16 ST M25P32 ST M25P64 ST M25P128 ST M29F002B ST M29F002T/NT ST M29F040B ST M29F400BT ST M29W010B ST M29W040B ST M50FLW040A ST M50FLW040B ST M50FLW080A ST M50FLW080B ST M50FW002 ST M50FW016 ST M50FW040 ST M50FW080 ST M50LPW116 Add erase_chip_stm50flw0x0x to stm50flw0x0x.c Add copyright to stm50flw0x0x.c Fix block sizes and counts Omit M50FLW0x0x mixed sector/block eraser Convert the used 82802ab functions to their stm50flw0x0x equivalents Fix incorrect sizes as found by Carl-Daniel. Add back M50FLW0x0x mixed sector/block eraser sans function pointer. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-19 16:08:51 UTC (rev 871) +++ trunk/flashchips.c 2010-01-19 16:39:19 UTC (rev 872) @@ -4685,6 +4685,14 @@ .block_erasers = { { + .eraseblocks = { + {4 * 1024, 16}, /* sector */ + {64 * 1024, 5}, /* block */ + {4 * 1024, 16}, /* sector */ + {4 * 1024, 16}, /* sector */ + }, + .block_erase = NULL, + }, { .eraseblocks = { {64 * 1024, 8}, }, .block_erase = erase_block_stm50flw0x0x, }, { @@ -4712,6 +4720,14 @@ .block_erasers = { { + .eraseblocks = { + {4 * 1024, 16}, /* sector */ + {4 * 1024, 16}, /* sector */ + {64 * 1024, 5}, /* block */ + {4 * 1024, 16}, /* sector */ + }, + .block_erase = NULL, + }, { .eraseblocks = { {64 * 1024, 8}, }, .block_erase = erase_block_stm50flw0x0x, }, { @@ -4739,6 +4755,14 @@ .block_erasers = { { + .eraseblocks = { + {4 * 1024, 16}, /* sector */ + {64 * 1024, 13}, /* block */ + {4 * 1024, 16}, /* sector */ + {4 * 1024, 16}, /* sector */ + }, + .block_erase = NULL, + }, { .eraseblocks = { {64 * 1024, 16}, }, .block_erase = erase_block_stm50flw0x0x, }, { @@ -4766,6 +4790,14 @@ .block_erasers = { { + .eraseblocks = { + {4 * 1024, 16}, /* sector */ + {4 * 1024, 16}, /* sector */ + {64 * 1024, 13}, /* block */ + {4 * 1024, 16}, /* sector */ + }, + .block_erase = NULL, + }, { .eraseblocks = { {64 * 1024, 16}, }, .block_erase = erase_block_stm50flw0x0x, }, {

1 0

[PATCH] Convert chips to block erasers: SyncMOS and TI
by Sean Nelson 19 Jan '10

19 Jan '10

Convert chips to block_erasers: SyncMOS S29C31004T SyncMOS S29C51001T SyncMOS S29C51002T SyncMOS S29C51004T TI TMS29F002RT TI TMS29F002RB Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

2 4

[commit] r871 - trunk
by svn＠flashrom.org 19 Jan '10

19 Jan '10

Author: snelson Date: 2010-01-19 17:08:51 +0100 (Tue, 19 Jan 2010) New Revision: 871 Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/stm50flw0x0x.c Log: Convert chips to block_erasers: SyncMOS S29C31004T SyncMOS S29C51001T SyncMOS S29C51002T SyncMOS S29C51004T TI TMS29F002RT TI TMS29F002RB SyncMOS chips have Uniform sector; boot blocks on chips are made up of uniform sectors but have locking. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipdrivers.h =================================================================== --- trunk/chipdrivers.h 2010-01-19 11:15:48 UTC (rev 870) +++ trunk/chipdrivers.h 2010-01-19 16:08:51 UTC (rev 871) @@ -167,6 +167,9 @@ /* stm50flw0x0x.c */ int probe_stm50flw0x0x(struct flashchip *flash); int erase_stm50flw0x0x(struct flashchip *flash); +int erase_block_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize); +int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize); +int erase_chip_stm50flw0x0x(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int write_stm50flw0x0x(struct flashchip *flash, uint8_t *buf); #endif /* !__CHIPDRIVERS_H__ */ Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2010-01-19 11:15:48 UTC (rev 870) +++ trunk/flashchips.c 2010-01-19 16:08:51 UTC (rev 871) @@ -4191,7 +4191,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4212,7 +4222,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_res, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, }, @@ -4228,7 +4248,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4245,7 +4275,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_res, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, }, @@ -4261,7 +4301,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4274,10 +4324,20 @@ .model_id = ST_M25P40, .total_size = 512, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4293,7 +4353,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_res, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4306,10 +4376,20 @@ .model_id = ST_M25P80, .total_size = 1024, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4322,10 +4402,20 @@ .model_id = ST_M25P16, .total_size = 2048, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4338,10 +4428,20 @@ .model_id = ST_M25P32, .total_size = 4096, .page_size = 256, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4357,7 +4457,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4373,7 +4483,17 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {256 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -4389,7 +4509,22 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_m29f002, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {16 * 1024, 1}, + {8 * 1024, 2}, + {32 * 1024, 1}, + {64 * 1024, 3}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_m29f002b, .read = read_memmapped, }, @@ -4402,10 +4537,25 @@ .model_id = ST_M29F002T, .total_size = 256, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_m29f002, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_m29f002t, .read = read_memmapped, }, @@ -4418,10 +4568,20 @@ .model_id = ST_M29F040B, .total_size = 512, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_29f040b, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ - .erase = erase_29f040b, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8}, }, + .block_erase = erase_sector_29f040b, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_29f040b, + } + }, .write = write_29f040b, .read = read_memmapped, }, @@ -4437,7 +4597,22 @@ .tested = TEST_UNTESTED, .probe = probe_m29f400bt, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ - .erase = erase_m29f400bt, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 7}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = block_erase_m29f400bt, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = block_erase_chip_m29f400bt, + } + }, .write = write_coreboot_m29f400bt, .read = read_memmapped, }, @@ -4453,7 +4628,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {16 * 1024, 8}, }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -4469,7 +4654,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8}, }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -4486,7 +4681,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_stm50flw0x0x, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4503,7 +4708,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_stm50flw0x0x, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4517,10 +4732,20 @@ .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_stm50flw0x0x, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4537,7 +4762,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_FIXME, - .erase = erase_stm50flw0x0x, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4554,6 +4789,21 @@ .probe = probe_49lfxxxc, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, .write = NULL, .read = read_memmapped, }, @@ -4569,8 +4819,18 @@ .tested = TEST_UNTESTED, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ - .erase = erase_82802ab, - .write = write_82802ab, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 32}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, + .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4582,11 +4842,21 @@ .model_id = ST_M50FW040, .total_size = 512, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ - .erase = erase_82802ab, - .write = write_82802ab, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, + .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4598,11 +4868,21 @@ .model_id = ST_M50FW080, .total_size = 1024, .page_size = 64 * 1024, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ - .erase = erase_82802ab, - .write = write_82802ab, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16}, }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_stm50flw0x0x, + } + }, + .write = write_stm50flw0x0x, .read = read_memmapped, }, @@ -4617,7 +4897,23 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {4 * 1024, 16}, + {64 * 1024, 30}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_stm50flw0x0x, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, .write = write_jedec, .read = read_memmapped, }, @@ -4633,7 +4929,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {1 * 1024, 512} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, .write = write_49f002, .read = read_memmapped, }, @@ -4649,7 +4955,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {512, 256} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, .write = write_49f002, .read = read_memmapped, }, @@ -4662,10 +4978,20 @@ .model_id = S29C51002T, .total_size = 256, .page_size = 128, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PRW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {512, 512} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, .write = write_49f002, .read = read_memmapped, }, @@ -4681,7 +5007,17 @@ .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, - .erase = erase_chip_jedec, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {1 * 1024, 496} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, .write = write_49f002, .read = read_memmapped, }, @@ -4698,6 +5034,21 @@ .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {16 * 1024, 1}, + {8 * 1024, 2}, + {32 * 1024, 1}, + {64 * 1024, 3}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, .write = NULL, .read = read_memmapped, }, @@ -4714,6 +5065,21 @@ .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, .write = NULL, .read = read_memmapped, }, Modified: trunk/stm50flw0x0x.c =================================================================== --- trunk/stm50flw0x0x.c 2010-01-19 11:15:48 UTC (rev 870) +++ trunk/stm50flw0x0x.c 2010-01-19 16:08:51 UTC (rev 871) @@ -2,6 +2,7 @@ * This file is part of the flashrom project. * * Copyright (C) 2008 Claus Gindhart <claus.gindhart(a)kontron.com> + * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -99,9 +100,9 @@ return 0; } -int erase_block_stm50flw0x0x(struct flashchip *flash, int offset) +int erase_block_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize) { - chipaddr bios = flash->virtual_memory + offset; + chipaddr bios = flash->virtual_memory + block; // clear status register chip_writeb(0x50, bios); @@ -113,15 +114,38 @@ wait_stm50flw0x0x(flash->virtual_memory); - if (check_erased_range(flash, offset, flash->page_size)) { + if (check_erased_range(flash, block, blocksize)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } - printf("DONE BLOCK 0x%x\n", offset); + printf("DONE BLOCK 0x%x\n", block); return 0; } +int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int sector, unsigned int sectorsize) +{ + chipaddr bios = flash->virtual_memory + sector; + + // clear status register + chip_writeb(0x50, bios); + printf_debug("Erase at 0x%lx\n", bios); + // now start it + chip_writeb(0x32, bios); + chip_writeb(0xd0, bios); + programmer_delay(10); + + wait_stm50flw0x0x(flash->virtual_memory); + + if (check_erased_range(flash, sector, sectorsize)) { + fprintf(stderr, "ERASE FAILED!\n"); + return -1; + } + printf("DONE BLOCK 0x%x\n", sector); + + return 0; +} + int write_page_stm50flw0x0x(chipaddr bios, uint8_t *src, chipaddr dst, int page_size) { @@ -178,7 +202,7 @@ fprintf(stderr, "UNLOCK FAILED!\n"); return -1; } - if (erase_block_stm50flw0x0x(flash, i * page_size)) { + if (erase_block_stm50flw0x0x(flash, i * page_size, page_size)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } @@ -188,6 +212,16 @@ return 0; } +int erase_chip_stm50flw0x0x(struct flashchip *flash, unsigned int addr, unsigned int blocklen) +{ + if ((addr != 0) || (blocklen != flash->total_size * 1024)) { + msg_cerr("%s called with incorrect arguments\n", + __func__); + return -1; + } + return erase_stm50flw0x0x(flash); +} + int write_stm50flw0x0x(struct flashchip *flash, uint8_t * buf) { int i, rc = 0; @@ -221,7 +255,7 @@ rc = unlock_block_stm50flw0x0x(flash, i * page_size); if (!rc) - rc = erase_block_stm50flw0x0x(flash, i * page_size); + rc = erase_block_stm50flw0x0x(flash, i * page_size, page_size); if (!rc) write_page_stm50flw0x0x(bios, buf + i * page_size, bios + i * page_size, page_size);

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Re: [flashrom] [coreboot] Paraflasher Competition
by Carl-Daniel Hailfinger 19 Jan '10

19 Jan '10

[added flashrom to CC] On 19.01.2010 15:44, Joseph Smith wrote: > Looks like the Paraflasher has some competition: > > http://cgi.ebay.com/NANO-BIOS-Programmer-for-PC-M-B-BIOS-repairing_W0QQitem… > > Possible external flasher for flashrom? > Doable, but painful. That thing is a parallel port flasher and uses USB only as power supply... > Although the Paraflasher is way better by design :-) > Sure. By the way, what's the status of Paraflasher? Does it work for flashing? Any interest in adding flashrom support for it (easy task)? Does someone want to check the Nano BIOS Programmer support list against the flashrom support list? Would be cool if we could list all chips they do. Regards, Carl-Daniel -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

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