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rayer_spi programmer support
by Chris Enrique 14 Sep '10

14 Sep '10

Hello, i was just wondering if flashrom supports the SPI parallel programmer mentioned on this website: http://rayer.ic.cz/elektro/spipgm.htm The author says it does as he provided his sourcecode to your project. but if i use the command : flashrom -p rayer_spi ... it says unknown programmer. can somebody give me some informations on this issue? thank you chris

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[PATCH 1/1] Define dmidecode path at a build stage
by Peter Lemenkov 14 Sep '10

14 Sep '10

This helps in case then user doesn't have dmidecode in his PATH. For example, if user elevates his privileges with sudo, then he may not inherit some superuser's environmental variables ($PATH, contaning additional directories - /sbin, /usr/sbin and similar). In case of failure to determine full path to dmidecode it just fallbacks to the default value. Tested only on Linux. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- Makefile | 5 ++++- dmi.c | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index e83fc0b..7919e10 100644 --- a/Makefile +++ b/Makefile @@ -169,6 +169,9 @@ CONFIG_DEDIPROG ?= no # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no +# Try to detect full path for dmidecode +CONFIG_DMIDECODE_PATH ?= $(shell LC_ALL=C type -p dmidecode 2>/dev/null || echo "dmidecode") + ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o dmi.o internal.o @@ -323,7 +326,7 @@ $(PROGRAM)$(EXEC_SUFFIX): $(OBJS) TAROPTIONS = $(shell LC_ALL=C tar --version|grep -q GNU && echo "--owner=root --group=root") %.o: %.c .features - $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FEATURE_CFLAGS) $(SVNDEF) -o $@ -c $< + $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FEATURE_CFLAGS) $(SVNDEF) -DCONFIG_DMIDECODE_PATH=\"$(CONFIG_DMIDECODE_PATH)\" -o $@ -c $< # Make sure to add all names of generated binaries here. # This includes all frontends and libflashrom. diff --git a/dmi.c b/dmi.c index f18907f..d483acb 100644 --- a/dmi.c +++ b/dmi.c @@ -55,7 +55,7 @@ static const char *dmidecode_names[] = { }; #define DMI_COMMAND_LEN_MAX 260 -static const char *dmidecode_command = "dmidecode"; +static const char *dmidecode_command = CONFIG_DMIDECODE_PATH; static char *dmistrings[ARRAY_SIZE(dmidecode_names)]; -- 1.7.2.3

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Abit VA6 / Atmel AT49F002NT
by Mattias Mattsson 14 Sep '10

14 Sep '10

Hi, I have tested flashrom r1138 on an Abit VA6 with Atmel AT49F002NT flash. Probe, read, erase, write all work together with this patch: http://www.coreboot.org/pipermail/flashrom/2010-August/004439.html lspci crashes with the -xxx option on this board (the lspci manpage mentions this could happen) so output is with -x only. Logs attached. Thanks -mattias

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[PATCH] Winbond chip id fix-up (ver 3)
by Mattias Mattsson 14 Sep '10

14 Sep '10

New version. List all chip variants in the .name strings in flashchips.c Also have two identical entries for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012 with different probe functions in flashchips.c as sometimes (for newer revisions of these chips?) the standard jedec probe seems to work. Eg see test report here: http://patchwork.coreboot.org/patch/1476/ Rename constants W_nnnn -> WINBOND_Wnnnn W_25nnn -> WINBOND_NEX_W25nnn Kill incorrect ASD chip and vendor id. Group Winbond SPI and Parallell chips separately (they have different vendor ids). Change constant names to the "canonical" chip name for the following ids: W_29C020C (0x45) -> WINBOND_W29C020 (Same as W29C020C, W29C022 and ASD AE29F2008) W_29C040P (0x46) -> WINBOND_W29C040 ("P" is for package type [32-pin PLCC], irrelevant) W_29C011 + W_29EE011 (0xC1) -> WINBOND_W29C010M (Same as W29C011A, W29EE011, W29EE012, and ASD AE29F1008) Also add ids for the following Winbond chips: W25Q40 W25Q128 W19B160BB W19B160BT W19B320SB/W19L320SB W19B320ST/W19L320ST W19B322MB W19B322MT W19B323MB W19B323MT W19B324MB W19B324MT W29C512A/W29EE512 W39L010 W39L040A W39L512 W49F002/W49F002B Signed-off-by: Mattias Mattsson <vitplister(a)gmail.com>

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[PATCH] Intel chip id fix-up (ver 2)
by Mattias Mattsson 14 Sep '10

14 Sep '10

This is a new version of an earlier patch. Strip package prefix in constant names (everything before "28F"). Prefix every constant name with INTEL_ Sort intel chip constants by id. Rename the following constants to their "canonical" name: P28F400BT (0x70) -> INTEL_28F400T (28F400BV/BX/CE/CV-T) P28F400BB (0x71) -> INTEL_28F400B (28F400BV/BX/CE/CV-B) P28F004BT (0x78) -> INTEL_28F004T (28F004B5/BE/BV/BX-T) P28F004BB (0x79) -> INTEL_28F004B (28F004B5/BE/BV/BX-B) E_28F008S5 (0xA6) -> INTEL_28F008S3 (28F008S3/S5/SC) E_28F004S5 (0xA7) -> INTEL_28F004S3 (28F008S3/S5/SC) P28F001BXT (0x94) -> INTEL_28F001T (28F001BN/BX-T) P28F001BXB (0x95) -> INTEL_28F001B (28F001BN/BX-B) E_28F016S5 (0xAA) -> INTEL_28F016S3 (28F016S3/S5/SC) Also add chip ids for the following chips: 28F320J5 28F640J5 28F320J3 28F640J3 28F128J3 28F256J3 28F200BL/BV/BX/CV-T 28F200BL/BV/BX/CV-B 28F002BL/BV/BX-B 28F008BE/BV-T 28F008BE/BV-B 28F800B5/BV/CE/CV-T 28F800B5/BV/CE/CV-B 28F016SA/SV 28F008SA 28F008S3/S5/SC 28F008S3/S5/SC 28F016XS 28F010 28F512 28F256A 28F020 28F016B3-T 28F016B3-B 28F008B3-T 28F008B3-B 28F004B3-T 28F004B3-B Signed-off-by: Mattias Mattsson <vitplister(a)gmail.com>

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[PATCH] Winbond chip id fix-up (ver 2)
by Mattias Mattsson 14 Sep '10

14 Sep '10

Hi, This is an updated version of an earlier patch. Now additionally changes all constants: W_nnnn -> WINBOND_Wnnnn W_25nnn -> WINBOND_NEX_W25nnn Kill incorrect ASD chip and vendor id. Group Winbond SPI and Parallell chips separately (they have different vendor ids). Change constant names to the "canonical" chip name for the following ids: W_29C020C (0x45) -> WINBOND_W29C020 (Same as W29C020C, W29C022 and ASD AE29F2008) W_29C040P (0x46) -> WINBOND_W29C040 ("P" is for package type [32-pin PLCC], irrelevant) W_29C011 + W_29EE011 (0xC1) -> WINBOND_W29C010M (Same as W29C011A, W29EE011, W29EE012, and ASD AE29F1008) Also add ids for the following Winbond chips: W25Q40 W25Q128 W19B160BB W19B160BT W19B320SB/W19L320SB W19B320ST/W19L320ST W19B322MB W19B322MT W19B323MB W19B323MT W19B324MB W19B324MT W29C512A/W29EE512 W39L010 W39L040A W39L512 W49F002/W49F002B Signed-off-by: Mattias Mattsson <vitplister(a)gmail.com>

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[PATCH] Nvidia MCP SPI speedup
by Carl-Daniel Hailfinger 14 Sep '10

14 Sep '10

Use caching for Nvidia MCP SPI GPIO accesses. Reduce clock delay to zero. Should result in a 2x speedup, maybe more. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-bitbang_spi_nvidia_mcp_faster/mcp6x_spi.c =================================================================== --- flashrom-bitbang_spi_nvidia_mcp_faster/mcp6x_spi.c (Revision 1130) +++ flashrom-bitbang_spi_nvidia_mcp_faster/mcp6x_spi.c (Arbeitskopie) @@ -42,41 +42,39 @@ void *mcp6x_spibar = NULL; +/* Cached value of last GPIO state. */ +static uint8_t mcp_gpiostate; + static void mcp6x_request_spibus(void) { - uint8_t tmp; + mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530); + mcp_gpiostate |= 1 << MCP6X_SPI_REQUEST; + mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); - tmp = mmio_readb(mcp6x_spibar + 0x530); - tmp |= 1 << MCP6X_SPI_REQUEST; - mmio_writeb(tmp, mcp6x_spibar + 0x530); - /* Wait until we are allowed to use the SPI bus. */ while (!(mmio_readw(mcp6x_spibar + 0x530) & (1 << MCP6X_SPI_GRANT))) ; + + /* Update the cache. */ + mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530); } static void mcp6x_release_spibus(void) { - uint8_t tmp; - - tmp = mmio_readb(mcp6x_spibar + 0x530); - tmp &= ~(1 << MCP6X_SPI_REQUEST); - mmio_writeb(tmp, mcp6x_spibar + 0x530); + mcp_gpiostate &= ~(1 << MCP6X_SPI_REQUEST); + mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); } static void mcp6x_bitbang_set_cs(int val) { - uint8_t tmp; - /* Requesting and releasing the SPI bus is handled in here to allow the * chipset to use its own SPI engine for native reads. */ if (val == 0) mcp6x_request_spibus(); - tmp = mmio_readb(mcp6x_spibar + 0x530); - tmp &= ~(1 << MCP6X_SPI_CS); - tmp |= (val << MCP6X_SPI_CS); - mmio_writeb(tmp, mcp6x_spibar + 0x530); + mcp_gpiostate &= ~(1 << MCP6X_SPI_CS); + mcp_gpiostate |= (val << MCP6X_SPI_CS); + mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); if (val == 1) mcp6x_release_spibus(); @@ -84,31 +82,22 @@ static void mcp6x_bitbang_set_sck(int val) { - uint8_t tmp; - - tmp = mmio_readb(mcp6x_spibar + 0x530); - tmp &= ~(1 << MCP6X_SPI_SCK); - tmp |= (val << MCP6X_SPI_SCK); - mmio_writeb(tmp, mcp6x_spibar + 0x530); + mcp_gpiostate &= ~(1 << MCP6X_SPI_SCK); + mcp_gpiostate |= (val << MCP6X_SPI_SCK); + mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); } static void mcp6x_bitbang_set_mosi(int val) { - uint8_t tmp; - - tmp = mmio_readb(mcp6x_spibar + 0x530); - tmp &= ~(1 << MCP6X_SPI_MOSI); - tmp |= (val << MCP6X_SPI_MOSI); - mmio_writeb(tmp, mcp6x_spibar + 0x530); + mcp_gpiostate &= ~(1 << MCP6X_SPI_MOSI); + mcp_gpiostate |= (val << MCP6X_SPI_MOSI); + mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); } static int mcp6x_bitbang_get_miso(void) { - uint8_t tmp; - - tmp = mmio_readb(mcp6x_spibar + 0x530); - tmp = (tmp >> MCP6X_SPI_MISO) & 0x1; - return tmp; + mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530); + return (mcp_gpiostate >> MCP6X_SPI_MISO) & 0x1; } static const struct bitbang_spi_master bitbang_spi_master_mcp6x = { @@ -176,9 +165,10 @@ msg_pdbg("SPI control is 0x%04x, req=%i, gnt=%i\n", status, (status >> MCP6X_SPI_REQUEST) & 0x1, (status >> MCP6X_SPI_GRANT) & 0x1); + mcp_gpiostate = status & 0xff; - /* 1 usec halfperiod delay for now. */ - if (bitbang_spi_init(&bitbang_spi_master_mcp6x, 1)) { + /* Zero halfperiod delay. */ + if (bitbang_spi_init(&bitbang_spi_master_mcp6x, 0)) { /* This should never happen. */ msg_perr("MCP6X bitbang SPI master init failed!\n"); return 1; -- http://www.hailfinger.org/

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[commit] r1164 - trunk
by repository service 14 Sep '10

14 Sep '10

Author: hailfinger Date: Tue Sep 14 03:29:49 2010 New Revision: 1164 URL: http://flashrom.org/trac/flashrom/changeset/1164 Log: Use caching for Nvidia MCP SPI GPIO accesses. Reduce clock delay to zero. Tests show more than 2x speedup. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Tested-by: Andrew Morgan <ziltro(a)ziltro.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/mcp6x_spi.c Modified: trunk/mcp6x_spi.c ============================================================================== --- trunk/mcp6x_spi.c Tue Sep 14 01:00:57 2010 (r1163) +++ trunk/mcp6x_spi.c Tue Sep 14 03:29:49 2010 (r1164) @@ -42,41 +42,39 @@ void *mcp6x_spibar = NULL; +/* Cached value of last GPIO state. */ +static uint8_t mcp_gpiostate; + static void mcp6x_request_spibus(void) { - uint8_t tmp; - - tmp = mmio_readb(mcp6x_spibar + 0x530); - tmp |= 1 << MCP6X_SPI_REQUEST; - mmio_writeb(tmp, mcp6x_spibar + 0x530); + mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530); + mcp_gpiostate |= 1 << MCP6X_SPI_REQUEST; + mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); /* Wait until we are allowed to use the SPI bus. */ while (!(mmio_readw(mcp6x_spibar + 0x530) & (1 << MCP6X_SPI_GRANT))) ; + + /* Update the cache. */ + mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530); } static void mcp6x_release_spibus(void) { - uint8_t tmp; - - tmp = mmio_readb(mcp6x_spibar + 0x530); - tmp &= ~(1 << MCP6X_SPI_REQUEST); - mmio_writeb(tmp, mcp6x_spibar + 0x530); + mcp_gpiostate &= ~(1 << MCP6X_SPI_REQUEST); + mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); } static void mcp6x_bitbang_set_cs(int val) { - uint8_t tmp; - /* Requesting and releasing the SPI bus is handled in here to allow the * chipset to use its own SPI engine for native reads. */ if (val == 0) mcp6x_request_spibus(); - tmp = mmio_readb(mcp6x_spibar + 0x530); - tmp &= ~(1 << MCP6X_SPI_CS); - tmp |= (val << MCP6X_SPI_CS); - mmio_writeb(tmp, mcp6x_spibar + 0x530); + mcp_gpiostate &= ~(1 << MCP6X_SPI_CS); + mcp_gpiostate |= (val << MCP6X_SPI_CS); + mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); if (val == 1) mcp6x_release_spibus(); @@ -84,31 +82,22 @@ static void mcp6x_bitbang_set_sck(int val) { - uint8_t tmp; - - tmp = mmio_readb(mcp6x_spibar + 0x530); - tmp &= ~(1 << MCP6X_SPI_SCK); - tmp |= (val << MCP6X_SPI_SCK); - mmio_writeb(tmp, mcp6x_spibar + 0x530); + mcp_gpiostate &= ~(1 << MCP6X_SPI_SCK); + mcp_gpiostate |= (val << MCP6X_SPI_SCK); + mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); } static void mcp6x_bitbang_set_mosi(int val) { - uint8_t tmp; - - tmp = mmio_readb(mcp6x_spibar + 0x530); - tmp &= ~(1 << MCP6X_SPI_MOSI); - tmp |= (val << MCP6X_SPI_MOSI); - mmio_writeb(tmp, mcp6x_spibar + 0x530); + mcp_gpiostate &= ~(1 << MCP6X_SPI_MOSI); + mcp_gpiostate |= (val << MCP6X_SPI_MOSI); + mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); } static int mcp6x_bitbang_get_miso(void) { - uint8_t tmp; - - tmp = mmio_readb(mcp6x_spibar + 0x530); - tmp = (tmp >> MCP6X_SPI_MISO) & 0x1; - return tmp; + mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530); + return (mcp_gpiostate >> MCP6X_SPI_MISO) & 0x1; } static const struct bitbang_spi_master bitbang_spi_master_mcp6x = { @@ -176,9 +165,10 @@ msg_pdbg("SPI control is 0x%04x, req=%i, gnt=%i\n", status, (status >> MCP6X_SPI_REQUEST) & 0x1, (status >> MCP6X_SPI_GRANT) & 0x1); + mcp_gpiostate = status & 0xff; - /* 1 usec halfperiod delay for now. */ - if (bitbang_spi_init(&bitbang_spi_master_mcp6x, 1)) { + /* Zero halfperiod delay. */ + if (bitbang_spi_init(&bitbang_spi_master_mcp6x, 0)) { /* This should never happen. */ msg_perr("MCP6X bitbang SPI master init failed!\n"); return 1;

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ASUS P5GD2 Premium
by Roberto Malinverni 14 Sep '10

14 Sep '10

Base Board Information from DMIDECODE: Manufacturer: ASUSTeK Computer INC. Product Name: P5GD2-Premium Version: Rev 1.xx Link to official firmware: I can't provide it due to the way Asus's site works... (I can upload my copy somewhere if you want) You have to search here http://support.asus.com/download/download.aspx?SLanguage=en-us filling the 3 search fields with: "motherboard" "socket 775" "p5gd2 premium" Attached are the requested logs.

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Re: [flashrom] ST M25PX32 and M25PX64 flash chip support
by Jason Shriver 14 Sep '10

14 Sep '10

Attached are the test results for the M25PX32 and M25PX64 flash chips. -----Original Message----- From: Jason Shriver [mailto:J.Shriver@F5.com] Sent: Monday, September 13, 2010 11:51 AM To: 'flashrom(a)flashrom.org' Subject: [flashrom] ST M25PX32 and M25PX64 flash chip support Add support for ST M25PX32 and M25PX64 flash chips. Probe, read, erase and write have been tested and all are functional. Signed-off-by: Jason Shriver <j.shriver(a)f5.com>

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[Patch] Reduce usage of w836xx_memw
by David Borg 14 Sep '10

14 Sep '10

Patch reduces usage of w836xx_memw functions and board enables, which would become redundant after "[PATCH] W83697xx superio flash enable" is hooked up to generic superio detection. Signed-off-by: David Borg <borg.db(a)gmail.com> Regards, David

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[commit] r1163 - trunk
by repository service 14 Sep '10

14 Sep '10

Author: uwe Date: Tue Sep 14 01:00:57 2010 New Revision: 1163 URL: http://flashrom.org/trac/flashrom/changeset/1163 Log: Add support for the abit BM6 board. Signed-off-by: Tim ter Laak <timl(a)scintilla.utwente.nl> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Mon Sep 13 21:59:28 2010 (r1162) +++ trunk/board_enable.c Tue Sep 14 01:00:57 2010 (r1163) @@ -1155,6 +1155,15 @@ /* * Suited for: + * - abit BM6 + */ +static int intel_piix4_gpo26_lower(void) +{ + return intel_piix4_gpo_set(26, 0); +} + +/* + * Suited for: * - Intel SE440BX-2 */ static int intel_piix4_gpo27_lower(void) @@ -1828,6 +1837,7 @@ /* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... OK? flash enable */ #if defined(__i386__) || defined(__x86_64__) {0x10DE, 0x0547, 0x147B, 0x1C2F, 0x10DE, 0x0548, 0x147B, 0x1C2F, NULL, NULL, NULL, "abit", "AN-M2", 0, NT, nvidia_mcp_gpio2_raise}, + {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^i440BX-W977 (BM6)$", NULL, NULL, "abit", "BM6", 0, OK, intel_piix4_gpo26_lower}, {0x8086, 0x24d3, 0x147b, 0x1014, 0x8086, 0x2578, 0x147b, 0x1014, NULL, NULL, NULL, "abit", "IC7", 0, NT, intel_ich_gpio23_raise}, {0x8086, 0x2930, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "abit", "IP35", 0, OK, intel_ich_gpio16_raise}, {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Mon Sep 13 21:59:28 2010 (r1162) +++ trunk/print.c Tue Sep 14 01:00:57 2010 (r1163) @@ -283,6 +283,7 @@ B("A-Trend", "ATC-6220", 1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL), B("abit", "AN-M2", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?DEFTITLE=…", NULL), B("abit", "AX8", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=…", NULL), + B("abit", "BM6", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA…", NULL), B("abit", "Fatal1ty F-I90HD", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?pMODEL_NA…", NULL), B("abit", "IC7", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA…", NULL), B("abit", "IP35", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LG…", NULL),

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Re: [coreboot] flashrom patch: add support for Abit AB-BM6 board
by Carl-Daniel Hailfinger 14 Sep '10

14 Sep '10

Hi Tim, it seems your flashrom patch from exactly two years ago slipped through the cracks until now. I'm very sorry about that. Do you still own the board? If yes, could you please run download latest flashrom (at least 0.9.2, preferably latest svn) and provide the output of the following commands (as root): flashrom -V superiotool -deV flashrom supports DMI matching since a few months, so it may be possible to identify your board that way. And with superiotool output, we could perhaps improve matching a bit more. You already provided full lspci -nnvvxx output at http://marc.info/?l=linuxbios&m=122276697617977&w=2 so I'm not going to request that again. (I couldn't link to the coreboot.org mailing list archives because that message is corrupt). On 03.09.2008 11:42, Tim ter Laak wrote: > This patch adds support for the Abit AB-BM6 mainboard to flashrom. > > The biggest part is a generic function to lower a GPIO line on the > PIIX4E southbridge, copied and adapted from its ich_gpio_raise() > counterpart (mostly lower instead of raise, followed names from the > PIIX4E datasheet). The board specific function then uses this to lower > GPO 26. > > Signed-off-by: Tim ter Laak <timl(a)scintilla.utwente.nl> > > +/** > + * Suited for Abit AB-BM6. > + */ > +static int piix4_gpio26_lower(const char *name) > +{ > + return piix4_gpio_lower(name, 0x8086, 0x7113, 0x40, 0x34, 0xffc0, 26); With current flashrom, the line above would look like this: return intel_piix4_gpo_set(26, 0); > +} > + > + > + > +/** > * Suited for Acorp 6A815EPD. > */ > static int board_acorp_6a815epd(const char *name) > @@ -672,6 +724,8 @@ > NULL, NULL, "GIGABYTE GA-7VT600", board_biostar_p4m80_m4}, > {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, > NULL, NULL, "MSI K8T Neo2", w83627thf_gpio4_4_raise_2e}, > + {0x8086, 0x7190, 0x0000, 0x0000, 0x8086, 0x7110, 0x0000, 0x0000, > + "abit", "ab-bm6", "Abit AB-BM6", piix4_gpio26_lower}, > {0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL} /* Keep this */ > }; If DMI is useful on your board, we could try to match the DMI strings and avoid the -m abit:ab-bm6 parameter for flashrom. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH] support for MX251635E
by Stephan GUILLOUX 13 Sep '10

13 Sep '10

Hello, Below, a patch to allow MX25L1635E support, as discussed with Carldani. It is also available in attachment. This one is working fine on our system, with flashrom 0.9.2 Sorry for the patch, but I do not have svn anymore. I had to use a standard diff -c. Make good use of it;-) Stephan. Signed-off-by: Stephan Guilloux<stephan.guilloux(a)free.fr> --- ./flashrom-0.9.2.org/flashchips.h 2010-04-20 21:34:31.000000000 +0200 +++ ./flashrom-0.9.2.new/flashchips.h 2010-09-03 09:37:39.386013000 +0200 @@ -284,7 +284,8 @@ #define MX_25L6405 0x2017 /* MX25L3205{,D} */ #define MX_25L12805 0x2018 /* MX25L12805 */ #define MX_25L1635D 0x2415 +#define MX_25L1635E 0x2515 /* MX25L1635{E} */ #define MX_25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */ #define MX_29F001B 0x19 #define MX_29F001T 0x18 --- ./flashrom-0.9.2.org/flashchips.c 2010-04-20 21:34:31.000000000 +0200 +++ ./flashrom-0.9.2.new/flashchips.c 2010-09-03 09:38:44.637466000 +0200 @@ -2775,6 +2775,37 @@ { .vendor = "Macronix", + .name = "MX25L1635E", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = MX_ID, + .model_id = MX_25L1635E, + .total_size = 2048, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Macronix", .name = "MX25L3205", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = MX_ID,

4 3

[commit] r1162 - trunk
by repository service 13 Sep '10

13 Sep '10

Author: uwe Date: Mon Sep 13 21:59:28 2010 New Revision: 1162 URL: http://flashrom.org/trac/flashrom/changeset/1162 Log: Add support for the Macronix MX251635E chip. Signed-off-by: Stephan Guilloux <stephan.guilloux(a)free.fr> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Mon Sep 13 21:39:25 2010 (r1161) +++ trunk/flashchips.c Mon Sep 13 21:59:28 2010 (r1162) @@ -3623,6 +3623,39 @@ { .vendor = "Macronix", + .name = "MX25L1635E", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = MX_ID, + .model_id = MX_25L1635E, + .total_size = 2048, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Macronix", .name = "MX25L3205", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = MX_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Mon Sep 13 21:39:25 2010 (r1161) +++ trunk/flashchips.h Mon Sep 13 21:59:28 2010 (r1162) @@ -316,6 +316,7 @@ #define MX_25L6405 0x2017 /* MX25L3205{,D} */ #define MX_25L12805 0x2018 /* MX25L12805 */ #define MX_25L1635D 0x2415 +#define MX_25L1635E 0x2515 /* MX25L1635{E} */ #define MX_25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */ #define MX_29F001B 0x19 #define MX_29F001T 0x18

1 0

ASUS P4SC-E Board Enable / IT8707F support
by Mattias Mattsson 13 Sep '10

13 Sep '10

Hi, The attached patch adds board enable for the ASUS P4SC-E board. It does this by setting bits 3..2 of register 0x24 on the super i/o chip, while keeping bit 3 of register 0x23 set while manipulating the first register. I have no idea what this actually means since no public datasheet is available, but this is how the vendor BIOS does it. Tested on a P4SC-E with SST 39SF020A flash. Probe, read, erase, write all work. Matching on NB/SB. lspci/superio output: http://www.flashrom.org/pipermail/flashrom/2010-July/004090.html The ITE IT8707F chip seems to have been manufactured exclusively for ASUS: http://lists.lm-sensors.org/pipermail/lm-sensors/2002-October/001260.html In the past (before it's release) the IT8707F was listed on the ITE website: http://web.archive.org/web/20000510121435/http://www.ite.com.tw/productInfo… By looking through some ASUS manuals I have found that at least 17 ASUS boards is using this chip: P4S133/-VM P4S333/-FX/-M/-VF/-VM P4S533/-E/-VM P4SC/-E/-EA ("Terminator P4" barebone series) P4SDR-VM P4SE/U2 P4SGL-VM The vendor BIOS of these boards all use the same super i/o flash enable code described above. The following boards additionally clears bit 6 of IDX F4, LDN 7 in the flash enabling routine: P4S133, P4S333, P4S533, P4S533-E, P4SE, P4SE/U2. (Not included in this patch since I don't own any of these.) Many thanks to Reinder de Haan for help with reverse engineering this! Signed-off-by: Mattias Mattsson <vitplister(a)gmail.com>

2 2

[commit] r1161 - trunk
by repository service 13 Sep '10

13 Sep '10

Author: mhm Date: Mon Sep 13 21:39:25 2010 New Revision: 1161 URL: http://flashrom.org/trac/flashrom/changeset/1161 Log: Add board enable for ASUS P4SC-E. I does this by setting bits 3..2 of register 0x24 on the ITE IT8707F, while keeping bit 3 of register 0x23 set while manipulating the first register. AFAIK, there is no public datasheet available for this super i/o chip, but the above is how the vendor BIOS does it. Also, registers 0x23 and 0x24 seem to have the same meaning as on the ITE IT8710F. Matching on NB/SB. Tested on a P4SC-E with SST 39SF020A flash. Probe, read, erase, write all work. lspci/superio output: http://www.flashrom.org/pipermail/flashrom/2010-July/004090.html flashrom output: http://www.flashrom.org/pipermail/flashrom/2010-August/004566.html Many thanks to Reinder de Haan for help with reverse engineering this! Signed-off-by: Mattias Mattsson <vitplister(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Mon Sep 13 20:22:36 2010 (r1160) +++ trunk/board_enable.c Mon Sep 13 21:39:25 2010 (r1161) @@ -498,6 +498,48 @@ return ret; } +/* + * The ITE IT8707F is a custom chip made by ITE exclusively for ASUS. + * It uses the Winbond command sequence to enter extended configuration + * mode and the ITE sequence to exit. + * + * Registers seems similar to the ones on ITE IT8710F. + */ +static int it8707f_write_enable(uint8_t port) +{ + uint8_t tmp; + + w836xx_ext_enter(port); + + /* Set bit 3 (GLB_REG_WE) of reg 0x23: Makes reg 0x24-0x2A rw */ + tmp = sio_read(port, 0x23); + tmp |= (1 << 3); + sio_write(port, 0x23, tmp); + + /* Set bit 2 (FLASH_WE) and bit 3 (FLASH_IF_EN) of reg 0x24 */ + tmp = sio_read(port, 0x24); + tmp |= (1 << 2) | (1 << 3); + sio_write(port, 0x24, tmp); + + /* Clear bit 3 (GLB_REG_WE) of reg 0x23: Makes reg 0x24-0x2A ro */ + tmp = sio_read(port, 0x23); + tmp &= ~(1 << 3); + sio_write(port, 0x23, tmp); + + exit_conf_mode_ite(port); + + return 0; +} + +/* + * Suited for: + * - ASUS P4SC-E: SiS 651 + 962 + ITE IT8707F + */ +static int it8707f_write_enable_2e(void) +{ + return it8707f_write_enable(0x2e); +} + static int pc87360_gpio_set(uint8_t gpio, int raise) { static const int bankbase[] = {0, 4, 8, 10, 12}; @@ -1818,6 +1860,7 @@ {0x8086, 0x24D3, 0x1043, 0x80A6, 0x8086, 0x2578, 0x1043, 0x80F6, NULL, NULL, NULL, "ASUS", "P4C800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x8086, 0x24D5, 0x1043, 0x80F3, NULL, NULL, NULL, "ASUS", "P4P800", 0, NT, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, + {0x1039, 0x0651, 0x1043, 0x8081, 0x1039, 0x0962, 0, 0, NULL, NULL, NULL, "ASUS", "P4SC-E", 0, OK, it8707f_write_enable_2e}, {0x8086, 0x2570, 0x1043, 0x80A5, 0x105A, 0x24D3, 0x1043, 0x80A6, NULL, NULL, NULL, "ASUS", "P4SD-LA", 0, NT, intel_ich_gpio32_raise}, {0x1039, 0x0661, 0x1043, 0x8113, 0x1039, 0x5513, 0x1043, 0x8087, NULL, NULL, NULL, "ASUS", "P4S800-MX", 512, OK, w836xx_memw_enable_2e}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, OK, board_asus_p5a}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Mon Sep 13 20:22:36 2010 (r1160) +++ trunk/print.c Mon Sep 13 21:39:25 2010 (r1161) @@ -363,6 +363,7 @@ B("ASUS", "P4C800-E Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=cFuVCr9bXXCckmcK", NULL), B("ASUS", "P4P800", 1, "http://www.asus.com/product.aspx?P_ID=DYt1Et9MlBChqzLb", NULL), B("ASUS", "P4P800-E Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=INIJUvLlif7LHp3g", NULL), + B("ASUS", "P4SC-E", 1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS Terminator P4 533 barebone system"), B("ASUS", "P4SD-LA", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505", NULL), B("ASUS", "P4S800-MX", 1, "http://www.asus.com/product.aspx?P_ID=Bb57zoJhmO1Qkcrh", NULL), B("ASUS", "P5A", 1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL),

1 0

ST M25PX32 and M25PX64 flash chip support
by Jason Shriver 13 Sep '10

13 Sep '10

Add support for ST M25PX32 and M25PX64 flash chips. Probe, read, erase and write have been tested and all are functional. Signed-off-by: Jason Shriver <j.shriver(a)f5.com>

1 0

[PATCH] Fix a bitmask in it87spi_probe.
by Joshua Roys 13 Sep '10

13 Sep '10

Hello, I think the first shift should be a 0 since the one below it is 1, then 2, then 3, etc. Signed-off-by: Joshua Roys <roysjosh(a)gmail.com> Thanks, Josh

2 1

[PATCH] Board enable for MSI MS-6163 rev:2 (MS-6163 Pro) (try 2)
by Mattias Mattsson 13 Sep '10

13 Sep '10

Hi, This patch adds a board enable for MS-6163 Pro (MS-6163 rev:2) http://www.msi.com/index.php?func=proddesc&prod_no=340 Matching on NB/SB. Probe, read, erase and write all work. lspci/superiotool output: http://www.flashrom.org/pipermail/flashrom/2010-August/004461.html Previous version of this patch: http://www.flashrom.org/pipermail/flashrom/2010-August/004463.html I believe that this board enable also works for MSI BX Master (MS-6163 rev:3) and perhaps also for MSI MS-6163FC (MS-6163 rev:1) but these boards have not been tested. Test logs for MS-6163 (rev:2) attached. Thanks, -mattias

2 4

[commit] r1160 - trunk
by repository service 13 Sep '10

13 Sep '10

Author: mhm Date: Mon Sep 13 20:22:36 2010 New Revision: 1160 URL: http://flashrom.org/trac/flashrom/changeset/1160 Log: Board enable for MS-6163 Pro (MS-6163 rev:2) Matching on NB/SB. Probe, read, erase and write all work. lspci/superiotool output: http://www.flashrom.org/pipermail/flashrom/2010-August/004461.html I believe that this board enable also works for MSI BX Master (MS-6163 rev:3) and perhaps also for MSI MS-6163FC (MS-6163 rev:1) but these boards have not been tested. Test logs for MS-6163 (rev:2): http://www.flashrom.org/pipermail/flashrom/2010-September/004704.html Signed-off-by: Mattias Mattsson <vitplister(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Mon Sep 13 16:02:22 2010 (r1159) +++ trunk/board_enable.c Mon Sep 13 20:22:36 2010 (r1160) @@ -1095,6 +1095,15 @@ /* * Suited for: + * - MSI MS-6163 v2 (MS-6163 Pro): Intel 440BX + PIIX4E + Winbond W83977EF + */ +static int intel_piix4_gpo14_raise(void) +{ + return intel_piix4_gpo_set(14, 1); +} + +/* + * Suited for: * - EPoX EP-BX3 */ static int intel_piix4_gpo22_raise(void) @@ -1840,6 +1849,7 @@ {0x8086, 0x27A0, 0x8086, 0x27a0, 0x8086, 0x27b8, 0x8086, 0x27b8, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, OK, board_mitac_6513wu}, {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", 0, OK, nvidia_mcp_gpio2_raise}, /* TODO: Should probably be K8N Neo4 Platinum, see http://www.coreboot.org/pipermail/flashrom/2010-August/004362.html. */ + {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^MS-6163 (i440BX)$", NULL, NULL, "MSI", "MS-6163 (MS-6163 Pro)", 0, OK, intel_piix4_gpo14_raise}, {0x1039, 0x0745, 0, 0, 0x1039, 0x0018, 0, 0, "^MS-6561", NULL, NULL, "MSI", "MS-6561 (745 Ultra)", 0, OK, w836xx_memw_enable_2e}, {0x8086, 0x2560, 0x1462, 0x5770, 0x8086, 0x2562, 0x1462, 0x5778, NULL, NULL, NULL, "MSI", "MS-6577 (Xenon)", 0, OK, w83627hf_gpio25_raise_2e}, {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, OK, board_msi_kt4v}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Mon Sep 13 16:02:22 2010 (r1159) +++ trunk/print.c Mon Sep 13 20:22:36 2010 (r1160) @@ -446,6 +446,7 @@ B("Mitac", "6513WU", 1, "http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/produ…", NULL), B("MSI", "MS-6153", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=336", NULL), B("MSI", "MS-6156", 1, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/boards/Motherboards/…", NULL), + B("MSI", "MS-6163 (MS-6163 Pro)",1, "http://www.msi.com/index.php?func=proddesc&prod_no=340", NULL), B("MSI", "MS-6178", 0, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=343", "Immediately powers off if you try to hot-plug the chip. However, this does '''not''' happen if you use coreboot. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>."), B("MSI", "MS-6330 (K7T Turbo)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=327", NULL), B("MSI", "MS-6561 (745 Ultra)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=274", NULL),

1 0

DO NOT REBOOT OR POWEROFF (ASUS P5GDC-Delux)
by Alexander Mikhnovets 13 Sep '10

13 Sep '10

Hello. I need help. Sorry for my English. I used utility flashrom. I downloaded binary file with BIOS from www.asus.com, unpacked, and runned flashrom. My motherboard is ASUS P5GDC-Delux. My OS is Linux: $ lsb_release -a No LSB modules are available. Distributor ID: Ubuntu Description: Ubuntu 10.04 LTS Release: 10.04 Codename: lucid $ uname -a Linux stas-desktop 2.6.32-21-generic #32-Ubuntu SMP Fri Apr 16 08:10:02 UTC 2010 i686 GNU/Linux When I runed flashrum, I see following output: $ flashrom -w P5GDC-ASUS-DELUXE-1012.002.rom flashrom v0.9.1-r946 ERROR: Could not get I/O privileges (Operation not permitted). You need to be root. stas@stas-desktop:~/Рабочий стол$ sudo flashrom -w P5GDC-ASUS-DELUXE-1012.002.rom flashrom v0.9.1-r946 No coreboot table found. Found chipset "Intel ICH6/ICH6R", enabling flash write... OK. This chipset supports the following protocols: FWH. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... ERASE FAILED at 0x00000f98! Expected=0xff, Read=0x44, failed byte count from 0x00000000-0x00000fff: 0x4d ERASE FAILED! ERASE FAILED at 0x00000f98! Expected=0xff, Read=0x44, failed byte count from 0x00000000-0x0000ffff: 0xee4d ERASE FAILED! FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! Befor bios updating, I backuped old bios by command: $ sudo flashrom -r oldbios.dat flashrom v0.9.1-r946 No coreboot table found. Found chipset "Intel ICH6/ICH6R", enabling flash write... OK. This chipset supports the following protocols: FWH. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Reading flash... done. And after unhappy update I attempted restore old bios by command: $ sudo flashrom -w oldbios.dat flashrom v0.9.1-r946 No coreboot table found. Found chipset "Intel ICH6/ICH6R", enabling flash write... OK. This chipset supports the following protocols: FWH. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... ERASE FAILED at 0x00000f98! Expected=0xff, Read=0x44, failed byte count from 0x00000000-0x00000fff: 0x4d ERASE FAILED! ERASE FAILED at 0x00000f98! Expected=0xff, Read=0x44, failed byte count from 0x00000000-0x0000ffff: 0xee4d ERASE FAILED! FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! But now I don't know what I should doing... Thank you for your help. Some other output: $ lspci 00:00.0 Host bridge: Intel Corporation 82915G/P/GV/GL/PL/910GL Memory Controller Hub (rev 04) 00:01.0 PCI bridge: Intel Corporation 82915G/P/GV/GL/PL/910GL PCI Express Root Port (rev 04) 00:1b.0 Audio device: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) High Definition Audio Controller (rev 03) 00:1c.0 PCI bridge: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 1 (rev 03) 00:1c.1 PCI bridge: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 2 (rev 03) 00:1d.0 USB Controller: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #1 (rev 03) 00:1d.1 USB Controller: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #2 (rev 03) 00:1d.2 USB Controller: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #3 (rev 03) 00:1d.3 USB Controller: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #4 (rev 03) 00:1d.7 USB Controller: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB2 EHCI Controller (rev 03) 00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev d3) 00:1f.0 ISA bridge: Intel Corporation 82801FB/FR (ICH6/ICH6R) LPC Interface Bridge (rev 03) 00:1f.1 IDE interface: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) IDE Controller (rev 03) 00:1f.2 SATA controller: Intel Corporation 82801FR/FRW (ICH6R/ICH6RW) SATA Controller (rev 03) 00:1f.3 SMBus: Intel Corporation 82801FB/FBM/FR/FW/FRW (ICH6 Family) SMBus Controller (rev 03) 01:03.0 FireWire (IEEE 1394): Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) 01:04.0 Mass storage controller: Integrated Technology Express, Inc. IT/ITE8212 Dual channel ATA RAID controller (rev 13) 01:09.0 Communication controller: Conexant Systems, Inc. HCF V90 56k Data/Fax/Voice/Spkp PCI Modem (rev 08) 02:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8053 PCI-E Gigabit Ethernet Controller (rev 15) 04:00.0 VGA compatible controller: nVidia Corporation NV43 [GeForce 6600] (rev a2) $ sudo dmidecode |head -48 # dmidecode 2.9 SMBIOS 2.3 present. 79 structures occupying 2440 bytes. Table at 0x000F04C0. Handle 0x0000, DMI type 0, 20 bytes BIOS Information Vendor: American Megatrends Inc. Version: 1010.002 Release Date: 06/17/2005 Address: 0xF0000 Runtime Size: 64 kB ROM Size: 512 kB Characteristics: ISA is supported PCI is supported PNP is supported APM is supported BIOS is upgradeable BIOS shadowing is allowed ESCD support is available Boot from CD is supported Selectable boot is supported BIOS ROM is socketed EDD is supported 5.25"/1.2 MB floppy services are supported (int 13h) 3.5"/720 KB floppy services are supported (int 13h) 3.5"/2.88 MB floppy services are supported (int 13h) Print screen service is supported (int 5h) 8042 keyboard services are supported (int 9h) Serial services are supported (int 14h) Printer services are supported (int 17h) CGA/mono video services are supported (int 10h) ACPI is supported USB legacy is supported AGP is supported LS-120 boot is supported ATAPI Zip drive boot is supported BIOS boot specification is supported Handle 0x0001, DMI type 1, 25 bytes System Information Manufacturer: System manufacturer Product Name: System Product Name Version: System Version Serial Number: none UUID: 20EED887-8DFE-D511-80FF-0013D4808543 Wake-up Type: PCI PME#

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[commit] r1159 - trunk
by repository service 13 Sep '10

13 Sep '10

Author: hailfinger Date: Mon Sep 13 16:02:22 2010 New Revision: 1159 URL: http://flashrom.org/trac/flashrom/changeset/1159 Log: Board enable for ASUS P5GDC Deluxe. Match on SMBus and Audio. lspci/superiotool/flashrom output: http://www.flashrom.org/pipermail/flashrom/2010-September/004689.html Signed-off-by: Joshua Roys <roysjosh(a)gmail.com> Tested-by: Alexander Mikhnovets <alexander.mikhnovets(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sat Sep 11 17:25:48 2010 (r1158) +++ trunk/board_enable.c Mon Sep 13 16:02:22 2010 (r1159) @@ -1351,6 +1351,7 @@ * - ASUS P4P800: Intel socket478 + 865PE + ICH5R * - ASUS P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R * - ASUS P5GD1 Pro: Intel LGA 775 + 915P + ICH6R + * - ASUS P5GDC Deluxe: Intel socket775 + 915P + ICH6R * - ASUS P5PE-VM: Intel LGA775 + 865G + ICH5 * - Samsung Polaris 32: socket478 + 865P + ICH5 */ @@ -1812,6 +1813,7 @@ {0x1039, 0x0661, 0x1043, 0x8113, 0x1039, 0x5513, 0x1043, 0x8087, NULL, NULL, NULL, "ASUS", "P4S800-MX", 512, OK, w836xx_memw_enable_2e}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, OK, board_asus_p5a}, {0x8086, 0x266a, 0x1043, 0x80a6, 0x8086, 0x2668, 0x1043, 0x814e, NULL, NULL, NULL, "ASUS", "P5GD1 Pro", 0, OK, intel_ich_gpio21_raise}, + {0x8086, 0x266a, 0x1043, 0x80a6, 0x8086, 0x2668, 0x1043, 0x813d, NULL, NULL, NULL, "ASUS", "P5GDC Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise}, {0x8086, 0x24dd, 0x1043, 0x80a6, 0x8086, 0x2570, 0x1043, 0x8157, NULL, NULL, NULL, "ASUS", "P5PE-VM", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Sat Sep 11 17:25:48 2010 (r1158) +++ trunk/print.c Mon Sep 13 16:02:22 2010 (r1159) @@ -370,6 +370,7 @@ B("ASUS", "P5B-Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=bswT66IBSb2rEWNa", NULL), B("ASUS", "P5BV-M", 0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B-VM/", "Reported by Bernhard M. Wiedemann <bernhard(a)uml12d.zq1.de> to flashrom(a)coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."), B("ASUS", "P5GC-MX/1333", 1, "http://www.asus.com/product.aspx?P_ID=PYvbfOokwxUzJky3", NULL), + B("ASUS", "P5GDC Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=AbeoopyNpI2TZixg", NULL), B("ASUS", "P5KC", 1, "http://www.asus.com/product.aspx?P_ID=fFZ8oUIGmLpwNMjj", NULL), B("ASUS", "P5L-MX", 1, "http://www.asus.com/product.aspx?P_ID=X70d3NCzH2DE9vWH", NULL), B("ASUS", "P5GD1 Pro", 1, "http://www.asus.com/product.aspx?P_ID=50M49xQh71EZOeM1", NULL),

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FUJITSU D2901-H1 flash write success
by Tobias Winter 13 Sep '10

13 Sep '10

flashrom detects two cips, which i suspect are the same, since the mainboard only has one bioschip and the physical address is the same fot both detected chips. but that's just a guess and i am sure you have a better understanding of what's going on, so here you go. :) rescue:~# ./flashrom flashrom v0.9.2-r1158 on Linux 2.6.35.4 (x86_64), built with libpci 3.1.7, GCC 4.4.5 20100902 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found chipset "NVIDIA MCP78S", enabling flash write... This chipset is not really supported yet. Guesswork... SPI on this chipset is WIP. Write is unsupported! Mapping NVIDIA MCP6x SPI at 0xfef80000, unaligned size 0x544. Please send the output of "flashrom -V" to flashrom(a)flashrom.org to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: SPI. Found chip "Atmel AT25DF081A" (1024 KB, SPI) at physical address 0xfff00000. Found chip "Atmel AT26DF081A" (1024 KB, SPI) at physical address 0xfff00000. Multiple flash chips were detected: AT25DF081A AT26DF081A Please specify which chip to use with the -c <chipname> option. rescue:~# -------------------------------------------------------------------------- after reading the first chip, i wrote it back to it's origin. rescue:~# ./flashrom -f -Vw test.img -c AT25DF081A flashrom v0.9.2-r1158 on Linux 2.6.35.4 (x86_64), built with libpci 3.1.7, GCC 4.4.5 20100902 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 2 usecs, 1249M loops per second, 10 myus = 21 us, 100 myus = 101 us, 1000 myus = 1001 us, 10000 myus = 10034 us, 8 myus = 10 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "FUJITSU " DMI string system-product-name: "D2901-H1 " DMI string system-version: " " DMI string baseboard-manufacturer: "FUJITSU " DMI string baseboard-product-name: "D2901-H1" DMI string baseboard-version: "S26361-D2901-H1" DMI string chassis-type: "<OUT OF SPEC>" Found chipset "NVIDIA MCP78S", enabling flash write... chipset PCI ID is 10de:075c, This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Write is unsupported! Found SMBus device 10de:0752 at 00:01:1 MCP SPI BAR is at 0xfef80000 Mapping NVIDIA MCP6x SPI at 0xfef80000, unaligned size 0x544. SPI control is 0xc052, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: SPI. Probing for Atmel AT25DF081A, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Chip status register is 10 Found chip "Atmel AT25DF081A" (1024 KB, SPI) at physical address 0xfff00000. Ignoring security lockdown (if present) Ignoring status register byte 2 Chip status register is 10 Chip status register: Sector Protection Register Lock (SRPL) is not set Chip status register: Bit 6 is not set Chip status register: Erase/Program Error (EPE) is not set Chip status register: WP# pin (WPP) is not active Chip status register: Software Protection Status (SWP): no sectors are protected Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Thanks for your help! === Write/erase is not working yet on your programmer in its current configuration. Continuing anyway. Ignoring security lockdown (if present) Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash before programming... Erasing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x000fff, 0x001000-0x001fff, 0x002000-0x002fff, 0x003000-0x003fff, 0x004000-0x004fff, 0x005000-0x005fff, 0x006000-0x006fff, 0x007000-0x007fff, 0x008000-0x008fff, 0x009000-0x009fff, 0x00a000-0x00afff, 0x00b000-0x00bfff, 0x00c000-0x00cfff, 0x00d000-0x00dfff, 0x00e000-0x00efff, 0x00f000-0x00ffff, 0x010000-0x010fff, 0x011000-0x011fff, 0x012000-0x012fff, 0x013000-0x013fff, 0x014000-0x014fff, 0x015000-0x015fff, 0x016000-0x016fff, 0x017000-0x017fff, 0x018000-0x018fff, 0x019000-0x019fff, 0x01a000-0x01afff, 0x01b000-0x01bfff, 0x01c000-0x01cfff, 0x01d000-0x01dfff, 0x01e000-0x01efff, 0x01f000-0x01ffff, 0x020000-0x020fff, 0x021000-0x021fff, 0x022000-0x022fff, 0x023000-0x023fff, 0x024000-0x024fff, 0x025000-0x025fff, 0x026000-0x026fff, 0x027000-0x027fff, 0x028000-0x028fff, 0x029000-0x029fff, 0x02a000-0x02afff, 0x02b000-0x02bfff, 0x02c000-0x02cfff, 0x02d000-0x02dfff, 0x02e000-0x02efff, 0x02f000-0x02ffff, 0x030000-0x030fff, 0x031000-0x031fff, 0x032000-0x032fff, 0x033000-0x033fff, 0x034000-0x034fff, 0x035000-0x035fff, 0x036000-0x036fff, 0x037000-0x037fff, 0x038000-0x038fff, 0x039000-0x039fff, 0x03a000-0x03afff, 0x03b000-0x03bfff, 0x03c000-0x03cfff, 0x03d000-0x03dfff, 0x03e000-0x03efff, 0x03f000-0x03ffff, 0x040000-0x040fff, 0x041000-0x041fff, 0x042000-0x042fff, 0x043000-0x043fff, 0x044000-0x044fff, 0x045000-0x045fff, 0x046000-0x046fff, 0x047000-0x047fff, 0x048000-0x048fff, 0x049000-0x049fff, 0x04a000-0x04afff, 0x04b000-0x04bfff, 0x04c000-0x04cfff, 0x04d000-0x04dfff, 0x04e000-0x04efff, 0x04f000-0x04ffff, 0x050000-0x050fff, 0x051000-0x051fff, 0x052000-0x052fff, 0x053000-0x053fff, 0x054000-0x054fff, 0x055000-0x055fff, 0x056000-0x056fff, 0x057000-0x057fff, 0x058000-0x058fff, 0x059000-0x059fff, 0x05a000-0x05afff, 0x05b000-0x05bfff, 0x05c000-0x05cfff, 0x05d000-0x05dfff, 0x05e000-0x05efff, 0x05f000-0x05ffff, 0x060000-0x060fff, 0x061000-0x061fff, 0x062000-0x062fff, 0x063000-0x063fff, 0x064000-0x064fff, 0x065000-0x065fff, 0x066000-0x066fff, 0x067000-0x067fff, 0x068000-0x068fff, 0x069000-0x069fff, 0x06a000-0x06afff, 0x06b000-0x06bfff, 0x06c000-0x06cfff, 0x06d000-0x06dfff, 0x06e000-0x06efff, 0x06f000-0x06ffff, 0x070000-0x070fff, 0x071000-0x071fff, 0x072000-0x072fff, 0x073000-0x073fff, 0x074000-0x074fff, 0x075000-0x075fff, 0x076000-0x076fff, 0x077000-0x077fff, 0x078000-0x078fff, 0x079000-0x079fff, 0x07a000-0x07afff, 0x07b000-0x07bfff, 0x07c000-0x07cfff, 0x07d000-0x07dfff, 0x07e000-0x07efff, 0x07f000-0x07ffff, 0x080000-0x080fff, 0x081000-0x081fff, 0x082000-0x082fff, 0x083000-0x083fff, 0x084000-0x084fff, 0x085000-0x085fff, 0x086000-0x086fff, 0x087000-0x087fff, 0x088000-0x088fff, 0x089000-0x089fff, 0x08a000-0x08afff, 0x08b000-0x08bfff, 0x08c000-0x08cfff, 0x08d000-0x08dfff, 0x08e000-0x08efff, 0x08f000-0x08ffff, 0x090000-0x090fff, 0x091000-0x091fff, 0x092000-0x092fff, 0x093000-0x093fff, 0x094000-0x094fff, 0x095000-0x095fff, 0x096000-0x096fff, 0x097000-0x097fff, 0x098000-0x098fff, 0x099000-0x099fff, 0x09a000-0x09afff, 0x09b000-0x09bfff, 0x09c000-0x09cfff, 0x09d000-0x09dfff, 0x09e000-0x09efff, 0x09f000-0x09ffff, 0x0a0000-0x0a0fff, 0x0a1000-0x0a1fff, 0x0a2000-0x0a2fff, 0x0a3000-0x0a3fff, 0x0a4000-0x0a4fff, 0x0a5000-0x0a5fff, 0x0a6000-0x0a6fff, 0x0a7000-0x0a7fff, 0x0a8000-0x0a8fff, 0x0a9000-0x0a9fff, 0x0aa000-0x0aafff, 0x0ab000-0x0abfff, 0x0ac000-0x0acfff, 0x0ad000-0x0adfff, 0x0ae000-0x0aefff, 0x0af000-0x0affff, 0x0b0000-0x0b0fff, 0x0b1000-0x0b1fff, 0x0b2000-0x0b2fff, 0x0b3000-0x0b3fff, 0x0b4000-0x0b4fff, 0x0b5000-0x0b5fff, 0x0b6000-0x0b6fff, 0x0b7000-0x0b7fff, 0x0b8000-0x0b8fff, 0x0b9000-0x0b9fff, 0x0ba000-0x0bafff, 0x0bb000-0x0bbfff, 0x0bc000-0x0bcfff, 0x0bd000-0x0bdfff, 0x0be000-0x0befff, 0x0bf000-0x0bffff, 0x0c0000-0x0c0fff, 0x0c1000-0x0c1fff, 0x0c2000-0x0c2fff, 0x0c3000-0x0c3fff, 0x0c4000-0x0c4fff, 0x0c5000-0x0c5fff, 0x0c6000-0x0c6fff, 0x0c7000-0x0c7fff, 0x0c8000-0x0c8fff, 0x0c9000-0x0c9fff, 0x0ca000-0x0cafff, 0x0cb000-0x0cbfff, 0x0cc000-0x0ccfff, 0x0cd000-0x0cdfff, 0x0ce000-0x0cefff, 0x0cf000-0x0cffff, 0x0d0000-0x0d0fff, 0x0d1000-0x0d1fff, 0x0d2000-0x0d2fff, 0x0d3000-0x0d3fff, 0x0d4000-0x0d4fff, 0x0d5000-0x0d5fff, 0x0d6000-0x0d6fff, 0x0d7000-0x0d7fff, 0x0d8000-0x0d8fff, 0x0d9000-0x0d9fff, 0x0da000-0x0dafff, 0x0db000-0x0dbfff, 0x0dc000-0x0dcfff, 0x0dd000-0x0ddfff, 0x0de000-0x0defff, 0x0df000-0x0dffff, 0x0e0000-0x0e0fff, 0x0e1000-0x0e1fff, 0x0e2000-0x0e2fff, 0x0e3000-0x0e3fff, 0x0e4000-0x0e4fff, 0x0e5000-0x0e5fff, 0x0e6000-0x0e6fff, 0x0e7000-0x0e7fff, 0x0e8000-0x0e8fff, 0x0e9000-0x0e9fff, 0x0ea000-0x0eafff, 0x0eb000-0x0ebfff, 0x0ec000-0x0ecfff, 0x0ed000-0x0edfff, 0x0ee000-0x0eefff, 0x0ef000-0x0effff, 0x0f0000-0x0f0fff, 0x0f1000-0x0f1fff, 0x0f2000-0x0f2fff, 0x0f3000-0x0f3fff, 0x0f4000-0x0f4fff, 0x0f5000-0x0f5fff, 0x0f6000-0x0f6fff, 0x0f7000-0x0f7fff, 0x0f8000-0x0f8fff, 0x0f9000-0x0f9fff, 0x0fa000-0x0fafff, 0x0fb000-0x0fbfff, 0x0fc000-0x0fcfff, 0x0fd000-0x0fdfff, 0x0fe000-0x0fefff, 0x0ff000-0x0fffff, SUCCESS. done. Programming flash... COMPLETE. Verifying flash... VERIFIED. rescue:~# -------------------------------------------------------------------------- after reading the second chip, i wrote it back to it's origin. rescue:~# ./flashrom -f -Vw test2.img -c AT26DF081A flashrom v0.9.2-r1158 on Linux 2.6.35.4 (x86_64), built with libpci 3.1.7, GCC 4.4.5 20100902 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 2 usecs, 1249M loops per second, 10 myus = 12 us, 100 myus = 111 us, 1000 myus = 1000 us, 10000 myus = 10015 us, 8 myus = 9 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "FUJITSU " DMI string system-product-name: "D2901-H1 " DMI string system-version: " " DMI string baseboard-manufacturer: "FUJITSU " DMI string baseboard-product-name: "D2901-H1" DMI string baseboard-version: "S26361-D2901-H1" DMI string chassis-type: "<OUT OF SPEC>" Found chipset "NVIDIA MCP78S", enabling flash write... chipset PCI ID is 10de:075c, This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Write is unsupported! Found SMBus device 10de:0752 at 00:01:1 MCP SPI BAR is at 0xfef80000 Mapping NVIDIA MCP6x SPI at 0xfef80000, unaligned size 0x544. SPI control is 0xc052, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: SPI. Probing for Atmel AT26DF081A, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Chip status register is 10 Found chip "Atmel AT26DF081A" (1024 KB, SPI) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Thanks for your help! === Write/erase is not working yet on your programmer in its current configuration. Continuing anyway. Some block protection in effect, disabling Missing status register write definition, assuming EWSR is needed Block protection could not be disabled! Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash before programming... Erasing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x000fff, 0x001000-0x001fff, 0x002000-0x002fff, 0x003000-0x003fff, 0x004000-0x004fff, 0x005000-0x005fff, 0x006000-0x006fff, 0x007000-0x007fff, 0x008000-0x008fff, 0x009000-0x009fff, 0x00a000-0x00afff, 0x00b000-0x00bfff, 0x00c000-0x00cfff, 0x00d000-0x00dfff, 0x00e000-0x00efff, 0x00f000-0x00ffff, 0x010000-0x010fff, 0x011000-0x011fff, 0x012000-0x012fff, 0x013000-0x013fff, 0x014000-0x014fff, 0x015000-0x015fff, 0x016000-0x016fff, 0x017000-0x017fff, 0x018000-0x018fff, 0x019000-0x019fff, 0x01a000-0x01afff, 0x01b000-0x01bfff, 0x01c000-0x01cfff, 0x01d000-0x01dfff, 0x01e000-0x01efff, 0x01f000-0x01ffff, 0x020000-0x020fff, 0x021000-0x021fff, 0x022000-0x022fff, 0x023000-0x023fff, 0x024000-0x024fff, 0x025000-0x025fff, 0x026000-0x026fff, 0x027000-0x027fff, 0x028000-0x028fff, 0x029000-0x029fff, 0x02a000-0x02afff, 0x02b000-0x02bfff, 0x02c000-0x02cfff, 0x02d000-0x02dfff, 0x02e000-0x02efff, 0x02f000-0x02ffff, 0x030000-0x030fff, 0x031000-0x031fff, 0x032000-0x032fff, 0x033000-0x033fff, 0x034000-0x034fff, 0x035000-0x035fff, 0x036000-0x036fff, 0x037000-0x037fff, 0x038000-0x038fff, 0x039000-0x039fff, 0x03a000-0x03afff, 0x03b000-0x03bfff, 0x03c000-0x03cfff, 0x03d000-0x03dfff, 0x03e000-0x03efff, 0x03f000-0x03ffff, 0x040000-0x040fff, 0x041000-0x041fff, 0x042000-0x042fff, 0x043000-0x043fff, 0x044000-0x044fff, 0x045000-0x045fff, 0x046000-0x046fff, 0x047000-0x047fff, 0x048000-0x048fff, 0x049000-0x049fff, 0x04a000-0x04afff, 0x04b000-0x04bfff, 0x04c000-0x04cfff, 0x04d000-0x04dfff, 0x04e000-0x04efff, 0x04f000-0x04ffff, 0x050000-0x050fff, 0x051000-0x051fff, 0x052000-0x052fff, 0x053000-0x053fff, 0x054000-0x054fff, 0x055000-0x055fff, 0x056000-0x056fff, 0x057000-0x057fff, 0x058000-0x058fff, 0x059000-0x059fff, 0x05a000-0x05afff, 0x05b000-0x05bfff, 0x05c000-0x05cfff, 0x05d000-0x05dfff, 0x05e000-0x05efff, 0x05f000-0x05ffff, 0x060000-0x060fff, 0x061000-0x061fff, 0x062000-0x062fff, 0x063000-0x063fff, 0x064000-0x064fff, 0x065000-0x065fff, 0x066000-0x066fff, 0x067000-0x067fff, 0x068000-0x068fff, 0x069000-0x069fff, 0x06a000-0x06afff, 0x06b000-0x06bfff, 0x06c000-0x06cfff, 0x06d000-0x06dfff, 0x06e000-0x06efff, 0x06f000-0x06ffff, 0x070000-0x070fff, 0x071000-0x071fff, 0x072000-0x072fff, 0x073000-0x073fff, 0x074000-0x074fff, 0x075000-0x075fff, 0x076000-0x076fff, 0x077000-0x077fff, 0x078000-0x078fff, 0x079000-0x079fff, 0x07a000-0x07afff, 0x07b000-0x07bfff, 0x07c000-0x07cfff, 0x07d000-0x07dfff, 0x07e000-0x07efff, 0x07f000-0x07ffff, 0x080000-0x080fff, 0x081000-0x081fff, 0x082000-0x082fff, 0x083000-0x083fff, 0x084000-0x084fff, 0x085000-0x085fff, 0x086000-0x086fff, 0x087000-0x087fff, 0x088000-0x088fff, 0x089000-0x089fff, 0x08a000-0x08afff, 0x08b000-0x08bfff, 0x08c000-0x08cfff, 0x08d000-0x08dfff, 0x08e000-0x08efff, 0x08f000-0x08ffff, 0x090000-0x090fff, 0x091000-0x091fff, 0x092000-0x092fff, 0x093000-0x093fff, 0x094000-0x094fff, 0x095000-0x095fff, 0x096000-0x096fff, 0x097000-0x097fff, 0x098000-0x098fff, 0x099000-0x099fff, 0x09a000-0x09afff, 0x09b000-0x09bfff, 0x09c000-0x09cfff, 0x09d000-0x09dfff, 0x09e000-0x09efff, 0x09f000-0x09ffff, 0x0a0000-0x0a0fff, 0x0a1000-0x0a1fff, 0x0a2000-0x0a2fff, 0x0a3000-0x0a3fff, 0x0a4000-0x0a4fff, 0x0a5000-0x0a5fff, 0x0a6000-0x0a6fff, 0x0a7000-0x0a7fff, 0x0a8000-0x0a8fff, 0x0a9000-0x0a9fff, 0x0aa000-0x0aafff, 0x0ab000-0x0abfff, 0x0ac000-0x0acfff, 0x0ad000-0x0adfff, 0x0ae000-0x0aefff, 0x0af000-0x0affff, 0x0b0000-0x0b0fff, 0x0b1000-0x0b1fff, 0x0b2000-0x0b2fff, 0x0b3000-0x0b3fff, 0x0b4000-0x0b4fff, 0x0b5000-0x0b5fff, 0x0b6000-0x0b6fff, 0x0b7000-0x0b7fff, 0x0b8000-0x0b8fff, 0x0b9000-0x0b9fff, 0x0ba000-0x0bafff, 0x0bb000-0x0bbfff, 0x0bc000-0x0bcfff, 0x0bd000-0x0bdfff, 0x0be000-0x0befff, 0x0bf000-0x0bffff, 0x0c0000-0x0c0fff, 0x0c1000-0x0c1fff, 0x0c2000-0x0c2fff, 0x0c3000-0x0c3fff, 0x0c4000-0x0c4fff, 0x0c5000-0x0c5fff, 0x0c6000-0x0c6fff, 0x0c7000-0x0c7fff, 0x0c8000-0x0c8fff, 0x0c9000-0x0c9fff, 0x0ca000-0x0cafff, 0x0cb000-0x0cbfff, 0x0cc000-0x0ccfff, 0x0cd000-0x0cdfff, 0x0ce000-0x0cefff, 0x0cf000-0x0cffff, 0x0d0000-0x0d0fff, 0x0d1000-0x0d1fff, 0x0d2000-0x0d2fff, 0x0d3000-0x0d3fff, 0x0d4000-0x0d4fff, 0x0d5000-0x0d5fff, 0x0d6000-0x0d6fff, 0x0d7000-0x0d7fff, 0x0d8000-0x0d8fff, 0x0d9000-0x0d9fff, 0x0da000-0x0dafff, 0x0db000-0x0dbfff, 0x0dc000-0x0dcfff, 0x0dd000-0x0ddfff, 0x0de000-0x0defff, 0x0df000-0x0dffff, 0x0e0000-0x0e0fff, 0x0e1000-0x0e1fff, 0x0e2000-0x0e2fff, 0x0e3000-0x0e3fff, 0x0e4000-0x0e4fff, 0x0e5000-0x0e5fff, 0x0e6000-0x0e6fff, 0x0e7000-0x0e7fff, 0x0e8000-0x0e8fff, 0x0e9000-0x0e9fff, 0x0ea000-0x0eafff, 0x0eb000-0x0ebfff, 0x0ec000-0x0ecfff, 0x0ed000-0x0edfff, 0x0ee000-0x0eefff, 0x0ef000-0x0effff, 0x0f0000-0x0f0fff, 0x0f1000-0x0f1fff, 0x0f2000-0x0f2fff, 0x0f3000-0x0f3fff, 0x0f4000-0x0f4fff, 0x0f5000-0x0f5fff, 0x0f6000-0x0f6fff, 0x0f7000-0x0f7fff, 0x0f8000-0x0f8fff, 0x0f9000-0x0f9fff, 0x0fa000-0x0fafff, 0x0fb000-0x0fbfff, 0x0fc000-0x0fcfff, 0x0fd000-0x0fdfff, 0x0fe000-0x0fefff, 0x0ff000-0x0fffff, SUCCESS. done. Programming flash... done. COMPLETE. Verifying flash... VERIFIED. rescue:~# -------------------------------------------------------------------------- here is the complete output of flashrom -V flashrom flashrom_0.9.2+r1141-2_amd64.deb flashromv rescue:~# cat flashromv flashrom v0.9.2-r1158 on Linux 2.6.35.4 (x86_64), built with libpci 3.1.7, GCC 4.4.5 20100902 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 2 usecs, 1249M loops per second, 10 myus = 12 us, 100 myus = 101 us, 1000 myus = 1001 us, 10000 myus = 10009 us, 8 myus = 10 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "FUJITSU " DMI string system-product-name: "D2901-H1 " DMI string system-version: " " DMI string baseboard-manufacturer: "FUJITSU " DMI string baseboard-product-name: "D2901-H1" DMI string baseboard-version: "S26361-D2901-H1" DMI string chassis-type: "<OUT OF SPEC>" Found chipset "NVIDIA MCP78S", enabling flash write... chipset PCI ID is 10de:075c, This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI Found SMBus device 10de:0752 at 00:01:1 MCP SPI BAR is at 0xfef80000 SPI control is 0xc052, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: SPI. Probing for AMD Am29F010A/B, 128 KB: skipped. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Probing for AMD Am29F016D, 2048 KB: skipped. Probing for AMD Am29F040B, 512 KB: skipped. Probing for AMD Am29F080B, 1024 KB: skipped. Probing for AMD Am29LV040B, 512 KB: skipped. Probing for AMD Am29LV081B, 1024 KB: skipped. Probing for AMIC A25L05PT, 64 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L05PU, 64 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L10PT, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L10PU, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L20PT, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L20PU, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L40PT, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L40PU, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L80P, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L16PT, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L16PU, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L512, 64 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L010, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L020, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L040, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L080, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L016, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L032, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25LQ032, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A29002B, 256 KB: skipped. Probing for AMIC A29002T, 256 KB: skipped. Probing for AMIC A29040B, 512 KB: skipped. Probing for AMIC A49LF040A, 512 KB: skipped. Probing for ASD AE49F2008, 256 KB: skipped. Probing for Atmel AT25DF021, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF041A, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF081, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF081A, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Chip status register is 10 Found chip "Atmel AT25DF081A" (1024 KB, SPI) at physical address 0xfff00000. Ignoring security lockdown (if present) Ignoring status register byte 2 Chip status register is 10 Chip status register: Sector Protection Register Lock (SRPL) is not set Chip status register: Bit 6 is not set Chip status register: Erase/Program Error (EPE) is not set Chip status register: WP# pin (WPP) is not active Chip status register: Software Protection Status (SWP): no sectors are protected Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Probing for Atmel AT25DF161, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF321, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF321A, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF641, 8192 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DQ161, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25F512B, 64 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25FS010, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25FS040, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT26DF041, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT26DF081A, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Chip status register is 10 Found chip "Atmel AT26DF081A" (1024 KB, SPI) at physical address 0xfff00000. Probing for Atmel AT26DF161, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT26DF161A, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT26F004, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT29C512, 64 KB: skipped. Probing for Atmel AT29C010A, 128 KB: skipped. Probing for Atmel AT29C020, 256 KB: skipped. Probing for Atmel AT29C040A, 512 KB: skipped. Probing for Atmel AT45CS1282, 16896 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB011D, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB021D, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB041D, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB081D, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB161D, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB321C, 4224 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB321D, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB642D, 8192 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT49BV512, 64 KB: skipped. Probing for Atmel AT49F020, 256 KB: skipped. Probing for Atmel AT49F002(N), 256 KB: skipped. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Probing for EMST F49B002UA, 256 KB: skipped. Probing for EMST F25L008A, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B05, 64 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B05T, 64 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B10, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B10T, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B20, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B20T, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B40, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B40T, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B80, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B80T, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B16, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B16T, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B32, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B32T, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B64, 8192 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B64T, 8192 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25D16, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F05, 64 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F10, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F20, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F40, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F80, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F16, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F32, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN29F010, 128 KB: skipped. Probing for Eon EN29F002(A)(N)B, 256 KB: skipped. Probing for Eon EN29F002(A)(N)T, 256 KB: skipped. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Probing for Hyundai HY29F002T, 256 KB: skipped. Probing for Hyundai HY29F002B, 256 KB: skipped. Probing for Intel 28F001BX-B, 128 KB: skipped. Probing for Intel 28F001BX-T, 128 KB: skipped. Probing for Intel 28F002BC-T, 256 KB: skipped. Probing for Intel 28F004S5, 512 KB: skipped. Probing for Intel 28F004BV/BE-B, 512 KB: skipped. Probing for Intel 28F004BV/BE-T, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-B, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-T, 512 KB: skipped. Probing for Intel 82802AB, 512 KB: skipped. Probing for Intel 82802AC, 1024 KB: skipped. Probing for Macronix MX25L512, 64 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L1005, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L2005, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L4005, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L8005, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L1635D, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L3205, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L3235D, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L6405, 8192 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L12805, 16384 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX29F001B, 128 KB: skipped. Probing for Macronix MX29F001T, 128 KB: skipped. Probing for Macronix MX29F002B, 256 KB: skipped. Probing for Macronix MX29F002T, 256 KB: skipped. Probing for Macronix MX29LV040, 512 KB: skipped. Probing for MoselVitelic V29C51000B, 64 KB: skipped. Probing for MoselVitelic V29C51000T, 64 KB: skipped. Probing for MoselVitelic V29C51400B, 512 KB: skipped. Probing for MoselVitelic V29C51400T, 512 KB: skipped. Probing for MoselVitelic V29LC51000, 64 KB: skipped. Probing for MoselVitelic V29LC51001, 128 KB: skipped. Probing for MoselVitelic V29LC51002, 256 KB: skipped. Probing for Numonyx M25PE10, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Numonyx M25PE20, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Numonyx M25PE40, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Numonyx M25PE80, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Numonyx M25PE16, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm25LV010, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm25LV016B, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm25LV020, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm25LV040, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm25LV080B, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm25LV512, 64 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm29F002T, 256 KB: skipped. Probing for PMC Pm29F002B, 256 KB: skipped. Probing for PMC Pm39LV010, 128 KB: skipped. Probing for PMC Pm39LV020, 256 KB: skipped. Probing for PMC Pm39LV040, 512 KB: skipped. Probing for PMC Pm49FL002, 256 KB: skipped. Probing for PMC Pm49FL004, 512 KB: skipped. Probing for Sanyo LF25FW203A, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Sharp LHF00L04, 1024 KB: skipped. Probing for Spansion S25FL008A, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Spansion S25FL016A, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST SST25VF016B, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST SST25VF032B, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST SST25VF064C, 8192 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST SST25VF040.REMS, 512 KB: probe_spi_rems: id1 0x0, id2 0x0 Probing for SST SST25VF040B, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST SST25LF040A.RES, 512 KB: probe_spi_res2: id1 0x0, id2 0x0 Probing for SST SST25VF040B.REMS, 512 KB: probe_spi_rems: id1 0x0, id2 0x0 Probing for SST SST25VF080B, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST SST28SF040A, 512 KB: skipped. Probing for SST SST29EE010, 128 KB: skipped. Probing for SST SST29LE010, 128 KB: skipped. Probing for SST SST29EE020A, 256 KB: skipped. Probing for SST SST29LE020, 256 KB: skipped. Probing for SST SST39SF512, 64 KB: skipped. Probing for SST SST39SF010A, 128 KB: skipped. Probing for SST SST39SF020A, 256 KB: skipped. Probing for SST SST39SF040, 512 KB: skipped. Probing for SST SST39VF512, 64 KB: skipped. Probing for SST SST39VF010, 128 KB: skipped. Probing for SST SST39VF020, 256 KB: skipped. Probing for SST SST39VF040, 512 KB: skipped. Probing for SST SST39VF080, 1024 KB: skipped. Probing for SST SST49LF002A/B, 256 KB: skipped. Probing for SST SST49LF003A/B, 384 KB: skipped. Probing for SST SST49LF004A/B, 512 KB: skipped. Probing for SST SST49LF004C, 512 KB: skipped. Probing for SST SST49LF008A, 1024 KB: skipped. Probing for SST SST49LF008C, 1024 KB: skipped. Probing for SST SST49LF016C, 2048 KB: skipped. Probing for SST SST49LF020, 256 KB: skipped. Probing for SST SST49LF020A, 256 KB: skipped. Probing for SST SST49LF040, 512 KB: skipped. Probing for SST SST49LF040B, 512 KB: skipped. Probing for SST SST49LF080A, 1024 KB: skipped. Probing for SST SST49LF160C, 2048 KB: skipped. Probing for ST M25P05-A, 64 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P05.RES, 64 KB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P10.RES, 128 KB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P40, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P40-old, 512 KB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P16, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P32, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P64, 8192 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P128, 16384 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M29F002B, 256 KB: skipped. Probing for ST M29F002T/NT, 256 KB: skipped. Probing for ST M29F040B, 512 KB: skipped. Probing for ST M29F400BB, 512 KB: skipped. Probing for ST M29F400BT, 512 KB: skipped. Probing for ST M29W010B, 128 KB: skipped. Probing for ST M29W040B, 512 KB: skipped. Probing for ST M29W512B, 64 KB: skipped. Probing for ST M50FLW040A, 512 KB: skipped. Probing for ST M50FLW040B, 512 KB: skipped. Probing for ST M50FLW080A, 1024 KB: skipped. Probing for ST M50FLW080B, 1024 KB: skipped. Probing for ST M50FW002, 256 KB: skipped. Probing for ST M50FW016, 2048 KB: skipped. Probing for ST M50FW040, 512 KB: skipped. Probing for ST M50FW080, 1024 KB: skipped. Probing for ST M50LPW116, 2048 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 KB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 KB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 KB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 KB: skipped. Probing for TI TMS29F002RB, 256 KB: skipped. Probing for TI TMS29F002RT, 256 KB: skipped. Probing for Winbond W25Q80, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25Q16, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25Q32, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25Q64, 8192 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25x10, 128 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25x20, 256 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25x40, 512 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25x80, 1024 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25x16, 2048 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25x32, 4096 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25x64, 8192 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W29C011, 128 KB: skipped. Probing for Winbond W29C020C, 256 KB: skipped. Probing for Winbond W29C040P, 512 KB: skipped. Probing for Winbond W29EE011, 128 KB: skipped. Probing for Winbond W39V040A, 512 KB: skipped. Probing for Winbond W39V040B, 512 KB: skipped. Probing for Winbond W39V040C, 512 KB: skipped. Probing for Winbond W39V040FA, 512 KB: skipped. Probing for Winbond W39V080A, 1024 KB: skipped. Probing for Winbond W49F002U, 256 KB: skipped. Probing for Winbond W49F020, 256 KB: skipped. Probing for Winbond W49V002A, 256 KB: skipped. Probing for Winbond W49V002FA, 256 KB: skipped. Probing for Winbond W39V080FA, 1024 KB: skipped. Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Probing for AMIC unknown AMIC SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel unknown Atmel SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon unknown Eon SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix unknown Macronix SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC unknown PMC SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST unknown SST SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST unknown ST SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Sanyo unknown Sanyo SPI chip, 0 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Generic unknown SPI chip (RDID), 0 KB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Generic unknown SPI chip (REMS), 0 KB: probe_spi_rems: id1 0x0, id2 0x0 Multiple flash chips were detected: AT25DF081A AT26DF081A Please specify which chip to use with the -c <chipname> option. rescue:~# -------------------------------------------------------------------------- and the output of dmidecode # dmidecode 2.9 SMBIOS 2.5 present. 64 structures occupying 2139 bytes. Table at 0x7DF62000. Handle 0x0000, DMI type 0, 24 bytes BIOS Information Vendor: FUJITSU // Phoenix Technologies Ltd. Version: 6.00 R1.09.2901.H1 Release Date: 05/19/2010 Address: 0xE6440 Runtime Size: 105408 bytes ROM Size: 1024 kB Characteristics: PCI is supported PNP is supported BIOS is upgradeable BIOS shadowing is allowed ESCD support is available Boot from CD is supported Selectable boot is supported 5.25"/360 KB floppy services are supported (int 13h) 5.25"/1.2 MB floppy services are supported (int 13h) 3.5"/720 KB floppy services are supported (int 13h) 3.5"/2.88 MB floppy services are supported (int 13h) Print screen service is supported (int 5h) 8042 keyboard services are supported (int 9h) Serial services are supported (int 14h) Printer services are supported (int 17h) CGA/mono video services are supported (int 10h) ACPI is supported USB legacy is supported LS-120 boot is supported ATAPI Zip drive boot is supported BIOS boot specification is supported Targeted content distribution is supported BIOS Revision: 1.9 Handle 0x0001, DMI type 1, 27 bytes System Information Manufacturer: FUJITSU Product Name: D2901-H1 Version: Serial Number: UUID: 2E1254D6-F229-C1E3-6206-001999723A4E Wake-up Type: Power Switch SKU Number: Not Specified Family: Not Specified Handle 0x0002, DMI type 2, 15 bytes Base Board Information Manufacturer: FUJITSU Product Name: D2901-H1 Version: S26361-D2901-H1 Serial Number: Asset Tag: Not Specified Features: Board is a hosting board Board is replaceable Location In Chassis: Not Specified Chassis Handle: 0x0003 Type: Motherboard Contained Object Handles: 0 Handle 0x0003, DMI type 3, 17 bytes Chassis Information Manufacturer: FUJITSU Type: Mini Tower Lock: Present Version: Serial Number: Asset Tag: Boot-up State: Safe Power Supply State: Safe Thermal State: Safe Security Status: None OEM Information: 0x00000000 Handle 0x0004, DMI type 4, 40 bytes Processor Information Socket Designation: Socket AM2+ Type: Central Processor Family: Opteron Manufacturer: AMD ID: 42 0F 10 00 FF FB 8B 17 Signature: Family 16, Model 4, Stepping 2 Flags: FPU (Floating-point unit on-chip) VME (Virtual mode extension) DE (Debugging extension) PSE (Page size extension) TSC (Time stamp counter) MSR (Model specific registers) PAE (Physical address extension) MCE (Machine check exception) CX8 (CMPXCHG8 instruction supported) APIC (On-chip APIC hardware supported) SEP (Fast system call) MTRR (Memory type range registers) PGE (Page global enable) MCA (Machine check architecture) CMOV (Conditional move instruction supported) PAT (Page attribute table) PSE-36 (36-bit page size extension) CLFSH (CLFLUSH instruction supported) MMX (MMX technology supported) FXSR (Fast floating-point save and restore) SSE (Streaming SIMD extensions) SSE2 (Streaming SIMD extensions 2) HTT (Hyper-threading technology) Version: AMD Voltage: 1.6 V External Clock: 133 MHz Max Speed: 2500 MHz Current Speed: 2500 MHz Status: Populated, Enabled Upgrade: None L1 Cache Handle: 0x0005 L2 Cache Handle: 0x0006 L3 Cache Handle: Not Provided Serial Number: Not Specified Asset Tag: Not Specified Part Number: Not Specified Core Count: 1 Core Enabled: 1 Thread Count: 1 Characteristics: None Handle 0x0005, DMI type 7, 19 bytes Cache Information Socket Designation: L1 Cache Configuration: Enabled, Not Socketed, Level 1 Operational Mode: Write Back Location: Internal Installed Size: 512 KB Maximum Size: 512 KB Supported SRAM Types: Burst Pipeline Burst Asynchronous Installed SRAM Type: Asynchronous Speed: Unknown Error Correction Type: Unknown System Type: Unknown Associativity: Unknown Handle 0x0006, DMI type 7, 19 bytes Cache Information Socket Designation: L2 Cache Configuration: Enabled, Not Socketed, Level 2 Operational Mode: Write Through Location: Internal Installed Size: 2048 KB Maximum Size: 2048 KB Supported SRAM Types: Burst Pipeline Burst Synchronous Installed SRAM Type: Synchronous Speed: Unknown Error Correction Type: Unknown System Type: Unified Associativity: Unknown Handle 0x0007, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: SMsC Internal Connector Type: None External Reference Designator: PS/2 Mouse External Connector Type: PS/2 Port Type: Mouse Port Handle 0x0008, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: SMsC Internal Connector Type: None External Reference Designator: Keyboard External Connector Type: PS/2 Port Type: Keyboard Port Handle 0x0009, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: SMsC Internal Connector Type: None External Reference Designator: Serial-1 External Connector Type: DB-9 male Port Type: Serial Port 16550 Compatible Handle 0x000A, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: BCM5787 Internal Connector Type: None External Reference Designator: LAN External Connector Type: RJ-45 Port Type: Network Port Handle 0x000B, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: None External Reference Designator: Rear: USB-1 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x000C, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: None External Reference Designator: Rear: USB-2 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x000D, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: None External Reference Designator: Rear: USB-3 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x000E, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: None External Reference Designator: Rear: USB-4 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x000F, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: None External Reference Designator: Rear: USB-5 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0010, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: None External Reference Designator: Rear: USB-6 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0011, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: 9 Pin Dual Inline (pin 10 cut) External Reference Designator: USB-7 External Connector Type: None Port Type: USB Handle 0x0012, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: 9 Pin Dual Inline (pin 10 cut) External Reference Designator: USB-8 External Connector Type: None Port Type: USB Handle 0x0013, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: None External Reference Designator: USB-9 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0014, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: None External Reference Designator: USB-10 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0015, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: nVidia MCP78 Internal Connector Type: None External Reference Designator: Video External Connector Type: DB-15 female Port Type: Video Port Handle 0x0016, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Realtek ALC262 Internal Connector Type: None External Reference Designator: Rear: Line-In External Connector Type: Mini Jack (headphones) Port Type: Audio Port Handle 0x0017, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Realtek ALC262 Internal Connector Type: None External Reference Designator: Rear: Line-Out External Connector Type: Mini Jack (headphones) Port Type: Audio Port Handle 0x0018, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: SAS/SATA Plug Receptacle External Reference Designator: SATA-0 External Connector Type: None Port Type: SATA Handle 0x0019, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: SAS/SATA Plug Receptacle External Reference Designator: SATA-1 External Connector Type: None Port Type: SATA Handle 0x001A, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: SAS/SATA Plug Receptacle External Reference Designator: SATA-2 External Connector Type: None Port Type: SATA Handle 0x001B, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: MCP78 Internal Connector Type: SAS/SATA Plug Receptacle External Reference Designator: SATA-3 External Connector Type: None Port Type: SATA Handle 0x001C, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: SMsC Internal Connector Type: On Board Floppy External Reference Designator: Floppy External Connector Type: None Port Type: None Handle 0x001D, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: SMsC Internal Connector Type: 25 Pin Dual Inline (pin 26 cut) External Reference Designator: Parallel External Connector Type: None Port Type: Parallel Port ECP/EPP Handle 0x001E, DMI type 9, 13 bytes System Slot Information Designation: PCIe x16 Type: x16 PCI Express Current Usage: Available Length: Long ID: 1 Characteristics: 3.3 V is provided PME signal is supported Handle 0x001F, DMI type 9, 13 bytes System Slot Information Designation: PCI1 Type: 32-bit PCI Current Usage: Available Length: Long ID: 3 Characteristics: 5.0 V is provided 3.3 V is provided PME signal is supported Handle 0x0020, DMI type 9, 13 bytes System Slot Information Designation: PCI2 Type: 32-bit PCI Current Usage: In Use Length: Long ID: 4 Characteristics: 5.0 V is provided 3.3 V is provided PME signal is supported Handle 0x0021, DMI type 9, 13 bytes System Slot Information Designation: PCIe x1 Type: x1 PCI Express Current Usage: Available Length: Long ID: 2 Characteristics: 3.3 V is provided PME signal is supported Handle 0x0022, DMI type 10, 14 bytes On Board Device 1 Information Type: Other Status: Disabled Description: SMsC SCH5127 SuperI/O On Board Device 2 Information Type: Sound Status: Disabled Description: Realtek ALC262 On Board Device 3 Information Type: Video Status: Disabled Description: Nvidia MCP78 On Board Device 4 Information Type: Other Status: Disabled Description: Argestes On Board Device 5 Information Type: Ethernet Status: Disabled Description: Broadcom BCM5787 Handle 0x0023, DMI type 11, 5 bytes OEM Strings String 1: FUJITSU String 2: FUJITSU String 3: FUJITSU TECHNOLOGY SOLUTIONS Handle 0x0024, DMI type 12, 5 bytes System Configuration Options Option 1: J18-20: Default position Option 2: J16-18: Reserved Option 3: J20-22: Recovery BIOS active Handle 0x0025, DMI type 13, 22 bytes BIOS Language Information Installable Languages: 1 en|US|iso8859-1 Currently Installed Language: en|US|iso8859-1 Handle 0x0026, DMI type 15, 29 bytes System Event Log Area Length: 80 bytes Header Start Offset: 0x0000 Header Length: 16 bytes Data Start Offset: 0x0010 Access Method: Memory-mapped physical 32-bit address Access Address: 0xFFF028CF Status: Valid, Not Full Change Token: 0x00000024 Header Format: Type 1 Supported Log Type Descriptors: 3 Descriptor 1: POST error Data Format 1: POST results bitmap Descriptor 2: Single-bit ECC memory error Data Format 2: Multiple-event Descriptor 3: Multi-bit ECC memory error Data Format 3: Multiple-event Handle 0x0027, DMI type 16, 15 bytes Physical Memory Array Location: System Board Or Motherboard Use: System Memory Error Correction Type: None Maximum Capacity: 8 GB Error Information Handle: Not Provided Number Of Devices: 4 Handle 0x0028, DMI type 17, 27 bytes Memory Device Array Handle: 0x0027 Error Information Handle: No Error Total Width: 64 bits Data Width: 64 bits Size: 2048 MB Form Factor: DIMM Set: 1 Locator: Slot-1 Bank Locator: DIMM1 Type: DDR2 Type Detail: Synchronous Speed: Unknown Manufacturer: Not Specified Serial Number: Not Specified Asset Tag: Not Specified Part Number: Not Specified Handle 0x0029, DMI type 17, 27 bytes Memory Device Array Handle: 0x0027 Error Information Handle: No Error Total Width: Unknown Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: 2 Locator: Slot-2 Bank Locator: DIMM2 Type: DDR2 Type Detail: Unknown Speed: Unknown Manufacturer: Not Specified Serial Number: Not Specified Asset Tag: Not Specified Part Number: Not Specified Handle 0x002A, DMI type 17, 27 bytes Memory Device Array Handle: 0x0027 Error Information Handle: No Error Total Width: Unknown Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: 1 Locator: Slot-3 Bank Locator: DIMM3 Type: DDR2 Type Detail: Unknown Speed: Unknown Manufacturer: Not Specified Serial Number: Not Specified Asset Tag: Not Specified Part Number: Not Specified Handle 0x002B, DMI type 17, 27 bytes Memory Device Array Handle: 0x0027 Error Information Handle: No Error Total Width: Unknown Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: 2 Locator: Slot-4 Bank Locator: DIMM4 Type: DDR2 Type Detail: Unknown Speed: Unknown Manufacturer: Not Specified Serial Number: Not Specified Asset Tag: Not Specified Part Number: Not Specified Handle 0x002C, DMI type 19, 15 bytes Memory Array Mapped Address Starting Address: 0x00000000000 Ending Address: 0x0007FFFFFFF Range Size: 2 GB Physical Array Handle: 0x0027 Partition Width: 0 Handle 0x002D, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x0007FFFFFFF Range Size: 2 GB Physical Device Handle: 0x0028 Memory Array Mapped Address Handle: 0x002C Partition Row Position: 1 Interleaved Data Depth: 1 Handle 0x002E, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x0007FFFFC00 Ending Address: 0x0007FFFFFFF Range Size: 1 kB Physical Device Handle: 0x0029 Memory Array Mapped Address Handle: 0x002C Partition Row Position: 1 Interleaved Data Depth: 1 Handle 0x002F, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x0007FFFFC00 Ending Address: 0x0007FFFFFFF Range Size: 1 kB Physical Device Handle: 0x002A Memory Array Mapped Address Handle: 0x002C Partition Row Position: 1 Interleaved Data Depth: 1 Handle 0x0030, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x0007FFFFC00 Ending Address: 0x0007FFFFFFF Range Size: 1 kB Physical Device Handle: 0x002B Memory Array Mapped Address Handle: 0x002C Partition Row Position: 1 Interleaved Data Depth: 1 Handle 0x0031, DMI type 32, 20 bytes System Boot Information Status: <OUT OF SPEC> Handle 0x0032, DMI type 39, 22 bytes System Power Supply Location: Not Specified Name: Manufacturer: Not Specified Serial Number: Asset Tag: Not Specified Model Part Number: Not Specified Revision: Max Power Capacity: 0.000 W Status: Present, Unknown Type: Switching Input Voltage Range Switching: Unknown Plugged: Yes Hot Replaceable: No Handle 0x0033, DMI type 129, 12 bytes OEM-specific Type Header and Data: 81 0C 33 00 01 01 02 01 00 05 00 02 Strings: Broadcom_ASF Broadcom_ASF_001 Handle 0x0034, DMI type 130, 16 bytes OEM-specific Type Header and Data: 82 10 34 00 00 5F 46 4A 5F 4F 45 4D 5F 10 00 00 Handle 0x0035, DMI type 176, 16 bytes OEM-specific Type Header and Data: B0 10 35 00 10 00 01 29 00 41 FF FF 00 FF FF FF Handle 0x0036, DMI type 177, 12 bytes OEM-specific Type Header and Data: B1 0C 36 00 11 04 09 01 00 00 00 00 Handle 0x0037, DMI type 185, 8 bytes OEM-specific Type Header and Data: B9 08 37 00 00 10 00 00 Handle 0x0038, DMI type 185, 8 bytes OEM-specific Type Header and Data: B9 08 38 00 01 10 00 00 Handle 0x0039, DMI type 185, 8 bytes OEM-specific Type Header and Data: B9 08 39 00 02 09 00 00 Handle 0x003A, DMI type 185, 8 bytes OEM-specific Type Header and Data: B9 08 3A 00 0F 10 00 00 Handle 0x003B, DMI type 185, 8 bytes OEM-specific Type Header and Data: B9 08 3B 00 15 10 00 00 Handle 0x003C, DMI type 185, 8 bytes OEM-specific Type Header and Data: B9 08 3C 00 FF 00 00 00 Handle 0x003D, DMI type 186, 15 bytes OEM-specific Type Header and Data: BA 0F 3D 00 15 C3 90 16 01 01 01 01 30 0E EA Handle 0x003E, DMI type 188, 8 bytes OEM-specific Type Header and Data: BC 08 3E 00 38 38 31 24 Handle 0x003F, DMI type 127, 4 bytes End Of Table rescue:~#

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[PATCH] Board enable for MSI MS-6561 (SiS 745)
by Mattias Mattsson 11 Sep '10

11 Sep '10

Hi, This patch adds a board enable for MSI MS-6561 (745 Ultra). SiS 745 chipset + Winbond W83697HF and Winbond W49F002U flash. Probe, read, erase and write all work. Matching on "NB/SB" (they are integrated). Also mark SiS 745 chipset as tested. W49F002U is already PREW. lspci/superiotool output and flashrom logs attached. Thanks, Signed-off-by: Mattias Mattsson <vitplister(a)gmail.com>

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