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[PATCH 1/1] Simplify hwaccess.c
by Peter Lemenkov 26 Aug '12

26 Aug '12

This file is saturated with superfluous ifdefs arranged into several nested levels. This in turn adds additional complexity to process of adding another architecture. I re-arranged all ifdef blocks and killed duplicated function definitions. Also I added define(__amd64) to the list of x86-arches. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- hwaccess.c | 85 +++++++++++++++++++++-------------------------------------- 1 files changed, 30 insertions(+), 55 deletions(-) diff --git a/hwaccess.c b/hwaccess.c index 3a61e60..4e87642 100644 --- a/hwaccess.c +++ b/hwaccess.c @@ -29,30 +29,47 @@ #endif #include "flash.h" +#if !( defined(__i386__) || \ + defined(__x86_64__) || defined(__amd64) || \ + defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips) || \ + defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__)) +#error Unknown architecture +#endif + #if defined(__i386__) || defined(__x86_64__) +#if defined(__FreeBSD__) || defined(__DragonFly__) +int io_fd; +#endif +#endif -/* sync primitive is not needed because x86 uses uncached accesses - * which have a strongly ordered memory model. - */ static inline void sync_primitive(void) { -} - -#if defined(__FreeBSD__) || defined(__DragonFly__) -int io_fd; +/* sync primitive is needed only on PowerPC because + * x86 uses uncached accesses which have a strongly ordered memory model + * /dev/mem on MIPS uses uncached accesses in mode 2 which has a strongly ordered memory model. + */ +#if defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) + /* Prevent reordering and/or merging of reads/writes to hardware. + * Such reordering and/or merging would break device accesses which + * depend on the exact access order. + */ + asm("eieio" : : : "memory"); #endif +} void get_io_perms(void) { +/* PCI port I/O is not yet implemented on PowerPC or MIPS. */ +#if defined(__i386__) || defined(__x86_64__) || defined(__amd64) #if defined(__DJGPP__) /* We have full permissions by default. */ return; #else -#if defined (__sun) && (defined(__i386) || defined(__amd64)) +#if defined (__sun) if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { #elif defined(__FreeBSD__) || defined (__DragonFly__) if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#else +#else if (iopl(3) != 0) { #endif msg_perr("ERROR: Could not get I/O privileges (%s).\n" @@ -65,60 +82,18 @@ void get_io_perms(void) exit(1); } #endif +#endif } void release_io_perms(void) { +/* PCI port I/O is not yet implemented on PowerPC or MIPS. */ +#if defined(__i386__) || defined(__x86_64__) || defined(__amd64) #if defined(__FreeBSD__) || defined(__DragonFly__) close(io_fd); #endif -} - -#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) - -static inline void sync_primitive(void) -{ - /* Prevent reordering and/or merging of reads/writes to hardware. - * Such reordering and/or merging would break device accesses which - * depend on the exact access order. - */ - asm("eieio" : : : "memory"); -} - -/* PCI port I/O is not yet implemented on PowerPC. */ -void get_io_perms(void) -{ -} - -/* PCI port I/O is not yet implemented on PowerPC. */ -void release_io_perms(void) -{ -} - -#elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips) - -/* sync primitive is not needed because /dev/mem on MIPS uses uncached accesses - * in mode 2 which has a strongly ordered memory model. - */ -static inline void sync_primitive(void) -{ -} - -/* PCI port I/O is not yet implemented on MIPS. */ -void get_io_perms(void) -{ -} - -/* PCI port I/O is not yet implemented on MIPS. */ -void release_io_perms(void) -{ -} - -#else - -#error Unknown architecture - #endif +} void mmio_writeb(uint8_t val, void *addr) { -- 1.7.2.3

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Re: [flashrom] [PATCH 5/7] warn if SMM BIOS Write Protection is detected in BIOS_CNTL
by Stefan Reinauer 25 Aug '12

25 Aug '12

On 5/23/11 4:23 PM, Stefan Tauner wrote: > Signed-off-by: Stefan Tauner<stefan.tauner(a)student.tuwien.ac.at> > --- > chipset_enable.c | 12 +++++++++++- > 1 files changed, 11 insertions(+), 1 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 83b49ad..339c6bb 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -264,8 +264,18 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, > (old& (1<< 0)) ? "en" : "dis"); > msg_pdbg("BIOS_CNTL is 0x%x\n", old); > > - new = old | 1; > + /* > + * Quote from the 6 Series datasheet: > + * "5: SMM BIOS Write Protect Disable (SMM_BWP) > + * 1 = BIOS region SMM protection is enabled. > + * The BIOS Region is not writable unless all processors are in SMM." > + * In earlier chipsets this bit is reserved. */ > + if (old& (5<< 1)) { > + msg_pinfo("WARNING: BIOS region SMM protection is enabled!\n"); > + return -1; You might still be successful doing the write, in case the SMM handler does not enforce the protection, so maybe you should just print a warning but not return here? > + } > > + new = old | 1; > if (new == old) > return 0; >

2 5

[commit] r1582 - trunk
by repository service 25 Aug '12

25 Aug '12

Author: stefanct Date: Sun Aug 26 04:35:13 2012 New Revision: 1582 URL: http://flashrom.org/trac/flashrom/changeset/1582 Log: Clean up enable_flash_ich and attempt to disable SMM write protection. This is based on chromiumos commit a5f4e82c59d6bcaf06b94623e5516d1db8cb843a. http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=com… See also http://www.flashrom.org/pipermail/flashrom/2011-November/008191.html Besides disabling the SMM protection this also fixes something that bothered me for a long time: the content of BIOS_CNTL was shown before we try to modify it. This is usually not what interests us and contradicts other outputs. With this patch we try to set the write enable and disable the SMM protection first and show the state of BIOS_CNTL afterwards. We now return an error only if the write enable is not set (which should be equivalent to the previous behavior on sane hardware, but it seems to be 'more correct' and makes the code clearer to do this explicitly). Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Aug 25 05:53:12 2012 (r1581) +++ trunk/chipset_enable.c Sun Aug 26 04:35:13 2012 (r1582) @@ -281,22 +281,15 @@ * See ie. page 375 of "Intel I/O Controller Hub 7 (ICH7) Family Datasheet" * http://download.intel.com/design/chipsets/datashts/30701303.pdf */ -static int enable_flash_ich(struct pci_dev *dev, const char *name, - int bios_cntl) +static int enable_flash_ich(struct pci_dev *dev, const char *name, uint8_t bios_cntl) { uint8_t old, new, wanted; /* - * Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, but + * Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, in Tunnel Creek it is even 32b, but * just treating it as 8 bit wide seems to work fine in practice. */ - old = pci_read_byte(dev, bios_cntl); - - msg_pdbg("\nBIOS Lock Enable: %sabled, ", - (old & (1 << 1)) ? "en" : "dis"); - msg_pdbg("BIOS Write Enable: %sabled, ", - (old & (1 << 0)) ? "en" : "dis"); - msg_pdbg("BIOS_CNTL is 0x%x\n", old); + wanted = old = pci_read_byte(dev, bios_cntl); /* * Quote from the 6 Series datasheet (Document Number: 324645-004): @@ -304,22 +297,36 @@ * 1 = BIOS region SMM protection is enabled. * The BIOS Region is not writable unless all processors are in SMM." * In earlier chipsets this bit is reserved. + * + * Try to unset it in any case. + * It won't hurt and makes sense in some cases according to Stefan Reinauer. */ - if (old & (1 << 5)) + wanted &= ~(1 << 5); + + /* Set BIOS Write Enable */ + wanted |= (1 << 0); + + /* Only write the register if it's necessary */ + if (wanted != old) { + rpci_write_byte(dev, bios_cntl, wanted); + new = pci_read_byte(dev, bios_cntl); + } else + new = old; + + msg_pdbg("\nBIOS_CNTL = 0x%02x: ", new); + msg_pdbg("BIOS Lock Enable: %sabled, ", (new & (1 << 1)) ? "en" : "dis"); + msg_pdbg("BIOS Write Enable: %sabled\n", (new & (1 << 0)) ? "en" : "dis"); + if (new & (1 << 5)) msg_pinfo("WARNING: BIOS region SMM protection is enabled!\n"); - wanted = old | 1; - if (wanted == old) - return 0; - - rpci_write_byte(dev, bios_cntl, wanted); - - if ((new = pci_read_byte(dev, bios_cntl)) != wanted) { - msg_pinfo("WARNING: Setting 0x%x from 0x%x to 0x%x on %s " - "failed. New value is 0x%x.\n", - bios_cntl, old, wanted, name, new); + + if (new != wanted) + msg_pinfo("WARNING: Setting Bios Control at 0x%x from 0x%02x to 0x%02x on %s failed.\n" + "New value is 0x%02x.\n", bios_cntl, old, wanted, name, new); + + /* Return an error if we could not set the write enable */ + if (!(new & (1 << 0))) return -1; - } return 0; }

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Re: [flashrom] [PATCH 1/3] Resort SPI function in chipdrivers.h.
by Carl-Daniel Hailfinger 25 Aug '12

25 Aug '12

Am 25.08.2012 22:35 schrieb Stefan Tauner: > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

[PATCH 3/3] Add support for generic SPI RES matching.
by Stefan Tauner 25 Aug '12

25 Aug '12

Support generic 1-byte SPI RES matching (low match quality). Support generic 2-byte SPI RES matching (high match quality). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipdrivers.h | 2 + flashchips.c | 31 +++++++++++++++ flashrom.c | 4 +- sfdp.c | 48 +---------------------- spi25.c | 117 +++++++++++++++++++++++++++++++++++++++++++++++++++------ 5 files changed, 143 insertions(+), 59 deletions(-) diff --git a/chipdrivers.h b/chipdrivers.h index 56a4c8a..c4b798a 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -37,6 +37,7 @@ int probe_spi_rdid4(struct flashctx *flash); int probe_spi_rems(struct flashctx *flash); int probe_spi_res1(struct flashctx *flash); int probe_spi_res2(struct flashctx *flash); +int probe_spi_automagic_res1(struct flashctx *flash); int spi_write_enable(struct flashctx *flash); int spi_write_disable(struct flashctx *flash); int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen); @@ -46,6 +47,7 @@ int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int b int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); +int spi_add_uniform_eraser(struct flashchip *chip, uint8_t opcode, uint32_t block_size); int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); uint8_t spi_read_status_register(struct flashctx *flash); int spi_write_status_register(struct flashctx *flash, int status); diff --git a/flashchips.c b/flashchips.c index 789f17f..4b78f7f 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9673,5 +9673,36 @@ const struct flashchip flashchips[] = { .write = NULL, }, + { + .vendor = "Generic", + .name = "unknown SPI chip (RES2)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res2, + .write = NULL, + }, + + { + .vendor = "Generic", + .name = "unknown SPI chip (RES1)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_automagic_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = spi_disable_blockprotect, + .write = NULL, + .read = spi_chip_read, + .voltage = {}, + }, + { NULL } }; diff --git a/flashrom.c b/flashrom.c index 44a3eba..c39abf6 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1029,7 +1029,9 @@ int probe_flash(struct registered_programmer *pgm, int startchip, struct flashct if (startchip == 0) break; /* Not the first flash chip detected on this bus, but not a generic match either. */ - if ((flash->chip->model_id != GENERIC_DEVICE_ID) && (flash->chip->model_id != SFDP_DEVICE_ID)) + if ((flash->chip->manufacture_id != GENERIC_MANUF_ID) && + (flash->chip->model_id != GENERIC_DEVICE_ID) && + (flash->chip->model_id != SFDP_DEVICE_ID)) break; /* Not the first flash chip detected on this bus, and it's just a generic match. Ignore it. */ notfound: diff --git a/sfdp.c b/sfdp.c index bc69dd0..1d3669c 100644 --- a/sfdp.c +++ b/sfdp.c @@ -81,50 +81,6 @@ struct sfdp_tbl_hdr { uint32_t ptp; /* 24b pointer */ }; -static int sfdp_add_uniform_eraser(struct flashchip *chip, uint8_t opcode, uint32_t block_size) -{ - int i; - uint32_t total_size = chip->total_size * 1024; - erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode); - - if (erasefn == NULL || total_size == 0 || block_size == 0 || - total_size % block_size != 0) { - msg_cdbg("%s: invalid input, please report to " - "flashrom(a)flashrom.org\n", __func__); - return 1; - } - - for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { - struct block_eraser *eraser = &chip->block_erasers[i]; - /* Check for duplicates (including (some) non-uniform ones). */ - if (eraser->eraseblocks[0].size == block_size && - eraser->block_erase == erasefn) { - msg_cdbg2(" Tried to add a duplicate block eraser: " - "%d x %d B with opcode 0x%02x.\n", - total_size/block_size, block_size, opcode); - return 1; - } - if (eraser->eraseblocks[0].size != 0 || - eraser->block_erase != NULL) { - msg_cspew(" Block Eraser %d is already occupied.\n", - i); - continue; - } - - eraser->block_erase = erasefn; - eraser->eraseblocks[0].size = block_size; - eraser->eraseblocks[0].count = total_size/block_size; - msg_cdbg2(" Block eraser %d: %d x %d B with opcode " - "0x%02x\n", i, total_size/block_size, block_size, - opcode); - return 0; - } - msg_cinfo("%s: Not enough space to store another eraser (i=%d)." - " Please report this at flashrom(a)flashrom.org\n", - __func__, i); - return 1; -} - static int sfdp_fill_flash(struct flashchip *chip, uint8_t *buf, uint16_t len) { uint8_t opcode_4k_erase = 0xFF; @@ -221,7 +177,7 @@ static int sfdp_fill_flash(struct flashchip *chip, uint8_t *buf, uint16_t len) } if (opcode_4k_erase != 0xFF) - sfdp_add_uniform_eraser(chip, opcode_4k_erase, 4 * 1024); + spi_add_uniform_eraser(chip, opcode_4k_erase, 4 * 1024); /* FIXME: double words 3-7 contain unused fast read information */ @@ -252,7 +208,7 @@ static int sfdp_fill_flash(struct flashchip *chip, uint8_t *buf, uint16_t len) tmp8 = buf[(4 * 7) + (j * 2) + 1]; msg_cspew(" Erase Sector Type %d Opcode: 0x%02x\n", j + 1, tmp8); - sfdp_add_uniform_eraser(chip, tmp8, block_size); + spi_add_uniform_eraser(chip, tmp8, block_size); } done: diff --git a/spi25.c b/spi25.c index 914b821..9ea04ef 100644 --- a/spi25.c +++ b/spi25.c @@ -22,6 +22,7 @@ * Contains the common SPI chip driver functions */ +#include <stdio.h> #include <string.h> #include "flash.h" #include "flashchips.h" @@ -232,6 +233,7 @@ int probe_spi_rems(struct flashctx *flash) int probe_spi_res1(struct flashctx *flash) { + const struct flashchip *chip = flash->chip; static const unsigned char allff[] = {0xff, 0xff, 0xff}; static const unsigned char all00[] = {0x00, 0x00, 0x00}; unsigned char readarr[3]; @@ -265,18 +267,23 @@ int probe_spi_res1(struct flashctx *flash) msg_cdbg("%s: id 0x%x\n", __func__, id2); - if (id2 != flash->chip->model_id) - return 0; + if (id2 == flash->chip->model_id) { + /* Print the status register to tell the user about possible write protection. */ + spi_prettyprint_status_register(flash); - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - return 1; + return 1; + } + + /* Test if there is any device ID. */ + if (GENERIC_MANUF_ID == chip->manufacture_id && id2 == chip->model_id) + return 1; + + return 0; } int probe_spi_res2(struct flashctx *flash) { + const struct flashchip *chip = flash->chip; unsigned char readarr[2]; uint32_t id1, id2; @@ -289,13 +296,55 @@ int probe_spi_res2(struct flashctx *flash) msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); - if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id) + if (id1 == chip->manufacture_id && id2 == chip->model_id) { + /* Print the status register to tell the + * user about possible write protection. + */ + spi_prettyprint_status_register(flash); + + return 1; + } + + /* Test if this is a pure vendor match. */ + if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id) + return 1; + + /* Test if there is any vendor ID and if this is indeed a two-byte RES. */ + if (GENERIC_MANUF_ID == chip->manufacture_id && id1 != 0xff && id1 != id2) + return 1; + + return 0; +} + +int probe_spi_automagic_res1(struct flashctx *flash) +{ + unsigned char readarr[1]; + unsigned int total_size; + + if (spi_res(flash, readarr, 1)) return 0; - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); + msg_cdbg("%s: id1 0x%x\n", __func__, readarr[0]); + if (readarr[0] < 0x10 || readarr[0] > 0x17) { + msg_cdbg("RES ID out of bounds: 0x%x\n", readarr[0]); + return 0; + } + total_size = (2 << readarr[0]) / 1024; + + //if (!force) { + //blablabla + //return 0; + //} + flash->chip->total_size = total_size; + + spi_add_uniform_eraser(flash->chip, 0x60, total_size * 1024); + spi_add_uniform_eraser(flash->chip, 0xc7, total_size * 1024); + /* This does not help users of locked-down thinkpads because there is only the 0xd8 erase op available. + * But since that one is used with various erase block sizes (non-uniform, 4k, 32k, 64k, 256k), we + * can not just add that too. */ + // gather (uniform) 0xd8 block size from command line argument? + flash->chip->write = spi_chip_write_1; + flash->chip->tested = TEST_OK_PREW; return 1; } @@ -748,6 +797,50 @@ erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode) } } +int spi_add_uniform_eraser(struct flashchip *chip, uint8_t opcode, uint32_t block_size) +{ + int i; + uint32_t total_size = chip->total_size * 1024; + erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode); + + if (erasefn == NULL || total_size == 0 || block_size == 0 || + total_size % block_size != 0) { + msg_cdbg("%s: invalid input, please report to " + "flashrom(a)flashrom.org\n", __func__); + return 1; + } + + for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { + struct block_eraser *eraser = &chip->block_erasers[i]; + /* Check for duplicates (including (some) non-uniform ones). */ + if (eraser->eraseblocks[0].size == block_size && + eraser->block_erase == erasefn) { + msg_cdbg2(" Tried to add a duplicate block eraser: " + "%d x %d B with opcode 0x%02x.\n", + total_size/block_size, block_size, opcode); + return 1; + } + if (eraser->eraseblocks[0].size != 0 || + eraser->block_erase != NULL) { + msg_cspew(" Block Eraser %d is already occupied.\n", + i); + continue; + } + + eraser->block_erase = erasefn; + eraser->eraseblocks[0].size = block_size; + eraser->eraseblocks[0].count = total_size/block_size; + msg_cdbg2(" Block eraser %d: %d x %d B with opcode " + "0x%02x\n", i, total_size/block_size, block_size, + opcode); + return 0; + } + msg_cinfo("%s: Not enough space to store another eraser (i=%d)." + " Please report this at flashrom(a)flashrom.org\n", + __func__, i); + return 1; +} + int spi_write_status_enable(struct flashctx *flash) { static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; -- Kind regards, Stefan Tauner

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[PATCH 2/3] Add RES/REMS support to all dummyflasher emulated chips.
by Stefan Tauner 25 Aug '12

25 Aug '12

Also, fix a few odd corner cases in RES/REMS support in dummyflasher emulation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- dummyflasher.c | 57 ++++++++++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 47 insertions(+), 10 deletions(-) diff --git a/dummyflasher.c b/dummyflasher.c index 66d0df0..2803f76 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -493,6 +493,9 @@ static int emulate_spi_chip_response(unsigned int writecnt, { unsigned int offs, i, toread; static int unsigned aai_offs; + const unsigned char sst25vf040_rems_response[2] = {0xbf, 0x44}; + const unsigned char sst25vf032b_rems_response[2] = {0xbf, 0x4a}; + const unsigned char mx25l6436_rems_response[2] = {0xc2, 0x16}; if (writecnt == 0) { msg_perr("No command sent to the chip!\n"); @@ -529,20 +532,54 @@ static int emulate_spi_chip_response(unsigned int writecnt, switch (writearr[0]) { case JEDEC_RES: - if (emu_chip != EMULATE_ST_M25P10_RES) + if (writecnt < JEDEC_RES_OUTSIZE) break; - /* Respond with ST_M25P10_RES. */ - if (readcnt > 0) - readarr[0] = 0x10; + /* offs calculation is only needed for SST chips which treat RES like REMS. */ + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + offs += writecnt - JEDEC_REMS_OUTSIZE; + switch (emu_chip) { + case EMULATE_ST_M25P10_RES: + if (readcnt > 0) + memset(readarr, 0x10, readcnt); + break; + case EMULATE_SST_SST25VF040_REMS: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; + break; + case EMULATE_SST_SST25VF032B: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; + break; + case EMULATE_MACRONIX_MX25L6436: + if (readcnt > 0) + memset(readarr, 0x16, readcnt); + break; + default: /* ignore */ + break; + } break; case JEDEC_REMS: - if (emu_chip != EMULATE_SST_SST25VF040_REMS) + /* REMS response has wraparound and uses an address parameter. */ + if (writecnt < JEDEC_REMS_OUTSIZE) break; - /* Respond with SST_SST25VF040_REMS. */ - if (readcnt > 0) - readarr[0] = 0xbf; - if (readcnt > 1) - readarr[1] = 0x44; + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + offs += writecnt - JEDEC_REMS_OUTSIZE; + switch (emu_chip) { + case EMULATE_SST_SST25VF040_REMS: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; + break; + case EMULATE_SST_SST25VF032B: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; + break; + case EMULATE_MACRONIX_MX25L6436: + for (i = 0; i < readcnt; i++) + readarr[i] = mx25l6436_rems_response[(offs + i) % 2]; + break; + default: /* ignore */ + break; + } break; case JEDEC_RDID: switch (emu_chip) { -- Kind regards, Stefan Tauner

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[PATCH 1/3] Resort SPI function in chipdrivers.h.
by Stefan Tauner 25 Aug '12

25 Aug '12

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipdrivers.h | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/chipdrivers.h b/chipdrivers.h index 0c78b0d..56a4c8a 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -27,7 +27,11 @@ #include "flash.h" /* for chipaddr and flashctx */ -/* spi.c, should probably be in spi_chip.c */ +/* spi.c */ +int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len); +int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +/* spi25.c */ int probe_spi_rdid(struct flashctx *flash); int probe_spi_rdid4(struct flashctx *flash); int probe_spi_rems(struct flashctx *flash); @@ -43,8 +47,6 @@ int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int b int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len); uint8_t spi_read_status_register(struct flashctx *flash); int spi_write_status_register(struct flashctx *flash, int status); void spi_prettyprint_status_register_bit(uint8_t status, int bit); @@ -57,7 +59,6 @@ int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes, int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); -int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); /* sfdp.c */ int probe_spi_sfdp(struct flashctx *flash); -- Kind regards, Stefan Tauner

1 0

[PATCH] Add support for generic SPI RES matching
by Carl-Daniel Hailfinger 25 Aug '12

25 Aug '12

Support generic 1-byte SPI RES matching (low match quality). Support generic 2-byte SPI RES matching (high match quality). Add RES/REMS support to all dummyflasher emulated chips as a test case. Fix a few odd corner cases in RES/REMS support in dummyflasher emulation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_res_generic_chips/dummyflasher.c =================================================================== --- flashrom-spi_res_generic_chips/dummyflasher.c (Revision 1579) +++ flashrom-spi_res_generic_chips/dummyflasher.c (Arbeitskopie) @@ -493,6 +493,9 @@ { unsigned int offs, i, toread; static int unsigned aai_offs; + const unsigned char sst25vf040_rems_response[2] = {0xbf, 0x44}; + const unsigned char sst25vf032b_rems_response[2] = {0xbf, 0x4a}; + const unsigned char mx25l6436_rems_response[2] = {0xc2, 0x16}; if (writecnt == 0) { msg_perr("No command sent to the chip!\n"); @@ -529,20 +532,54 @@ switch (writearr[0]) { case JEDEC_RES: - if (emu_chip != EMULATE_ST_M25P10_RES) + if (writecnt < JEDEC_RES_OUTSIZE) break; - /* Respond with ST_M25P10_RES. */ - if (readcnt > 0) - readarr[0] = 0x10; + /* offs calculation is only needed for SST chips which treat RES like REMS. */ + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + offs += writecnt - JEDEC_REMS_OUTSIZE; + switch (emu_chip) { + case EMULATE_ST_M25P10_RES: + if (readcnt > 0) + memset(readarr, 0x10, readcnt); + break; + case EMULATE_SST_SST25VF040_REMS: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; + break; + case EMULATE_SST_SST25VF032B: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; + break; + case EMULATE_MACRONIX_MX25L6436: + if (readcnt > 0) + memset(readarr, 0x16, readcnt); + break; + default: /* ignore */ + break; + } break; case JEDEC_REMS: - if (emu_chip != EMULATE_SST_SST25VF040_REMS) + /* REMS response has wraparound and uses an address parameter. */ + if (writecnt < JEDEC_REMS_OUTSIZE) break; - /* Respond with SST_SST25VF040_REMS. */ - if (readcnt > 0) - readarr[0] = 0xbf; - if (readcnt > 1) - readarr[1] = 0x44; + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + offs += writecnt - JEDEC_REMS_OUTSIZE; + switch (emu_chip) { + case EMULATE_SST_SST25VF040_REMS: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; + break; + case EMULATE_SST_SST25VF032B: + for (i = 0; i < readcnt; i++) + readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; + break; + case EMULATE_MACRONIX_MX25L6436: + for (i = 0; i < readcnt; i++) + readarr[i] = mx25l6436_rems_response[(offs + i) % 2]; + break; + default: /* ignore */ + break; + } break; case JEDEC_RDID: switch (emu_chip) { Index: flashrom-spi_res_generic_chips/spi25.c =================================================================== --- flashrom-spi_res_generic_chips/spi25.c (Revision 1579) +++ flashrom-spi_res_generic_chips/spi25.c (Arbeitskopie) @@ -232,6 +232,7 @@ int probe_spi_res1(struct flashctx *flash) { + const struct flashchip *chip = flash->chip; static const unsigned char allff[] = {0xff, 0xff, 0xff}; static const unsigned char all00[] = {0x00, 0x00, 0x00}; unsigned char readarr[3]; @@ -265,18 +266,23 @@ msg_cdbg("%s: id 0x%x\n", __func__, id2); - if (id2 != flash->chip->model_id) - return 0; + if (id2 == flash->chip->model_id) { + /* Print the status register to tell the user about possible write protection. */ + spi_prettyprint_status_register(flash); - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - return 1; + return 1; + } + + /* Test if there is any device ID. */ + if (GENERIC_MANUF_ID == chip->manufacture_id && id2 != 0xff) + return 1; + + return 0; } int probe_spi_res2(struct flashctx *flash) { + const struct flashchip *chip = flash->chip; unsigned char readarr[2]; uint32_t id1, id2; @@ -289,14 +295,24 @@ msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); - if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id) - return 0; + if (id1 == chip->manufacture_id && id2 == chip->model_id) { + /* Print the status register to tell the + * user about possible write protection. + */ + spi_prettyprint_status_register(flash); - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - return 1; + return 1; + } + + /* Test if this is a pure vendor match. */ + if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id) + return 1; + + /* Test if there is any vendor ID and if this is indeed a two-byte RES. */ + if (GENERIC_MANUF_ID == chip->manufacture_id && id1 != 0xff && id1 != id2) + return 1; + + return 0; } uint8_t spi_read_status_register(struct flashctx *flash) Index: flashrom-spi_res_generic_chips/flashchips.c =================================================================== --- flashrom-spi_res_generic_chips/flashchips.c (Revision 1579) +++ flashrom-spi_res_generic_chips/flashchips.c (Arbeitskopie) @@ -9673,5 +9673,162 @@ .write = NULL, }, + { + .vendor = "Generic", + .name = "unknown SPI chip (RES2)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res2, + .write = NULL, + }, + + { + .vendor = "Generic", + .name = "unknown 128 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_128K, + .total_size = 128, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 256 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_256K, + .total_size = 256, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 512 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_512K, + .total_size = 512, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 1024 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_1024K, + .total_size = 1024, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 2048 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_2048K, + .total_size = 2048, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 4096 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_4096K, + .total_size = 4096, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 8192 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_8192K, + .total_size = 8192, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + + { + .vendor = "Generic", + .name = "unknown 16384 kB SPI chip (RES)", + .bustype = BUS_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_SPI_RES_16384K, + .total_size = 16384, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_res1, + .probe_timing = TIMING_ZERO, + .block_erasers = {}, + .unlock = NULL, + .write = NULL, + .read = NULL, + .voltage = {}, + }, + { NULL } }; Index: flashrom-spi_res_generic_chips/flashchips.h =================================================================== --- flashrom-spi_res_generic_chips/flashchips.h (Revision 1579) +++ flashrom-spi_res_generic_chips/flashchips.h (Arbeitskopie) @@ -39,6 +39,14 @@ #define SFDP_DEVICE_ID 0xFFFE #define PROGMANUF_ID 0xFFFE /* dummy ID for opaque chips behind a programmer */ #define PROGDEV_ID 0x01 /* dummy ID for opaque chips behind a programmer */ +#define GENERIC_SPI_RES_128K 0x10 /* SPI RES response for 128 kByte chip */ +#define GENERIC_SPI_RES_256K 0x11 +#define GENERIC_SPI_RES_512K 0x12 +#define GENERIC_SPI_RES_1024K 0x13 +#define GENERIC_SPI_RES_2048K 0x14 +#define GENERIC_SPI_RES_4096K 0x15 +#define GENERIC_SPI_RES_8192K 0x16 +#define GENERIC_SPI_RES_16384K 0x17 #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */ #define ALLIANCE_AS29F002B 0x34 Index: flashrom-spi_res_generic_chips/flashrom.c =================================================================== --- flashrom-spi_res_generic_chips/flashrom.c (Revision 1579) +++ flashrom-spi_res_generic_chips/flashrom.c (Arbeitskopie) @@ -1029,7 +1029,8 @@ if (startchip == 0) break; /* Not the first flash chip detected on this bus, but not a generic match either. */ - if ((flash->chip->model_id != GENERIC_DEVICE_ID) && (flash->chip->model_id != SFDP_DEVICE_ID)) + if ((flash->chip->manufacture_id != GENERIC_MANUF_ID) && + (flash->chip->model_id != GENERIC_DEVICE_ID) && (flash->chip->model_id != SFDP_DEVICE_ID)) break; /* Not the first flash chip detected on this bus, and it's just a generic match. Ignore it. */ notfound: -- http://www.hailfinger.org/

2 1

rtl8169 support - Final
by Jon Shadow 25 Aug '12

25 Aug '12

Fixed a few things. Still need someone to test it. Signed-off-by: Sergey Lichack <shadowpilot34(a)gmail.com>

4 3

flashrom -V
by Jan Joosten 25 Aug '12

25 Aug '12

Dear programmers, Please find below the output of flashrom -V as requested. I do not have more information than the information below. I just installed flasrom from the OpenSuse 12 repositories. Assume it is the latest version. Keep up the good word! Regards Jan Joosten flashrom v0.9.4-r1457 on Linux 3.1.10-1.16-desktop (x86_64), built with libpci 3.1.7, GCC 4.6.2, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 367M loops per second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 1002 us, 10000 myus = 10004 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "System Product Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "V-M2NC61P" DMI string baseboard-version: "Rev x.xx" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8712 on port 0x2e Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0. This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0xfec80000 Mapping NVIDIA MCP6x SPI at 0xfec80000, unaligned size 0x544. SPI control is 0x0002, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: SPI. Super I/O ID 0x8712 is not on the list of flash capable controllers. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Chip status register is 00 Found Eon flash chip "EN25F80" (1024 kB, SPI) at physical address 0xfff00000. Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0x1c, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0x1c, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0x1c, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3114 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0x1c, id2 0x13 Found Eon flash chip "EN25F80" (1024 kB, SPI). No operations were specified.

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flashrom