[PATCH 1/1] Simplify hwaccess.c

[Peter Lemenkov]

      This file is saturated with superfluous ifdefs arranged into
several nested levels. This in turn adds additional complexity
to process of adding another architecture.

I re-arranged all ifdef blocks and killed duplicated function
definitions. Also I added define(__amd64) to the list of x86-arches.

Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com&gt;
---
 hwaccess.c |   85 +++++++++++++++++++++--------------------------------------
 1 files changed, 30 insertions(+), 55 deletions(-)

diff --git a/hwaccess.c b/hwaccess.c
index 3a61e60..4e87642 100644
--- a/hwaccess.c
+++ b/hwaccess.c
@@ -29,30 +29,47 @@
 #endif
 #include "flash.h"
 
+#if !(	defined(__i386__) || \
+	defined(__x86_64__) || defined(__amd64) || \
+	defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips) || \
+	defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) ||
defined(__ppc64__))
+#error Unknown architecture
+#endif
+
 #if defined(__i386__) || defined(__x86_64__)
+#if defined(__FreeBSD__) || defined(__DragonFly__)
+int io_fd;
+#endif
+#endif
 
-/* sync primitive is not needed because x86 uses uncached accesses
- * which have a strongly ordered memory model.
- */
 static inline void sync_primitive(void)
 {
-}
-
-#if defined(__FreeBSD__) || defined(__DragonFly__)
-int io_fd;
+/* sync primitive is needed only on PowerPC because
+ * x86 uses uncached accesses which have a strongly ordered memory model
+ * /dev/mem on MIPS uses uncached accesses in mode 2 which has a strongly ordered memory
model.
+ */
+#if defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) ||
defined(__ppc64__)
+	/* Prevent reordering and/or merging of reads/writes to hardware.
+	 * Such reordering and/or merging would break device accesses which
+	 * depend on the exact access order.
+	 */
+	asm("eieio" : : : "memory");
 #endif
+}
 
 void get_io_perms(void)
 {
+/* PCI port I/O is not yet implemented on PowerPC or MIPS. */
+#if defined(__i386__) || defined(__x86_64__) || defined(__amd64)
 #if defined(__DJGPP__)
 	/* We have full permissions by default. */
 	return;
 #else
-#if defined (__sun) && (defined(__i386) || defined(__amd64))
+#if defined (__sun)
 	if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
 #elif defined(__FreeBSD__) || defined (__DragonFly__)
 	if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
-#else 
+#else
 	if (iopl(3) != 0) {
 #endif
 		msg_perr("ERROR: Could not get I/O privileges (%s).\n"
@@ -65,60 +82,18 @@ void get_io_perms(void)
 		exit(1);
 	}
 #endif
+#endif
 }
 
 void release_io_perms(void)
 {
+/* PCI port I/O is not yet implemented on PowerPC or MIPS. */
+#if defined(__i386__) || defined(__x86_64__) || defined(__amd64)
 #if defined(__FreeBSD__) || defined(__DragonFly__)
 	close(io_fd);
 #endif
-}
-
-#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) ||
defined(__ppc64__)
-
-static inline void sync_primitive(void)
-{
-	/* Prevent reordering and/or merging of reads/writes to hardware.
-	 * Such reordering and/or merging would break device accesses which
-	 * depend on the exact access order.
-	 */
-	asm("eieio" : : : "memory");
-}
-
-/* PCI port I/O is not yet implemented on PowerPC. */
-void get_io_perms(void)
-{
-}
-
-/* PCI port I/O is not yet implemented on PowerPC. */
-void release_io_perms(void)
-{
-}
-
-#elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips)
-
-/* sync primitive is not needed because /dev/mem on MIPS uses uncached accesses
- * in mode 2 which has a strongly ordered memory model.
- */
-static inline void sync_primitive(void)
-{
-}
-
-/* PCI port I/O is not yet implemented on MIPS. */
-void get_io_perms(void)
-{
-}
-
-/* PCI port I/O is not yet implemented on MIPS. */
-void release_io_perms(void)
-{
-}
-
-#else
-
-#error Unknown architecture
-
 #endif
+}
 
 void mmio_writeb(uint8_t val, void *addr)
 {
-- 
1.7.2.3

[PATCH] Simplify hwaccess.c.

[Stefan Tauner]

      Previously the code was focused on architectures which led to lots of
duplicate code and spread the information regarding differences between
the architectures accross the file.

With this patch there is a single function header for any function and the
differentiation between architectures (and OS where needed) happens
in one place. Also, this patch adds simple defines to bundle often used arch
and os checks. A central check for unknown architectures and OSes has
been added on top.

Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com&gt;
Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at&gt;
---
 hwaccess.c |  110 +++++++++++++++++++++++-------------------------------------
 1 file changed, 42 insertions(+), 68 deletions(-)

diff --git a/hwaccess.c b/hwaccess.c
index c18a110..ddae7ad 100644
--- a/hwaccess.c
+++ b/hwaccess.c
@@ -18,6 +18,20 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
+#define IS_X86	(defined(__i386__) || defined(__x86_64__) || defined(__amd64__))
+#define IS_MIPS	(defined (__mips) || defined (__mips__) || defined (__MIPS__) || defined
(mips))
+#define IS_PPC	(defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) ||
defined(__ppc64__))
+#define IS_ARM	(defined (__arm__) || defined (_ARM))
+#if !(IS_X86 || IS_MIPS || IS_PPC || IS_ARM)
+#error Unknown architecture
+#endif
+
+#define IS_BSD	(defined(__FreeBSD__) || defined(__FreeBSD_kernel__) ||
defined(__DragonFly__) || __OpenBSD__)
+#define IS_LINUX	(__gnu_linux__ || defined(__linux__))
+#if !(IS_BSD || IS_LINUX || defined(__DJGPP__) || defined(__LIBPAYLOAD__) || defined
(__sun))
+#error "Unknown operating system"
+#endif
+
 #include <stdint.h>
 #include <string.h>
 #include <stdlib.h>
@@ -32,30 +46,39 @@
 #include "flash.h"
 #include "hwaccess.h"
 
-#if defined(__i386__) || defined(__x86_64__)
+#if IS_X86 && IS_BSD
+int io_fd;
+#endif
 
-/* sync primitive is not needed because x86 uses uncached accesses
- * which have a strongly ordered memory model.
+/* Prevent reordering and/or merging of reads/writes to hardware.
+ * Such reordering and/or merging would break device accesses which depend on the exact
access order.
  */
 static inline void sync_primitive(void)
 {
-}
-
-#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
-int io_fd;
+/* This is needed only on PowerPC because...
+ * - x86 uses uncached accesses which have a strongly ordered memory model and
+ * - MIPS uses uncached accesses in mode 2 on /dev/mem which has also a strongly ordered
memory model
+ * - ARM uses a strongly ordered memory model for device memories.
+ */
+#if IS_PPC
+	asm("eieio" : : : "memory");
 #endif
+}
 
-int release_io_perms(void *p)
+static int release_io_perms(void *p)
 {
+#if IS_X86
 #if defined(__DJGPP__) || defined(__LIBPAYLOAD__)
-#else
-#if defined (__sun) && (defined(__i386) || defined(__amd64))
+	/* Nothing to release */
+#elif defined (__sun)
 	sysi86(SI86V86, V86SC_IOPL, 0);
-#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__)
+#elif IS_BSD
 	close(io_fd);
-#else 
+#elif IS_LINUX
 	iopl(0);
 #endif
+#else
+/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */
 #endif
 	return 0;
 }
@@ -63,81 +86,32 @@ int release_io_perms(void *p)
 /* Get I/O permissions with automatic permission release on shutdown. */
 int rget_io_perms(void)
 {
+#if IS_X86
 #if defined(__DJGPP__) || defined(__LIBPAYLOAD__)
 	/* We have full permissions by default. */
-	return 0;
-#else
-#if defined (__sun) && (defined(__i386) || defined(__amd64))
+#elif defined (__sun)
 	if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
-#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__)
+#elif IS_BSD
 	if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
-#else 
+#elif IS_LINUX
 	if (iopl(3) != 0) {
 #endif
 		msg_perr("ERROR: Could not get I/O privileges (%s).\n"
 			"You need to be root.\n", strerror(errno));
 #if defined (__OpenBSD__)
-		msg_perr("Please set securelevel=-1 in /etc/rc.securelevel "
-			   "and reboot, or reboot into \n");
+		msg_perr("Please set securelevel=-1 in /etc/rc.securelevel and reboot, or reboot
into \n");
 		msg_perr("single user mode.\n");
 #endif
 		return 1;
 	} else {
 		register_shutdown(release_io_perms, NULL);
 	}
-	return 0;
+#else
+/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */
 #endif
-}
-
-#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) ||
defined(__ppc64__)
-
-static inline void sync_primitive(void)
-{
-	/* Prevent reordering and/or merging of reads/writes to hardware.
-	 * Such reordering and/or merging would break device accesses which
-	 * depend on the exact access order.
-	 */
-	asm("eieio" : : : "memory");
-}
-
-/* PCI port I/O is not yet implemented on PowerPC. */
-int rget_io_perms(void)
-{
-	return 0;
-}
-
-#elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips)
-
-/* sync primitive is not needed because /dev/mem on MIPS uses uncached accesses
- * in mode 2 which has a strongly ordered memory model.
- */
-static inline void sync_primitive(void)
-{
-}
-
-/* PCI port I/O is not yet implemented on MIPS. */
-int rget_io_perms(void)
-{
-	return 0;
-}
-
-#elif defined (__arm__)
-
-static inline void sync_primitive(void)
-{
-}
-
-int rget_io_perms(void)
-{
 	return 0;
 }
 
-#else
-
-#error Unknown architecture
-
-#endif
-
 void mmio_writeb(uint8_t val, void *addr)
 {
 	*(volatile uint8_t *) addr = val;
-- 
Kind regards, Stefan Tauner