Hi Sandy,
Correct - The PCH will not allow us to write anything to regions which are
not defined in the flash descriptor. You could add those regions to the
"BIOS" region if you wish to update them from your host OS. The SPI
Programming Guide for your PCH (Lewisburg?) should also have info about
additional regions which you may set up in the flash descriptor.
"EW" means erase and write, "S" means skip (content does not need to
change), "E" means erase only, "W" means write only
On Mon, Aug 7, 2017 at 12:50 AM, Sandy Zhang <sanzhang(a)celestica.com> wrote:
> Hi David,
>
> It seems that the below 2 regions are "write denied":
>
> 00A26000 00A35FFF 00010000 DER #1 Region
> 00A36000 00FEFFFF 005BA000 10 Gbe A Region
>
> By the way, can you tell me what is the other parament "EW", "S" and "E"
> meana? thank you!
>
>
>
>
> 2017-08-07 13:02 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>:
>
>> Hi Sandy,
>> It might not have done what you expect. The error is because offsets
>> 0xa26000-0xffffff are not defined in the flash descriptor, so the PCH gives
>> us an error when flashrom attempts to update it. ":WD" next to the offsets
>> in the log means "write denied".
>>
>> If you wish to update that region of the ROM then you must change your
>> flash descriptor to include it and set the permissions to enable read and
>> write.
>>
>>
>> On Sun, Aug 6, 2017 at 8:20 PM, Sandy Zhang <sanzhang(a)celestica.com>
>> wrote:
>>
>>> Hi David,
>>>
>>> Attachment is the log file when flash bios into Winbond 32MB SPI rom,
>>> could you help to check if it's updated sucessfully? thank you!
>>>
>>> 2017-08-05 10:45 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>:
>>>
>>>> Hi David,
>>>>
>>>> Thank you very much, I will try to add the patch to flashrom-0.9.9, As
>>>> a BIOS engineer, it is a bit difficult for me to complete this.
>>>> Do you know when will make it into a release tarball?
>>>>
>>>>
>>>>
>>>> BR
>>>> Sandy
>>>>
>>>> 2017-08-05 0:05 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>:
>>>>
>>>>> On Aug 3, 2017 11:51 PM, "Sandy Zhang" <sanzhang(a)celestica.com> wrote:
>>>>>
>>>>>> Hi David,
>>>>>>
>>>>>> Thanks for your reply, can you tell me where to download the flash
>>>>>> package like "flashrom-0.9.9.tar" which is downloaded from the address ''
>>>>>> https://www.flashrom.org/Downloads"? thank you!
>>>>>>
>>>>>
>>>>> The Skylake patches have not made it into a release tarball yet. Can
>>>>> you try using the git sources from https://review.coreboot.o
>>>>> rg/cgit/flashrom.git? E.g:
>>>>>
>>>>> git clone https://review.coreboot.org/flashrom.git
>>>>> git checkout origin/staging
>>>>> make
>>>>>
>>>>>
>>>>>>
>>>>>>
>>>>>>
>>>>>> BR
>>>>>> Sandy
>>>>>>
>>>>>> 2017-08-04 14:35 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com
>>>>>> >:
>>>>>>
>>>>>>> Hi Sandy,
>>>>>>> Skylake support was recently merged: https://review.coreboot.org/18
>>>>>>> 973
>>>>>>>
>>>>>>> However you may need to add your PCH PCI ID. What does `lspci -nn |
>>>>>>> grep LPC` show on your test system?
>>>>>>>
>>>>>>> And yes, a 32MB ROM should work fine.
>>>>>>>
>>>>>>> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang <sanzhang(a)celestica.com
>>>>>>> > wrote:
>>>>>>>
>>>>>>>> Hi,
>>>>>>>>
>>>>>>>> Can you tell me when flashrom support Intel Purley platform
>>>>>>>> Lewisburg PCH?
>>>>>>>> and if it can support flash 32 MB SPI rom?
>>>>>>>> I am eager to your reply as soon as possible, thank you very much!
>>>>>>>>
>>>>>>>>
>>>>>>>> --
>>>>>>>>
>>>>>>>> *Best Regard!*
>>>>>>>>
>>>>>>>> *Sandy Zhang (* 张立康*)*
>>>>>>>> *BIOS Engineer*
>>>>>>>> *Global Design Service*
>>>>>>>> *Celestica(Shanghai) R&D Center, China*
>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>>>>>> *Phone: (+86)021-61006028-7623*
>>>>>>>>
>>>>>>>> _______________________________________________
>>>>>>>> flashrom mailing list
>>>>>>>> flashrom(a)flashrom.org
>>>>>>>> https://mail.coreboot.org/mailman/listinfo/flashrom
>>>>>>>>
>>>>>>>
>>>>>>>
>>>>>>
>>>>>>
>>>>>> --
>>>>>>
>>>>>> *Best Regard!*
>>>>>>
>>>>>> *Sandy Zhang (* 张立康*)*
>>>>>> *BIOS Engineer*
>>>>>> *Global Design Service*
>>>>>> *Celestica(Shanghai) R&D Center, China*
>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>>>> *Phone: (+86)021-61006028-7623*
>>>>>>
>>>>>
>>>>
>>>>
>>>> --
>>>>
>>>> *Best Regard!*
>>>>
>>>> *Sandy Zhang (* 张立康*)*
>>>> *BIOS Engineer*
>>>> *Global Design Service*
>>>> *Celestica(Shanghai) R&D Center, China*
>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>> *Phone: (+86)021-61006028-7623*
>>>>
>>>
>>>
>>>
>>> --
>>>
>>> *Best Regard!*
>>>
>>> *Sandy Zhang (* 张立康*)*
>>> *BIOS Engineer*
>>> *Global Design Service*
>>> *Celestica(Shanghai) R&D Center, China*
>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>> *Phone: (+86)021-61006028-7623*
>>>
>>
>>
>
>
> --
>
> *Best Regard!*
>
> *Sandy Zhang (* 张立康*)*
> *BIOS Engineer*
> *Global Design Service*
> *Celestica(Shanghai) R&D Center, China*
> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
> *Phone: (+86)021-61006028-7623*
>
Dear Ladies and Gentlemen.
"Found chipset "Intel Braswell" with PCI ID 8086:229c. This chipset is marked as untested
We can verify the successful usage with a Braswell (N3160) prototype board. BIOS AMI.
sudo flashrom -V --programmer internal:laptop=this_is_not_a_laptop -c W25Q64.W -w test.img
sudo flashrom -V --programmer internal:laptop=this_is_not_a_laptop -r test.img
Read/Write to W25Q64 8Mbyte 1.8V
Without specifying chip:
Thank you very much for your work.
With best regards,
Uwe Vieweg
Siemens AG
Digital Factory Division
Factory Automation
HiMed
DF FA SE R&D HM
Breslauer Str. 5
90766 Fuerth, Germany
Tel.: +49 911 750-9839
Fax: +49 911 750-9800
Mail uwe dot vieweg at siemens dot com
www.siemens.com/ingenuityforlife<https://www.siemens.com/ingenuityforlife>
Siemens Aktiengesellschaft: Chairman of the Supervisory Board: Gerhard Cromme; Managing Board: Joe Kaeser, Chairman, President and Chief Executive Officer; Roland Busch, Lisa Davis, Klaus Helmrich, Janina Kugel, Cedrik Neike, Michael Sen, Ralf P. Thomas; Registered offices: Berlin and Munich, Germany; Commercial registries: Berlin Charlottenburg, HRB 12300, Munich, HRB 6684; WEEE-Reg.-No. DE 23691322
Hi David,
It seems that the below 2 regions are "write denied":
00A26000 00A35FFF 00010000 DER #1 Region
00A36000 00FEFFFF 005BA000 10 Gbe A Region
By the way, can you tell me what is the other parament "EW", "S" and "E"
meana? thank you!
2017-08-07 13:02 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>:
> Hi Sandy,
> It might not have done what you expect. The error is because offsets
> 0xa26000-0xffffff are not defined in the flash descriptor, so the PCH gives
> us an error when flashrom attempts to update it. ":WD" next to the offsets
> in the log means "write denied".
>
> If you wish to update that region of the ROM then you must change your
> flash descriptor to include it and set the permissions to enable read and
> write.
>
>
> On Sun, Aug 6, 2017 at 8:20 PM, Sandy Zhang <sanzhang(a)celestica.com>
> wrote:
>
>> Hi David,
>>
>> Attachment is the log file when flash bios into Winbond 32MB SPI rom,
>> could you help to check if it's updated sucessfully? thank you!
>>
>> 2017-08-05 10:45 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>:
>>
>>> Hi David,
>>>
>>> Thank you very much, I will try to add the patch to flashrom-0.9.9, As
>>> a BIOS engineer, it is a bit difficult for me to complete this.
>>> Do you know when will make it into a release tarball?
>>>
>>>
>>>
>>> BR
>>> Sandy
>>>
>>> 2017-08-05 0:05 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>:
>>>
>>>> On Aug 3, 2017 11:51 PM, "Sandy Zhang" <sanzhang(a)celestica.com> wrote:
>>>>
>>>>> Hi David,
>>>>>
>>>>> Thanks for your reply, can you tell me where to download the flash
>>>>> package like "flashrom-0.9.9.tar" which is downloaded from the address ''
>>>>> https://www.flashrom.org/Downloads"? thank you!
>>>>>
>>>>
>>>> The Skylake patches have not made it into a release tarball yet. Can
>>>> you try using the git sources from https://review.coreboot.o
>>>> rg/cgit/flashrom.git? E.g:
>>>>
>>>> git clone https://review.coreboot.org/flashrom.git
>>>> git checkout origin/staging
>>>> make
>>>>
>>>>
>>>>>
>>>>>
>>>>>
>>>>> BR
>>>>> Sandy
>>>>>
>>>>> 2017-08-04 14:35 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>
>>>>> :
>>>>>
>>>>>> Hi Sandy,
>>>>>> Skylake support was recently merged: https://review.coreboot.org/18
>>>>>> 973
>>>>>>
>>>>>> However you may need to add your PCH PCI ID. What does `lspci -nn |
>>>>>> grep LPC` show on your test system?
>>>>>>
>>>>>> And yes, a 32MB ROM should work fine.
>>>>>>
>>>>>> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang <sanzhang(a)celestica.com>
>>>>>> wrote:
>>>>>>
>>>>>>> Hi,
>>>>>>>
>>>>>>> Can you tell me when flashrom support Intel Purley platform
>>>>>>> Lewisburg PCH?
>>>>>>> and if it can support flash 32 MB SPI rom?
>>>>>>> I am eager to your reply as soon as possible, thank you very much!
>>>>>>>
>>>>>>>
>>>>>>> --
>>>>>>>
>>>>>>> *Best Regard!*
>>>>>>>
>>>>>>> *Sandy Zhang (* 张立康*)*
>>>>>>> *BIOS Engineer*
>>>>>>> *Global Design Service*
>>>>>>> *Celestica(Shanghai) R&D Center, China*
>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>>>>> *Phone: (+86)021-61006028-7623*
>>>>>>>
>>>>>>> _______________________________________________
>>>>>>> flashrom mailing list
>>>>>>> flashrom(a)flashrom.org
>>>>>>> https://mail.coreboot.org/mailman/listinfo/flashrom
>>>>>>>
>>>>>>
>>>>>>
>>>>>
>>>>>
>>>>> --
>>>>>
>>>>> *Best Regard!*
>>>>>
>>>>> *Sandy Zhang (* 张立康*)*
>>>>> *BIOS Engineer*
>>>>> *Global Design Service*
>>>>> *Celestica(Shanghai) R&D Center, China*
>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>>> *Phone: (+86)021-61006028-7623*
>>>>>
>>>>
>>>
>>>
>>> --
>>>
>>> *Best Regard!*
>>>
>>> *Sandy Zhang (* 张立康*)*
>>> *BIOS Engineer*
>>> *Global Design Service*
>>> *Celestica(Shanghai) R&D Center, China*
>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>> *Phone: (+86)021-61006028-7623*
>>>
>>
>>
>>
>> --
>>
>> *Best Regard!*
>>
>> *Sandy Zhang (* 张立康*)*
>> *BIOS Engineer*
>> *Global Design Service*
>> *Celestica(Shanghai) R&D Center, China*
>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>> *Phone: (+86)021-61006028-7623*
>>
>
>
--
*Best Regard!*
*Sandy Zhang (* 张立康*)*
*BIOS Engineer*
*Global Design Service*
*Celestica(Shanghai) R&D Center, China*
*Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
*Mobile: (+86)15965353952*
*Phone: (+86)021-61006028-7623*
Hi Sandy,
It might not have done what you expect. The error is because offsets
0xa26000-0xffffff are not defined in the flash descriptor, so the PCH gives
us an error when flashrom attempts to update it. ":WD" next to the offsets
in the log means "write denied".
If you wish to update that region of the ROM then you must change your
flash descriptor to include it and set the permissions to enable read and
write.
On Sun, Aug 6, 2017 at 8:20 PM, Sandy Zhang <sanzhang(a)celestica.com> wrote:
> Hi David,
>
> Attachment is the log file when flash bios into Winbond 32MB SPI rom,
> could you help to check if it's updated sucessfully? thank you!
>
> 2017-08-05 10:45 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>:
>
>> Hi David,
>>
>> Thank you very much, I will try to add the patch to flashrom-0.9.9, As a
>> BIOS engineer, it is a bit difficult for me to complete this.
>> Do you know when will make it into a release tarball?
>>
>>
>>
>> BR
>> Sandy
>>
>> 2017-08-05 0:05 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>:
>>
>>> On Aug 3, 2017 11:51 PM, "Sandy Zhang" <sanzhang(a)celestica.com> wrote:
>>>
>>>> Hi David,
>>>>
>>>> Thanks for your reply, can you tell me where to download the flash
>>>> package like "flashrom-0.9.9.tar" which is downloaded from the address ''
>>>> https://www.flashrom.org/Downloads"? thank you!
>>>>
>>>
>>> The Skylake patches have not made it into a release tarball yet. Can you
>>> try using the git sources from https://review.coreboot.o
>>> rg/cgit/flashrom.git? E.g:
>>>
>>> git clone https://review.coreboot.org/flashrom.git
>>> git checkout origin/staging
>>> make
>>>
>>>
>>>>
>>>>
>>>>
>>>> BR
>>>> Sandy
>>>>
>>>> 2017-08-04 14:35 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>:
>>>>
>>>>> Hi Sandy,
>>>>> Skylake support was recently merged: https://review.coreboot.org/18973
>>>>>
>>>>> However you may need to add your PCH PCI ID. What does `lspci -nn |
>>>>> grep LPC` show on your test system?
>>>>>
>>>>> And yes, a 32MB ROM should work fine.
>>>>>
>>>>> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang <sanzhang(a)celestica.com>
>>>>> wrote:
>>>>>
>>>>>> Hi,
>>>>>>
>>>>>> Can you tell me when flashrom support Intel Purley platform Lewisburg
>>>>>> PCH?
>>>>>> and if it can support flash 32 MB SPI rom?
>>>>>> I am eager to your reply as soon as possible, thank you very much!
>>>>>>
>>>>>>
>>>>>> --
>>>>>>
>>>>>> *Best Regard!*
>>>>>>
>>>>>> *Sandy Zhang (* 张立康*)*
>>>>>> *BIOS Engineer*
>>>>>> *Global Design Service*
>>>>>> *Celestica(Shanghai) R&D Center, China*
>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>>>> *Phone: (+86)021-61006028-7623*
>>>>>>
>>>>>> _______________________________________________
>>>>>> flashrom mailing list
>>>>>> flashrom(a)flashrom.org
>>>>>> https://mail.coreboot.org/mailman/listinfo/flashrom
>>>>>>
>>>>>
>>>>>
>>>>
>>>>
>>>> --
>>>>
>>>> *Best Regard!*
>>>>
>>>> *Sandy Zhang (* 张立康*)*
>>>> *BIOS Engineer*
>>>> *Global Design Service*
>>>> *Celestica(Shanghai) R&D Center, China*
>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>> *Phone: (+86)021-61006028-7623*
>>>>
>>>
>>
>>
>> --
>>
>> *Best Regard!*
>>
>> *Sandy Zhang (* 张立康*)*
>> *BIOS Engineer*
>> *Global Design Service*
>> *Celestica(Shanghai) R&D Center, China*
>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>> *Phone: (+86)021-61006028-7623*
>>
>
>
>
> --
>
> *Best Regard!*
>
> *Sandy Zhang (* 张立康*)*
> *BIOS Engineer*
> *Global Design Service*
> *Celestica(Shanghai) R&D Center, China*
> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
> *Phone: (+86)021-61006028-7623*
>
Hi David,
Attachment is the log file when flash bios into Winbond 32MB SPI rom,
could you help to check if it's updated sucessfully? thank you!
2017-08-05 10:45 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>:
> Hi David,
>
> Thank you very much, I will try to add the patch to flashrom-0.9.9, As a
> BIOS engineer, it is a bit difficult for me to complete this.
> Do you know when will make it into a release tarball?
>
>
>
> BR
> Sandy
>
> 2017-08-05 0:05 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>:
>
>> On Aug 3, 2017 11:51 PM, "Sandy Zhang" <sanzhang(a)celestica.com> wrote:
>>
>>> Hi David,
>>>
>>> Thanks for your reply, can you tell me where to download the flash
>>> package like "flashrom-0.9.9.tar" which is downloaded from the address ''
>>> https://www.flashrom.org/Downloads"? thank you!
>>>
>>
>> The Skylake patches have not made it into a release tarball yet. Can you
>> try using the git sources from https://review.coreboot.o
>> rg/cgit/flashrom.git? E.g:
>>
>> git clone https://review.coreboot.org/flashrom.git
>> git checkout origin/staging
>> make
>>
>>
>>>
>>>
>>>
>>> BR
>>> Sandy
>>>
>>> 2017-08-04 14:35 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>:
>>>
>>>> Hi Sandy,
>>>> Skylake support was recently merged: https://review.coreboot.org/18973
>>>>
>>>> However you may need to add your PCH PCI ID. What does `lspci -nn |
>>>> grep LPC` show on your test system?
>>>>
>>>> And yes, a 32MB ROM should work fine.
>>>>
>>>> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang <sanzhang(a)celestica.com>
>>>> wrote:
>>>>
>>>>> Hi,
>>>>>
>>>>> Can you tell me when flashrom support Intel Purley platform Lewisburg
>>>>> PCH?
>>>>> and if it can support flash 32 MB SPI rom?
>>>>> I am eager to your reply as soon as possible, thank you very much!
>>>>>
>>>>>
>>>>> --
>>>>>
>>>>> *Best Regard!*
>>>>>
>>>>> *Sandy Zhang (* 张立康*)*
>>>>> *BIOS Engineer*
>>>>> *Global Design Service*
>>>>> *Celestica(Shanghai) R&D Center, China*
>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>>> *Phone: (+86)021-61006028-7623*
>>>>>
>>>>> _______________________________________________
>>>>> flashrom mailing list
>>>>> flashrom(a)flashrom.org
>>>>> https://mail.coreboot.org/mailman/listinfo/flashrom
>>>>>
>>>>
>>>>
>>>
>>>
>>> --
>>>
>>> *Best Regard!*
>>>
>>> *Sandy Zhang (* 张立康*)*
>>> *BIOS Engineer*
>>> *Global Design Service*
>>> *Celestica(Shanghai) R&D Center, China*
>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>> *Phone: (+86)021-61006028-7623*
>>>
>>
>
>
> --
>
> *Best Regard!*
>
> *Sandy Zhang (* 张立康*)*
> *BIOS Engineer*
> *Global Design Service*
> *Celestica(Shanghai) R&D Center, China*
> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
> *Phone: (+86)021-61006028-7623*
>
--
*Best Regard!*
*Sandy Zhang (* 张立康*)*
*BIOS Engineer*
*Global Design Service*
*Celestica(Shanghai) R&D Center, China*
*Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
*Mobile: (+86)15965353952*
*Phone: (+86)021-61006028-7623*
Hi David,
Thank you very much, I will try to add the patch to flashrom-0.9.9, As a
BIOS engineer, it is a bit difficult for me to complete this.
Do you know when will make it into a release tarball?
BR
Sandy
2017-08-05 0:05 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>:
> On Aug 3, 2017 11:51 PM, "Sandy Zhang" <sanzhang(a)celestica.com> wrote:
>
>> Hi David,
>>
>> Thanks for your reply, can you tell me where to download the flash
>> package like "flashrom-0.9.9.tar" which is downloaded from the address ''
>> https://www.flashrom.org/Downloads"? thank you!
>>
>
> The Skylake patches have not made it into a release tarball yet. Can you
> try using the git sources from https://review.coreboot.
> org/cgit/flashrom.git? E.g:
>
> git clone https://review.coreboot.org/flashrom.git
> git checkout origin/staging
> make
>
>
>>
>>
>>
>> BR
>> Sandy
>>
>> 2017-08-04 14:35 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>:
>>
>>> Hi Sandy,
>>> Skylake support was recently merged: https://review.coreboot.org/18973
>>>
>>> However you may need to add your PCH PCI ID. What does `lspci -nn | grep
>>> LPC` show on your test system?
>>>
>>> And yes, a 32MB ROM should work fine.
>>>
>>> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang <sanzhang(a)celestica.com>
>>> wrote:
>>>
>>>> Hi,
>>>>
>>>> Can you tell me when flashrom support Intel Purley platform Lewisburg
>>>> PCH?
>>>> and if it can support flash 32 MB SPI rom?
>>>> I am eager to your reply as soon as possible, thank you very much!
>>>>
>>>>
>>>> --
>>>>
>>>> *Best Regard!*
>>>>
>>>> *Sandy Zhang (* 张立康*)*
>>>> *BIOS Engineer*
>>>> *Global Design Service*
>>>> *Celestica(Shanghai) R&D Center, China*
>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>> *Phone: (+86)021-61006028-7623*
>>>>
>>>> _______________________________________________
>>>> flashrom mailing list
>>>> flashrom(a)flashrom.org
>>>> https://mail.coreboot.org/mailman/listinfo/flashrom
>>>>
>>>
>>>
>>
>>
>> --
>>
>> *Best Regard!*
>>
>> *Sandy Zhang (* 张立康*)*
>> *BIOS Engineer*
>> *Global Design Service*
>> *Celestica(Shanghai) R&D Center, China*
>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>> *Phone: (+86)021-61006028-7623*
>>
>
--
*Best Regard!*
*Sandy Zhang (* 张立康*)*
*BIOS Engineer*
*Global Design Service*
*Celestica(Shanghai) R&D Center, China*
*Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
*Mobile: (+86)15965353952*
*Phone: (+86)021-61006028-7623*
On Aug 3, 2017 11:51 PM, "Sandy Zhang" <sanzhang(a)celestica.com> wrote:
> Hi David,
>
> Thanks for your reply, can you tell me where to download the flash package
> like "flashrom-0.9.9.tar" which is downloaded from the address ''
> https://www.flashrom.org/Downloads"? thank you!
>
The Skylake patches have not made it into a release tarball yet. Can you
try using the git sources from https://review.coreboot.org/cgit/flashrom.git?
E.g:
git clone https://review.coreboot.org/flashrom.git
git checkout origin/staging
make
>
>
>
> BR
> Sandy
>
> 2017-08-04 14:35 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>:
>
>> Hi Sandy,
>> Skylake support was recently merged: https://review.coreboot.org/18973
>>
>> However you may need to add your PCH PCI ID. What does `lspci -nn | grep
>> LPC` show on your test system?
>>
>> And yes, a 32MB ROM should work fine.
>>
>> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang <sanzhang(a)celestica.com>
>> wrote:
>>
>>> Hi,
>>>
>>> Can you tell me when flashrom support Intel Purley platform Lewisburg
>>> PCH?
>>> and if it can support flash 32 MB SPI rom?
>>> I am eager to your reply as soon as possible, thank you very much!
>>>
>>>
>>> --
>>>
>>> *Best Regard!*
>>>
>>> *Sandy Zhang (* 张立康*)*
>>> *BIOS Engineer*
>>> *Global Design Service*
>>> *Celestica(Shanghai) R&D Center, China*
>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>> *Phone: (+86)021-61006028-7623*
>>>
>>> _______________________________________________
>>> flashrom mailing list
>>> flashrom(a)flashrom.org
>>> https://mail.coreboot.org/mailman/listinfo/flashrom
>>>
>>
>>
>
>
> --
>
> *Best Regard!*
>
> *Sandy Zhang (* 张立康*)*
> *BIOS Engineer*
> *Global Design Service*
> *Celestica(Shanghai) R&D Center, China*
> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
> *Phone: (+86)021-61006028-7623*
>
Hi David,
Thanks for your reply, can you tell me where to download the flash package
like "flashrom-0.9.9.tar" which is downloaded from the address ''
https://www.flashrom.org/Downloads"? thank you!
BR
Sandy
2017-08-04 14:35 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>:
> Hi Sandy,
> Skylake support was recently merged: https://review.coreboot.org/18973
>
> However you may need to add your PCH PCI ID. What does `lspci -nn | grep
> LPC` show on your test system?
>
> And yes, a 32MB ROM should work fine.
>
> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang <sanzhang(a)celestica.com>
> wrote:
>
>> Hi,
>>
>> Can you tell me when flashrom support Intel Purley platform Lewisburg PCH?
>> and if it can support flash 32 MB SPI rom?
>> I am eager to your reply as soon as possible, thank you very much!
>>
>>
>> --
>>
>> *Best Regard!*
>>
>> *Sandy Zhang (* 张立康*)*
>> *BIOS Engineer*
>> *Global Design Service*
>> *Celestica(Shanghai) R&D Center, China*
>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>> *Phone: (+86)021-61006028-7623*
>>
>> _______________________________________________
>> flashrom mailing list
>> flashrom(a)flashrom.org
>> https://mail.coreboot.org/mailman/listinfo/flashrom
>>
>
>
--
*Best Regard!*
*Sandy Zhang (* 张立康*)*
*BIOS Engineer*
*Global Design Service*
*Celestica(Shanghai) R&D Center, China*
*Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
*Mobile: (+86)15965353952*
*Phone: (+86)021-61006028-7623*
Hi Sandy,
Skylake support was recently merged: https://review.coreboot.org/18973
However you may need to add your PCH PCI ID. What does `lspci -nn | grep
LPC` show on your test system?
And yes, a 32MB ROM should work fine.
On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang <sanzhang(a)celestica.com> wrote:
> Hi,
>
> Can you tell me when flashrom support Intel Purley platform Lewisburg PCH?
> and if it can support flash 32 MB SPI rom?
> I am eager to your reply as soon as possible, thank you very much!
>
>
> --
>
> *Best Regard!*
>
> *Sandy Zhang (* 张立康*)*
> *BIOS Engineer*
> *Global Design Service*
> *Celestica(Shanghai) R&D Center, China*
> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>*
> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
> *Phone: (+86)021-61006028-7623*
>
> _______________________________________________
> flashrom mailing list
> flashrom(a)flashrom.org
> https://mail.coreboot.org/mailman/listinfo/flashrom
>