August 2017 - flashrom - mail.coreboot.org

Re: [flashrom] When flashrom support Intel Purley platform Lewisburg PCH?
by Sandy Zhang Aug. 14, 2017

Aug. 14, 2017

Hi David, About set permissions for the "BIOS" master via BRWA and BRRA in the FRACC register, do you mean modify the below location by FITC.exe? if yes, I have changed the "Host CPU/BIOS Write Access" & "Host CPU/BIOS Read Access"'s value to 0xFFFF to enable all the sixty region's access, but the result has not any change. [image: 内嵌图片 2] 2017-08-14 14:23 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: > On Sun, Aug 13, 2017 at 6:26 PM, Sandy Zhang <sanzhang(a)celestica.com> > wrote: > >> Hi David, >> >> I'm inline. >> > > I don't see your responses. Did you intend to reply to my comments? > > >> >> 2017-08-14 9:17 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: >> >>> Hi Sandy, >>> >>> Responses in-line. >>> >>> On Fri, Aug 11, 2017 at 1:38 AM, Sandy Zhang <sanzhang(a)celestica.com> >>> wrote: >>> >>>> Hi David, >>>> >>>> Sorry, I have a doubt about the range outside, from the binary >>>> map, we can find the Spare 3 Region size is 0x00FFFFFF - 0xFF0000 + 1 = >>>> 0x10000, and the binary size map to this range is also 0x10000, they are >>>> equal, why outside was happened? and can you tell me how to update the >>>> binary region's range defined in the flash description? >>>> >>>> Start (hex) End (hex) Length (hex) Area Name >>>> ----------- --------- ------------ --------- >>>> ... >>>> ... >>>> .... >>>> 00FF0000 00FFFFFF 00010000 Spare 3 Region >>>> 01000000 01FFFFFF 01000000 BIOS Region >>>> >>> >>> The Flash Region registers (BIOS_FREGn) define the boundaries of each >>> region. I don't see where 0xa36000-0xffffff is covered: >>> 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) >>> is read-write. >>> 0x58: 0x1fff1000 FREG1: BIOS region (0x01000000-0x01ffffff) is >>> read-write. >>> 0x5C: 0x0a250003 FREG2: Management Engine region (0x00003000-0x00a25fff) >>> is read-write. >>> 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) >>> is read-write. >>> 0x64: 0x00007fff FREG4: Platform Data region is unused. >>> 0x68: 0x0a350a26 FREG5: unknown region (0x00a26000-0x00a35fff) is >>> read-write. >>> 0x6C: 0x00007fff FREG6: unknown region is unused. >>> 0x70: 0x00007fff FREG7: unknown region is unused. >>> 0x74: 0x00007fff FREG8: unknown region is unused. >>> 0x78: 0x00007fff FREG9: unknown region is unused. >>> >>> You might also need to set permissions for the "BIOS" master (i.e. >>> flashrom running on the CPU) via BRWA and BRRA in the FRACC register. >>> >>> In addition, from flash log file(please see attachment >>>> "Lewisburg_W25Q256.log"), it shows: >>>> Found Programmer flash chip "Opaque flash chip" (32768 kB, >>>> Programmer-specific) mapped at physical address 0x0000000000000000. >>>> but, my flash chip is "Winbond flash chip", what do you think about >>>> this? >>>> >>> >>> This is OK. Intel hardware sequencing is an "opaque" programmer >>> interface since flashrom does not directly send NOR flash commands via a >>> raw SPI interface. For hardware sequencing we use the FCYCLE field as our >>> command interface to the SPI flash. >>> >>> >> >> >> -- >> >> *Best Regard!* >> >> *Sandy Zhang (* 张立康*)* >> *BIOS Engineer* >> *Global Design Service* >> *Celestica(Shanghai) R&D Center, China* >> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >> *Phone: (+86)021-61006028-7623* >> > > -- *Best Regard!* *Sandy Zhang (* 张立康*)* *BIOS Engineer* *Global Design Service* *Celestica(Shanghai) R&D Center, China* *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* *Mobile: (+86)15965353952* *Phone: (+86)021-61006028-7623*

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Re: [flashrom] When flashrom support Intel Purley platform Lewisburg PCH?
by David Hendricks Aug. 14, 2017

Aug. 14, 2017

On Sun, Aug 13, 2017 at 6:26 PM, Sandy Zhang <sanzhang(a)celestica.com> wrote: > Hi David, > > I'm inline. > I don't see your responses. Did you intend to reply to my comments? > > 2017-08-14 9:17 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: > >> Hi Sandy, >> >> Responses in-line. >> >> On Fri, Aug 11, 2017 at 1:38 AM, Sandy Zhang <sanzhang(a)celestica.com> >> wrote: >> >>> Hi David, >>> >>> Sorry, I have a doubt about the range outside, from the binary map, >>> we can find the Spare 3 Region size is 0x00FFFFFF - 0xFF0000 + 1 = 0x10000, >>> and the binary size map to this range is also 0x10000, they are equal, why >>> outside was happened? and can you tell me how to update the binary region's >>> range defined in the flash description? >>> >>> Start (hex) End (hex) Length (hex) Area Name >>> ----------- --------- ------------ --------- >>> ... >>> ... >>> .... >>> 00FF0000 00FFFFFF 00010000 Spare 3 Region >>> 01000000 01FFFFFF 01000000 BIOS Region >>> >> >> The Flash Region registers (BIOS_FREGn) define the boundaries of each >> region. I don't see where 0xa36000-0xffffff is covered: >> 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) >> is read-write. >> 0x58: 0x1fff1000 FREG1: BIOS region (0x01000000-0x01ffffff) is read-write. >> 0x5C: 0x0a250003 FREG2: Management Engine region (0x00003000-0x00a25fff) >> is read-write. >> 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) >> is read-write. >> 0x64: 0x00007fff FREG4: Platform Data region is unused. >> 0x68: 0x0a350a26 FREG5: unknown region (0x00a26000-0x00a35fff) is >> read-write. >> 0x6C: 0x00007fff FREG6: unknown region is unused. >> 0x70: 0x00007fff FREG7: unknown region is unused. >> 0x74: 0x00007fff FREG8: unknown region is unused. >> 0x78: 0x00007fff FREG9: unknown region is unused. >> >> You might also need to set permissions for the "BIOS" master (i.e. >> flashrom running on the CPU) via BRWA and BRRA in the FRACC register. >> >> In addition, from flash log file(please see attachment >>> "Lewisburg_W25Q256.log"), it shows: >>> Found Programmer flash chip "Opaque flash chip" (32768 kB, >>> Programmer-specific) mapped at physical address 0x0000000000000000. >>> but, my flash chip is "Winbond flash chip", what do you think about >>> this? >>> >> >> This is OK. Intel hardware sequencing is an "opaque" programmer interface >> since flashrom does not directly send NOR flash commands via a raw SPI >> interface. For hardware sequencing we use the FCYCLE field as our command >> interface to the SPI flash. >> >> > > > -- > > *Best Regard!* > > *Sandy Zhang (* 张立康*)* > *BIOS Engineer* > *Global Design Service* > *Celestica(Shanghai) R&D Center, China* > *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* > *Mobile: (+86)15965353952 <+86%20159%206535%203952>* > *Phone: (+86)021-61006028-7623* >

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Re: [flashrom] When flashrom support Intel Purley platform Lewisburg PCH?
by Sandy Zhang Aug. 14, 2017

Aug. 14, 2017

Hi David, I'm inline. 2017-08-14 9:17 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: > Hi Sandy, > > Responses in-line. > > On Fri, Aug 11, 2017 at 1:38 AM, Sandy Zhang <sanzhang(a)celestica.com> > wrote: > >> Hi David, >> >> Sorry, I have a doubt about the range outside, from the binary map, >> we can find the Spare 3 Region size is 0x00FFFFFF - 0xFF0000 + 1 = 0x10000, >> and the binary size map to this range is also 0x10000, they are equal, why >> outside was happened? and can you tell me how to update the binary region's >> range defined in the flash description? >> >> Start (hex) End (hex) Length (hex) Area Name >> ----------- --------- ------------ --------- >> ... >> ... >> .... >> 00FF0000 00FFFFFF 00010000 Spare 3 Region >> 01000000 01FFFFFF 01000000 BIOS Region >> > > The Flash Region registers (BIOS_FREGn) define the boundaries of each > region. I don't see where 0xa36000-0xffffff is covered: > 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is > read-write. > 0x58: 0x1fff1000 FREG1: BIOS region (0x01000000-0x01ffffff) is read-write. > 0x5C: 0x0a250003 FREG2: Management Engine region (0x00003000-0x00a25fff) > is read-write. > 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) is > read-write. > 0x64: 0x00007fff FREG4: Platform Data region is unused. > 0x68: 0x0a350a26 FREG5: unknown region (0x00a26000-0x00a35fff) is > read-write. > 0x6C: 0x00007fff FREG6: unknown region is unused. > 0x70: 0x00007fff FREG7: unknown region is unused. > 0x74: 0x00007fff FREG8: unknown region is unused. > 0x78: 0x00007fff FREG9: unknown region is unused. > > You might also need to set permissions for the "BIOS" master (i.e. > flashrom running on the CPU) via BRWA and BRRA in the FRACC register. > > In addition, from flash log file(please see attachment >> "Lewisburg_W25Q256.log"), it shows: >> Found Programmer flash chip "Opaque flash chip" (32768 kB, >> Programmer-specific) mapped at physical address 0x0000000000000000. >> but, my flash chip is "Winbond flash chip", what do you think about >> this? >> > > This is OK. Intel hardware sequencing is an "opaque" programmer interface > since flashrom does not directly send NOR flash commands via a raw SPI > interface. For hardware sequencing we use the FCYCLE field as our command > interface to the SPI flash. > > -- *Best Regard!* *Sandy Zhang (* 张立康*)* *BIOS Engineer* *Global Design Service* *Celestica(Shanghai) R&D Center, China* *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* *Mobile: (+86)15965353952* *Phone: (+86)021-61006028-7623*

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Re: [flashrom] When flashrom support Intel Purley platform Lewisburg PCH?
by David Hendricks Aug. 14, 2017

Aug. 14, 2017

Hi Sandy, Responses in-line. On Fri, Aug 11, 2017 at 1:38 AM, Sandy Zhang <sanzhang(a)celestica.com> wrote: > Hi David, > > Sorry, I have a doubt about the range outside, from the binary map, > we can find the Spare 3 Region size is 0x00FFFFFF - 0xFF0000 + 1 = 0x10000, > and the binary size map to this range is also 0x10000, they are equal, why > outside was happened? and can you tell me how to update the binary region's > range defined in the flash description? > > Start (hex) End (hex) Length (hex) Area Name > ----------- --------- ------------ --------- > ... > ... > .... > 00FF0000 00FFFFFF 00010000 Spare 3 Region > 01000000 01FFFFFF 01000000 BIOS Region > The Flash Region registers (BIOS_FREGn) define the boundaries of each region. I don't see where 0xa36000-0xffffff is covered: 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. 0x58: 0x1fff1000 FREG1: BIOS region (0x01000000-0x01ffffff) is read-write. 0x5C: 0x0a250003 FREG2: Management Engine region (0x00003000-0x00a25fff) is read-write. 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) is read-write. 0x64: 0x00007fff FREG4: Platform Data region is unused. 0x68: 0x0a350a26 FREG5: unknown region (0x00a26000-0x00a35fff) is read-write. 0x6C: 0x00007fff FREG6: unknown region is unused. 0x70: 0x00007fff FREG7: unknown region is unused. 0x74: 0x00007fff FREG8: unknown region is unused. 0x78: 0x00007fff FREG9: unknown region is unused. You might also need to set permissions for the "BIOS" master (i.e. flashrom running on the CPU) via BRWA and BRRA in the FRACC register. In addition, from flash log file(please see attachment > "Lewisburg_W25Q256.log"), it shows: > Found Programmer flash chip "Opaque flash chip" (32768 kB, > Programmer-specific) mapped at physical address 0x0000000000000000. > but, my flash chip is "Winbond flash chip", what do you think about this? > This is OK. Intel hardware sequencing is an "opaque" programmer interface since flashrom does not directly send NOR flash commands via a raw SPI interface. For hardware sequencing we use the FCYCLE field as our command interface to the SPI flash.

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Verifies But Bricked Chip
by Dylan Sparks Aug. 11, 2017

Aug. 11, 2017

I’m able to read and write to my SST25VF016B chip that I have on a custom board connected to ADSP-21489 from Analog Devices but the device ceases to function after a verified write. I’ve tried a few different ways with a few different boards but the device has yet to produce a working unit. First, I attempted to write the original LDR file but flashrom wouldn’t write it because the file size was different than the flash size so I took a working unit and read to a file. Checksum was verified multiple times. When I then wrote that file back to the board, the board stopped responding. I have attached the write output below. In all instances I have been able to verify the file with the chip after the write. I also tried writing to a board with a blank chip and same result except the output doesn’t give the warning about pi@Wa:~/flashrom $ sudo ./flashrom -p linux_spi:dev=/dev/spidev0.0 -V -V -w ./roms/Juno10.hex flashrom v0.9.9-r1954 on Linux 4.9.35-v7+ (armv7l) flashrom is free software, get the source code at https://flashrom.org flashrom was built with libpci 3.2.1, GCC 4.9.2, little endian Command line (6 args): ./flashrom -p linux_spi:dev=/dev/spidev0.0 -V -V -w ./roms/Juno10.hex Calibrating delay loop... OS timer resolution is 2 usecs, 596M loops per second, 10 myus = 10 us, 100 myus = 166 us, 1000 myus = 1057 us, 10000 myus = 10202 us, 8 myus = 77 us, OK. Initializing linux_spi programmer Using device /dev/spidev0.0 The following protocols are supported: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25LQ16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25LQ032/A25LQ32A, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for AMIC A25LQ64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25DL081, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25DL161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25F512, 64 kB: probe_spi_at25f: id1 0xff, id2 0xff Probing for Atmel AT25F512A, 64 kB: probe_spi_at25f: id1 0xff, id2 0xff Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25F1024(A), 128 kB: probe_spi_at25f: id1 0xff, id2 0xff Probing for Atmel AT25F2048, 256 kB: probe_spi_at25f: id1 0xff, id2 0xff Probing for Atmel AT25F4096, 512 kB: probe_spi_at25f: id1 0xff, id2 0xff Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT45DB321E, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for ESMT F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for ESMT F25L32PA, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25P05, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25P10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25P20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25P40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25P80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25P16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25P32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25P64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25F64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25QH64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25QH128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25S10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25S20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25S40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25S80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25S16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25S32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon EN25S64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for ESI ES25P40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for ESI ES25P80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for ESI ES25P16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25LQ40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25LQ80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25LQ16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25LQ32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25LQ64(B), 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25LQ128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25Q512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25Q10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25Q20(B), 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25Q40(B), 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25Q80(B), 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25Q16(B), 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25Q32(B), 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25Q64(B), 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25Q128B, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25Q128C, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25T80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25VQ21B, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25VQ40C, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25VQ41B, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25VQ80C, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for GigaDevice GD25VQ16C, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Intel 25F160S33B8, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Intel 25F160S33T8, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Intel 25F320S33B8, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Intel 25F320S33T8, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Intel 25F640S33B8, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Intel 25F640S33T8, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX23L1654, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX23L3254, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX23L6454, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX23L12854, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L512(E)/MX25V512(C), 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L1005(C)/MX25L1006E, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L2005(C)/MX25L2006E, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L4005(A/C)/MX25L4006E, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L8005/MX25L8006E/MX25L8008E/MX25V8005, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L1605A/MX25L1606E/MX25L1608E, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L1605D/MX25L1608D/MX25L1673E, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L3205(A), 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L3205D/MX25L3208D, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L3206E/MX25L3208E, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L3273E, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L6405D, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L6406E/MX25L6408E, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L12805D, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L12835F/MX25L12845E/MX25L12865E, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25U1635E, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25U3235E/F, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25U6435E/F, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25U12835F, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix MX25L6495F, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for Micron/Numonyx/ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for Micron/Numonyx/ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25P20-old, 256 kB: Ignoring RES in favour of RDID. Probing for Micron/Numonyx/ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for Micron/Numonyx/ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25PX80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M45PE10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M45PE20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M45PE40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M45PE80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST M45PE16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST N25Q016, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST N25Q032..1E, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST N25Q032..3E, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST N25Q064..1E, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST N25Q064..3E, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST N25Q128..1E, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Micron/Numonyx/ST N25Q128..3E, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Nantronics N25S10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Nantronics N25S20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Nantronics N25S40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Nantronics N25S80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Nantronics N25S16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LD256C, 32 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LD512(C), 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LD010(C), 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LD020(C), 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LD040(C), 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LQ020, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LQ040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LQ080, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LQ016, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LQ032C, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LV512(A), 64 kB: probe_spi_res2: id1 0xbf, id2 0x41 Probing for PMC Pm25LV010, 128 kB: probe_spi_res2: id1 0xbf, id2 0x41 Probing for PMC Pm25LV010A, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Sanyo LE25FW106, 128 kB: probe_spi_res2: id1 0xbf, id2 0x41 Probing for Sanyo LE25FW406A, 512 kB: probe_spi_res2: id1 0xbf, id2 0x41 Probing for Sanyo LE25FU406B, 512 kB: probe_spi_res2: id1 0xbf, id2 0x41 Probing for Sanyo LE25FU406C/LE25U40CMC, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Sanyo LE25FW203A, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Sanyo LE25FW403A, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Sanyo LE25FW418A, 512 kB: probe_spi_res2: id1 0xbf, id2 0x41 Probing for Sanyo LE25FW806, 1024 kB: probe_spi_res2: id1 0xbf, id2 0x41 Probing for Sanyo LE25FW808, 1024 kB: probe_spi_res2: id1 0xbf, id2 0x41 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL032A/P, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL064A/P, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL204K, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL208K, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL116K/S25FL216K, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL132K, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL164K, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL127S-64kB, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL127S-256kB, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL128P......0, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL128P......1, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL128S......0, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL128S......1, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL129P......0, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Spansion S25FL129P......1, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25LF020A, 256 kB: probe_spi_rems: id1 0xbf, id2 0x41 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0xbf, id2 0x41 Probing for SST SST25LF080(A), 1024 kB: probe_spi_res2: id1 0xbf, id2 0x41 Probing for SST SST25VF512(A), 64 kB: probe_spi_rems: id1 0xbf, id2 0x41 Probing for SST SST25VF010(A), 128 kB: probe_spi_rems: id1 0xbf, id2 0x41 Probing for SST SST25VF020, 256 kB: probe_spi_rems: id1 0xbf, id2 0x41 Probing for SST SST25VF020B, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xbf, id2 0x41 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xbf, id2 0x41 Probing for SST SST25WF020A, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25WF040B, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25WF080B, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Found SST flash chip "SST25VF016B" (2048 kB, SPI) on linux_spi. Chip status register is 0x1c. Chip status register: Block Protect Write Disable (BPL) is not set Chip status register: Auto Address Increment Programming (AAI) is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is set Chip status register: Block Protect 1 (BP1) is set Chip status register: Block Protect 0 (BP0) is set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Resulting block protection : all Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25WF512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25WF010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25WF020, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25WF040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST SST25WF080, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25Q40.V, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25Q80.V, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25Q16.V, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25Q32.V, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25Q64.V, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25Q128.V, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25Q20.W, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25Q40.W, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25Q80.W, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25Q16.W, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25Q32.W, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25Q64.W, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Unknown SFDP-capable chip, 0 kB: Signature = 0xffffffff (should be 0x50444653) No SFDP signature found. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Winbond unknown Winbond (ex Nexcom) SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xbf, id2 0x41 Found SST flash chip "SST25VF016B" (2048 kB, SPI). Some block protection in effect, disabling... disabled. Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x00, 0x005000-0x005fff:S, 0x006000-0x006fff:S, 0x007000-0x007fff:S, ff:S, 0x00d000-0x00dfff:S, 0x00e000-0x00efff:S, 0x00f000-0x00ffff014fff:S, 0x015000-0x015fff:S, 0x016000-0x016fff:S, 0x017000-0x010-0x01cfff:S, 0x01d000-0x01dfff:S, 0x01e000-0x01efff:S, 0x01f000-24000-0x024fff:S, 0x025000-0x025fff:S, 0x026000-0x026fff:S, 0x027 0x02c000-0x02cfff:S, 0x02d000-0x02dfff:S, 0x02e000-0x02efff:S, 0f:S, 0x034000-0x034fff:S, 0x035000-0x035fff:S, 0x036000-0x036fff:3bfff:S, 0x03c000-0x03cfff:S, 0x03d000-0x03dfff:S, 0x03e000-0x03e-0x043fff:S, 0x044000-0x044fff:S, 0x045000-0x045fff:S, 0x046000-0b000-0x04bfff:S, 0x04c000-0x04cfff:S, 0x04d000-0x04dfff:S, 0x04e00x053000-0x053fff:S, 0x054000-0x054fff:S, 0x055000-0x055fff:S, 0x:S, 0x05b000-0x05bfff:S, 0x05c000-0x05cfff:S, 0x05d000-0x05dfff:S2fff:S, 0x063000-0x063fff:S, 0x064000-0x064fff:S, 0x065000-0x065f0x06afff:S, 0x06b000-0x06bfff:S, 0x06c000-0x06cfff:S, 0x06d000-0x000-0x072fff:S, 0x073000-0x073fff:S, 0x074000-0x074fff:S, 0x07500x07a000-0x07afff:S, 0x07b000-0x07bfff:S, 0x07c000-0x07cfff:S, 0x0S, 0x082000-0x082fff:S, 0x083000-0x083fff:S, 0x084000-0x084fff:S,fff:S, 0x08a000-0x08afff:S, 0x08b000-0x08bfff:S, 0x08c000-0x08cffx091fff:S, 0x092000-0x092fff:S, 0x093000-0x093fff:S, 0x094000-0x000-0x099fff:S, 0x09a000-0x09afff:S, 0x09b000-0x09bfff:S, 0x09c0000a1000-0x0a1fff:S, 0x0a2000-0x0a2fff:S, 0x0a3000-0x0a3fff:S, 0x0a, 0x0a9000-0x0a9fff:S, 0x0aa000-0x0aafff:S, 0x0ab000-0x0abfff:S, ff:S, 0x0b1000-0x0b1fff:S, 0x0b2000-0x0b2fff:S, 0x0b3000-0x0b3fff0b8fff:S, 0x0b9000-0x0b9fff:S, 0x0ba000-0x0bafff:S, 0x0bb000-0x0b0-0x0c0fff:S, 0x0c1000-0x0c1fff:S, 0x0c2000-0x0c2fff:S, 0x0c3000-c8000-0x0c8fff:S, 0x0c9000-0x0c9fff:S, 0x0ca000-0x0cafff:S, 0x0cb 0x0d0000-0x0d0fff:S, 0x0d1000-0x0d1fff:S, 0x0d2000-0x0d2fff:S, 0f:S, 0x0d8000-0x0d8fff:S, 0x0d9000-0x0d9fff:S, 0x0da000-0x0dafff:dffff:S, 0x0e0000-0x0e0fff:S, 0x0e1000-0x0e1fff:S, 0x0e2000-0x0e2-0x0e7fff:S, 0x0e8000-0x0e8fff:S, 0x0e9000-0x0e9fff:S, 0x0ea000-0f000-0x0effff:S, 0x0f0000-0x0f0fff:S, 0x0f1000-0x0f1fff:S, 0x0f200x0f7000-0x0f7fff:S, 0x0f8000-0x0f8fff:S, 0x0f9000-0x0f9fff:S, 0x:S, 0x0ff000-0x0fffff:S, 0x100000-0x100fff:S, 0x101000-0x101fff:S6fff:S, 0x107000-0x107fff:S, 0x108000-0x108fff:S, 0x109000-0x109f0x10efff:S, 0x10f000-0x10ffff:S, 0x110000-0x110fff:S, 0x111000-0x000-0x116fff:S, 0x117000-0x117fff:S, 0x118000-0x118fff:S, 0x11900x11e000-0x11efff:S, 0x11f000-0x11ffff:S, 0x120000-0x120fff:S, 0x1S, 0x126000-0x126fff:S, 0x127000-0x127fff:S, 0x128000-0x128fff:S,fff:S, 0x12e000-0x12efff:S, 0x12f000-0x12ffff:S, 0x130000-0x130ffx135fff:S, 0x136000-0x136fff:S, 0x137000-0x137fff:S, 0x138000-0x100-0x13dfff:S, 0x13e000-0x13efff:S, 0x13f000-0x13ffff:S, 0x140000145000-0x145fff:S, 0x146000-0x146fff:S, 0x147000-0x147fff:S, 0x14, 0x14d000-0x14dfff:S, 0x14e000-0x14efff:S, 0x14f000-0x14ffff:S, ff:S, 0x155000-0x155fff:S, 0x156000-0x156fff:S, 0x157000-0x157fff15cfff:S, 0x15d000-0x15dfff:S, 0x15e000-0x15efff:S, 0x15f000-0x150-0x164fff:S, 0x165000-0x165fff:S, 0x166000-0x166fff:S, 0x167000-6c000-0x16cfff:S, 0x16d000-0x16dfff:S, 0x16e000-0x16efff:S, 0x16f 0x174000-0x174fff:S, 0x175000-0x175fff:S, 0x176000-0x176fff:S, 0f:S, 0x17c000-0x17cfff:S, 0x17d000-0x17dfff:S, 0x17e000-0x17efff:83fff:S, 0x184000-0x184fff:S, 0x185000-0x185fff:S, 0x186000-0x186-0x18bfff:S, 0x18c000-0x18cfff:S, 0x18d000-0x18dfff:S, 0x18e000-03000-0x193fff:S, 0x194000-0x194fff:S, 0x195000-0x195fff:S, 0x19600x19b000-0x19bfff:S, 0x19c000-0x19cfff:S, 0x19d000-0x19dfff:S, 0x:S, 0x1a3000-0x1a3fff:S, 0x1a4000-0x1a4fff:S, 0x1a5000-0x1a5fff:Safff:S, 0x1ab000-0x1abfff:S, 0x1ac000-0x1acfff:S, 0x1ad000-0x1adf0x1b2fff:S, 0x1b3000-0x1b3fff:S, 0x1b4000-0x1b4fff:S, 0x1b5000-0x000-0x1bafff:S, 0x1bb000-0x1bbfff:S, 0x1bc000-0x1bcfff:S, 0x1bd00x1c2000-0x1c2fff:S, 0x1c3000-0x1c3fff:S, 0x1c4000-0x1c4fff:S, 0x1S, 0x1ca000-0x1cafff:S, 0x1cb000-0x1cbfff:S, 0x1cc000-0x1ccfff:S,fff:S, 0x1d2000-0x1d2fff:S, 0x1d3000-0x1d3fff:S, 0x1d4000-0x1d4ffx1d9fff:S, 0x1da000-0x1dafff:S, 0x1db000-0x1dbfff:S, 0x1dc000-0x100-0x1e1fff:S, 0x1e2000-0x1e2fff:S, 0x1e3000-0x1e3fff:S, 0x1e40001e9000-0x1e9fff:S, 0x1ea000-0x1eafff:S, 0x1eb000-0x1ebfff:S, 0x1e, 0x1f1000-0x1f1fff:S, 0x1f2000-0x1f2fff:S, 0x1f3000-0x1f3fff:S, ff:S, 0x1f9000-0x1f9fff:S, 0x1fa000-0x1fafff:S, 0x1fb000-0x1fbfff Warning: Chip content is identical to the requested image. Erase/write done.

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Re: [flashrom] When flashrom support Intel Purley platform Lewisburg PCH?
by Sandy Zhang Aug. 11, 2017

Aug. 11, 2017

Hi David, Sorry, I have a doubt about the range outside, from the binary map, we can find the Spare 3 Region size is 0x00FFFFFF - 0xFF0000 + 1 = 0x10000, and the binary size map to this range is also 0x10000, they are equal, why outside was happened? and can you tell me how to update the binary region's range defined in the flash description? Start (hex) End (hex) Length (hex) Area Name ----------- --------- ------------ --------- ... ... .... 00FF0000 00FFFFFF 00010000 Spare 3 Region 01000000 01FFFFFF 01000000 BIOS Region In addition, from flash log file(please see attachment "Lewisburg_W25Q256.log"), it shows: Found Programmer flash chip "Opaque flash chip" (32768 kB, Programmer-specific) mapped at physical address 0x0000000000000000. but, my flash chip is "Winbond flash chip", what do you think about this? Thank you very much! 2017-08-11 0:36 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: > Hi Sandy, > That range is outside of what you have defined in your flash descriptor. > Can you update your flash descriptor to include it? > > On Thu, Aug 10, 2017 at 4:43 AM, Sandy Zhang <sanzhang(a)celestica.com> > wrote: > >> Hi David, >> >> I have used your program to verify, but it still can't flash, it prompts >> "Transaction error between offset 0x00ff0000 and 0x00ff003f (= 0x00ff003f >> + 63)"! >> >> >> >> >> 2017-08-10 15:29 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: >> >>> Hi Sandy, >>> Recent Intel PCHs use hardware sequencing which abstracts a lot of >>> details about the chip. So we don't actually need flashrom to explicitly >>> support the W25Q256. >>> >>> Here is a tarball based on the latest sources from git: >>> https://drive.google.com/file/d/0Bz3WBh8gVeIuSlJYZ2c1bS1LdGc >>> /view?usp=sharing >>> >>> It has the following patches applied: >>> https://review.coreboot.org/#/c/20922/ : chispet_enable: Add PCI IDs >>> for C620-series PCHs >>> https://review.coreboot.org/#/c/20936/ : ich_descriptors: Modify limits >>> for C620/Lewisburg PCH >>> https://review.coreboot.org/#/c/20937/ : ich_descriptors: Fix >>> off-by-one error >>> >>> Let us know if it works for you. >>> >>> >>> On Wed, Aug 9, 2017 at 8:04 PM, Sandy Zhang <sanzhang(a)celestica.com> >>> wrote: >>> >>>> Hi David, >>>> >>>> I have get the package from the web, but I can't find the code about >>>> "25Q256" in flashchip.c, so, maybe this will lead to flash fail. >>>> >>>> 2017-08-09 15:11 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>: >>>> >>>>> Hi David, >>>>> >>>>> Yes, My system's ISA/LPC vendor id and device id is 8086:a1c6, >>>>> In fact, I can't access the clone https://review.coreboot. >>>>> org/flashrom.git, I attempt to add the patch to flashrom-0.9.9, but >>>>> I found the difference is a bit big between these files, I'm very hard to >>>>> add the patch completely, so, could you send the latest package to me to >>>>> try this on my system? >>>>> Thanks for your great help! >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> 2017-08-09 14:04 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com> >>>>> : >>>>> >>>>>> Hi Sandy, >>>>>> What is the result of `lspci -nn | grep ISA` on your system? I >>>>>> uploaded a patch for Lewisburg PCI IDs here: https://review.coreboot. >>>>>> org/#/c/20922/ >>>>>> >>>>>> I have tested Lewisburg PCH + W25Q256xxx and it seems to work. Let me >>>>>> know if you need any help applying the patch and testing it out on your >>>>>> system. >>>>>> >>>>>> >>>>>> On Tue, Aug 8, 2017 at 7:09 PM, Sandy Zhang <sanzhang(a)celestica.com> >>>>>> wrote: >>>>>> >>>>>>> Hi David, >>>>>>> >>>>>>> Do you know whether the configuration "Lewisburg PCH + W25Q256xxx >>>>>>> SPI" has been tested with the flashrom? thank you! >>>>>>> >>>>>>> >>>>>>> >>>>>>> >>>>>>> >>>>>>> >>>>>>> 2017-08-08 3:55 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com >>>>>>> >: >>>>>>> >>>>>>>> Hi Sandy, >>>>>>>> Correct - The PCH will not allow us to write anything to regions >>>>>>>> which are not defined in the flash descriptor. You could add those regions >>>>>>>> to the "BIOS" region if you wish to update them from your host OS. The SPI >>>>>>>> Programming Guide for your PCH (Lewisburg?) should also have info about >>>>>>>> additional regions which you may set up in the flash descriptor. >>>>>>>> >>>>>>>> "EW" means erase and write, "S" means skip (content does not need >>>>>>>> to change), "E" means erase only, "W" means write only >>>>>>>> >>>>>>>> On Mon, Aug 7, 2017 at 12:50 AM, Sandy Zhang < >>>>>>>> sanzhang(a)celestica.com> wrote: >>>>>>>> >>>>>>>>> Hi David, >>>>>>>>> >>>>>>>>> It seems that the below 2 regions are "write denied": >>>>>>>>> >>>>>>>>> 00A26000 00A35FFF 00010000 DER #1 Region >>>>>>>>> 00A36000 00FEFFFF 005BA000 10 Gbe A Region >>>>>>>>> >>>>>>>>> By the way, can you tell me what is the other parament "EW", "S" >>>>>>>>> and "E" meana? thank you! >>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> 2017-08-07 13:02 GMT+08:00 David Hendricks < >>>>>>>>> david.hendricks(a)gmail.com>: >>>>>>>>> >>>>>>>>>> Hi Sandy, >>>>>>>>>> It might not have done what you expect. The error is because >>>>>>>>>> offsets 0xa26000-0xffffff are not defined in the flash descriptor, so the >>>>>>>>>> PCH gives us an error when flashrom attempts to update it. ":WD" next to >>>>>>>>>> the offsets in the log means "write denied". >>>>>>>>>> >>>>>>>>>> If you wish to update that region of the ROM then you must change >>>>>>>>>> your flash descriptor to include it and set the permissions to enable read >>>>>>>>>> and write. >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> On Sun, Aug 6, 2017 at 8:20 PM, Sandy Zhang < >>>>>>>>>> sanzhang(a)celestica.com> wrote: >>>>>>>>>> >>>>>>>>>>> Hi David, >>>>>>>>>>> >>>>>>>>>>> Attachment is the log file when flash bios into Winbond 32MB SPI >>>>>>>>>>> rom, could you help to check if it's updated sucessfully? thank you! >>>>>>>>>>> >>>>>>>>>>> 2017-08-05 10:45 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>: >>>>>>>>>>> >>>>>>>>>>>> Hi David, >>>>>>>>>>>> >>>>>>>>>>>> Thank you very much, I will try to add the patch to flashrom-0.9.9, >>>>>>>>>>>> As a BIOS engineer, it is a bit difficult for me to complete this. >>>>>>>>>>>> Do you know when will make it into a release tarball? >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> BR >>>>>>>>>>>> Sandy >>>>>>>>>>>> >>>>>>>>>>>> 2017-08-05 0:05 GMT+08:00 David Hendricks < >>>>>>>>>>>> david.hendricks(a)gmail.com>: >>>>>>>>>>>> >>>>>>>>>>>>> On Aug 3, 2017 11:51 PM, "Sandy Zhang" <sanzhang(a)celestica.com> >>>>>>>>>>>>> wrote: >>>>>>>>>>>>> >>>>>>>>>>>>>> Hi David, >>>>>>>>>>>>>> >>>>>>>>>>>>>> Thanks for your reply, can you tell me where to download the >>>>>>>>>>>>>> flash package like "flashrom-0.9.9.tar" which is downloaded from the >>>>>>>>>>>>>> address ''https://www.flashrom.org/Downloads"? thank you! >>>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> The Skylake patches have not made it into a release tarball >>>>>>>>>>>>> yet. Can you try using the git sources from >>>>>>>>>>>>> https://review.coreboot.org/cgit/flashrom.git? E.g: >>>>>>>>>>>>> >>>>>>>>>>>>> git clone https://review.coreboot.org/flashrom.git >>>>>>>>>>>>> git checkout origin/staging >>>>>>>>>>>>> make >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> BR >>>>>>>>>>>>>> Sandy >>>>>>>>>>>>>> >>>>>>>>>>>>>> 2017-08-04 14:35 GMT+08:00 David Hendricks < >>>>>>>>>>>>>> david.hendricks(a)gmail.com>: >>>>>>>>>>>>>> >>>>>>>>>>>>>>> Hi Sandy, >>>>>>>>>>>>>>> Skylake support was recently merged: >>>>>>>>>>>>>>> https://review.coreboot.org/18973 >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> However you may need to add your PCH PCI ID. What does >>>>>>>>>>>>>>> `lspci -nn | grep LPC` show on your test system? >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> And yes, a 32MB ROM should work fine. >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang < >>>>>>>>>>>>>>> sanzhang(a)celestica.com> wrote: >>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> Can you tell me when flashrom support Intel Purley platform >>>>>>>>>>>>>>>> Lewisburg PCH? >>>>>>>>>>>>>>>> and if it can support flash 32 MB SPI rom? >>>>>>>>>>>>>>>> I am eager to your reply as soon as possible, thank you >>>>>>>>>>>>>>>> very much! >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> -- >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> *Best Regard!* >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>>>>>>>> *BIOS Engineer* >>>>>>>>>>>>>>>> *Global Design Service* >>>>>>>>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> _______________________________________________ >>>>>>>>>>>>>>>> flashrom mailing list >>>>>>>>>>>>>>>> flashrom(a)flashrom.org >>>>>>>>>>>>>>>> https://mail.coreboot.org/mailman/listinfo/flashrom >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> -- >>>>>>>>>>>>>> >>>>>>>>>>>>>> *Best Regard!* >>>>>>>>>>>>>> >>>>>>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>>>>>> *BIOS Engineer* >>>>>>>>>>>>>> *Global Design Service* >>>>>>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> -- >>>>>>>>>>>> >>>>>>>>>>>> *Best Regard!* >>>>>>>>>>>> >>>>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>>>> *BIOS Engineer* >>>>>>>>>>>> *Global Design Service* >>>>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> -- >>>>>>>>>>> >>>>>>>>>>> *Best Regard!* >>>>>>>>>>> >>>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>>> *BIOS Engineer* >>>>>>>>>>> *Global Design Service* >>>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>>> >>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> -- >>>>>>>>> >>>>>>>>> *Best Regard!* >>>>>>>>> >>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>> *BIOS Engineer* >>>>>>>>> *Global Design Service* >>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>> >>>>>>>> >>>>>>>> >>>>>>> >>>>>>> >>>>>>> -- >>>>>>> >>>>>>> *Best Regard!* >>>>>>> >>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>> *BIOS Engineer* >>>>>>> *Global Design Service* >>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>> >>>>>> >>>>>> >>>>> >>>>> >>>>> -- >>>>> >>>>> *Best Regard!* >>>>> >>>>> *Sandy Zhang (* 张立康*)* >>>>> *BIOS Engineer* >>>>> *Global Design Service* >>>>> *Celestica(Shanghai) R&D Center, China* >>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>> *Phone: (+86)021-61006028-7623* >>>>> >>>> >>>> >>>> >>>> -- >>>> >>>> *Best Regard!* >>>> >>>> *Sandy Zhang (* 张立康*)* >>>> *BIOS Engineer* >>>> *Global Design Service* >>>> *Celestica(Shanghai) R&D Center, China* >>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>> *Phone: (+86)021-61006028-7623* >>>> >>> >>> >> >> >> -- >> >> *Best Regard!* >> >> *Sandy Zhang (* 张立康*)* >> *BIOS Engineer* >> *Global Design Service* >> *Celestica(Shanghai) R&D Center, China* >> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >> *Phone: (+86)021-61006028-7623* >> > > -- *Best Regard!* *Sandy Zhang (* 张立康*)* *BIOS Engineer* *Global Design Service* *Celestica(Shanghai) R&D Center, China* *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* *Mobile: (+86)15965353952* *Phone: (+86)021-61006028-7623*

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Re: [flashrom] When flashrom support Intel Purley platform Lewisburg PCH?
by David Hendricks Aug. 10, 2017

Aug. 10, 2017

Hi Sandy, That range is outside of what you have defined in your flash descriptor. Can you update your flash descriptor to include it? On Thu, Aug 10, 2017 at 4:43 AM, Sandy Zhang <sanzhang(a)celestica.com> wrote: > Hi David, > > I have used your program to verify, but it still can't flash, it prompts > "Transaction error between offset 0x00ff0000 and 0x00ff003f (= 0x00ff003f > + 63)"! > > > > > 2017-08-10 15:29 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: > >> Hi Sandy, >> Recent Intel PCHs use hardware sequencing which abstracts a lot of >> details about the chip. So we don't actually need flashrom to explicitly >> support the W25Q256. >> >> Here is a tarball based on the latest sources from git: >> https://drive.google.com/file/d/0Bz3WBh8gVeIuSlJYZ2c1bS1LdGc >> /view?usp=sharing >> >> It has the following patches applied: >> https://review.coreboot.org/#/c/20922/ : chispet_enable: Add PCI IDs for >> C620-series PCHs >> https://review.coreboot.org/#/c/20936/ : ich_descriptors: Modify limits >> for C620/Lewisburg PCH >> https://review.coreboot.org/#/c/20937/ : ich_descriptors: Fix off-by-one >> error >> >> Let us know if it works for you. >> >> >> On Wed, Aug 9, 2017 at 8:04 PM, Sandy Zhang <sanzhang(a)celestica.com> >> wrote: >> >>> Hi David, >>> >>> I have get the package from the web, but I can't find the code about >>> "25Q256" in flashchip.c, so, maybe this will lead to flash fail. >>> >>> 2017-08-09 15:11 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>: >>> >>>> Hi David, >>>> >>>> Yes, My system's ISA/LPC vendor id and device id is 8086:a1c6, >>>> In fact, I can't access the clone https://review.coreboot. >>>> org/flashrom.git, I attempt to add the patch to flashrom-0.9.9, but I >>>> found the difference is a bit big between these files, I'm very hard to add >>>> the patch completely, so, could you send the latest package to me to try >>>> this on my system? >>>> Thanks for your great help! >>>> >>>> >>>> >>>> >>>> >>>> >>>> 2017-08-09 14:04 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: >>>> >>>>> Hi Sandy, >>>>> What is the result of `lspci -nn | grep ISA` on your system? I >>>>> uploaded a patch for Lewisburg PCI IDs here: https://review.coreboot. >>>>> org/#/c/20922/ >>>>> >>>>> I have tested Lewisburg PCH + W25Q256xxx and it seems to work. Let me >>>>> know if you need any help applying the patch and testing it out on your >>>>> system. >>>>> >>>>> >>>>> On Tue, Aug 8, 2017 at 7:09 PM, Sandy Zhang <sanzhang(a)celestica.com> >>>>> wrote: >>>>> >>>>>> Hi David, >>>>>> >>>>>> Do you know whether the configuration "Lewisburg PCH + W25Q256xxx >>>>>> SPI" has been tested with the flashrom? thank you! >>>>>> >>>>>> >>>>>> >>>>>> >>>>>> >>>>>> >>>>>> 2017-08-08 3:55 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com> >>>>>> : >>>>>> >>>>>>> Hi Sandy, >>>>>>> Correct - The PCH will not allow us to write anything to regions >>>>>>> which are not defined in the flash descriptor. You could add those regions >>>>>>> to the "BIOS" region if you wish to update them from your host OS. The SPI >>>>>>> Programming Guide for your PCH (Lewisburg?) should also have info about >>>>>>> additional regions which you may set up in the flash descriptor. >>>>>>> >>>>>>> "EW" means erase and write, "S" means skip (content does not need to >>>>>>> change), "E" means erase only, "W" means write only >>>>>>> >>>>>>> On Mon, Aug 7, 2017 at 12:50 AM, Sandy Zhang <sanzhang(a)celestica.com >>>>>>> > wrote: >>>>>>> >>>>>>>> Hi David, >>>>>>>> >>>>>>>> It seems that the below 2 regions are "write denied": >>>>>>>> >>>>>>>> 00A26000 00A35FFF 00010000 DER #1 Region >>>>>>>> 00A36000 00FEFFFF 005BA000 10 Gbe A Region >>>>>>>> >>>>>>>> By the way, can you tell me what is the other parament "EW", "S" >>>>>>>> and "E" meana? thank you! >>>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> 2017-08-07 13:02 GMT+08:00 David Hendricks < >>>>>>>> david.hendricks(a)gmail.com>: >>>>>>>> >>>>>>>>> Hi Sandy, >>>>>>>>> It might not have done what you expect. The error is because >>>>>>>>> offsets 0xa26000-0xffffff are not defined in the flash descriptor, so the >>>>>>>>> PCH gives us an error when flashrom attempts to update it. ":WD" next to >>>>>>>>> the offsets in the log means "write denied". >>>>>>>>> >>>>>>>>> If you wish to update that region of the ROM then you must change >>>>>>>>> your flash descriptor to include it and set the permissions to enable read >>>>>>>>> and write. >>>>>>>>> >>>>>>>>> >>>>>>>>> On Sun, Aug 6, 2017 at 8:20 PM, Sandy Zhang < >>>>>>>>> sanzhang(a)celestica.com> wrote: >>>>>>>>> >>>>>>>>>> Hi David, >>>>>>>>>> >>>>>>>>>> Attachment is the log file when flash bios into Winbond 32MB SPI >>>>>>>>>> rom, could you help to check if it's updated sucessfully? thank you! >>>>>>>>>> >>>>>>>>>> 2017-08-05 10:45 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>: >>>>>>>>>> >>>>>>>>>>> Hi David, >>>>>>>>>>> >>>>>>>>>>> Thank you very much, I will try to add the patch to flashrom-0.9.9, >>>>>>>>>>> As a BIOS engineer, it is a bit difficult for me to complete this. >>>>>>>>>>> Do you know when will make it into a release tarball? >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> BR >>>>>>>>>>> Sandy >>>>>>>>>>> >>>>>>>>>>> 2017-08-05 0:05 GMT+08:00 David Hendricks < >>>>>>>>>>> david.hendricks(a)gmail.com>: >>>>>>>>>>> >>>>>>>>>>>> On Aug 3, 2017 11:51 PM, "Sandy Zhang" <sanzhang(a)celestica.com> >>>>>>>>>>>> wrote: >>>>>>>>>>>> >>>>>>>>>>>>> Hi David, >>>>>>>>>>>>> >>>>>>>>>>>>> Thanks for your reply, can you tell me where to download the >>>>>>>>>>>>> flash package like "flashrom-0.9.9.tar" which is downloaded from the >>>>>>>>>>>>> address ''https://www.flashrom.org/Downloads"? thank you! >>>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> The Skylake patches have not made it into a release tarball >>>>>>>>>>>> yet. Can you try using the git sources from >>>>>>>>>>>> https://review.coreboot.org/cgit/flashrom.git? E.g: >>>>>>>>>>>> >>>>>>>>>>>> git clone https://review.coreboot.org/flashrom.git >>>>>>>>>>>> git checkout origin/staging >>>>>>>>>>>> make >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> BR >>>>>>>>>>>>> Sandy >>>>>>>>>>>>> >>>>>>>>>>>>> 2017-08-04 14:35 GMT+08:00 David Hendricks < >>>>>>>>>>>>> david.hendricks(a)gmail.com>: >>>>>>>>>>>>> >>>>>>>>>>>>>> Hi Sandy, >>>>>>>>>>>>>> Skylake support was recently merged: >>>>>>>>>>>>>> https://review.coreboot.org/18973 >>>>>>>>>>>>>> >>>>>>>>>>>>>> However you may need to add your PCH PCI ID. What does `lspci >>>>>>>>>>>>>> -nn | grep LPC` show on your test system? >>>>>>>>>>>>>> >>>>>>>>>>>>>> And yes, a 32MB ROM should work fine. >>>>>>>>>>>>>> >>>>>>>>>>>>>> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang < >>>>>>>>>>>>>> sanzhang(a)celestica.com> wrote: >>>>>>>>>>>>>> >>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> Can you tell me when flashrom support Intel Purley platform >>>>>>>>>>>>>>> Lewisburg PCH? >>>>>>>>>>>>>>> and if it can support flash 32 MB SPI rom? >>>>>>>>>>>>>>> I am eager to your reply as soon as possible, thank you >>>>>>>>>>>>>>> very much! >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> -- >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> *Best Regard!* >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>>>>>>> *BIOS Engineer* >>>>>>>>>>>>>>> *Global Design Service* >>>>>>>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> _______________________________________________ >>>>>>>>>>>>>>> flashrom mailing list >>>>>>>>>>>>>>> flashrom(a)flashrom.org >>>>>>>>>>>>>>> https://mail.coreboot.org/mailman/listinfo/flashrom >>>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> -- >>>>>>>>>>>>> >>>>>>>>>>>>> *Best Regard!* >>>>>>>>>>>>> >>>>>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>>>>> *BIOS Engineer* >>>>>>>>>>>>> *Global Design Service* >>>>>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> -- >>>>>>>>>>> >>>>>>>>>>> *Best Regard!* >>>>>>>>>>> >>>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>>> *BIOS Engineer* >>>>>>>>>>> *Global Design Service* >>>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>>> >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> -- >>>>>>>>>> >>>>>>>>>> *Best Regard!* >>>>>>>>>> >>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>> *BIOS Engineer* >>>>>>>>>> *Global Design Service* >>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> -- >>>>>>>> >>>>>>>> *Best Regard!* >>>>>>>> >>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>> *BIOS Engineer* >>>>>>>> *Global Design Service* >>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>> >>>>>>> >>>>>>> >>>>>> >>>>>> >>>>>> -- >>>>>> >>>>>> *Best Regard!* >>>>>> >>>>>> *Sandy Zhang (* 张立康*)* >>>>>> *BIOS Engineer* >>>>>> *Global Design Service* >>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>> *Phone: (+86)021-61006028-7623* >>>>>> >>>>> >>>>> >>>> >>>> >>>> -- >>>> >>>> *Best Regard!* >>>> >>>> *Sandy Zhang (* 张立康*)* >>>> *BIOS Engineer* >>>> *Global Design Service* >>>> *Celestica(Shanghai) R&D Center, China* >>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>> *Phone: (+86)021-61006028-7623* >>>> >>> >>> >>> >>> -- >>> >>> *Best Regard!* >>> >>> *Sandy Zhang (* 张立康*)* >>> *BIOS Engineer* >>> *Global Design Service* >>> *Celestica(Shanghai) R&D Center, China* >>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>> *Phone: (+86)021-61006028-7623* >>> >> >> > > > -- > > *Best Regard!* > > *Sandy Zhang (* 张立康*)* > *BIOS Engineer* > *Global Design Service* > *Celestica(Shanghai) R&D Center, China* > *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* > *Mobile: (+86)15965353952 <+86%20159%206535%203952>* > *Phone: (+86)021-61006028-7623* >

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Re: [flashrom] When flashrom support Intel Purley platform Lewisburg PCH?
by Sandy Zhang Aug. 10, 2017

Aug. 10, 2017

Hi David, I have used your program to verify, but it still can't flash, it prompts "Transaction error between offset 0x00ff0000 and 0x00ff003f (= 0x00ff003f + 63)"! 2017-08-10 15:29 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: > Hi Sandy, > Recent Intel PCHs use hardware sequencing which abstracts a lot of details > about the chip. So we don't actually need flashrom to explicitly support > the W25Q256. > > Here is a tarball based on the latest sources from git: > https://drive.google.com/file/d/0Bz3WBh8gVeIuSlJYZ2c1bS1LdGc/ > view?usp=sharing > > It has the following patches applied: > https://review.coreboot.org/#/c/20922/ : chispet_enable: Add PCI IDs for > C620-series PCHs > https://review.coreboot.org/#/c/20936/ : ich_descriptors: Modify limits > for C620/Lewisburg PCH > https://review.coreboot.org/#/c/20937/ : ich_descriptors: Fix off-by-one > error > > Let us know if it works for you. > > > On Wed, Aug 9, 2017 at 8:04 PM, Sandy Zhang <sanzhang(a)celestica.com> > wrote: > >> Hi David, >> >> I have get the package from the web, but I can't find the code about >> "25Q256" in flashchip.c, so, maybe this will lead to flash fail. >> >> 2017-08-09 15:11 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>: >> >>> Hi David, >>> >>> Yes, My system's ISA/LPC vendor id and device id is 8086:a1c6, >>> In fact, I can't access the clone https://review.coreboot. >>> org/flashrom.git, I attempt to add the patch to flashrom-0.9.9, but I >>> found the difference is a bit big between these files, I'm very hard to add >>> the patch completely, so, could you send the latest package to me to try >>> this on my system? >>> Thanks for your great help! >>> >>> >>> >>> >>> >>> >>> 2017-08-09 14:04 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: >>> >>>> Hi Sandy, >>>> What is the result of `lspci -nn | grep ISA` on your system? I uploaded >>>> a patch for Lewisburg PCI IDs here: https://review.coreboot. >>>> org/#/c/20922/ >>>> >>>> I have tested Lewisburg PCH + W25Q256xxx and it seems to work. Let me >>>> know if you need any help applying the patch and testing it out on your >>>> system. >>>> >>>> >>>> On Tue, Aug 8, 2017 at 7:09 PM, Sandy Zhang <sanzhang(a)celestica.com> >>>> wrote: >>>> >>>>> Hi David, >>>>> >>>>> Do you know whether the configuration "Lewisburg PCH + W25Q256xxx SPI" >>>>> has been tested with the flashrom? thank you! >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> 2017-08-08 3:55 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: >>>>> >>>>>> Hi Sandy, >>>>>> Correct - The PCH will not allow us to write anything to regions >>>>>> which are not defined in the flash descriptor. You could add those regions >>>>>> to the "BIOS" region if you wish to update them from your host OS. The SPI >>>>>> Programming Guide for your PCH (Lewisburg?) should also have info about >>>>>> additional regions which you may set up in the flash descriptor. >>>>>> >>>>>> "EW" means erase and write, "S" means skip (content does not need to >>>>>> change), "E" means erase only, "W" means write only >>>>>> >>>>>> On Mon, Aug 7, 2017 at 12:50 AM, Sandy Zhang <sanzhang(a)celestica.com> >>>>>> wrote: >>>>>> >>>>>>> Hi David, >>>>>>> >>>>>>> It seems that the below 2 regions are "write denied": >>>>>>> >>>>>>> 00A26000 00A35FFF 00010000 DER #1 Region >>>>>>> 00A36000 00FEFFFF 005BA000 10 Gbe A Region >>>>>>> >>>>>>> By the way, can you tell me what is the other parament "EW", "S" and >>>>>>> "E" meana? thank you! >>>>>>> >>>>>>> >>>>>>> >>>>>>> >>>>>>> 2017-08-07 13:02 GMT+08:00 David Hendricks < >>>>>>> david.hendricks(a)gmail.com>: >>>>>>> >>>>>>>> Hi Sandy, >>>>>>>> It might not have done what you expect. The error is because >>>>>>>> offsets 0xa26000-0xffffff are not defined in the flash descriptor, so the >>>>>>>> PCH gives us an error when flashrom attempts to update it. ":WD" next to >>>>>>>> the offsets in the log means "write denied". >>>>>>>> >>>>>>>> If you wish to update that region of the ROM then you must change >>>>>>>> your flash descriptor to include it and set the permissions to enable read >>>>>>>> and write. >>>>>>>> >>>>>>>> >>>>>>>> On Sun, Aug 6, 2017 at 8:20 PM, Sandy Zhang <sanzhang(a)celestica.com >>>>>>>> > wrote: >>>>>>>> >>>>>>>>> Hi David, >>>>>>>>> >>>>>>>>> Attachment is the log file when flash bios into Winbond 32MB SPI >>>>>>>>> rom, could you help to check if it's updated sucessfully? thank you! >>>>>>>>> >>>>>>>>> 2017-08-05 10:45 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>: >>>>>>>>> >>>>>>>>>> Hi David, >>>>>>>>>> >>>>>>>>>> Thank you very much, I will try to add the patch to flashrom-0.9.9, >>>>>>>>>> As a BIOS engineer, it is a bit difficult for me to complete this. >>>>>>>>>> Do you know when will make it into a release tarball? >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> BR >>>>>>>>>> Sandy >>>>>>>>>> >>>>>>>>>> 2017-08-05 0:05 GMT+08:00 David Hendricks < >>>>>>>>>> david.hendricks(a)gmail.com>: >>>>>>>>>> >>>>>>>>>>> On Aug 3, 2017 11:51 PM, "Sandy Zhang" <sanzhang(a)celestica.com> >>>>>>>>>>> wrote: >>>>>>>>>>> >>>>>>>>>>>> Hi David, >>>>>>>>>>>> >>>>>>>>>>>> Thanks for your reply, can you tell me where to download the >>>>>>>>>>>> flash package like "flashrom-0.9.9.tar" which is downloaded from the >>>>>>>>>>>> address ''https://www.flashrom.org/Downloads"? thank you! >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> The Skylake patches have not made it into a release tarball yet. >>>>>>>>>>> Can you try using the git sources from https://review.coreboot.o >>>>>>>>>>> rg/cgit/flashrom.git? E.g: >>>>>>>>>>> >>>>>>>>>>> git clone https://review.coreboot.org/flashrom.git >>>>>>>>>>> git checkout origin/staging >>>>>>>>>>> make >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> BR >>>>>>>>>>>> Sandy >>>>>>>>>>>> >>>>>>>>>>>> 2017-08-04 14:35 GMT+08:00 David Hendricks < >>>>>>>>>>>> david.hendricks(a)gmail.com>: >>>>>>>>>>>> >>>>>>>>>>>>> Hi Sandy, >>>>>>>>>>>>> Skylake support was recently merged: >>>>>>>>>>>>> https://review.coreboot.org/18973 >>>>>>>>>>>>> >>>>>>>>>>>>> However you may need to add your PCH PCI ID. What does `lspci >>>>>>>>>>>>> -nn | grep LPC` show on your test system? >>>>>>>>>>>>> >>>>>>>>>>>>> And yes, a 32MB ROM should work fine. >>>>>>>>>>>>> >>>>>>>>>>>>> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang < >>>>>>>>>>>>> sanzhang(a)celestica.com> wrote: >>>>>>>>>>>>> >>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>> >>>>>>>>>>>>>> Can you tell me when flashrom support Intel Purley platform >>>>>>>>>>>>>> Lewisburg PCH? >>>>>>>>>>>>>> and if it can support flash 32 MB SPI rom? >>>>>>>>>>>>>> I am eager to your reply as soon as possible, thank you very >>>>>>>>>>>>>> much! >>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> -- >>>>>>>>>>>>>> >>>>>>>>>>>>>> *Best Regard!* >>>>>>>>>>>>>> >>>>>>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>>>>>> *BIOS Engineer* >>>>>>>>>>>>>> *Global Design Service* >>>>>>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>>>>>> >>>>>>>>>>>>>> _______________________________________________ >>>>>>>>>>>>>> flashrom mailing list >>>>>>>>>>>>>> flashrom(a)flashrom.org >>>>>>>>>>>>>> https://mail.coreboot.org/mailman/listinfo/flashrom >>>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> -- >>>>>>>>>>>> >>>>>>>>>>>> *Best Regard!* >>>>>>>>>>>> >>>>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>>>> *BIOS Engineer* >>>>>>>>>>>> *Global Design Service* >>>>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> -- >>>>>>>>>> >>>>>>>>>> *Best Regard!* >>>>>>>>>> >>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>> *BIOS Engineer* >>>>>>>>>> *Global Design Service* >>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> -- >>>>>>>>> >>>>>>>>> *Best Regard!* >>>>>>>>> >>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>> *BIOS Engineer* >>>>>>>>> *Global Design Service* >>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>> >>>>>>>> >>>>>>>> >>>>>>> >>>>>>> >>>>>>> -- >>>>>>> >>>>>>> *Best Regard!* >>>>>>> >>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>> *BIOS Engineer* >>>>>>> *Global Design Service* >>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>> >>>>>> >>>>>> >>>>> >>>>> >>>>> -- >>>>> >>>>> *Best Regard!* >>>>> >>>>> *Sandy Zhang (* 张立康*)* >>>>> *BIOS Engineer* >>>>> *Global Design Service* >>>>> *Celestica(Shanghai) R&D Center, China* >>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>> *Phone: (+86)021-61006028-7623* >>>>> >>>> >>>> >>> >>> >>> -- >>> >>> *Best Regard!* >>> >>> *Sandy Zhang (* 张立康*)* >>> *BIOS Engineer* >>> *Global Design Service* >>> *Celestica(Shanghai) R&D Center, China* >>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>> *Phone: (+86)021-61006028-7623* >>> >> >> >> >> -- >> >> *Best Regard!* >> >> *Sandy Zhang (* 张立康*)* >> *BIOS Engineer* >> *Global Design Service* >> *Celestica(Shanghai) R&D Center, China* >> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >> *Phone: (+86)021-61006028-7623* >> > > -- *Best Regard!* *Sandy Zhang (* 张立康*)* *BIOS Engineer* *Global Design Service* *Celestica(Shanghai) R&D Center, China* *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* *Mobile: (+86)15965353952* *Phone: (+86)021-61006028-7623*

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Re: [flashrom] When flashrom support Intel Purley platform Lewisburg PCH?
by David Hendricks Aug. 10, 2017

Aug. 10, 2017

Hi Sandy, Recent Intel PCHs use hardware sequencing which abstracts a lot of details about the chip. So we don't actually need flashrom to explicitly support the W25Q256. Here is a tarball based on the latest sources from git: https://drive.google.com/file/d/0Bz3WBh8gVeIuSlJYZ2c1bS1LdGc/view?usp=shari… It has the following patches applied: https://review.coreboot.org/#/c/20922/ : chispet_enable: Add PCI IDs for C620-series PCHs https://review.coreboot.org/#/c/20936/ : ich_descriptors: Modify limits for C620/Lewisburg PCH https://review.coreboot.org/#/c/20937/ : ich_descriptors: Fix off-by-one error Let us know if it works for you. On Wed, Aug 9, 2017 at 8:04 PM, Sandy Zhang <sanzhang(a)celestica.com> wrote: > Hi David, > > I have get the package from the web, but I can't find the code about > "25Q256" in flashchip.c, so, maybe this will lead to flash fail. > > 2017-08-09 15:11 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>: > >> Hi David, >> >> Yes, My system's ISA/LPC vendor id and device id is 8086:a1c6, >> In fact, I can't access the clone https://review.coreboot. >> org/flashrom.git, I attempt to add the patch to flashrom-0.9.9, but I >> found the difference is a bit big between these files, I'm very hard to add >> the patch completely, so, could you send the latest package to me to try >> this on my system? >> Thanks for your great help! >> >> >> >> >> >> >> 2017-08-09 14:04 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: >> >>> Hi Sandy, >>> What is the result of `lspci -nn | grep ISA` on your system? I uploaded >>> a patch for Lewisburg PCI IDs here: https://review.coreboot. >>> org/#/c/20922/ >>> >>> I have tested Lewisburg PCH + W25Q256xxx and it seems to work. Let me >>> know if you need any help applying the patch and testing it out on your >>> system. >>> >>> >>> On Tue, Aug 8, 2017 at 7:09 PM, Sandy Zhang <sanzhang(a)celestica.com> >>> wrote: >>> >>>> Hi David, >>>> >>>> Do you know whether the configuration "Lewisburg PCH + W25Q256xxx SPI" >>>> has been tested with the flashrom? thank you! >>>> >>>> >>>> >>>> >>>> >>>> >>>> 2017-08-08 3:55 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: >>>> >>>>> Hi Sandy, >>>>> Correct - The PCH will not allow us to write anything to regions which >>>>> are not defined in the flash descriptor. You could add those regions to the >>>>> "BIOS" region if you wish to update them from your host OS. The SPI >>>>> Programming Guide for your PCH (Lewisburg?) should also have info about >>>>> additional regions which you may set up in the flash descriptor. >>>>> >>>>> "EW" means erase and write, "S" means skip (content does not need to >>>>> change), "E" means erase only, "W" means write only >>>>> >>>>> On Mon, Aug 7, 2017 at 12:50 AM, Sandy Zhang <sanzhang(a)celestica.com> >>>>> wrote: >>>>> >>>>>> Hi David, >>>>>> >>>>>> It seems that the below 2 regions are "write denied": >>>>>> >>>>>> 00A26000 00A35FFF 00010000 DER #1 Region >>>>>> 00A36000 00FEFFFF 005BA000 10 Gbe A Region >>>>>> >>>>>> By the way, can you tell me what is the other parament "EW", "S" and >>>>>> "E" meana? thank you! >>>>>> >>>>>> >>>>>> >>>>>> >>>>>> 2017-08-07 13:02 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com >>>>>> >: >>>>>> >>>>>>> Hi Sandy, >>>>>>> It might not have done what you expect. The error is because offsets >>>>>>> 0xa26000-0xffffff are not defined in the flash descriptor, so the PCH gives >>>>>>> us an error when flashrom attempts to update it. ":WD" next to the offsets >>>>>>> in the log means "write denied". >>>>>>> >>>>>>> If you wish to update that region of the ROM then you must change >>>>>>> your flash descriptor to include it and set the permissions to enable read >>>>>>> and write. >>>>>>> >>>>>>> >>>>>>> On Sun, Aug 6, 2017 at 8:20 PM, Sandy Zhang <sanzhang(a)celestica.com> >>>>>>> wrote: >>>>>>> >>>>>>>> Hi David, >>>>>>>> >>>>>>>> Attachment is the log file when flash bios into Winbond 32MB SPI >>>>>>>> rom, could you help to check if it's updated sucessfully? thank you! >>>>>>>> >>>>>>>> 2017-08-05 10:45 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>: >>>>>>>> >>>>>>>>> Hi David, >>>>>>>>> >>>>>>>>> Thank you very much, I will try to add the patch to flashrom-0.9.9, >>>>>>>>> As a BIOS engineer, it is a bit difficult for me to complete this. >>>>>>>>> Do you know when will make it into a release tarball? >>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> BR >>>>>>>>> Sandy >>>>>>>>> >>>>>>>>> 2017-08-05 0:05 GMT+08:00 David Hendricks < >>>>>>>>> david.hendricks(a)gmail.com>: >>>>>>>>> >>>>>>>>>> On Aug 3, 2017 11:51 PM, "Sandy Zhang" <sanzhang(a)celestica.com> >>>>>>>>>> wrote: >>>>>>>>>> >>>>>>>>>>> Hi David, >>>>>>>>>>> >>>>>>>>>>> Thanks for your reply, can you tell me where to download the >>>>>>>>>>> flash package like "flashrom-0.9.9.tar" which is downloaded from the >>>>>>>>>>> address ''https://www.flashrom.org/Downloads"? thank you! >>>>>>>>>>> >>>>>>>>>> >>>>>>>>>> The Skylake patches have not made it into a release tarball yet. >>>>>>>>>> Can you try using the git sources from https://review.coreboot.o >>>>>>>>>> rg/cgit/flashrom.git? E.g: >>>>>>>>>> >>>>>>>>>> git clone https://review.coreboot.org/flashrom.git >>>>>>>>>> git checkout origin/staging >>>>>>>>>> make >>>>>>>>>> >>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> BR >>>>>>>>>>> Sandy >>>>>>>>>>> >>>>>>>>>>> 2017-08-04 14:35 GMT+08:00 David Hendricks < >>>>>>>>>>> david.hendricks(a)gmail.com>: >>>>>>>>>>> >>>>>>>>>>>> Hi Sandy, >>>>>>>>>>>> Skylake support was recently merged: >>>>>>>>>>>> https://review.coreboot.org/18973 >>>>>>>>>>>> >>>>>>>>>>>> However you may need to add your PCH PCI ID. What does `lspci >>>>>>>>>>>> -nn | grep LPC` show on your test system? >>>>>>>>>>>> >>>>>>>>>>>> And yes, a 32MB ROM should work fine. >>>>>>>>>>>> >>>>>>>>>>>> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang < >>>>>>>>>>>> sanzhang(a)celestica.com> wrote: >>>>>>>>>>>> >>>>>>>>>>>>> Hi, >>>>>>>>>>>>> >>>>>>>>>>>>> Can you tell me when flashrom support Intel Purley platform >>>>>>>>>>>>> Lewisburg PCH? >>>>>>>>>>>>> and if it can support flash 32 MB SPI rom? >>>>>>>>>>>>> I am eager to your reply as soon as possible, thank you very >>>>>>>>>>>>> much! >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> -- >>>>>>>>>>>>> >>>>>>>>>>>>> *Best Regard!* >>>>>>>>>>>>> >>>>>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>>>>> *BIOS Engineer* >>>>>>>>>>>>> *Global Design Service* >>>>>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>>>>> >>>>>>>>>>>>> _______________________________________________ >>>>>>>>>>>>> flashrom mailing list >>>>>>>>>>>>> flashrom(a)flashrom.org >>>>>>>>>>>>> https://mail.coreboot.org/mailman/listinfo/flashrom >>>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> -- >>>>>>>>>>> >>>>>>>>>>> *Best Regard!* >>>>>>>>>>> >>>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>>> *BIOS Engineer* >>>>>>>>>>> *Global Design Service* >>>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> -- >>>>>>>>> >>>>>>>>> *Best Regard!* >>>>>>>>> >>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>> *BIOS Engineer* >>>>>>>>> *Global Design Service* >>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> -- >>>>>>>> >>>>>>>> *Best Regard!* >>>>>>>> >>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>> *BIOS Engineer* >>>>>>>> *Global Design Service* >>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>> >>>>>>> >>>>>>> >>>>>> >>>>>> >>>>>> -- >>>>>> >>>>>> *Best Regard!* >>>>>> >>>>>> *Sandy Zhang (* 张立康*)* >>>>>> *BIOS Engineer* >>>>>> *Global Design Service* >>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>> *Phone: (+86)021-61006028-7623* >>>>>> >>>>> >>>>> >>>> >>>> >>>> -- >>>> >>>> *Best Regard!* >>>> >>>> *Sandy Zhang (* 张立康*)* >>>> *BIOS Engineer* >>>> *Global Design Service* >>>> *Celestica(Shanghai) R&D Center, China* >>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>> *Phone: (+86)021-61006028-7623* >>>> >>> >>> >> >> >> -- >> >> *Best Regard!* >> >> *Sandy Zhang (* 张立康*)* >> *BIOS Engineer* >> *Global Design Service* >> *Celestica(Shanghai) R&D Center, China* >> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >> *Phone: (+86)021-61006028-7623* >> > > > > -- > > *Best Regard!* > > *Sandy Zhang (* 张立康*)* > *BIOS Engineer* > *Global Design Service* > *Celestica(Shanghai) R&D Center, China* > *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* > *Mobile: (+86)15965353952 <+86%20159%206535%203952>* > *Phone: (+86)021-61006028-7623* >

1 0

Re: [flashrom] When flashrom support Intel Purley platform Lewisburg PCH?
by Sandy Zhang Aug. 10, 2017

Aug. 10, 2017

Hi David, I have get the package from the web, but I can't find the code about "25Q256" in flashchip.c, so, maybe this will lead to flash fail. 2017-08-09 15:11 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>: > Hi David, > > Yes, My system's ISA/LPC vendor id and device id is 8086:a1c6, > In fact, I can't access the clone https://review.coreboot.org/flashrom.git, > I attempt to add the patch to flashrom-0.9.9, but I found the difference > is a bit big between these files, I'm very hard to add the > patch completely, so, could you send the latest package to me to try this > on my system? > Thanks for your great help! > > > > > > > 2017-08-09 14:04 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: > >> Hi Sandy, >> What is the result of `lspci -nn | grep ISA` on your system? I uploaded a >> patch for Lewisburg PCI IDs here: https://review.coreboot.org/#/c/20922/ >> >> I have tested Lewisburg PCH + W25Q256xxx and it seems to work. Let me >> know if you need any help applying the patch and testing it out on your >> system. >> >> >> On Tue, Aug 8, 2017 at 7:09 PM, Sandy Zhang <sanzhang(a)celestica.com> >> wrote: >> >>> Hi David, >>> >>> Do you know whether the configuration "Lewisburg PCH + W25Q256xxx SPI" >>> has been tested with the flashrom? thank you! >>> >>> >>> >>> >>> >>> >>> 2017-08-08 3:55 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com>: >>> >>>> Hi Sandy, >>>> Correct - The PCH will not allow us to write anything to regions which >>>> are not defined in the flash descriptor. You could add those regions to the >>>> "BIOS" region if you wish to update them from your host OS. The SPI >>>> Programming Guide for your PCH (Lewisburg?) should also have info about >>>> additional regions which you may set up in the flash descriptor. >>>> >>>> "EW" means erase and write, "S" means skip (content does not need to >>>> change), "E" means erase only, "W" means write only >>>> >>>> On Mon, Aug 7, 2017 at 12:50 AM, Sandy Zhang <sanzhang(a)celestica.com> >>>> wrote: >>>> >>>>> Hi David, >>>>> >>>>> It seems that the below 2 regions are "write denied": >>>>> >>>>> 00A26000 00A35FFF 00010000 DER #1 Region >>>>> 00A36000 00FEFFFF 005BA000 10 Gbe A Region >>>>> >>>>> By the way, can you tell me what is the other parament "EW", "S" and >>>>> "E" meana? thank you! >>>>> >>>>> >>>>> >>>>> >>>>> 2017-08-07 13:02 GMT+08:00 David Hendricks <david.hendricks(a)gmail.com> >>>>> : >>>>> >>>>>> Hi Sandy, >>>>>> It might not have done what you expect. The error is because offsets >>>>>> 0xa26000-0xffffff are not defined in the flash descriptor, so the PCH gives >>>>>> us an error when flashrom attempts to update it. ":WD" next to the offsets >>>>>> in the log means "write denied". >>>>>> >>>>>> If you wish to update that region of the ROM then you must change >>>>>> your flash descriptor to include it and set the permissions to enable read >>>>>> and write. >>>>>> >>>>>> >>>>>> On Sun, Aug 6, 2017 at 8:20 PM, Sandy Zhang <sanzhang(a)celestica.com> >>>>>> wrote: >>>>>> >>>>>>> Hi David, >>>>>>> >>>>>>> Attachment is the log file when flash bios into Winbond 32MB SPI >>>>>>> rom, could you help to check if it's updated sucessfully? thank you! >>>>>>> >>>>>>> 2017-08-05 10:45 GMT+08:00 Sandy Zhang <sanzhang(a)celestica.com>: >>>>>>> >>>>>>>> Hi David, >>>>>>>> >>>>>>>> Thank you very much, I will try to add the patch to flashrom-0.9.9, >>>>>>>> As a BIOS engineer, it is a bit difficult for me to complete this. >>>>>>>> Do you know when will make it into a release tarball? >>>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> BR >>>>>>>> Sandy >>>>>>>> >>>>>>>> 2017-08-05 0:05 GMT+08:00 David Hendricks < >>>>>>>> david.hendricks(a)gmail.com>: >>>>>>>> >>>>>>>>> On Aug 3, 2017 11:51 PM, "Sandy Zhang" <sanzhang(a)celestica.com> >>>>>>>>> wrote: >>>>>>>>> >>>>>>>>>> Hi David, >>>>>>>>>> >>>>>>>>>> Thanks for your reply, can you tell me where to download the >>>>>>>>>> flash package like "flashrom-0.9.9.tar" which is downloaded from the >>>>>>>>>> address ''https://www.flashrom.org/Downloads"? thank you! >>>>>>>>>> >>>>>>>>> >>>>>>>>> The Skylake patches have not made it into a release tarball yet. >>>>>>>>> Can you try using the git sources from https://review.coreboot.o >>>>>>>>> rg/cgit/flashrom.git? E.g: >>>>>>>>> >>>>>>>>> git clone https://review.coreboot.org/flashrom.git >>>>>>>>> git checkout origin/staging >>>>>>>>> make >>>>>>>>> >>>>>>>>> >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> BR >>>>>>>>>> Sandy >>>>>>>>>> >>>>>>>>>> 2017-08-04 14:35 GMT+08:00 David Hendricks < >>>>>>>>>> david.hendricks(a)gmail.com>: >>>>>>>>>> >>>>>>>>>>> Hi Sandy, >>>>>>>>>>> Skylake support was recently merged: >>>>>>>>>>> https://review.coreboot.org/18973 >>>>>>>>>>> >>>>>>>>>>> However you may need to add your PCH PCI ID. What does `lspci >>>>>>>>>>> -nn | grep LPC` show on your test system? >>>>>>>>>>> >>>>>>>>>>> And yes, a 32MB ROM should work fine. >>>>>>>>>>> >>>>>>>>>>> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang < >>>>>>>>>>> sanzhang(a)celestica.com> wrote: >>>>>>>>>>> >>>>>>>>>>>> Hi, >>>>>>>>>>>> >>>>>>>>>>>> Can you tell me when flashrom support Intel Purley platform >>>>>>>>>>>> Lewisburg PCH? >>>>>>>>>>>> and if it can support flash 32 MB SPI rom? >>>>>>>>>>>> I am eager to your reply as soon as possible, thank you very >>>>>>>>>>>> much! >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> -- >>>>>>>>>>>> >>>>>>>>>>>> *Best Regard!* >>>>>>>>>>>> >>>>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>>>> *BIOS Engineer* >>>>>>>>>>>> *Global Design Service* >>>>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>>>> >>>>>>>>>>>> _______________________________________________ >>>>>>>>>>>> flashrom mailing list >>>>>>>>>>>> flashrom(a)flashrom.org >>>>>>>>>>>> https://mail.coreboot.org/mailman/listinfo/flashrom >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> -- >>>>>>>>>> >>>>>>>>>> *Best Regard!* >>>>>>>>>> >>>>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>>>> *BIOS Engineer* >>>>>>>>>> *Global Design Service* >>>>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> -- >>>>>>>> >>>>>>>> *Best Regard!* >>>>>>>> >>>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>>> *BIOS Engineer* >>>>>>>> *Global Design Service* >>>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>>> >>>>>>> >>>>>>> >>>>>>> >>>>>>> -- >>>>>>> >>>>>>> *Best Regard!* >>>>>>> >>>>>>> *Sandy Zhang (* 张立康*)* >>>>>>> *BIOS Engineer* >>>>>>> *Global Design Service* >>>>>>> *Celestica(Shanghai) R&D Center, China* >>>>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>>>> *Phone: (+86)021-61006028-7623* >>>>>>> >>>>>> >>>>>> >>>>> >>>>> >>>>> -- >>>>> >>>>> *Best Regard!* >>>>> >>>>> *Sandy Zhang (* 张立康*)* >>>>> *BIOS Engineer* >>>>> *Global Design Service* >>>>> *Celestica(Shanghai) R&D Center, China* >>>>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>>>> *Phone: (+86)021-61006028-7623* >>>>> >>>> >>>> >>> >>> >>> -- >>> >>> *Best Regard!* >>> >>> *Sandy Zhang (* 张立康*)* >>> *BIOS Engineer* >>> *Global Design Service* >>> *Celestica(Shanghai) R&D Center, China* >>> *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* >>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>* >>> *Phone: (+86)021-61006028-7623* >>> >> >> > > > -- > > *Best Regard!* > > *Sandy Zhang (* 张立康*)* > *BIOS Engineer* > *Global Design Service* > *Celestica(Shanghai) R&D Center, China* > *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* > *Mobile: (+86)15965353952 <+86%20159%206535%203952>* > *Phone: (+86)021-61006028-7623* > -- *Best Regard!* *Sandy Zhang (* 张立康*)* *BIOS Engineer* *Global Design Service* *Celestica(Shanghai) R&D Center, China* *Mail: sanzhang(a)celestica.com <viterzho(a)celestica.com>* *Mobile: (+86)15965353952* *Phone: (+86)021-61006028-7623*

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