flashrom January 2016

flashrom@flashrom.org

37 participants
98 discussions

Re: [flashrom] Not detecting Am29F010 using 3Com PCI nic
by Stefan Tauner 01 Feb '16

01 Feb '16

On Sat, 1 Aug 2015 08:34:58 +0200 "Ignatius Grippa" <ignatiusgrippa(a)gmx.com> wrote: > I found a solution that works. > I changed the AM29F010A/B entry inside flashchips.c > Under ".feature_bits" I removed FEATURE_ADDR_2AA leaving only FEATURE_EITHER_RESET, After recompiling, flashrom now detects my Am29F010 and it also successfully reads and writes! > I'm not a programmer so I can't explain why this works but it does. Hi, that feature flag changes the behavior of the probe command and is exactly what was needed to get the AM29F010 version to work, thanks for digging this up. I have created a patch that splits the old definition into two, which allows to distinguish the chips. I'd be glad if you could test it if you still have the hardware. The patch is attached. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1922 - trunk
by repository service 01 Feb '16

01 Feb '16

Author: stefanct Date: Mon Feb 1 00:17:35 2016 New Revision: 1922 URL: http://flashrom.org/trac/flashrom/changeset/1922 Log: Separate Am29F0xx from Am29F0xxA/B definitions. The earlier versions of the chip require 0x2AAA for probes thus split the definitions and set them to untested to provoke reports. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Jan 31 23:10:29 2016 (r1921) +++ trunk/flashchips.c Mon Feb 1 00:17:35 2016 (r1922) @@ -59,14 +59,41 @@ { .vendor = "AMD", + .name = "Am29F010", + .bustype = BUS_PARALLEL, + .manufacture_id = AMD_ID, + .model_id = AMD_AM29F010, + .total_size = 128, + .page_size = 16 * 1024, + .feature_bits = FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {16 * 1024, 8} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {4500, 5500}, + }, + + { + .vendor = "AMD", .name = "Am29F010A/B", .bustype = BUS_PARALLEL, .manufacture_id = AMD_ID, - .model_id = AMD_AM29F010B, /* Same as Am29F010A */ + .model_id = AMD_AM29F010, .total_size = 128, .page_size = 16 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, - .tested = TEST_OK_PRE, + .tested = TEST_UNTESTED, .probe = probe_jedec, .probe_timing = TIMING_ZERO, .block_erasers = @@ -177,10 +204,37 @@ { .vendor = "AMD", + .name = "Am29F040", + .bustype = BUS_PARALLEL, + .manufacture_id = AMD_ID, + .model_id = AMD_AM29F040, + .total_size = 512, + .page_size = 64 * 1024, + .feature_bits = FEATURE_EITHER_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {4500, 5500}, + }, + + { + .vendor = "AMD", .name = "Am29F040B", .bustype = BUS_PARALLEL, .manufacture_id = AMD_ID, - .model_id = AMD_AM29F040B, + .model_id = AMD_AM29F040, .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, @@ -204,10 +258,37 @@ { .vendor = "AMD", + .name = "Am29F080", + .bustype = BUS_PARALLEL, + .manufacture_id = AMD_ID, + .model_id = AMD_AM29F080, + .total_size = 1024, + .page_size = 64 * 1024, + .feature_bits = FEATURE_EITHER_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {4500, 5500}, + }, + + { + .vendor = "AMD", .name = "Am29F080B", .bustype = BUS_PARALLEL, .manufacture_id = AMD_ID, - .model_id = AMD_AM29F080B, + .model_id = AMD_AM29F080, .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun Jan 31 23:10:29 2016 (r1921) +++ trunk/flashchips.h Mon Feb 1 00:17:35 2016 (r1922) @@ -64,9 +64,9 @@ #define AMD_AM29F004BB 0x7B #define AMD_AM29F004BT 0x77 #define AMD_AM29F016D 0xAD -#define AMD_AM29F010B 0x20 /* Same as Am29F010A */ -#define AMD_AM29F040B 0xA4 -#define AMD_AM29F080B 0xD5 +#define AMD_AM29F010 0x20 /* Same as Am29F010A and Am29F010B */ +#define AMD_AM29F040 0xA4 /* Same as AM29F040B */ +#define AMD_AM29F080 0xD5 /* Same as Am29F080B */ #define AMD_AM29F200BB 0x57 #define AMD_AM29F200BT 0x51 #define AMD_AM29F400BB 0xAB

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Re: [flashrom] [PATCH] Add infrastructure to support libusb-1.0.
by Stefan Tauner 31 Jan '16

31 Jan '16

On Wed, 27 Jan 2016 03:20:53 +0200 Urja Rannikko <urjaman(a)gmail.com> wrote: > With manpage improvements and all :) no really i had trouble finding > stuff to comment on, > most of this I cant really test right now, but i know it builds and > LGTM (and the older version I did test on linux and windows, so...) > > Acked-by: Urja Rannikko <urjaman(a)gmail.com> Thanks, r1920 -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1921 - trunk
by repository service 31 Jan '16

31 Jan '16

Author: stefanct Date: Sun Jan 31 23:10:29 2016 New Revision: 1921 URL: http://flashrom.org/trac/flashrom/changeset/1921 Log: Add support for WCH CH341A as an SPI programmer. Signed-off-by: Urja Rannikko <urjaman(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Urja Rannikko <urjaman(a)gmail.com> Added: trunk/ch341a_spi.c (contents, props changed) Modified: trunk/Makefile trunk/flashrom.8.tmpl trunk/flashrom.c trunk/programmer.h Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sun Jan 31 23:10:14 2016 (r1920) +++ trunk/Makefile Sun Jan 31 23:10:29 2016 (r1921) @@ -157,7 +157,7 @@ else override CONFIG_PONY_SPI = no endif -# Dediprog, USB-Blaster, PICkit2 and FT2232 are not supported under DOS (missing USB support). +# Dediprog, USB-Blaster, PICkit2, CH341A and FT2232 are not supported under DOS (missing USB support). ifeq ($(CONFIG_DEDIPROG), yes) UNSUPPORTED_FEATURES += CONFIG_DEDIPROG=yes else @@ -178,6 +178,11 @@ else override CONFIG_PICKIT2_SPI = no endif +ifeq ($(CONFIG_CH341A_SPI), yes) +UNSUPPORTED_FEATURES += CONFIG_CH341A_SPI=yes +else +override CONFIG_CH341A_SPI = no +endif endif # FIXME: Should we check for Cygwin/MSVC as well? @@ -303,7 +308,7 @@ else override CONFIG_PONY_SPI = no endif -# Dediprog, USB-Blaster, PICkit2 and FT2232 are not supported with libpayload (missing libusb support) +# Dediprog, USB-Blaster, PICkit2, CH341A and FT2232 are not supported with libpayload (missing libusb support) ifeq ($(CONFIG_DEDIPROG), yes) UNSUPPORTED_FEATURES += CONFIG_DEDIPROG=yes else @@ -324,6 +329,11 @@ else override CONFIG_PICKIT2_SPI = no endif +ifeq ($(CONFIG_CH341A_SPI), yes) +UNSUPPORTED_FEATURES += CONFIG_CH341A_SPI=yes +else +override CONFIG_CH341A_SPI = no +endif endif ifneq ($(TARGET_OS), Linux) @@ -505,6 +515,9 @@ # Always enable ITE IT8212F PATA controllers for now. CONFIG_IT8212 ?= yes +# Winchiphead CH341A +CONFIG_CH341A_SPI ?= yes + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -751,6 +764,12 @@ PROGRAMMER_OBJS += mstarddc_spi.o endif +ifeq ($(CONFIG_CH341A_SPI), yes) +FEATURE_CFLAGS += -D'CONFIG_CH341A_SPI=1' +PROGRAMMER_OBJS += ch341a_spi.o +NEED_LIBUSB1 := yes +endif + ifeq ($(NEED_SERIAL), yes) LIB_OBJS += serial.o endif Added: trunk/ch341a_spi.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/ch341a_spi.c Sun Jan 31 23:10:29 2016 (r1921) @@ -0,0 +1,535 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2011 asbokid <ballymunboy(a)gmail.com> + * Copyright (C) 2014 Pluto Yang <yangyj.ee(a)gmail.com> + * Copyright (C) 2015-2016 Stefan Tauner + * Copyright (C) 2015 Urja Rannikko <urjaman(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include <libusb.h> +#include "flash.h" +#include "programmer.h" + +/* LIBUSB_CALL ensures the right calling conventions on libusb callbacks. + * However, the macro is not defined everywhere. m( + */ +#ifndef LIBUSB_CALL +#define LIBUSB_CALL +#endif + +#define USB_TIMEOUT 1000 /* 1000 ms is plenty and we have no backup strategy anyway. */ +#define WRITE_EP 0x02 +#define READ_EP 0x82 + +#define CH341_PACKET_LENGTH 0x20 +#define CH341_MAX_PACKETS 256 +#define CH341_MAX_PACKET_LEN (CH341_PACKET_LENGTH * CH341_MAX_PACKETS) + +#define CH341A_CMD_SET_OUTPUT 0xA1 +#define CH341A_CMD_IO_ADDR 0xA2 +#define CH341A_CMD_PRINT_OUT 0xA3 +#define CH341A_CMD_SPI_STREAM 0xA8 +#define CH341A_CMD_SIO_STREAM 0xA9 +#define CH341A_CMD_I2C_STREAM 0xAA +#define CH341A_CMD_UIO_STREAM 0xAB + +#define CH341A_CMD_I2C_STM_START 0x74 +#define CH341A_CMD_I2C_STM_STOP 0x75 +#define CH341A_CMD_I2C_STM_OUT 0x80 +#define CH341A_CMD_I2C_STM_IN 0xC0 +#define CH341A_CMD_I2C_STM_MAX ( min( 0x3F, CH341_PACKET_LENGTH ) ) +#define CH341A_CMD_I2C_STM_SET 0x60 // bit 2: SPI with two data pairs D5,D4=out, D7,D6=in +#define CH341A_CMD_I2C_STM_US 0x40 +#define CH341A_CMD_I2C_STM_MS 0x50 +#define CH341A_CMD_I2C_STM_DLY 0x0F +#define CH341A_CMD_I2C_STM_END 0x00 + +#define CH341A_CMD_UIO_STM_IN 0x00 +#define CH341A_CMD_UIO_STM_DIR 0x40 +#define CH341A_CMD_UIO_STM_OUT 0x80 +#define CH341A_CMD_UIO_STM_US 0xC0 +#define CH341A_CMD_UIO_STM_END 0x20 + +#define CH341A_STM_I2C_20K 0x00 +#define CH341A_STM_I2C_100K 0x01 +#define CH341A_STM_I2C_400K 0x02 +#define CH341A_STM_I2C_750K 0x03 +#define CH341A_STM_SPI_DBL 0x04 + + +/* Number of parallel IN transfers. 32 seems to produce the most stable throughput on Windows. */ +#define USB_IN_TRANSFERS 32 + +/* We need to use many queued IN transfers for any resemblance of performance (especially on Windows) + * because USB spec says that transfers end on non-full packets and the device sends the 31 reply + * data bytes to each 32-byte packet with command + 31 bytes of data... */ +static struct libusb_transfer *transfer_out = NULL; +static struct libusb_transfer *transfer_ins[USB_IN_TRANSFERS] = {0}; + +/* Accumulate delays to be plucked between CS deassertion and CS assertions. */ +static unsigned int stored_delay_us = 0; + +static struct libusb_device_handle *handle = NULL; + +const struct dev_entry devs_ch341a_spi[] = { + {0x1A86, 0x5512, OK, "Winchiphead (WCH)", "CH341A"}, + + {0}, +}; + +enum trans_state {TRANS_ACTIVE = -2, TRANS_ERR = -1, TRANS_IDLE = 0}; + +static void print_hex(const void *buf, size_t len) +{ + size_t i; + for (i = 0; i < len; i++) { + msg_pspew(" %02x", ((uint8_t *)buf)[i]); + if (i % CH341_PACKET_LENGTH == CH341_PACKET_LENGTH - 1) + msg_pspew("\n"); + } +} + +static void cb_common(const char *func, struct libusb_transfer *transfer) +{ + int *transfer_cnt = (int*)transfer->user_data; + + if (transfer->status == LIBUSB_TRANSFER_CANCELLED) { + /* Silently ACK and exit. */ + *transfer_cnt = TRANS_IDLE; + return; + } + + if (transfer->status != LIBUSB_TRANSFER_COMPLETED) { + msg_perr("\n%s: error: %s\n", func, libusb_error_name(transfer->status)); + *transfer_cnt = TRANS_ERR; + } else { + *transfer_cnt = transfer->actual_length; + } +} + +/* callback for bulk out async transfer */ +static void LIBUSB_CALL cb_out(struct libusb_transfer *transfer) +{ + cb_common(__func__, transfer); +} + +/* callback for bulk in async transfer */ +static void LIBUSB_CALL cb_in(struct libusb_transfer *transfer) +{ + cb_common(__func__, transfer); +} + +static int32_t usb_transfer(const char *func, unsigned int writecnt, unsigned int readcnt, const uint8_t *writearr, uint8_t *readarr) +{ + if (handle == NULL) + return -1; + + int state_out = TRANS_IDLE; + transfer_out->buffer = (uint8_t*)writearr; + transfer_out->length = writecnt; + transfer_out->user_data = &state_out; + + /* Schedule write first */ + if (writecnt > 0) { + state_out = TRANS_ACTIVE; + int ret = libusb_submit_transfer(transfer_out); + if (ret) { + msg_perr("%s: failed to submit OUT transfer: %s\n", func, libusb_error_name(ret)); + state_out = TRANS_ERR; + goto err; + } + } + + /* Handle all asynchronous packets as long as we have stuff to write or read. The write(s) simply need + * to complete but we need to scheduling reads as long as we are not done. */ + unsigned int free_idx = 0; /* The IN transfer we expect to be free next. */ + unsigned int in_idx = 0; /* The IN transfer we expect to be completed next. */ + unsigned int in_done = 0; + unsigned int in_active = 0; + unsigned int out_done = 0; + uint8_t *in_buf = readarr; + int state_in[USB_IN_TRANSFERS] = {0}; + do { + /* Schedule new reads as long as there are free transfers and unscheduled bytes to read. */ + while ((in_done + in_active) < readcnt && state_in[free_idx] == TRANS_IDLE) { + unsigned int cur_todo = min(CH341_PACKET_LENGTH - 1, readcnt - in_done - in_active); + transfer_ins[free_idx]->length = cur_todo; + transfer_ins[free_idx]->buffer = in_buf; + transfer_ins[free_idx]->user_data = &state_in[free_idx]; + int ret = libusb_submit_transfer(transfer_ins[free_idx]); + if (ret) { + state_in[free_idx] = TRANS_ERR; + msg_perr("%s: failed to submit IN transfer: %s\n", + func, libusb_error_name(ret)); + goto err; + } + in_buf += cur_todo; + in_active += cur_todo; + state_in[free_idx] = TRANS_ACTIVE; + free_idx = (free_idx + 1) % USB_IN_TRANSFERS; /* Increment (and wrap around). */ + } + + /* Actually get some work done. */ + libusb_handle_events_timeout(NULL, &(struct timeval){1, 0}); + + /* Check for the write */ + if (out_done < writecnt) { + if (state_out == TRANS_ERR) { + goto err; + } else if (state_out > 0) { + out_done += state_out; + state_out = TRANS_IDLE; + } + } + /* Check for completed transfers. */ + while (state_in[in_idx] != TRANS_IDLE && state_in[in_idx] != TRANS_ACTIVE) { + if (state_in[in_idx] == TRANS_ERR) { + goto err; + } + /* If a transfer is done, record the number of bytes read and reuse it later. */ + in_done += state_in[in_idx]; + in_active -= state_in[in_idx]; + state_in[in_idx] = TRANS_IDLE; + in_idx = (in_idx + 1) % USB_IN_TRANSFERS; /* Increment (and wrap around). */ + } + } while ((out_done < writecnt) || (in_done < readcnt)); + + if (out_done > 0) { + msg_pspew("Wrote %d bytes:\n", out_done); + print_hex(writearr, out_done); + msg_pspew("\n\n"); + } + if (in_done > 0) { + msg_pspew("Read %d bytes:\n", in_done); + print_hex(readarr, in_done); + msg_pspew("\n\n"); + } + return 0; +err: + /* Clean up on errors. */ + msg_perr("%s: Failed to %s %d bytes\n", func, (state_out == TRANS_ERR) ? "write" : "read", + (state_out == TRANS_ERR) ? writecnt : readcnt); + /* First, we must cancel any ongoing requests and wait for them to be canceled. */ + if ((writecnt > 0) && (state_out == TRANS_ACTIVE)) { + if (libusb_cancel_transfer(transfer_out) != 0) + state_out = TRANS_ERR; + } + if (readcnt > 0) { + unsigned int i; + for (i = 0; i < USB_IN_TRANSFERS; i++) { + if (state_in[i] == TRANS_ACTIVE) + if (libusb_cancel_transfer(transfer_ins[i]) != 0) + state_in[i] = TRANS_ERR; + } + } + + /* Wait for cancellations to complete. */ + while (1) { + bool finished = true; + if ((writecnt > 0) && (state_out == TRANS_ACTIVE)) + finished = false; + if (readcnt > 0) { + unsigned int i; + for (i = 0; i < USB_IN_TRANSFERS; i++) { + if (state_in[i] == TRANS_ACTIVE) + finished = false; + } + } + if (finished) + break; + libusb_handle_events_timeout(NULL, &(struct timeval){1, 0}); + } + return -1; +} + +/* Set the I2C bus speed (speed(b1b0): 0 = 20kHz; 1 = 100kHz, 2 = 400kHz, 3 = 750kHz). + * Set the SPI bus data width (speed(b2): 0 = Single, 1 = Double). */ +static int32_t config_stream(uint32_t speed) +{ + if (handle == NULL) + return -1; + + uint8_t buf[] = { + CH341A_CMD_I2C_STREAM, + CH341A_CMD_I2C_STM_SET | (speed & 0x7), + CH341A_CMD_I2C_STM_END + }; + + int32_t ret = usb_transfer(__func__, sizeof(buf), 0, buf, NULL); + if (ret < 0) { + msg_perr("Could not configure stream interface.\n"); + } + return ret; +} + +/* ch341 requires LSB first, swap the bit order before send and after receive */ +static uint8_t swap_byte(uint8_t x) +{ + x = ((x >> 1) & 0x55) | ((x << 1) & 0xaa); + x = ((x >> 2) & 0x33) | ((x << 2) & 0xcc); + x = ((x >> 4) & 0x0f) | ((x << 4) & 0xf0); + return x; +} + +/* The assumed map between UIO command bits, pins on CH341A chip and pins on SPI chip: + * UIO CH341A SPI CH341A SPI name + * 0 D0/15 CS/1 (CS0) + * 1 D1/16 unused (CS1) + * 2 D2/17 unused (CS2) + * 3 D3/18 SCK/6 (DCK) + * 4 D4/19 unused (DOUT2) + * 5 D5/20 SI/5 (DOUT) + * - The UIO stream commands seem to only have 6 bits of output, and D6/D7 are the SPI inputs, + * mapped as follows: + * D6/21 unused (DIN2) + * D7/22 SO/2 (DIN) + */ +static int32_t enable_pins(bool enable) +{ + uint8_t buf[] = { + CH341A_CMD_UIO_STREAM, + CH341A_CMD_UIO_STM_OUT | 0x37, // CS high (all of them), SCK=0, DOUT*=1 + CH341A_CMD_UIO_STM_DIR | (enable ? 0x3F : 0x00), // Interface output enable / disable + CH341A_CMD_UIO_STM_END, + }; + + int32_t ret = usb_transfer(__func__, sizeof(buf), 0, buf, NULL); + if (ret < 0) { + msg_perr("Could not %sable output pins.\n", enable ? "en" : "dis"); + } + return ret; +} + +/* De-assert and assert CS in one operation. */ +static void pluck_cs(uint8_t *ptr) +{ + /* This was measured to give a minumum deassertion time of 2.25 us, + * >20x more than needed for most SPI chips (100ns). */ + int delay_cnt = 2; + if (stored_delay_us) { + delay_cnt = (stored_delay_us * 4) / 3; + stored_delay_us = 0; + } + *ptr++ = CH341A_CMD_UIO_STREAM; + *ptr++ = CH341A_CMD_UIO_STM_OUT | 0x37; /* deasserted */ + int i; + for (i = 0; i < delay_cnt; i++) + *ptr++ = CH341A_CMD_UIO_STM_OUT | 0x37; /* "delay" */ + *ptr++ = CH341A_CMD_UIO_STM_OUT | 0x36; /* asserted */ + *ptr++ = CH341A_CMD_UIO_STM_END; +} + +void ch341a_spi_delay(unsigned int usecs) +{ + /* There is space for 28 bytes instructions of 750 ns each in the CS packet (32 - 4 for the actual CS + * instructions), thus max 21 us, but we avoid getting too near to this boundary and use + * internal_delay() for durations over 20 us. */ + if ((usecs + stored_delay_us) > 20) { + unsigned int inc = 20 - stored_delay_us; + internal_delay(usecs - inc); + usecs = inc; + } + stored_delay_us += usecs; +} + +static int ch341a_spi_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) +{ + if (handle == NULL) + return -1; + + /* How many packets ... */ + const size_t packets = (writecnt + readcnt + CH341_PACKET_LENGTH - 2) / (CH341_PACKET_LENGTH - 1); + + /* We pluck CS/timeout handling into the first packet thus we need to allocate one extra package. */ + uint8_t wbuf[packets+1][CH341_PACKET_LENGTH]; + uint8_t rbuf[writecnt + readcnt]; + /* Initialize the write buffer to zero to prevent writing random stack contents to device. */ + memset(wbuf[0], 0, CH341_PACKET_LENGTH); + + uint8_t *ptr = wbuf[0]; + /* CS usage is optimized by doing both transitions in one packet. + * Final transition to deselected state is in the pin disable. */ + pluck_cs(ptr); + unsigned int write_left = writecnt; + unsigned int read_left = readcnt; + unsigned int p; + for (p = 0; p < packets; p++) { + unsigned int write_now = min(CH341_PACKET_LENGTH - 1, write_left); + unsigned int read_now = min ((CH341_PACKET_LENGTH - 1) - write_now, read_left); + ptr = wbuf[p+1]; + *ptr++ = CH341A_CMD_SPI_STREAM; + unsigned int i; + for (i = 0; i < write_now; ++i) + *ptr++ = swap_byte(*writearr++); + if (read_now) { + memset(ptr, 0xFF, read_now); + read_left -= read_now; + } + write_left -= write_now; + } + + int32_t ret = usb_transfer(__func__, CH341_PACKET_LENGTH + packets + writecnt + readcnt, + writecnt + readcnt, wbuf[0], rbuf); + if (ret < 0) + return -1; + + unsigned int i; + for (i = 0; i < readcnt; i++) { + *readarr++ = swap_byte(rbuf[writecnt + i]); + } + + return 0; +} + +static const struct spi_master spi_master_ch341a_spi = { + .type = SPI_CONTROLLER_CH341A_SPI, + /* flashrom's current maximum is 256 B. CH341A was tested on Linux and Windows to accept atleast + * 128 kB. Basically there should be no hard limit because transfers are broken up into USB packets + * sent to the device and most of their payload streamed via SPI. */ + .max_data_read = 4 * 1024, + .max_data_write = 4 * 1024, + .command = ch341a_spi_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, + .write_aai = default_spi_write_aai, +}; + +static int ch341a_spi_shutdown(void *data) +{ + if (handle == NULL) + return -1; + + enable_pins(false); + libusb_free_transfer(transfer_out); + transfer_out = NULL; + int i; + for (i = 0; i < USB_IN_TRANSFERS; i++) { + libusb_free_transfer(transfer_ins[i]); + transfer_ins[i] = NULL; + } + libusb_release_interface(handle, 0); + libusb_close(handle); + libusb_exit(NULL); + handle = NULL; + return 0; +} + +int ch341a_spi_init(void) +{ + if (handle != NULL) { + msg_cerr("%s: handle already set! Please report a bug at flashrom(a)flashrom.org\n", __func__); + return -1; + } + + int32_t ret = libusb_init(NULL); + if (ret < 0) { + msg_perr("Couldnt initialize libusb!\n"); + return -1; + } + + libusb_set_debug(NULL, 3); // Enable information, warning and error messages (only). + + uint16_t vid = devs_ch341a_spi[0].vendor_id; + uint16_t pid = devs_ch341a_spi[0].device_id; + handle = libusb_open_device_with_vid_pid(NULL, vid, pid); + if (handle == NULL) { + msg_perr("Couldn't open device %04x:%04x.\n", vid, pid); + return -1; + } + +/* libusb_detach_kernel_driver() and friends basically only work on Linux. We simply try to detach on Linux + * without a lot of passion here. If that works fine else we will fail on claiming the interface anyway. */ +#if IS_LINUX + ret = libusb_detach_kernel_driver(handle, 0); + if (ret == LIBUSB_ERROR_NOT_SUPPORTED) { + msg_pwarn("Detaching kernel drivers is not supported. Further accesses may fail.\n"); + } else if (ret != 0 && ret != LIBUSB_ERROR_NOT_FOUND) { + msg_pwarn("Failed to detach kernel driver: '%s'. Further accesses will probably fail.\n", + libusb_error_name(ret)); + } +#endif + + ret = libusb_claim_interface(handle, 0); + if (ret != 0) { + msg_perr("Failed to claim interface 0: '%s'\n", libusb_error_name(ret)); + goto close_handle; + } + + struct libusb_device *dev; + if (!(dev = libusb_get_device(handle))) { + msg_perr("Failed to get device from device handle.\n"); + goto close_handle; + } + + struct libusb_device_descriptor desc; + ret = libusb_get_device_descriptor(dev, &desc); + if (ret < 0) { + msg_perr("Failed to get device descriptor: '%s'\n", libusb_error_name(ret)); + goto release_interface; + } + + msg_pdbg("Device revision is %d.%01d.%01d\n", + (desc.bcdDevice >> 8) & 0x00FF, + (desc.bcdDevice >> 4) & 0x000F, + (desc.bcdDevice >> 0) & 0x000F); + + /* Allocate and pre-fill transfer structures. */ + transfer_out = libusb_alloc_transfer(0); + if (!transfer_out) { + msg_perr("Failed to alloc libusb OUT transfer\n"); + goto release_interface; + } + int i; + for (i = 0; i < USB_IN_TRANSFERS; i++) { + transfer_ins[i] = libusb_alloc_transfer(0); + if (transfer_ins[i] == NULL) { + msg_perr("Failed to alloc libusb IN transfer %d\n", i); + goto dealloc_transfers; + } + } + /* We use these helpers but dont fill the actual buffer yet. */ + libusb_fill_bulk_transfer(transfer_out, handle, WRITE_EP, NULL, 0, cb_out, NULL, USB_TIMEOUT); + for (i = 0; i < USB_IN_TRANSFERS; i++) + libusb_fill_bulk_transfer(transfer_ins[i], handle, READ_EP, NULL, 0, cb_in, NULL, USB_TIMEOUT); + + if ((config_stream(CH341A_STM_I2C_100K) < 0) || (enable_pins(true) < 0)) + goto dealloc_transfers; + + register_shutdown(ch341a_spi_shutdown, NULL); + register_spi_master(&spi_master_ch341a_spi); + + return 0; + +dealloc_transfers: + for (i = 0; i < USB_IN_TRANSFERS; i++) { + if (transfer_ins[i] == NULL) + break; + libusb_free_transfer(transfer_ins[i]); + transfer_ins[i] = NULL; + } + libusb_free_transfer(transfer_out); + transfer_out = NULL; +release_interface: + libusb_release_interface(handle, 0); +close_handle: + libusb_close(handle); + handle = NULL; + return -1; +} Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Sun Jan 31 23:10:14 2016 (r1920) +++ trunk/flashrom.8.tmpl Sun Jan 31 23:10:29 2016 (r1921) @@ -271,6 +271,8 @@ .sp .BR "* pickit2_spi" " (for SPI flash ROMs accessible via Microchip PICkit2)" .sp +.BR "* ch341a_spi" " (for SPI flash ROMs attached to WCH CH341A)" +.sp Some programmers have optional or mandatory parameters which are described in detail in the .B PROGRAMMER-SPECIFIC INFORMATION @@ -1019,6 +1021,10 @@ parameter, once the flash read/write operation you intended to perform has completed successfully. .sp Please also note that the mstarddc_spi driver only works on Linux. +.SS +.BR "ch341a_spi " programmer +The WCH CH341A programmer does not support any parameters currently. SPI frequency is fixed at 2 MHz, and CS0 is +used as per the device. .SH EXAMPLES To back up and update your BIOS, run .sp @@ -1078,6 +1084,9 @@ .BR dediprog ", " ft2232_spi ", " usbblaster_spi " and " pickit2_spi need access to the respective USB device via libusb API version 0.1. .sp +.BR ch341a_spi +needs access to the respective USB device via libusb API version 1.0. +.sp .B dummy needs no access permissions at all. .sp @@ -1085,7 +1094,8 @@ .BR gfxnvidia ", " drkaiser ", " satasii ", " satamv ", " atahpt ", " atavia " and " atapromise have to be run as superuser/root, and need additional raw access permission. .sp -.BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi ", " ft2232_spi " and " pickit2_spi +.BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi ", " ft2232_spi ", " pickit2_spi " and " \ +ch341a_spi can be run as normal user on most operating systems if appropriate device permissions are set. .sp Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sun Jan 31 23:10:14 2016 (r1920) +++ trunk/flashrom.c Sun Jan 31 23:10:29 2016 (r1921) @@ -392,6 +392,18 @@ }, #endif +#if CONFIG_CH341A_SPI == 1 + { + .name = "ch341a_spi", + .type = USB, + .devs.dev = devs_ch341a_spi, + .init = ch341a_spi_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = ch341a_spi_delay, + }, +#endif + {0}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sun Jan 31 23:10:14 2016 (r1920) +++ trunk/programmer.h Sun Jan 31 23:10:29 2016 (r1921) @@ -108,6 +108,9 @@ #if CONFIG_PICKIT2_SPI == 1 PROGRAMMER_PICKIT2_SPI, #endif +#if CONFIG_CH341A_SPI == 1 + PROGRAMMER_CH341A_SPI, +#endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -526,6 +529,13 @@ int dediprog_init(void); #endif +/* ch341a_spi.c */ +#if CONFIG_CH341A_SPI == 1 +int ch341a_spi_init(void); +void ch341a_spi_delay(unsigned int usecs); +extern const struct dev_entry devs_ch341a_spi[]; +#endif + /* flashrom.c */ struct decode_sizes { uint32_t parallel; @@ -585,6 +595,9 @@ #if CONFIG_PICKIT2_SPI == 1 SPI_CONTROLLER_PICKIT2, #endif +#if CONFIG_CH341A_SPI == 1 + SPI_CONTROLLER_CH341A_SPI, +#endif }; #define MAX_DATA_UNSPECIFIED 0

1 0

[commit] r1920 - trunk
by repository service 31 Jan '16

31 Jan '16

Author: stefanct Date: Sun Jan 31 23:10:14 2016 New Revision: 1920 URL: http://flashrom.org/trac/flashrom/changeset/1920 Log: Add infrastructure to support libusb-1.0. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Urja Rannikko <urjaman(a)gmail.com> Modified: trunk/Makefile trunk/flashrom.8.tmpl Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sun Jan 24 23:37:10 2016 (r1919) +++ trunk/Makefile Sun Jan 31 23:10:14 2016 (r1920) @@ -794,6 +794,23 @@ USBLIBS := $(call debug_shell,[ -n "$(PKG_CONFIG_LIBDIR)" ] && export PKG_CONFIG_LIBDIR="$(PKG_CONFIG_LIBDIR)" ; $(PKG_CONFIG) --libs libusb || printf "%s" "-lusb") endif +ifeq ($(NEED_LIBUSB1), yes) +CHECK_LIBUSB1 = yes +FEATURE_CFLAGS += -D'NEED_LIBUSB1=1' +# FreeBSD and DragonflyBSD use a reimplementation of libusb-1.0 that is simply called libusb +ifeq ($(TARGET_OS),$(filter $(TARGET_OS),FreeBSD DragonFlyBSD)) +USB1LIBS += -lusb +else +ifeq ($(TARGET_OS),NetBSD) +CPPFLAGS += -I/usr/pkg/include/libusb-1.0 +USB1LIBS += -lusb-1.0 +else +USB1LIBS += $(call debug_shell,[ -n "$(PKG_CONFIG_LIBDIR)" ] && export PKG_CONFIG_LIBDIR="$(PKG_CONFIG_LIBDIR)"; pkg-config --libs libusb-1.0 || printf "%s" "-lusb-1.0") +CPPFLAGS += $(call debug_shell,[ -n "$(PKG_CONFIG_LIBDIR)" ] && export PKG_CONFIG_LIBDIR="$(PKG_CONFIG_LIBDIR)"; pkg-config --cflags-only-I libusb-1.0 || printf "%s" "-I/usr/include/libusb-1.0") +endif +endif +endif + ifeq ($(CONFIG_PRINT_WIKI), yes) FEATURE_CFLAGS += -D'CONFIG_PRINT_WIKI=1' CLI_OBJS += print_wiki.o @@ -813,7 +830,7 @@ endif $(PROGRAM)$(EXEC_SUFFIX): $(OBJS) - $(CC) $(LDFLAGS) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJS) $(LIBS) $(PCILIBS) $(FEATURE_LIBS) $(USBLIBS) + $(CC) $(LDFLAGS) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJS) $(LIBS) $(PCILIBS) $(FEATURE_LIBS) $(USBLIBS) $(USB1LIBS) libflashrom.a: $(LIBFLASHROM_OBJS) $(AR) rcs $@ $^ @@ -934,6 +951,20 @@ endef export LIBUSB0_TEST + +define LIBUSB1_TEST +#include <stddef.h> +#include <libusb.h> +int main(int argc, char **argv) +{ + (void)argc; + (void)argv; + libusb_init(NULL); + return 0; +} +endef +export LIBUSB1_TEST + hwlibs: compiler @printf "" > .libdeps ifeq ($(CHECK_LIBPCI), yes) @@ -981,6 +1012,24 @@ echo "See README for more information."; echo; \ rm -f .test.c .test.o .test$(EXEC_SUFFIX); exit 1; }; } 2>>$(BUILD_DETAILS_FILE); echo $? >&3 ; } | tee -a $(BUILD_DETAILS_FILE) >&4; } 3>&1;} | { read rc ; exit ${rc}; } } 4>&1 @rm -f .test.c .test.o .test$(EXEC_SUFFIX) +endif +ifeq ($(CHECK_LIBUSB1), yes) + @printf "Checking for libusb-1.0 headers... " | tee -a $(BUILD_DETAILS_FILE) + @echo "$$LIBUSB1_TEST" > .test.c + @printf "\nexec: %s\n" "$(CC) -c $(CPPFLAGS) $(CFLAGS) .test.c -o .test.o" >>$(BUILD_DETAILS_FILE) + @{ { { { { $(CC) -c $(CPPFLAGS) $(CFLAGS) .test.c -o .test.o >&2 && \ + echo "found." || { echo "not found."; echo; \ + echo "Please install libusb-1.0 headers."; \ + echo "See README for more information."; echo; \ + rm -f .test.c .test.o; exit 1; }; } 2>>$(BUILD_DETAILS_FILE); echo $? >&3 ; } | tee -a $(BUILD_DETAILS_FILE) >&4; } 3>&1;} | { read rc ; exit ${rc}; } } 4>&1 + @printf "Checking if libusb-1.0 is usable... " | tee -a $(BUILD_DETAILS_FILE) + @printf "\nexec: %s\n" "$(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(LIBS) $(USB1LIBS)" >>$(BUILD_DETAILS_FILE) + @{ { { { { $(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(LIBS) $(USB1LIBS) >&2 && \ + echo "yes." || { echo "no."; \ + echo "Please install libusb-1.0."; \ + echo "See README for more information."; echo; \ + rm -f .test.c .test.o .test$(EXEC_SUFFIX); exit 1; }; } 2>>$(BUILD_DETAILS_FILE); echo $? >&3 ; } | tee -a $(BUILD_DETAILS_FILE) >&4; } 3>&1;} | { read rc ; exit ${rc}; } } 4>&1 + @rm -f .test.c .test.o .test$(EXEC_SUFFIX) endif .features: features Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Sun Jan 24 23:37:10 2016 (r1919) +++ trunk/flashrom.8.tmpl Sun Jan 31 23:10:14 2016 (r1920) @@ -1076,7 +1076,7 @@ needs userspace access to a serial port. .sp .BR dediprog ", " ft2232_spi ", " usbblaster_spi " and " pickit2_spi -need access to the USB device via libusb. +need access to the respective USB device via libusb API version 0.1. .sp .B dummy needs no access permissions at all.

1 0

W836xx: your board name: flashrom -V
by Glen Davis 31 Jan '16

31 Jan '16

flashrom v0.9.6.1-r1705 on Linux 3.14.27-100.fc19.i686 (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, GCC 4.8.1 20130717 (Red Hat 4.8.1-5), little endian Command line (1 args): flashrom -V Using default programmer "internal". Calibrating delay loop... OS timer resolution is 2 usecs, 491M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 1001 us, 10000 myus = 10666 us, 8 myus = 9 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "HP" DMI string system-product-name: "ProLiant DL145 G2" DMI string system-version: "-1 " DMI string baseboard-manufacturer: "Wistron Corporation" DMI string baseboard-product-name: "K85NL" DMI string baseboard-version: "-1 " DMI string chassis-type: "Main Server Chassis" W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: 35. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. Found chipset "NVIDIA CK804" with PCI ID 10de:0051. Enabling flash write... OK. The following protocols are supported: Non-SPI. Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0xeb, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0xeb, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0xeb, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT49(H)F010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT49F040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29LV640B, 8192 kB: probe_en29lv640b: id1 0xffff, id2 0x00ff Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0x66, id2 0xe0 Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0x66, id2 0xe0 Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0x66, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0x66, id2 0xe0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0xeb, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0xeb, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0xeb, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV512, 64 kB: probe_jedec_common: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xbf, id2 0x5b Found SST flash chip "SST49LF080A" (1024 kB, LPC) at physical address 0xfff00000. Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0x66, id2 0xe0 Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0x66, id2 0xe0 Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0xeb, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0x4e, id2 0x41, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x66, id2 0x76, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x5c, id2 0xbc, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39F010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39L010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39L020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Found SST flash chip "SST49LF080A" (1024 kB, LPC). No operations were specified. Restoring PCI config space for 00:01:0 reg 0x6d

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Re: [flashrom] [v3,2/2] ENE KB9012 EC flashrom patch - Bug report
by Paul Kocialkowski 31 Jan '16

31 Jan '16

Le samedi 30 janvier 2016 à 19:50 +0100, Idwer Vollering a écrit : > 2016-01-30 19:06 GMT+01:00 John Brown <multitor4(a)gmail.com>: > > Good day! I applied your most recent KB9012 flashrom patch to the > > latest > > flashrom copy, and tried to compile it for testing with my KB9012 > > chip. > > However, I have encountered the following error: > > > > flashchips.c:3209:19: error: 'FEATURE_ERASED_ZERO' undeclared here > > (not in a > > function) > > .feature_bits = FEATURE_ERASED_ZERO, > > ^ > > make: *** [flashchips.o] Error 1 > > > > FEATURE_ERASED_ZERO is not declared anywhere, neither in latest > > flashrom > > revisions, nor in older flashrom revisions. Dont know why nobody > > noticed > > this problem before me... > > It is defined in a pending patch: > http://www.flashrom.org/pipermail/flashrom/2015-November/013969.html That's right, that patch is indeed needed. My tree is at: http://git.code.paulk.fr/gitweb/?p=flashrom.git;a=shortl og;h=refs/heads/next (next branch) > > > > Then, I thought it could be a good idea to replace this undeclared > > value > > with zero: > > .feature_bits = 0, > > FEATURE_ERASED_ZERO definitely does not equal 0. That feature is required to properly program the chip, indeed! -- Paul Kocialkowski, Replicant developer Replicant is a fully free Android distribution running on several devices, a free software mobile operating system putting the emphasis on freedom and privacy/security. Website: https://www.replicant.us/ Blog: https://blog.replicant.us/ Wiki/tracker/forums: https://redmine.replicant.us/

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W836xx: your board name: flashrom -V
by Christopher M. Penalver 30 Jan '16

30 Jan '16

You may already be aware, but I wanted to post as this was advised as per the flashrom program. sudo flashrom -V -p internal flashrom v0.9.7-r1852 on Linux 4.3.0-7-generic (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.3.1, GCC 5.2.1 20151022, little endian Command line (3 args): flashrom -V -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 3029M loops per second, delay more than 10% too short (got 84% of expected delay), recalculating... 3199M loops per second, delay more than 10% too short (got 89% of expected delay), recalculating... 3097M loops per second, delay more than 10% too short (got 87% of expected delay), recalculating... 2844M loops per second, delay more than 10% too short (got 89% of expected delay), recalculating... 3143M loops per second, delay loop is unreliable, trying to continue 10 myus = 10 us, 100 myus = 93 us, 1000 myus = 1325 us, 10000 myus = 11085 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. Using Internal DMI decoder. DMI string chassis-type: "Notebook" Laptop detected via DMI. DMI string system-manufacturer: "TOSHIBA" DMI string system-product-name: "Satellite S55-C" DMI string system-version: "PSPTJU-006005" DMI string baseboard-manufacturer: "FF50 " DMI string baseboard-product-name: "06F1 " DMI string baseboard-version: "Type2 - Board Version" W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: fc. Please send the output of "flashrom -V -p internal" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See the manpage and http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. Error: Programmer initialization failed. Christopher M. Penalver E-Mail: christopher.m.penalver(a)gmail.com

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Re: [flashrom] [v3,2/2] ENE KB9012 EC flashrom patch - Bug report
by Idwer Vollering 30 Jan '16

30 Jan '16

2016-01-30 19:06 GMT+01:00 John Brown <multitor4(a)gmail.com>: > Good day! I applied your most recent KB9012 flashrom patch to the latest > flashrom copy, and tried to compile it for testing with my KB9012 chip. > However, I have encountered the following error: > > flashchips.c:3209:19: error: 'FEATURE_ERASED_ZERO' undeclared here (not in a > function) > .feature_bits = FEATURE_ERASED_ZERO, > ^ > make: *** [flashchips.o] Error 1 > > FEATURE_ERASED_ZERO is not declared anywhere, neither in latest flashrom > revisions, nor in older flashrom revisions. Dont know why nobody noticed > this problem before me... It is defined in a pending patch: http://www.flashrom.org/pipermail/flashrom/2015-November/013969.html > > Then, I thought it could be a good idea to replace this undeclared value > with zero: > .feature_bits = 0, FEATURE_ERASED_ZERO definitely does not equal 0.

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[v3,2/2] ENE KB9012 EC flashrom patch - Bug report
by John Brown 30 Jan '16

30 Jan '16

Good day! I applied your most recent KB9012 flashrom patch to the latest flashrom copy, and tried to compile it for testing with my KB9012 chip. However, I have encountered the following error: flashchips.c:3209:19: error: 'FEATURE_ERASED_ZERO' undeclared here (not in a function) .feature_bits = FEATURE_ERASED_ZERO, ^ make: *** [flashchips.o] Error 1 FEATURE_ERASED_ZERO is not declared anywhere, neither in latest flashrom revisions, nor in older flashrom revisions. Dont know why nobody noticed this problem before me... Then, I thought it could be a good idea to replace this undeclared value with zero: .feature_bits = 0, Flashrom compiled successfully after this change, but unfortunately it cannot properly detect KB9012 chip that is attached to Bus Pirate through KB9012 adapter. Important log part is attached below (interesting, why it has not printed RDID stuff while probing for ENE KB9012) ... Probing for Atmel AT45DB642D, 8192 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ENE KB9012 (EDI), 128 kB: Probing for ESMT F25L008A, 1024 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff Probing for ESMT F25L32PA, 4096 kB: RDID byte 0 parity violation. probe_spi_rdid_generic: id1 0xff, id2 0xffff ... Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0x7f, id2 0xff Found Generic flash chip "unknown SPI chip (REMS)" (0 kB, SPI) on buspirate_spi. Found Generic flash chip "unknown SPI chip (REMS)" (0 kB, SPI). === This flash part has status NOT WORKING for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash chip. Please include the flashrom log file for all operations you tested (see the man page for details), and mention which mainboard or programmer you tested in the subject line. Thanks for your help! Read is not working on this chip. Continuing anyway. flashrom has no read function for this flash chip. Aborting. Raw bitbang mode version 1 Bus Pirate shutdown completed.

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flashrom January 2016