flashrom April 2014

flashrom@flashrom.org

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121 discussions

[PATCH] Rename programmer registration functions
by Carl-Daniel Hailfinger 19 Jul '14

19 Jul '14

register_programmer suggests that we register a programmer. However, that function registers a master for a given bus type, and a programmer may support multiple masters (e.g. SPI, FWH). Rename a few other functions to be more consistent. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-rename_register_programmer_register_master/ogp_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/ogp_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/ogp_spi.c (Arbeitskopie) @@ -140,7 +140,7 @@ if (register_shutdown(ogp_spi_shutdown, NULL)) return 1; - if (bitbang_spi_init(&bitbang_spi_master_ogp)) + if (register_spi_bitbang_master(&bitbang_spi_master_ogp)) return 1; return 0; Index: flashrom-rename_register_programmer_register_master/flash.h =================================================================== --- flashrom-rename_register_programmer_register_master/flash.h (Revision 1587) +++ flashrom-rename_register_programmer_register_master/flash.h (Arbeitskopie) @@ -154,7 +154,7 @@ chipaddr virtual_memory; /* Some flash devices have an additional register space. */ chipaddr virtual_registers; - struct registered_programmer *pgm; + struct registered_master *pgm; }; #define TEST_UNTESTED 0 @@ -215,7 +215,7 @@ void map_flash_registers(struct flashctx *flash); int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int erase_flash(struct flashctx *flash); -int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *fill_flash, int force); +int probe_flash(struct registered_master *pgm, int startchip, struct flashctx *fill_flash, int force); int read_flash_to_file(struct flashctx *flash, const char *filename); int min(int a, int b); int max(int a, int b); Index: flashrom-rename_register_programmer_register_master/drkaiser.c =================================================================== --- flashrom-rename_register_programmer_register_master/drkaiser.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/drkaiser.c (Arbeitskopie) @@ -45,7 +45,7 @@ chipaddr addr); static uint8_t drkaiser_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_drkaiser = { +static const struct par_master par_programmer_drkaiser = { .chip_readb = drkaiser_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -85,7 +85,7 @@ return 1; max_rom_decode.parallel = 128 * 1024; - register_par_programmer(&par_programmer_drkaiser, BUS_PARALLEL); + register_par_master(&par_programmer_drkaiser, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/it87spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/it87spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/it87spi.c (Arbeitskopie) @@ -113,7 +113,7 @@ static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -static const struct spi_programmer spi_programmer_it87xx = { +static const struct spi_master spi_programmer_it87xx = { .type = SPI_CONTROLLER_IT87XX, .max_data_read = MAX_DATA_UNSPECIFIED, .max_data_write = MAX_DATA_UNSPECIFIED, @@ -199,7 +199,7 @@ if (internal_buses_supported & BUS_SPI) msg_pdbg("Overriding chipset SPI with IT87 SPI.\n"); /* FIXME: Add the SPI bus or replace the other buses with it? */ - register_spi_programmer(&spi_programmer_it87xx); + register_spi_master(&spi_programmer_it87xx); return 0; } Index: flashrom-rename_register_programmer_register_master/gfxnvidia.c =================================================================== --- flashrom-rename_register_programmer_register_master/gfxnvidia.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/gfxnvidia.c (Arbeitskopie) @@ -66,7 +66,7 @@ chipaddr addr); static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_gfxnvidia = { +static const struct par_master par_programmer_gfxnvidia = { .chip_readb = gfxnvidia_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -112,7 +112,7 @@ /* Write/erase doesn't work. */ programmer_may_write = 0; - register_par_programmer(&par_programmer_gfxnvidia, BUS_PARALLEL); + register_par_master(&par_programmer_gfxnvidia, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/nicrealtek.c =================================================================== --- flashrom-rename_register_programmer_register_master/nicrealtek.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/nicrealtek.c (Arbeitskopie) @@ -40,7 +40,7 @@ static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); static uint8_t nicrealtek_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_nicrealtek = { +static const struct par_master par_programmer_nicrealtek = { .chip_readb = nicrealtek_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -82,7 +82,7 @@ if (register_shutdown(nicrealtek_shutdown, NULL)) return 1; - register_par_programmer(&par_programmer_nicrealtek, BUS_PARALLEL); + register_par_master(&par_programmer_nicrealtek, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/serprog.c =================================================================== --- flashrom-rename_register_programmer_register_master/serprog.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/serprog.c (Arbeitskopie) @@ -320,7 +320,7 @@ unsigned char *readarr); static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -static struct spi_programmer spi_programmer_serprog = { +static struct spi_master spi_programmer_serprog = { .type = SPI_CONTROLLER_SERPROG, .max_data_read = MAX_DATA_READ_UNLIMITED, .max_data_write = MAX_DATA_WRITE_UNLIMITED, @@ -337,7 +337,7 @@ const chipaddr addr); static void serprog_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); -static const struct par_programmer par_programmer_serprog = { +static const struct par_master par_programmer_serprog = { .chip_readb = serprog_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -673,10 +673,9 @@ sp_streamed_transmit_bytes = 0; sp_opbuf_usage = 0; if (serprog_buses_supported & BUS_SPI) - register_spi_programmer(&spi_programmer_serprog); + register_spi_master(&spi_programmer_serprog); if (serprog_buses_supported & BUS_NONSPI) - register_par_programmer(&par_programmer_serprog, - serprog_buses_supported & BUS_NONSPI); + register_par_master(&par_programmer_serprog, serprog_buses_supported & BUS_NONSPI); return 0; } Index: flashrom-rename_register_programmer_register_master/bitbang_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/bitbang_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/bitbang_spi.c (Arbeitskopie) @@ -63,7 +63,7 @@ const unsigned char *writearr, unsigned char *readarr); -static const struct spi_programmer spi_programmer_bitbang = { +static const struct spi_master spi_programmer_bitbang = { .type = SPI_CONTROLLER_BITBANG, .max_data_read = MAX_DATA_READ_UNLIMITED, .max_data_write = MAX_DATA_WRITE_UNLIMITED, @@ -82,9 +82,9 @@ } #endif -int bitbang_spi_init(const struct bitbang_spi_master *master) +int register_spi_bitbang_master(const struct bitbang_spi_master *master) { - struct spi_programmer pgm = spi_programmer_bitbang; + struct spi_master pgm = spi_programmer_bitbang; /* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type, * we catch it here. Same goes for missing initialization of bitbanging * functions. @@ -99,7 +99,7 @@ } pgm.data = master; - register_spi_programmer(&pgm); + register_spi_master(&pgm); /* Only mess with the bus if we're sure nobody else uses it. */ bitbang_spi_request_bus(master); Index: flashrom-rename_register_programmer_register_master/satamv.c =================================================================== --- flashrom-rename_register_programmer_register_master/satamv.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/satamv.c (Arbeitskopie) @@ -46,7 +46,7 @@ chipaddr addr); static uint8_t satamv_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_satamv = { +static const struct par_master par_programmer_satamv = { .chip_readb = satamv_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -156,7 +156,7 @@ /* 512 kByte with two 8-bit latches, and * 4 MByte with additional 3-bit latch. */ max_rom_decode.parallel = 4 * 1024 * 1024; - register_par_programmer(&par_programmer_satamv, BUS_PARALLEL); + register_par_master(&par_programmer_satamv, BUS_PARALLEL); return 0; Index: flashrom-rename_register_programmer_register_master/dummyflasher.c =================================================================== --- flashrom-rename_register_programmer_register_master/dummyflasher.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/dummyflasher.c (Arbeitskopie) @@ -119,7 +119,7 @@ static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); -static const struct spi_programmer spi_programmer_dummyflasher = { +static const struct spi_master spi_programmer_dummyflasher = { .type = SPI_CONTROLLER_DUMMY, .max_data_read = MAX_DATA_READ_UNLIMITED, .max_data_write = MAX_DATA_UNSPECIFIED, @@ -130,7 +130,7 @@ .write_aai = default_spi_write_aai, }; -static const struct par_programmer par_programmer_dummy = { +static const struct par_master par_programmer_dummy = { .chip_readb = dummy_chip_readb, .chip_readw = dummy_chip_readw, .chip_readl = dummy_chip_readl, @@ -401,12 +401,10 @@ return 1; } if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH)) - register_par_programmer(&par_programmer_dummy, - dummy_buses_supported & - (BUS_PARALLEL | BUS_LPC | - BUS_FWH)); + register_par_master(&par_programmer_dummy, + dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH)); if (dummy_buses_supported & BUS_SPI) - register_spi_programmer(&spi_programmer_dummyflasher); + register_spi_master(&spi_programmer_dummyflasher); return 0; } Index: flashrom-rename_register_programmer_register_master/cli_classic.c =================================================================== --- flashrom-rename_register_programmer_register_master/cli_classic.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/cli_classic.c (Arbeitskopie) @@ -421,10 +421,10 @@ msg_pdbg("The following protocols are supported: %s.\n", tempstr); free(tempstr); - for (j = 0; j < registered_programmer_count; j++) { + for (j = 0; j < registered_master_count; j++) { startchip = 0; while (chipcount < ARRAY_SIZE(flashes)) { - startchip = probe_flash(&registered_programmers[j], startchip, &flashes[chipcount], 0); + startchip = probe_flash(&registered_masters[j], startchip, &flashes[chipcount], 0); if (startchip == -1) break; chipcount++; @@ -446,12 +446,12 @@ "automatically.\n"); } if (force && read_it && chip_to_probe) { - struct registered_programmer *pgm; + struct registered_master *pgm; int compatible_programmers = 0; msg_cinfo("Force read (-f -r -c) requested, pretending the chip is there:\n"); /* This loop just counts compatible controllers. */ - for (j = 0; j < registered_programmer_count; j++) { - pgm = &registered_programmers[j]; + for (j = 0; j < registered_master_count; j++) { + pgm = &registered_masters[j]; /* chip is still set from the chip_to_probe earlier in this function. */ if (pgm->buses_supported & chip->bustype) compatible_programmers++; @@ -464,8 +464,8 @@ if (compatible_programmers > 1) msg_cinfo("More than one compatible controller found for the requested flash " "chip, using the first one.\n"); - for (j = 0; j < registered_programmer_count; j++) { - pgm = &registered_programmers[j]; + for (j = 0; j < registered_master_count; j++) { + pgm = &registered_masters[j]; startchip = probe_flash(pgm, 0, &flashes[0], 1); if (startchip != -1) break; Index: flashrom-rename_register_programmer_register_master/internal.c =================================================================== --- flashrom-rename_register_programmer_register_master/internal.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/internal.c (Arbeitskopie) @@ -145,7 +145,7 @@ const chipaddr addr); static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); -static const struct par_programmer par_programmer_internal = { +static const struct par_master par_programmer_internal = { .chip_readb = internal_chip_readb, .chip_readw = internal_chip_readw, .chip_readl = internal_chip_readl, @@ -348,7 +348,7 @@ * The error code might have been a warning only. */ #if defined(__i386__) || defined(__x86_64__) || defined (__mips) - register_par_programmer(&par_programmer_internal, internal_buses_supported); + register_par_master(&par_programmer_internal, internal_buses_supported); return 0; #else msg_perr("Your platform is not supported yet for the internal " Index: flashrom-rename_register_programmer_register_master/ichspi.c =================================================================== --- flashrom-rename_register_programmer_register_master/ichspi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/ichspi.c (Arbeitskopie) @@ -1514,7 +1514,7 @@ msg_gspew("resulted in 0x%08x.\n", mmio_readl(addr)); } -static const struct spi_programmer spi_programmer_ich7 = { +static const struct spi_master spi_programmer_ich7 = { .type = SPI_CONTROLLER_ICH7, .max_data_read = 64, .max_data_write = 64, @@ -1525,7 +1525,7 @@ .write_aai = default_spi_write_aai, }; -static const struct spi_programmer spi_programmer_ich9 = { +static const struct spi_master spi_programmer_ich9 = { .type = SPI_CONTROLLER_ICH9, .max_data_read = 64, .max_data_write = 64, @@ -1536,7 +1536,7 @@ .write_aai = default_spi_write_aai, }; -static const struct opaque_programmer opaque_programmer_ich_hwseq = { +static const struct opaque_master opaque_programmer_ich_hwseq = { .max_data_read = 64, .max_data_write = 64, .probe = ich_hwseq_probe, @@ -1623,7 +1623,7 @@ } ich_init_opcodes(); ich_set_bbar(0); - register_spi_programmer(&spi_programmer_ich7); + register_spi_master(&spi_programmer_ich7); break; case CHIPSET_ICH8: default: /* Future version might behave the same */ @@ -1808,9 +1808,9 @@ } hwseq_data.size_comp0 = getFCBA_component_density(&desc, 0); hwseq_data.size_comp1 = getFCBA_component_density(&desc, 1); - register_opaque_programmer(&opaque_programmer_ich_hwseq); + register_opaque_master(&opaque_programmer_ich_hwseq); } else { - register_spi_programmer(&spi_programmer_ich9); + register_spi_master(&spi_programmer_ich9); } break; } @@ -1833,7 +1833,7 @@ return 0; } -static const struct spi_programmer spi_programmer_via = { +static const struct spi_master spi_programmer_via = { .type = SPI_CONTROLLER_VIA, .max_data_read = 16, .max_data_write = 16, @@ -1854,7 +1854,7 @@ /* Not sure if it speaks all these bus protocols. */ internal_buses_supported = BUS_LPC | BUS_FWH; ich_generation = CHIPSET_ICH7; - register_spi_programmer(&spi_programmer_via); + register_spi_master(&spi_programmer_via); msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0)); msg_pdbg("0x02: 0x%04x (SPIC)\n", mmio_readw(ich_spibar + 2)); Index: flashrom-rename_register_programmer_register_master/nicintel_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/nicintel_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/nicintel_spi.c (Arbeitskopie) @@ -196,7 +196,7 @@ if (register_shutdown(nicintel_spi_shutdown, NULL)) return 1; - if (bitbang_spi_init(&bitbang_spi_master_nicintel)) + if (register_spi_bitbang_master(&bitbang_spi_master_nicintel)) return 1; return 0; Index: flashrom-rename_register_programmer_register_master/opaque.c =================================================================== --- flashrom-rename_register_programmer_register_master/opaque.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/opaque.c (Arbeitskopie) @@ -50,9 +50,9 @@ return flash->pgm->opaque.erase(flash, blockaddr, blocklen); } -int register_opaque_programmer(const struct opaque_programmer *pgm) +int register_opaque_master(const struct opaque_master *pgm) { - struct registered_programmer rpgm; + struct registered_master rpgm; if (!pgm->probe || !pgm->read || !pgm->write || !pgm->erase) { msg_perr("%s called with incomplete programmer definition. " Index: flashrom-rename_register_programmer_register_master/nicnatsemi.c =================================================================== --- flashrom-rename_register_programmer_register_master/nicnatsemi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/nicnatsemi.c (Arbeitskopie) @@ -41,7 +41,7 @@ chipaddr addr); static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_nicnatsemi = { +static const struct par_master par_programmer_nicnatsemi = { .chip_readb = nicnatsemi_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -75,7 +75,7 @@ * functions below wants to be 0x0000FFFF. */ max_rom_decode.parallel = 131072; - register_par_programmer(&par_programmer_nicnatsemi, BUS_PARALLEL); + register_par_master(&par_programmer_nicnatsemi, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/dediprog.c =================================================================== --- flashrom-rename_register_programmer_register_master/dediprog.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/dediprog.c (Arbeitskopie) @@ -736,7 +736,7 @@ return millivolt; } -static const struct spi_programmer spi_programmer_dediprog = { +static const struct spi_master spi_programmer_dediprog = { .type = SPI_CONTROLLER_DEDIPROG, .max_data_read = MAX_DATA_UNSPECIFIED, .max_data_write = MAX_DATA_UNSPECIFIED, @@ -854,7 +854,7 @@ return 1; } - register_spi_programmer(&spi_programmer_dediprog); + register_spi_master(&spi_programmer_dediprog); /* RE leftover, leave in until the driver is complete. */ #if 0 Index: flashrom-rename_register_programmer_register_master/rayer_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/rayer_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/rayer_spi.c (Arbeitskopie) @@ -175,7 +175,7 @@ /* Get the initial value before writing to any line. */ lpt_outbyte = INB(lpt_iobase); - if (bitbang_spi_init(&bitbang_spi_master_rayer)) + if (register_spi_bitbang_master(&bitbang_spi_master_rayer)) return 1; return 0; Index: flashrom-rename_register_programmer_register_master/it85spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/it85spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/it85spi.c (Arbeitskopie) @@ -276,7 +276,7 @@ const unsigned char *writearr, unsigned char *readarr); -static const struct spi_programmer spi_programmer_it85xx = { +static const struct spi_master spi_programmer_it85xx = { .type = SPI_CONTROLLER_IT85XX, .max_data_read = 64, .max_data_write = 64, @@ -312,7 +312,7 @@ * a debug message about it. */ /* Set this as SPI controller. */ - register_spi_programmer(&spi_programmer_it85xx); + register_spi_master(&spi_programmer_it85xx); } return ret; } Index: flashrom-rename_register_programmer_register_master/buspirate_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/buspirate_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/buspirate_spi.c (Arbeitskopie) @@ -132,7 +132,7 @@ static int buspirate_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -static const struct spi_programmer spi_programmer_buspirate = { +static const struct spi_master spi_programmer_buspirate = { .type = SPI_CONTROLLER_BUSPIRATE, .max_data_read = 12, .max_data_write = 12, @@ -407,7 +407,7 @@ return 1; } - register_spi_programmer(&spi_programmer_buspirate); + register_spi_master(&spi_programmer_buspirate); return 0; } Index: flashrom-rename_register_programmer_register_master/linux_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/linux_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/linux_spi.c (Arbeitskopie) @@ -46,7 +46,7 @@ static int linux_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -static const struct spi_programmer spi_programmer_linux = { +static const struct spi_master spi_programmer_linux = { .type = SPI_CONTROLLER_LINUX, .max_data_read = MAX_DATA_UNSPECIFIED, /* TODO? */ .max_data_write = MAX_DATA_UNSPECIFIED, /* TODO? */ @@ -115,7 +115,7 @@ return 1; } - register_spi_programmer(&spi_programmer_linux); + register_spi_master(&spi_programmer_linux); return 0; } Index: flashrom-rename_register_programmer_register_master/atahpt.c =================================================================== --- flashrom-rename_register_programmer_register_master/atahpt.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/atahpt.c (Arbeitskopie) @@ -45,7 +45,7 @@ chipaddr addr); static uint8_t atahpt_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_atahpt = { +static const struct par_master par_programmer_atahpt = { .chip_readb = atahpt_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -80,7 +80,7 @@ if (register_shutdown(atahpt_shutdown, NULL)) return 1; - register_par_programmer(&par_programmer_atahpt, BUS_PARALLEL); + register_par_master(&par_programmer_atahpt, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/nic3com.c =================================================================== --- flashrom-rename_register_programmer_register_master/nic3com.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/nic3com.c (Arbeitskopie) @@ -60,7 +60,7 @@ chipaddr addr); static uint8_t nic3com_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_nic3com = { +static const struct par_master par_programmer_nic3com = { .chip_readb = nic3com_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -116,7 +116,7 @@ return 1; max_rom_decode.parallel = 128 * 1024; - register_par_programmer(&par_programmer_nic3com, BUS_PARALLEL); + register_par_master(&par_programmer_nic3com, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/spi.c (Arbeitskopie) @@ -167,9 +167,9 @@ return flash->pgm->spi.write_aai(flash, buf, start, len); } -int register_spi_programmer(const struct spi_programmer *pgm) +int register_spi_master(const struct spi_master *pgm) { - struct registered_programmer rpgm; + struct registered_master rpgm; if (!pgm->write_aai || !pgm->write_256 || !pgm->read || !pgm->command || !pgm->multicommand || Index: flashrom-rename_register_programmer_register_master/ft2232_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/ft2232_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/ft2232_spi.c (Arbeitskopie) @@ -142,7 +142,7 @@ const unsigned char *writearr, unsigned char *readarr); -static const struct spi_programmer spi_programmer_ft2232 = { +static const struct spi_master spi_programmer_ft2232 = { .type = SPI_CONTROLLER_FT2232, .max_data_read = 64 * 1024, .max_data_write = 256, @@ -356,7 +356,7 @@ // msg_pdbg("\nft2232 chosen\n"); - register_spi_programmer(&spi_programmer_ft2232); + register_spi_master(&spi_programmer_ft2232); return 0; Index: flashrom-rename_register_programmer_register_master/satasii.c =================================================================== --- flashrom-rename_register_programmer_register_master/satasii.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/satasii.c (Arbeitskopie) @@ -43,7 +43,7 @@ static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_satasii = { +static const struct par_master par_programmer_satasii = { .chip_readb = satasii_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -90,7 +90,7 @@ if (register_shutdown(satasii_shutdown, NULL)) return 1; - register_par_programmer(&par_programmer_satasii, BUS_PARALLEL); + register_par_master(&par_programmer_satasii, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/wbsio_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/wbsio_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/wbsio_spi.c (Arbeitskopie) @@ -68,7 +68,7 @@ static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -static const struct spi_programmer spi_programmer_wbsio = { +static const struct spi_master spi_programmer_wbsio = { .type = SPI_CONTROLLER_WBSIO, .max_data_read = MAX_DATA_UNSPECIFIED, .max_data_write = MAX_DATA_UNSPECIFIED, @@ -90,7 +90,7 @@ msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is " "1024 kB!\n", __func__); max_rom_decode.spi = 1024 * 1024; - register_spi_programmer(&spi_programmer_wbsio); + register_spi_master(&spi_programmer_wbsio); return 0; } Index: flashrom-rename_register_programmer_register_master/pony_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/pony_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/pony_spi.c (Arbeitskopie) @@ -158,7 +158,7 @@ return 1; } - if (bitbang_spi_init(&bitbang_spi_master_pony)) { + if (register_spi_bitbang_master(&bitbang_spi_master_pony)) { return 1; } return 0; Index: flashrom-rename_register_programmer_register_master/nicintel.c =================================================================== --- flashrom-rename_register_programmer_register_master/nicintel.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/nicintel.c (Arbeitskopie) @@ -48,7 +48,7 @@ chipaddr addr); static uint8_t nicintel_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_nicintel = { +static const struct par_master par_programmer_nicintel = { .chip_readb = nicintel_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -110,7 +110,7 @@ pci_rmmio_writew(0x0001, nicintel_control_bar + CSR_FCR); max_rom_decode.parallel = NICINTEL_MEMMAP_SIZE; - register_par_programmer(&par_programmer_nicintel, BUS_PARALLEL); + register_par_master(&par_programmer_nicintel, BUS_PARALLEL); return 0; Index: flashrom-rename_register_programmer_register_master/sb600spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/sb600spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/sb600spi.c (Arbeitskopie) @@ -194,7 +194,7 @@ return 0; } -static const struct spi_programmer spi_programmer_sb600 = { +static const struct spi_master spi_programmer_sb600 = { .type = SPI_CONTROLLER_SB600, .max_data_read = 8, .max_data_write = 5, @@ -320,7 +320,7 @@ /* Bring the FIFO to a clean state. */ reset_internal_fifo_pointer(); - register_spi_programmer(&spi_programmer_sb600); + register_spi_master(&spi_programmer_sb600); return 0; } Index: flashrom-rename_register_programmer_register_master/mcp6x_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/mcp6x_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/mcp6x_spi.c (Arbeitskopie) @@ -161,7 +161,7 @@ (status >> MCP6X_SPI_GRANT) & 0x1); mcp_gpiostate = status & 0xff; - if (bitbang_spi_init(&bitbang_spi_master_mcp6x)) { + if (register_spi_bitbang_master(&bitbang_spi_master_mcp6x)) { /* This should never happen. */ msg_perr("MCP6X bitbang SPI master init failed!\n"); return 1; Index: flashrom-rename_register_programmer_register_master/programmer.c =================================================================== --- flashrom-rename_register_programmer_register_master/programmer.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/programmer.c (Arbeitskopie) @@ -96,10 +96,10 @@ return; } -int register_par_programmer(const struct par_programmer *pgm, +int register_par_master(const struct par_master *pgm, const enum chipbustype buses) { - struct registered_programmer rpgm; + struct registered_master rpgm; if (!pgm->chip_writeb || !pgm->chip_writew || !pgm->chip_writel || !pgm->chip_writen || !pgm->chip_readb || !pgm->chip_readw || !pgm->chip_readl || !pgm->chip_readn) { @@ -115,20 +115,20 @@ } /* The limit of 4 is totally arbitrary. */ -#define PROGRAMMERS_MAX 4 -struct registered_programmer registered_programmers[PROGRAMMERS_MAX]; -int registered_programmer_count = 0; +#define MASTERS_MAX 4 +struct registered_master registered_masters[MASTERS_MAX]; +int registered_master_count = 0; -/* This function copies the struct registered_programmer parameter. */ -int register_programmer(struct registered_programmer *pgm) +/* This function copies the struct registered_master parameter. */ +int register_programmer(struct registered_master *pgm) { - if (registered_programmer_count >= PROGRAMMERS_MAX) { + if (registered_master_count >= MASTERS_MAX) { msg_perr("Tried to register more than %i programmer " - "interfaces.\n", PROGRAMMERS_MAX); + "interfaces.\n", MASTERS_MAX); return ERROR_FLASHROM_LIMIT; } - registered_programmers[registered_programmer_count] = *pgm; - registered_programmer_count++; + registered_masters[registered_master_count] = *pgm; + registered_master_count++; return 0; } @@ -138,8 +138,8 @@ int i; enum chipbustype ret = BUS_NONE; - for (i = 0; i < registered_programmer_count; i++) - ret |= registered_programmers[i].buses_supported; + for (i = 0; i < registered_master_count; i++) + ret |= registered_masters[i].buses_supported; return ret; } Index: flashrom-rename_register_programmer_register_master/flashrom.c =================================================================== --- flashrom-rename_register_programmer_register_master/flashrom.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/flashrom.c (Arbeitskopie) @@ -949,7 +949,7 @@ return 1; } -int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *flash, int force) +int probe_flash(struct registered_master *pgm, int startchip, struct flashctx *flash, int force) { const struct flashchip *chip; unsigned long base = 0; Index: flashrom-rename_register_programmer_register_master/programmer.h =================================================================== --- flashrom-rename_register_programmer_register_master/programmer.h (Revision 1587) +++ flashrom-rename_register_programmer_register_master/programmer.h (Arbeitskopie) @@ -445,7 +445,7 @@ #endif /* bitbang_spi.c */ -int bitbang_spi_init(const struct bitbang_spi_master *master); +int register_spi_bitbang_master(const struct bitbang_spi_master *master); /* buspirate_spi.c */ #if CONFIG_BUSPIRATE_SPI == 1 @@ -517,7 +517,7 @@ #define MAX_DATA_UNSPECIFIED 0 #define MAX_DATA_READ_UNLIMITED 64 * 1024 #define MAX_DATA_WRITE_UNLIMITED 256 -struct spi_programmer { +struct spi_master { enum spi_controller type; unsigned int max_data_read; unsigned int max_data_write; @@ -538,7 +538,7 @@ int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int register_spi_programmer(const struct spi_programmer *programmer); +int register_spi_master(const struct spi_master *programmer); /* The following enum is needed by ich_descriptor_tool and ich* code. */ enum ich_chipset { @@ -580,7 +580,7 @@ #endif /* opaque.c */ -struct opaque_programmer { +struct opaque_master { int max_data_read; int max_data_write; /* Specific functions for this programmer */ @@ -590,7 +590,7 @@ int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); const void *data; }; -int register_opaque_programmer(const struct opaque_programmer *pgm); +int register_opaque_master(const struct opaque_master *pgm); /* programmer.c */ int noop_shutdown(void); @@ -603,7 +603,7 @@ uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr); uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr); void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); -struct par_programmer { +struct par_master { void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr); void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr); void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr); @@ -614,18 +614,18 @@ void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); const void *data; }; -int register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses); -struct registered_programmer { +int register_par_master(const struct par_master *pgm, const enum chipbustype buses); +struct registered_master { enum chipbustype buses_supported; union { - struct par_programmer par; - struct spi_programmer spi; - struct opaque_programmer opaque; + struct par_master par; + struct spi_master spi; + struct opaque_master opaque; }; }; -extern struct registered_programmer registered_programmers[]; -extern int registered_programmer_count; -int register_programmer(struct registered_programmer *pgm); +extern struct registered_master registered_masters[]; +extern int registered_master_count; +int register_programmer(struct registered_master *pgm); /* serprog.c */ #if CONFIG_SERPROG == 1 -- http://www.hailfinger.org/

3 4

[PATCH] Add IT8212F as programmer
by Kyösti Mälkki 01 Jun '14

01 Jun '14

This PCI PATA controller can use 3V parallel flash upto 128kB. My card was identified as: PCI 1283:8212, subsystem 1283:0001. and labelled as: Innovision Multimedia LTD. EIO ATA133 RAID (DM-8401 Ver A) This particular card did not require setting of any GPIO signals to enable flash writing. My card has Pm39LV512 in PLCC32 package without socket. Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Index: flashrom-it8212f/Makefile =================================================================== --- flashrom-it8212f/Makefile (revision 1539) +++ flashrom-it8212f/Makefile (working copy) @@ -177,7 +177,12 @@ else override CONFIG_SATAMV = no endif +ifeq ($(CONFIG_IT8212), yes) +UNSUPPORTED_FEATURES += CONFIG_IT8212=yes +else +override CONFIG_IT8212 = no endif +endif ifeq ($(TARGET_OS), libpayload) CPPFLAGS += -DSTANDALONE @@ -344,6 +349,9 @@ # Enable Linux spidev interface by default. We disable it on non-Linux targets. CONFIG_LINUX_SPI ?= yes +# Always enable ITE IT8212F PATA controllers for now. +CONFIG_IT8212 ?= yes + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -503,6 +511,12 @@ PROGRAMMER_OBJS += linux_spi.o endif +ifeq ($(CONFIG_IT8212), yes) +FEATURE_CFLAGS += -D'CONFIG_IT8212=1' +PROGRAMMER_OBJS += it8212.o +NEED_PCI := yes +endif + ifeq ($(NEED_SERIAL), yes) LIB_OBJS += serial.o endif Index: flashrom-it8212f/print_wiki.c =================================================================== --- flashrom-it8212f/print_wiki.c (revision 1539) +++ flashrom-it8212f/print_wiki.c (working copy) @@ -338,6 +338,9 @@ #if CONFIG_SATAMV == 1 print_supported_pcidevs_wiki(satas_mv); #endif +#if CONFIG_IT8212 == 1 + print_supported_pcidevs_wiki(ata_it82); +#endif printf("\n|}\n"); } Index: flashrom-it8212f/it8212.c =================================================================== --- flashrom-it8212f/it8212.c (revision 0) +++ flashrom-it8212f/it8212.c (revision 0) @@ -0,0 +1,110 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2011 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include "flash.h" +#include "programmer.h" + +static uint8_t *it8212_bar; +static uint8_t it8212_rom_enable = 0; + +#define PCI_VENDOR_ID_ITE 0x1283 + +const struct pcidev_status ata_it82[] = { + {PCI_VENDOR_ID_ITE, 0x8212, OK, "ITE", "8212F PATA RAID"}, + {}, +}; + +#define IT8212_MEMMAP_SIZE (128 * 1024) +#define IT8212_MEMMAP_MASK (IT8212_MEMMAP_SIZE - 1) + +static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t it8212_chip_readb(const struct flashctx *flash, + const chipaddr addr); +static const struct par_programmer par_programmer_it8212 = { + .chip_readb = it8212_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = it8212_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +static int it8212_shutdown(void *data) +{ + if (! it8212_rom_enable) { + uintptr_t addr = pci_read_long(pcidev_dev, PCI_ROM_ADDRESS); + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, addr & ~0x01); + } + physunmap(it8212_bar, IT8212_MEMMAP_SIZE); + pci_cleanup(pacc); + release_io_perms(); + return 0; +} + +int it8212_init(void) +{ + uintptr_t addr; + + /* Needed only for PCI accesses on some platforms. + * FIXME: Refactor that into get_mem_perms/get_io_perms/get_pci_perms? + */ + get_io_perms(); + + /* No need to check for errors, pcidev_init() will not return in case + * of errors. + */ + addr = pcidev_init(PCI_ROM_ADDRESS, ata_it82); + + it8212_bar = physmap("IT8212F flash", addr, IT8212_MEMMAP_SIZE); + if (it8212_bar == ERROR_PTR) + goto error_out_unmap; + if (register_shutdown(it8212_shutdown, NULL)) + return 1; + + /* To restore ROM BAR enable once we are done. */ + it8212_rom_enable = addr & 0x01; + if (! it8212_rom_enable) + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, addr | 0x01); + + max_rom_decode.parallel = IT8212_MEMMAP_SIZE; + register_par_programmer(&par_programmer_it8212, BUS_PARALLEL); + return 0; + +error_out_unmap: + physunmap(it8212_bar, IT8212_MEMMAP_SIZE); + pci_cleanup(pacc); + release_io_perms(); + return 1; +} + +static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) +{ + pci_mmio_writeb(val, it8212_bar + (addr & IT8212_MEMMAP_MASK)); +} + +static uint8_t it8212_chip_readb(const struct flashctx *flash, + const chipaddr addr) +{ + return pci_mmio_readb(it8212_bar + (addr & IT8212_MEMMAP_MASK)); +} Index: flashrom-it8212f/flashrom.c =================================================================== --- flashrom-it8212f/flashrom.c (revision 1539) +++ flashrom-it8212f/flashrom.c (working copy) @@ -261,6 +261,16 @@ }, #endif +#if CONFIG_IT8212 == 1 + { + .name = "it8212", + .init = it8212_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; Index: flashrom-it8212f/programmer.h =================================================================== --- flashrom-it8212f/programmer.h (revision 1539) +++ flashrom-it8212f/programmer.h (working copy) @@ -87,6 +87,9 @@ #if CONFIG_LINUX_SPI == 1 PROGRAMMER_LINUX_SPI, #endif +#if CONFIG_IT8212 == 1 + PROGRAMMER_IT8212, +#endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -456,6 +459,12 @@ int linux_spi_init(void); #endif +/* it8212.c */ +#if CONFIG_IT8212 == 1 +int it8212_init(void); +extern const struct pcidev_status ata_it82[]; +#endif + /* dediprog.c */ #if CONFIG_DEDIPROG == 1 int dediprog_init(void); Index: flashrom-it8212f/print.c =================================================================== --- flashrom-it8212f/print.c (revision 1539) +++ flashrom-it8212f/print.c (working copy) @@ -538,6 +538,11 @@ programmer_table[PROGRAMMER_LINUX_SPI].name); msg_ginfo("Device files /dev/spidev*.*\n"); #endif +#if CONFIG_IT8212 == 1 + msg_ginfo("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_IT8212].name); + print_supported_pcidevs(ata_it82); +#endif } #if CONFIG_INTERNAL == 1

2 3

[PATCH] CID1130005: Array compared against 0
by Stefan Reinauer 30 May '14

30 May '14

CID1130005: Array compared against 0 The address of an array is never NULL, so the comparison will always evaluate the same way. In selfcheck: Array compared against NULL pointer Since the array is defined unconditionally in C code the check does not really make sense. It might make more sense to check whether there are entries in the array, but that is not required on all platforms so far. Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Index: print.c =================================================================== --- print.c (revision 1763) +++ print.c (working copy) @@ -1073,7 +1073,7 @@ B("ZOTAC", "ZBOX HD-ID11", OK, NULL, NULL), #endif - {0}, + {NULL}, }; /* Please keep this list alphabetically ordered by vendor/board. */ @@ -1101,6 +1101,6 @@ B("Lenovo", "3000 V100 TF05Cxx", OK, "http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3…", NULL), #endif - {0}, + {NULL}, }; #endif Index: flashrom.c =================================================================== --- flashrom.c (revision 1763) +++ flashrom.c (working copy) @@ -1759,24 +1759,6 @@ if (selfcheck_eraseblocks(chip)) ret = 1; -#if CONFIG_INTERNAL == 1 - if (chipset_enables == NULL) { - msg_gerr("Chipset enables table does not exist!\n"); - ret = 1; - } - if (board_matches == NULL) { - msg_gerr("Board enables table does not exist!\n"); - ret = 1; - } - if (boards_known == NULL) { - msg_gerr("Known boards table does not exist!\n"); - ret = 1; - } - if (laptops_known == NULL) { - msg_gerr("Known laptops table does not exist!\n"); - ret = 1; - } -#endif return ret; }

3 13

[PATCH] Unlock ST M50FW002 correctly
by Carl-Daniel Hailfinger 29 May '14

29 May '14

Unlock ST M50FW002 correctly Refactor ST M50 family unlocking TODO: Unify write_lockbits_49fl00x() and unlock_block_stm50() and unlock_w39_fwh_block() and unlock_82802ab() and write_lockbits_block_49lfxxxc(). They all use exactly the same mechanism, but they don't share any code. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-stm50fw002_unlock/flashchips.c =================================================================== --- flashrom-stm50fw002_unlock/flashchips.c (Revision 1437) +++ flashrom-stm50fw002_unlock/flashchips.c (Arbeitskopie) @@ -7523,9 +7523,9 @@ .total_size = 256, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -7536,9 +7536,12 @@ {16 * 1024, 1}, }, .block_erase = erase_block_82802ab, + }, { + .eraseblocks = { {256 * 1024, 1}, }, + .block_erase = NULL, /* Only in A/A mux mode */ } }, - .unlock = unlock_stm50flw0x0x, + .unlock = unlock_stm50fw002, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ Index: flashrom-stm50fw002_unlock/stm50flw0x0x.c =================================================================== --- flashrom-stm50fw002_unlock/stm50flw0x0x.c (Revision 1437) +++ flashrom-stm50fw002_unlock/stm50flw0x0x.c (Arbeitskopie) @@ -3,6 +3,7 @@ * * Copyright (C) 2008 Claus Gindhart <claus.gindhart(a)kontron.com> * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> + * Copyright (C) 2011 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -31,6 +32,21 @@ #include "flashchips.h" #include "chipdrivers.h" +#define STM50_UNLOCKED 0x00 + +static int unlock_block_stm50(struct flashchip *flash, int offset) +{ + chipaddr lock = flash->virtual_registers + offset + 2; + + msg_cdbg("Unlocking at 0x%x\n", offset); + chip_writeb(STM50_UNLOCKED, lock); + if (chip_readb(lock) != STM50_UNLOCKED) { + msg_cerr("Cannot unlock at 0x%x\n", offset); + return -1; + } + return 0; +} + /* * claus.gindhart(a)kontron.com * The ST M50FLW080B and STM50FLW080B chips have to be unlocked, @@ -38,8 +54,6 @@ */ static int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset) { - chipaddr wrprotect = flash->virtual_registers + 2; - static const uint8_t unlock_sector = 0x00; int j; /* @@ -58,22 +72,12 @@ || (offset == 0xF0000)) { // unlock each 4k-sector - for (j = 0; j < 0x10000; j += 0x1000) { - msg_cdbg("unlocking at 0x%x\n", offset + j); - chip_writeb(unlock_sector, wrprotect + offset + j); - if (chip_readb(wrprotect + offset + j) != unlock_sector) { - msg_cerr("Cannot unlock sector @ 0x%x\n", - offset + j); + for (j = 0; j < 0x10000; j += 0x1000) + if (unlock_block_stm50(flash, offset + j)) return -1; - } - } } else { - msg_cdbg("unlocking at 0x%x\n", offset); - chip_writeb(unlock_sector, wrprotect + offset); - if (chip_readb(wrprotect + offset) != unlock_sector) { - msg_cerr("Cannot unlock sector @ 0x%x\n", offset); + if (unlock_block_stm50(flash, offset)) return -1; - } } return 0; @@ -93,6 +97,27 @@ return 0; } +/* FIXME: Should this be moved to a generic walk_unlockregions()? */ +int unlock_stm50fw002(struct flashchip *flash) +{ + static const struct eraseblock unlockregions[4] = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}}; + int i, j; + int addr = 0; + + for (i = 0; i < 4; i++) { + for (j = 0; j < unlockregions[i].count; j++) { + if (unlock_block_stm50(flash, addr)) + return 1; + addr += unlockregions[i].size; + } + } + return 0; +} + /* This function is unused. */ int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int sector, unsigned int sectorsize) { Index: flashrom-stm50fw002_unlock/chipdrivers.h =================================================================== --- flashrom-stm50fw002_unlock/chipdrivers.h (Revision 1437) +++ flashrom-stm50fw002_unlock/chipdrivers.h (Arbeitskopie) @@ -146,5 +146,6 @@ /* stm50flw0x0x.c */ int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize); int unlock_stm50flw0x0x(struct flashchip *flash); +int unlock_stm50fw002(struct flashchip *flash); #endif /* !__CHIPDRIVERS_H__ */ -- http://www.hailfinger.org/

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dlink-dir615 F25L32PA
by chris 28 May '14

28 May '14

Hi i have a bricked router i was using as a test for my new ftdi cable and came across the message that flashrom posted out. thought i would send you the chip details if it helps you expand the flashrom device support. The router fron Dlink uses a Linux kernel firmware and was bricked through the web interface UI update. Anyway it is a ESMT F25L32PA c000x 1014. these are all the numbers on the flash chip.

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[PATCH] CID1129998/1129999: Unchecked return value from library
by Stefan Reinauer 27 May '14

27 May '14

CID1129998/1129999: Unchecked return value from library The function returns a value that indicates an error condition. If this is not checked, the error condition may not be handled correctly. In serialport_write_nonblock: Value returned from a library function is not checked for errors before being used. This value may indicate an error condition. In serialport_config: Value returned from a library function is not checked for errors before being used. This value may indicate an error condition. Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Index: serial.c =================================================================== --- serial.c (revision 1763) +++ serial.c (working copy) @@ -181,7 +181,10 @@ msg_pdbg("Baud rate is %ld.\n", dcb.BaudRate); #else struct termios wanted, observed; - fcntl(fd, F_SETFL, 0); + if (fcntl(fd, F_SETFL, 0) != 0) { + msg_perr_strerror("Could not set serial port mode: "); + return 1; + } if (tcgetattr(fd, &observed) != 0) { msg_perr_strerror("Could not fetch original serial port configuration: "); return 1; @@ -419,14 +422,21 @@ return -1; } if(!SetCommTimeouts(sp_fd, &newTimeout)) { + msg_perr_strerror("Could not set serial port timeout settings: "); + return -1; + } #else ssize_t rv; const int flags = fcntl(sp_fd, F_GETFL); + if (flags == -1) { + msg_perr_strerror("Could not get serial port mode: "); + return -1; + } if (fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK) != 0) { -#endif - msg_perr_strerror("Could not set serial port timeout settings %s"); + msg_perr_strerror("Could not set serial port mode to non-blocking: "); return -1; } +#endif int i; int rd_bytes = 0; @@ -458,12 +468,15 @@ /* restore original blocking behavior */ #ifdef _WIN32 if (!SetCommTimeouts(sp_fd, &oldTimeout)) { + msg_perr_strerror("Could not set serial port timeout settings: "); + ret = -1; + } #else if (fcntl(sp_fd, F_SETFL, flags) != 0) { -#endif - msg_perr_strerror("Could not restore serial port timeout settings: %s\n"); + msg_perr_strerror("Could not set serial port mode to non-blocking: "); ret = -1; } +#endif return ret; } @@ -495,7 +508,14 @@ #else ssize_t rv; const int flags = fcntl(sp_fd, F_GETFL); - fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK); + if (flags == -1) { + msg_perr_strerror("Could not get serial port mode: "); + return -1; + } + if (fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK) != 0) { + msg_perr_strerror("Could not set serial port mode to non-blocking: "); + return -1; + } #endif int i; @@ -531,10 +551,13 @@ #ifdef _WIN32 if (!SetCommTimeouts(sp_fd, &oldTimeout)) { msg_perr_strerror("Could not restore serial port timeout settings: "); + return -1; + } #else if (fcntl(sp_fd, F_SETFL, flags) != 0) { -#endif + msg_perr_strerror("Could not reset serial port mode: "); return -1; } +#endif return ret; }

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[PATCH] CID1130010: Resource leak
by Stefan Reinauer 26 May '14

26 May '14

CID1130010: Resource leak The system resource will not be reclaimed and reused, reducing the future availability of the resource. In verify_range: Leak of memory or pointers to system resources Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Index: flashrom.c =================================================================== --- flashrom.c (revision 1763) +++ flashrom.c (working copy) @@ -676,7 +676,8 @@ if (!flash->chip->read) { msg_cerr("ERROR: flashrom has no read function for this flash chip.\n"); - return 1; + ret = -1; + goto out_free; } if (!readbuf) { msg_gerr("Could not allocate memory!\n");

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AT45DB021D test results with Arduino serprog
by The Raven 15 May '14

15 May '14

Here are the results for the AT45DB021D. It needs the patch from here: http://patchwork.coreboot.org/patch/4107/ Otherwise read (and maybe other functions) ends in a segfault. Probe: ok Read: ok Write: ok Erase: not ok, same problem like AT45DB011D described here: http://www.flashrom.org/pipermail/flashrom/2014-March/012154.html The strange thing is that erase in "write-mode" seems to work, but not stand alone! Why? See attached logs for details. As always, if you need more details or testing -> Just ask for it! :-) ******************************** And maybe i discovered a bug in timecalc with serprog. On some systems i get a corrupt reading. OK (Linux Mint Debian): Calibrating delay loop... OS timer resolution is 2 usecs, 2517M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 997 us, 10000 myus = 9974 us, 8 myus = 9 us, OK. Not OK (Linux Mint 13 Maya): Calibrating delay loop... OS timer resolution is 1 usecs, 1778M loops per second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 984 us, 10000 myus = 9877 us, 4 myus = 4 us, OK. But this is another problem. And maybe it depends on hardware. I have to analyze it deeper to be really sure. THX and Greetings Raven

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Detection of MS-7094 as MS-6702E
by Stelios Tsampas 14 May '14

14 May '14

Flashrom detects MS-7094 (http://www.msi.com/product/mb/K8T-Neo2-F-V2-0.html) as MS-6702E (http://www.msi.com/product/mb/K8T-Neo2-F--FIR.html) Note: flashrom successfully flashed MS-7094 even though it wasn't detected properly but it couldn't flash MS-6702E as it couldn't find a suitable erase command. Edit: Re-attached proper lspci output

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[PATCH] nicintel_eeprom: New programmer for Intel Nics eeproms
by Ricardo Ribalda Delgado 12 May '14

12 May '14

This patch let you read and write the eeprom on your gigagit nic card. So far it has been tested on the 82580 NIC, but there should be other boards also compatibles. It is a nice substitution for the eeupdate tool. Speed is quite decent root@qt5022:~# time ./flashrom -p nicintel_eeprom:pci=03:00.0 -E flashrom v0.9.7-r1622 on Linux 3.11.0-qtec-standard (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found Programmer flash chip "Opaque flash chip" (32 kB, Programmer-specific) on nicintel_eeprom. Erasing and writing flash chip... Erase/write done. real 0m4.699s user 0m4.676s sys 0m0.024s root@qt5022:~# time ./flashrom -p nicintel_eeprom:pci=03:00.0 -w original.kk flashrom v0.9.7-r1622 on Linux 3.11.0-qtec-standard (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found Programmer flash chip "Opaque flash chip" (32 kB, Programmer-specific) on nicintel_eeprom. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFIED. real 0m3.533s user 0m3.516s sys 0m0.018s Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)gmail.com> --- Makefile | 9 ++ flashrom.c | 12 ++ nicintel_eeprom.c | 329 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ programmer.h | 9 ++ 4 files changed, 359 insertions(+) create mode 100644 nicintel_eeprom.c diff --git a/Makefile b/Makefile index 70ef640..e9d5fbf 100644 --- a/Makefile +++ b/Makefile @@ -396,6 +396,9 @@ CONFIG_NICINTEL ?= yes # Always enable SPI on Intel NICs for now. CONFIG_NICINTEL_SPI ?= yes +# Always enable EEPROM on Intel NICs for now. +CONFIG_NICINTEL_EEPROM ?= yes + # Always enable SPI on OGP cards for now. CONFIG_OGP_SPI ?= yes @@ -560,6 +563,12 @@ PROGRAMMER_OBJS += nicintel_spi.o NEED_PCI := yes endif +ifeq ($(CONFIG_NICINTEL_EEPROM), yes) +FEATURE_CFLAGS += -D'CONFIG_NICINTEL_EEPROM=1' +PROGRAMMER_OBJS += nicintel_eeprom.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_OGP_SPI), yes) FEATURE_CFLAGS += -D'CONFIG_OGP_SPI=1' PROGRAMMER_OBJS += ogp_spi.o diff --git a/flashrom.c b/flashrom.c index a00347e..0cb948b 100644 --- a/flashrom.c +++ b/flashrom.c @@ -273,6 +273,18 @@ const struct programmer_entry programmer_table[] = { }, #endif +#if CONFIG_NICINTEL_EEPROM == 1 + { + .name = "nicintel_eeprom", + .type = PCI, + .devs.dev = nics_intel_ee, + .init = nicintel_ee_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + #if CONFIG_OGP_SPI == 1 { .name = "ogp_spi", diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c new file mode 100644 index 0000000..9719c24 --- /dev/null +++ b/nicintel_eeprom.c @@ -0,0 +1,329 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2013 Ricardo Ribalda - Qtechnology A/S + * + * Based on nicinctel_spi.c and ichspi.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * Datasheet: Intel 82580 Quad/Dual Gigabit Ethernet LAN Controller Datasheet + */ + +#include <stdlib.h> +#include <unistd.h> +#include "flash.h" +#include "programmer.h" +#include "hwaccess.h" + +#define PCI_VENDOR_ID_INTEL 0x8086 +#define MEMMAP_SIZE getpagesize() + +/* EEPROM/Flash Control & Data Register */ +#define EECD 0x10 +#define EERD 0x14 + +/* Eeprom Access register bits +* Section 8.4.1 +*/ +#define EE_SCK 0 +#define EE_CS 1 +#define EE_SI 2 +#define EE_SO 3 +#define EE_REQ 6 +#define EE_GNT 7 +#define EE_PRES 8 +#define EE_SIZE 11 +#define EE_SIZE_MASK 0xf + +#define EERD_START 0 +#define EERD_DONE 1 +#define EERD_ADDR 2 +#define EERD_DATA 16 + +#define BIT(x) (1<<x) +#define PAGE_MASK 0x3f + +uint8_t *nicintel_eebar; +struct pci_dev *nicintel_pci; + +#define UNPROG_DEVICE 0x1509 + +const struct dev_entry nics_intel_ee[] = { + {PCI_VENDOR_ID_INTEL, 0x150e, OK, "Intel", "82580 Quad/Dual Gigabit Ethernet LAN Controller"}, + {PCI_VENDOR_ID_INTEL, UNPROG_DEVICE, OK, "Intel", "Unprogrammed 82580 Quad/Dual Gigabit Ethernet LAN Controller"}, + {0}, +}; + +static int nicintel_ee_probe(struct flashctx *flash) +{ + if (nicintel_pci->device_id == UNPROG_DEVICE) + flash->chip->total_size = 16; + else{ + uint32_t tmp; + tmp = pci_mmio_readl(nicintel_eebar + EECD); + tmp = ((tmp >> EE_SIZE) & EE_SIZE_MASK); + switch (tmp) { + case 7: + flash->chip->total_size = 16; + break; + case 8: + flash->chip->total_size = 32; + break; + default: + msg_cerr("Non supported chip size 0x%x\n", tmp); + return 0; + } + } + + flash->chip->page_size = PAGE_MASK + 1; + flash->chip->tested = TEST_OK_PREW; + flash->chip->gran = write_gran_1byte; + flash->chip->block_erasers->eraseblocks[0].size = (PAGE_MASK + 1); + flash->chip->block_erasers->eraseblocks[0].count = + (flash->chip->total_size * 1024) / (PAGE_MASK + 1); + + return 1; +} + +#define RETRIES_EERD 10000000 +static int nicintel_ee_read_word(unsigned int daddr, uint16_t * word) +{ + uint32_t tmp; + int i; + + tmp = BIT(EERD_START) + (daddr << EERD_ADDR); + pci_mmio_writel(tmp, nicintel_eebar + EERD); + + for (i = 0; i < RETRIES_EERD; i++) { + tmp = pci_mmio_readl(nicintel_eebar + EERD); + if (tmp & BIT(EERD_DONE)) { + *word = (tmp >> EERD_DATA) & 0xffff; + return 0; + } + } + + return -1; +} + +static int nicintel_ee_read(struct flashctx *flash, uint8_t * buf, + unsigned int addr, unsigned int len) +{ + uint16_t word; + + if (addr & 1) { + if (nicintel_ee_read_word(addr / 2, &word)) + return -1; + *buf++ = word & 0xff; + addr++; + len--; + } + + while (len) { + if (nicintel_ee_read_word(addr / 2, &word)) + return -1; + *buf++ = word & 0xff; + addr++; + len--; + if (len) { + *buf++ = (word >> 8) & 0xff; + addr++; + len--; + } + } + + return 0; +} + +static int nicintel_ee_bitset(int reg, int bit, int val) +{ + uint32_t tmp; + + tmp = pci_mmio_readl(nicintel_eebar + reg); + if (val) + tmp |= BIT(bit); + else + tmp &= ~BIT(bit); + pci_mmio_writel(tmp, nicintel_eebar + reg); + + return -1; +} + +static int nicintel_ee_byte(uint8_t mosi, uint8_t * miso) +{ + int i; + uint8_t out = 0x0; + + for (i = 7; i >= 0; i--) { + nicintel_ee_bitset(EECD, EE_SI, mosi & BIT(i)); + nicintel_ee_bitset(EECD, EE_SCK, 1); + if (miso) { + uint32_t tmp = pci_mmio_readl(nicintel_eebar + EECD); + if (tmp & BIT(EE_SO)) + out |= BIT(i); + } + nicintel_ee_bitset(EECD, EE_SCK, 0); + } + + if (miso) + *miso = out; + + return 0; +} + +#define OPCODE_RDSR 0x5 +#define RETRIES_RDSR 100 +#define RDSR_WIP 0 +static int nicintel_ee_ready() +{ + int i; + uint8_t rdsr; + + nicintel_ee_bitset(EECD, EE_CS, 0); + nicintel_ee_byte(OPCODE_RDSR, NULL); + for (i = 0; i < RETRIES_RDSR; i++) { + nicintel_ee_byte(0x00, &rdsr); + if (!(rdsr & BIT(RDSR_WIP))) { + nicintel_ee_bitset(EECD, EE_CS, 1); + programmer_delay(1); + return 0; + } + } + + nicintel_ee_bitset(EECD, EE_CS, 1); + programmer_delay(1); + + return -1; +} + +static int nicintel_ee_req() +{ + uint32_t tmp; + nicintel_ee_bitset(EECD, EE_REQ, 1); + + tmp = pci_mmio_readl(nicintel_eebar + EECD); + if (!(tmp & BIT(EE_GNT))) { + msg_perr("Enabling eeprom access failed.\n"); + return 1; + } + + nicintel_ee_bitset(EECD, EE_SCK, 0); + return 0; +} + +#define DELAY_WRITE 1000 +#define OPCODE_WRITE 0x2 +#define OPCODE_WREN 0x6 +static int nicintel_ee_write(struct flashctx *flash, uint8_t * buf, + unsigned int addr, unsigned int len) +{ + if (nicintel_ee_req()) + return -1; + + if (nicintel_ee_ready()) { + nicintel_ee_bitset(EECD, EE_REQ, 0); + return -1; + } + + while (len) { + //wren + nicintel_ee_bitset(EECD, EE_CS, 0); + nicintel_ee_byte(OPCODE_WREN, NULL); + nicintel_ee_bitset(EECD, EE_CS, 1); + programmer_delay(1); + + //data + nicintel_ee_bitset(EECD, EE_CS, 0); + nicintel_ee_byte(OPCODE_WRITE, NULL); + nicintel_ee_byte((addr >> 8) & 0xff, NULL); + nicintel_ee_byte(addr & 0xff, NULL); + while (len) { + nicintel_ee_byte((buf) ? *buf++ : 0xff, NULL); + len--; + addr++; + if (!(addr & PAGE_MASK)) + break; + } + nicintel_ee_bitset(EECD, EE_CS, 1); + programmer_delay(1); + if (nicintel_ee_ready()) { + nicintel_ee_bitset(EECD, EE_REQ, 0); + return -1; + } + } + + nicintel_ee_bitset(EECD, EE_REQ, 0); + return 0; +} + +static int nicintel_ee_erase(struct flashctx *flash, unsigned int addr, + unsigned int len) +{ + return nicintel_ee_write(flash, NULL, addr, len); +} + +static const struct opaque_programmer opaque_programmer_nicintel_ee = { + .probe = nicintel_ee_probe, + .read = nicintel_ee_read, + .write = nicintel_ee_write, + .erase = nicintel_ee_erase, +}; + +static int nicintel_spi_shutdown(void *data) +{ + + /* See the comment about EECD in nicintel_ee_init() for details. */ + + return 0; +} + +int nicintel_ee_init(void) +{ + struct pci_dev *dev = NULL; + uint32_t tmp; + + if (rget_io_perms()) + return 1; + + dev = pcidev_init(nics_intel_ee, PCI_BASE_ADDRESS_0); + if (!dev) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + if (!io_base_addr) + return 1; + + nicintel_eebar = rphysmap("Intel Gigabit NIC w/ SPI EEPROM", + io_base_addr, MEMMAP_SIZE); + nicintel_pci=dev; + /* Automatic restore of EECD on shutdown is not possible because EECD + * does not only contain EE_REQ but other bits with side effects as well. + * Those other bits must be left untouched. + */ + if (dev->device_id != UNPROG_DEVICE) { + tmp = pci_mmio_readl(nicintel_eebar + EECD); + + if (!(tmp & BIT(EE_PRES))) { + msg_perr("EEprom not present.\n"); + return 1; + } + } + + if (register_shutdown(nicintel_spi_shutdown, NULL)) + return 1; + + return register_opaque_programmer(&opaque_programmer_nicintel_ee); +} diff --git a/programmer.h b/programmer.h index f792d9a..dcf9911 100644 --- a/programmer.h +++ b/programmer.h @@ -78,6 +78,9 @@ enum programmer { #if CONFIG_NICINTEL_SPI == 1 PROGRAMMER_NICINTEL_SPI, #endif +#if CONFIG_NICINTEL_EEPROM == 1 + PROGRAMMER_NICINTEL_EEPROM, +#endif #if CONFIG_OGP_SPI == 1 PROGRAMMER_OGP_SPI, #endif @@ -406,6 +409,12 @@ int nicintel_spi_init(void); extern const struct dev_entry nics_intel_spi[]; #endif +/* nicintel_eeprom.c */ +#if CONFIG_NICINTEL_EEPROM == 1 +int nicintel_ee_init(void); +extern const struct dev_entry nics_intel_ee[]; +#endif + /* ogp_spi.c */ #if CONFIG_OGP_SPI == 1 int ogp_spi_init(void); -- 1.8.4.rc3

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flashrom April 2014