flashrom August 2013

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[commit] r1725 - trunk
by repository service 27 Aug '13

27 Aug '13

Author: stefanct Date: Tue Aug 27 20:02:19 2013 New Revision: 1725 URL: http://flashrom.org/trac/flashrom/changeset/1725 Log: Add support for AT45CS1282. This one is even more strange than the AT45DB chips. Like the AT45DB321C it does not support any power-of-2 page sizes. There is only one asymmetrical eraser and that uses two opcodes. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/at45db.c trunk/chipdrivers.h trunk/flashchips.c Modified: trunk/at45db.c ============================================================================== --- trunk/at45db.c Tue Aug 27 20:02:12 2013 (r1724) +++ trunk/at45db.c Tue Aug 27 20:02:19 2013 (r1725) @@ -419,6 +419,47 @@ return at45db_erase(flash, AT45DB_CHIP_ERASE, AT45DB_CHIP_ERASE_ADDR, 500000, 200); } +/* This one is really special and works only for AT45CS1282. It uses two different opcodes depending on the + * address and has an asymmetric layout. */ +int spi_erase_at45cs_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + const unsigned int page_size = flash->chip->page_size; + const unsigned int total_size = flash->chip->total_size * 1024; + const struct block_eraser be = flash->chip->block_erasers[0]; + const unsigned int sec_0a_top = be.eraseblocks[0].size; + const unsigned int sec_0b_top = be.eraseblocks[0].size + be.eraseblocks[1].size; + + if ((addr + blocklen) > total_size) { + msg_cerr("%s: tried to erase a sector beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", + __func__, addr, blocklen, total_size); + return 1; + } + + bool partial_range = false; + uint8_t opcode = 0x7C; /* Used for all but sector 0a. */ + if (addr < sec_0a_top) { + opcode = 0x50; + /* One single sector of 8 pages at address 0. */ + if (addr != 0 || blocklen != (8 * page_size)) + partial_range = true; + } else if (addr < sec_0b_top) { + /* One single sector of 248 pages adjacent to the first. */ + if (addr != sec_0a_top || blocklen != (248 * page_size)) + partial_range = true; + } else { + /* The rest is filled by 63 aligned sectors of 256 pages. */ + if ((addr % (256 * page_size)) != 0 || (blocklen % (256 * page_size)) != 0) + partial_range = true; + } + if (partial_range) { + msg_cerr("%s: cannot erase partial sectors: addr=%u, blocklen=%u\n", __func__, addr, blocklen); + return 1; + } + + /* Needs up to 4 s for completion, so let's wait 20 seconds in 200 ms steps. */ + return at45db_erase(flash, opcode, at45db_convert_addr(addr, page_size), 200000, 100); +} + static int at45db_fill_buffer1(struct flashctx *flash, uint8_t *bytes, unsigned int off, unsigned int len) { const unsigned int page_size = flash->chip->page_size; Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Tue Aug 27 20:02:12 2013 (r1724) +++ trunk/chipdrivers.h Tue Aug 27 20:02:19 2013 (r1725) @@ -121,6 +121,7 @@ int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_erase_at45db_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_erase_at45db_chip(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_erase_at45cs_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen); /* 82802ab.c */ uint8_t wait_82802ab(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Tue Aug 27 20:02:12 2013 (r1724) +++ trunk/flashchips.c Tue Aug 27 20:02:19 2013 (r1725) @@ -2323,11 +2323,26 @@ .total_size = 16896 /* No power of two sizes */, .page_size = 1056 /* No power of two sizes */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, + /* OTP: 128B total, 64B pre-programmed; read 0x77 (4 dummy bytes); write 0x9A (via buffer) */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .write = NULL /* Incompatible Page write */, - .read = NULL /* Incompatible read */, + .block_erasers = + { + { + .eraseblocks = { + {8 * 1056, 1}, /* sector 0a: opcode 50h */ + {248 * 1056, 1}, /* sector 0b: opcode 7Ch */ + {256 * 1056, 63}, /* sectors 1 - 63: opcode 7Ch */ + }, + .block_erase = spi_erase_at45cs_sector, + } + }, + .printlock = spi_prettyprint_status_register_plain, + .gran = write_gran_1056bytes, + .write = spi_write_at45db, + .read = spi_read_at45db, .voltage = {2700, 3600}, },

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[commit] r1724 - trunk
by repository service 27 Aug '13

27 Aug '13

Author: stefanct Date: Tue Aug 27 20:02:12 2013 New Revision: 1724 URL: http://flashrom.org/trac/flashrom/changeset/1724 Log: Add support for AT45DB321C. It seems like this model is one-of-a-kind... it shares some properties with the older versions of the AT45DB series as well as with new ones. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/at45db.c trunk/chipdrivers.h trunk/flashchips.c Modified: trunk/at45db.c ============================================================================== --- trunk/at45db.c Tue Aug 27 20:01:53 2013 (r1723) +++ trunk/at45db.c Tue Aug 27 20:02:12 2013 (r1724) @@ -34,6 +34,7 @@ /* Opcodes */ #define AT45DB_STATUS 0xD7 /* NB: this is a block erase command on most other chips(!). */ #define AT45DB_DISABLE_PROTECT 0x3D, 0x2A, 0x7F, 0x9A +#define AT45DB_READ_ARRAY 0xE8 #define AT45DB_READ_PROTECT 0x32 #define AT45DB_READ_LOCKDOWN 0x35 #define AT45DB_PAGE_ERASE 0x81 @@ -141,6 +142,8 @@ return 1; } + /* AT45DB321C does not support lockdown or a page size of a power of 2... */ + const bool isAT45DB321C = (strcmp(flash->chip->name, "AT45DB321C") == 0); msg_cdbg("Chip status register is 0x%02x\n", status); msg_cdbg("Chip status register: Bit 7 / Ready is %sset\n", (status & AT45DB_READY) ? "" : "not "); msg_cdbg("Chip status register: Bit 6 / Compare match is %sset\n", (status & AT45DB_CMP) ? "" : "not "); @@ -151,12 +154,18 @@ const uint8_t dens = (status >> 3) & 0x7; /* Bit 2 is always 1, we use the other bits only */ msg_cdbg("Chip status register: Density is %u Mb\n", 1 << (dens - 1)); msg_cdbg("Chip status register: Bit 1 / Protection is %sset\n", (status & AT45DB_PROT) ? "" : "not "); - msg_cdbg("Chip status register: Bit 0 / \"Power of 2\" is %sset\n", - (status & AT45DB_POWEROF2) ? "" : "not "); + + if (isAT45DB321C) + spi_prettyprint_status_register_bit(status, 0); + else + msg_cdbg("Chip status register: Bit 0 / \"Power of 2\" is %sset\n", + (status & AT45DB_POWEROF2) ? "" : "not "); + if (status & AT45DB_PROT) at45db_prettyprint_protection_register(flash, AT45DB_READ_PROTECT, "protect"); - at45db_prettyprint_protection_register(flash, AT45DB_READ_LOCKDOWN, "lock"); + if (!isAT45DB321C) + at45db_prettyprint_protection_register(flash, AT45DB_READ_LOCKDOWN, "lock"); return 0; } @@ -258,6 +267,45 @@ return 0; } +/* Legacy continuous read, used where spi_read_at45db() is not available. + * The first 4 (dummy) bytes read need to be discarded. */ +int spi_read_at45db_e8(struct flashctx *flash, uint8_t *buf, unsigned int addr, unsigned int len) +{ + const unsigned int page_size = flash->chip->page_size; + const unsigned int total_size = flash->chip->total_size * 1024; + if ((addr + len) > total_size) { + msg_cerr("%s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u\n", + __func__, addr, len, total_size); + return 1; + } + + /* We have to split this up into chunks to fit within the programmer's read size limit, but those + * chunks can cross page boundaries. */ + const unsigned int max_data_read = flash->pgm->spi.max_data_read; + const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size; + while (addr < len) { + const unsigned int addr_at45 = at45db_convert_addr(addr, page_size); + const unsigned char cmd[] = { + AT45DB_READ_ARRAY, + (addr_at45 >> 16) & 0xff, + (addr_at45 >> 8) & 0xff, + (addr_at45 >> 0) & 0xff + }; + /* We need to leave place for 4 dummy bytes and handle them explicitly. */ + unsigned int chunk = min(max_chunk, len + 4); + uint8_t tmp[chunk]; + int ret = spi_send_command(flash, sizeof(cmd), chunk, cmd, tmp); + if (ret) { + msg_cerr("%s: error sending read command!\n", __func__); + return ret; + } + /* Copy result without dummy bytes into buf and advance address counter respectively. */ + memcpy(buf + addr, tmp + 4, chunk - 4); + addr += chunk - 4; + } + return 0; +} + /* Returns 0 when ready, 1 on errors and timeouts. */ static int at45db_wait_ready (struct flashctx *flash, unsigned int us, unsigned int retries) { Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Tue Aug 27 20:01:53 2013 (r1723) +++ trunk/chipdrivers.h Tue Aug 27 20:02:12 2013 (r1724) @@ -115,6 +115,7 @@ int spi_prettyprint_status_register_at45db(struct flashctx *flash); int spi_disable_blockprotect_at45db(struct flashctx *flash); int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int spi_read_at45db_e8(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int spi_write_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int spi_erase_at45db_page(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Tue Aug 27 20:01:53 2013 (r1723) +++ trunk/flashchips.c Tue Aug 27 20:02:12 2013 (r1724) @@ -2550,11 +2550,37 @@ .total_size = 4224 /* No power of two sizes */, .page_size = 528 /* No power of two sizes */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, + /* OTP: 128B total, 64B pre-programmed; read 0x77 (4 dummy bytes); write 0x9A (via buffer) */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL /* Incompatible read */, + .block_erasers = + { + { + .eraseblocks = { {528, 8192} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 528, 8192/8} }, + .block_erase = spi_erase_at45db_block, + }, /* Although the datasheets describes sectors (which can be write protected) + * there seems to be no erase functions for them. + { + .eraseblocks = { + {8 * 528, 1}, + {120 * 528, 1}, + {128 * 528, 63}, + }, + .block_erase = spi_erase_at45db_sector + }, */ { + .eraseblocks = { {4224 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .printlock = spi_prettyprint_status_register_at45db, /* Bit 0 is undefined, no lockdown */ + .gran = write_gran_528bytes, + .write = spi_write_at45db, + .read = spi_read_at45db_e8, /* 3 address and 4 dummy bytes */ .voltage = {2700, 3600}, },

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[commit] r1723 - trunk
by repository service 27 Aug '13

27 Aug '13

Author: stefanct Date: Tue Aug 27 20:01:53 2013 New Revision: 1723 URL: http://flashrom.org/trac/flashrom/changeset/1723 Log: Add support for Atmel AT45DB* chips. Signed-off-by: Aidan Thornton <makosoft(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Added: trunk/at45db.c (contents, props changed) Modified: trunk/Makefile trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h trunk/serprog.c trunk/spi25_statusreg.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sun Aug 25 15:31:43 2013 (r1722) +++ trunk/Makefile Tue Aug 27 20:01:53 2013 (r1723) @@ -317,7 +317,7 @@ CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ - opaque.o sfdp.o en29lv640b.o + opaque.o sfdp.o en29lv640b.o at45db.o ############################################################################### # Library code. Added: trunk/at45db.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/at45db.c Tue Aug 27 20:01:53 2013 (r1723) @@ -0,0 +1,473 @@ +/* + * Support for Atmel AT45DB series DataFlash chips. + * This file is part of the flashrom project. + * + * Copyright (C) 2012 Aidan Thornton + * Copyright (C) 2013 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include "flash.h" +#include "chipdrivers.h" +#include "programmer.h" +#include "spi.h" + +/* Status register bits */ +#define AT45DB_READY (1<<7) +#define AT45DB_CMP (1<<6) +#define AT45DB_PROT (1<<1) +#define AT45DB_POWEROF2 (1<<0) + +/* Opcodes */ +#define AT45DB_STATUS 0xD7 /* NB: this is a block erase command on most other chips(!). */ +#define AT45DB_DISABLE_PROTECT 0x3D, 0x2A, 0x7F, 0x9A +#define AT45DB_READ_PROTECT 0x32 +#define AT45DB_READ_LOCKDOWN 0x35 +#define AT45DB_PAGE_ERASE 0x81 +#define AT45DB_BLOCK_ERASE 0x50 +#define AT45DB_SECTOR_ERASE 0x7C +#define AT45DB_CHIP_ERASE 0xC7 +#define AT45DB_CHIP_ERASE_ADDR 0x94809A /* Magic address. See usage. */ +#define AT45DB_BUFFER1_WRITE 0x84 +#define AT45DB_BUFFER1_PAGE_PROGRAM 0x88 +/* Buffer 2 is unused yet. +#define AT45DB_BUFFER2_WRITE 0x87 +#define AT45DB_BUFFER2_PAGE_PROGRAM 0x89 +*/ + +static uint8_t at45db_read_status_register(struct flashctx *flash, uint8_t *status) +{ + static const uint8_t cmd[] = { AT45DB_STATUS }; + + int ret = spi_send_command(flash, sizeof(cmd), 1, cmd, status); + if (ret != 0) + msg_cerr("Reading the status register failed!\n"); + else + msg_cspew("Status register: 0x%02x.\n", *status); + return ret; +} + +int spi_disable_blockprotect_at45db(struct flashctx *flash) +{ + static const uint8_t cmd[4] = { AT45DB_DISABLE_PROTECT }; /* NB: 4 bytes magic number */ + int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); + if (ret != 0) { + msg_cerr("Sending disable lockdown failed!\n"); + return ret; + } + uint8_t status; + ret = at45db_read_status_register(flash, &status); + if (ret != 0 || ((status & AT45DB_PROT) != 0)) { + msg_cerr("Disabling lockdown failed!\n"); + return 1; + } + + return 0; +} + +static unsigned int at45db_get_sector_count(struct flashctx *flash) +{ + unsigned int i, j; + unsigned int cnt = 0; + for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { + if (flash->chip->block_erasers[i].block_erase == &spi_erase_at45db_sector) { + for (j = 0; j < NUM_ERASEREGIONS; j++) { + cnt += flash->chip->block_erasers[i].eraseblocks[j].count; + } + } + } + msg_cspew("%s: number of sectors=%u\n", __func__, cnt); + return cnt; +} + +/* Reads and prettyprints protection/lockdown registers. + * Some elegance of the printouts had to be cut down a bit to share this code. */ +static uint8_t at45db_prettyprint_protection_register(struct flashctx *flash, uint8_t opcode, const char *regname) +{ + const uint8_t cmd[] = { opcode, 0, 0, 0 }; + /* The first two sectors share the first result byte. */ + uint8_t buf[at45db_get_sector_count(flash) - 1]; + + int ret = spi_send_command(flash, sizeof(cmd), sizeof(buf), cmd, buf); + if (ret != 0) { + msg_cerr("Reading the %s register failed!\n", regname); + return ret; + } + + unsigned int i; + for (i = 0; i < sizeof(buf); i++) { + if (buf[i] != 0x00) + break; + if (i == sizeof(buf) - 1) { + msg_cdbg("No Sector is %sed.\n", regname); + return 0; + } + } + + /* TODO: print which addresses are mapped to (un)locked sectors. */ + msg_cdbg("Sector 0a is %s%sed.\n", ((buf[0] & 0xC0) == 0x00) ? "un" : "", regname); + msg_cdbg("Sector 0b is %s%sed.\n", ((buf[0] & 0x30) == 0x00) ? "un" : "", regname); + for (i = 1; i < sizeof(buf); i++) + msg_cdbg("Sector %2u is %s%sed.\n", i, (buf[i] == 0x00) ? "un" : "", regname); + + return 0; +} + +/* bit 7: busy flag + * bit 6: memory/buffer compare result + * bit 5-2: density (encoding see below) + * bit 1: protection enabled (soft or hard) + * bit 0: "power of 2" page size indicator (e.g. 1 means 256B; 0 means 264B) + * + * 5-2 encoding: bit 2 is always 1, bits 3-5 encode the density as "2^(bits - 1)" in Mb e.g.: + * AT45DB161D 1011 16Mb */ +int spi_prettyprint_status_register_at45db(struct flashctx *flash) +{ + uint8_t status; + if (at45db_read_status_register(flash, &status) != 0) { + return 1; + } + + msg_cdbg("Chip status register is 0x%02x\n", status); + msg_cdbg("Chip status register: Bit 7 / Ready is %sset\n", (status & AT45DB_READY) ? "" : "not "); + msg_cdbg("Chip status register: Bit 6 / Compare match is %sset\n", (status & AT45DB_CMP) ? "" : "not "); + spi_prettyprint_status_register_bit(status, 5); + spi_prettyprint_status_register_bit(status, 4); + spi_prettyprint_status_register_bit(status, 3); + spi_prettyprint_status_register_bit(status, 2); + const uint8_t dens = (status >> 3) & 0x7; /* Bit 2 is always 1, we use the other bits only */ + msg_cdbg("Chip status register: Density is %u Mb\n", 1 << (dens - 1)); + msg_cdbg("Chip status register: Bit 1 / Protection is %sset\n", (status & AT45DB_PROT) ? "" : "not "); + msg_cdbg("Chip status register: Bit 0 / \"Power of 2\" is %sset\n", + (status & AT45DB_POWEROF2) ? "" : "not "); + if (status & AT45DB_PROT) + at45db_prettyprint_protection_register(flash, AT45DB_READ_PROTECT, "protect"); + + at45db_prettyprint_protection_register(flash, AT45DB_READ_LOCKDOWN, "lock"); + + return 0; +} + +/* Probe function for AT45DB* chips that support multiple page sizes. */ +int probe_spi_at45db(struct flashctx *flash) +{ + uint8_t status; + struct flashchip *chip = flash->chip; + + if (!probe_spi_rdid(flash)) + return 0; + + /* Some AT45DB* chips support two different page sizes each (e.g. 264 and 256 B). In order to tell which + * page size this chip has we need to read the status register. */ + if (at45db_read_status_register(flash, &status) != 0) + return 0; + + /* We assume sane power-of-2 page sizes and adjust the chip attributes in case this is not the case. */ + if ((status & AT45DB_POWEROF2) == 0) { + chip->total_size = (chip->total_size / 32) * 33; + chip->page_size = (chip->page_size / 32) * 33; + + unsigned int i, j; + for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { + struct block_eraser *eraser = &chip->block_erasers[i]; + for (j = 0; j < NUM_ERASEREGIONS; j++) { + eraser->eraseblocks[j].size = (eraser->eraseblocks[j].size / 32) * 33; + } + } + } + + switch (chip->page_size) { + case 256: chip->gran = write_gran_256bytes; break; + case 264: chip->gran = write_gran_264bytes; break; + case 512: chip->gran = write_gran_512bytes; break; + case 528: chip->gran = write_gran_528bytes; break; + case 1024: chip->gran = write_gran_1024bytes; break; + case 1056: chip->gran = write_gran_1056bytes; break; + default: + msg_cerr("%s: unknown page size %d.\n", __func__, chip->page_size); + return 0; + } + + msg_cdbg2("%s: total size %i kB, page size %i B\n", __func__, chip->total_size * 1024, chip->page_size); + + return 1; +} + +/* Returns the minimum number of bits needed to represent the given address. + * FIXME: use mind-blowing implementation. + * FIXME: move to utility module. */ +static uint32_t address_to_bits(uint32_t addr) +{ + unsigned int lzb = 0; + while (((1 << (31 - lzb)) & ~addr) != 0) + lzb++; + return 32 - lzb; +} + +/* In case of non-power-of-two page sizes we need to convert the address flashrom uses to the address the + * DataFlash chips use. The latter uses a segmented address space where the page address is encoded in the + * more significant bits and the offset within the page is encoded in the less significant bits. The exact + * partition depends on the page size. + */ +static unsigned int at45db_convert_addr(unsigned int addr, unsigned int page_size) +{ + unsigned int page_bits = address_to_bits(page_size - 1); + unsigned int at45db_addr = ((addr / page_size) << page_bits) | (addr % page_size); + msg_cspew("%s: addr=0x%x, page_size=%u, page_bits=%u -> at45db_addr=0x%x\n", + __func__, addr, page_size, page_bits, at45db_addr); + return at45db_addr; +} + +int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int addr, unsigned int len) +{ + const unsigned int page_size = flash->chip->page_size; + const unsigned int total_size = flash->chip->total_size * 1024; + if ((addr + len) > total_size) { + msg_cerr("%s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u\n", + __func__, addr, len, total_size); + return 1; + } + + /* We have to split this up into chunks to fit within the programmer's read size limit, but those + * chunks can cross page boundaries. */ + const unsigned int max_data_read = flash->pgm->spi.max_data_read; + const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size; + while (addr < len) { + unsigned int chunk = min(max_chunk, len); + int ret = spi_nbyte_read(flash, at45db_convert_addr(addr, page_size), buf + addr, chunk); + if (ret) { + msg_cerr("%s: error sending read command!\n", __func__); + return ret; + } + addr += chunk; + } + + return 0; +} + +/* Returns 0 when ready, 1 on errors and timeouts. */ +static int at45db_wait_ready (struct flashctx *flash, unsigned int us, unsigned int retries) +{ + while (true) { + uint8_t status; + int ret = at45db_read_status_register(flash, &status); + if ((status & AT45DB_READY) == AT45DB_READY) + return 0; + if (ret != 0 || retries-- == 0) + return 1; + programmer_delay(us); + } +} + +static int at45db_erase(struct flashctx *flash, uint8_t opcode, unsigned int at45db_addr, unsigned int stepsize, unsigned int retries) +{ + const uint8_t cmd[] = { + opcode, + (at45db_addr >> 16) & 0xff, + (at45db_addr >> 8) & 0xff, + (at45db_addr >> 0) & 0xff + }; + + /* Send erase command. */ + int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); + if (ret != 0) { + msg_cerr("%s: error sending erase command!\n", __func__); + return ret; + } + + /* Wait for completion. */ + ret = at45db_wait_ready(flash, stepsize, retries); + if (ret != 0) + msg_cerr("%s: chip did not became ready again after sending the erase command!\n", __func__); + + return ret; +} + +int spi_erase_at45db_page(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + const unsigned int page_size = flash->chip->page_size; + const unsigned int total_size = flash->chip->total_size * 1024; + + if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { + msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); + return 1; + } + + if ((addr + blocklen) > total_size) { + msg_cerr("%s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", + __func__, addr, blocklen, total_size); + return 1; + } + + /* Needs typically about 35 ms for completion, so let's wait 100 ms in 500 us steps. */ + return at45db_erase(flash, AT45DB_PAGE_ERASE, at45db_convert_addr(addr, page_size), 500, 200); +} + +int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + const unsigned int page_size = flash->chip->page_size; + const unsigned int total_size = flash->chip->total_size * 1024; + + if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { // FIXME: should check blocks not pages + msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); + return 1; + } + + if ((addr + blocklen) > total_size) { + msg_cerr("%s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", + __func__, addr, blocklen, total_size); + return 1; + } + + /* Needs typically between 20 and 100 ms for completion, so let's wait 300 ms in 1 ms steps. */ + return at45db_erase(flash, AT45DB_BLOCK_ERASE, at45db_convert_addr(addr, page_size), 1000, 300); +} + +int spi_erase_at45db_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + const unsigned int page_size = flash->chip->page_size; + const unsigned int total_size = flash->chip->total_size * 1024; + + if ((addr % page_size) != 0 || (blocklen % page_size) != 0) { // FIXME: should check sectors not pages + msg_cerr("%s: cannot erase partial pages: addr=%u, blocklen=%u\n", __func__, addr, blocklen); + return 1; + } + + if ((addr + blocklen) > total_size) { + msg_cerr("%s: tried to erase a sector beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", + __func__, addr, blocklen, total_size); + return 1; + } + + /* Needs typically about 5 s for completion, so let's wait 20 seconds in 200 ms steps. */ + return at45db_erase(flash, AT45DB_SECTOR_ERASE, at45db_convert_addr(addr, page_size), 200000, 100); +} + +int spi_erase_at45db_chip(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + const unsigned int total_size = flash->chip->total_size * 1024; + + if ((addr + blocklen) > total_size) { + msg_cerr("%s: tried to erase beyond flash boundary: addr=%u, blocklen=%u, size=%u\n", + __func__, addr, blocklen, total_size); + return 1; + } + + /* Needs typically from about 5 to over 60 s for completion, so let's wait 100 s in 500 ms steps. + * NB: the address is not a real address but a magic number. This hack allows to share code. */ + return at45db_erase(flash, AT45DB_CHIP_ERASE, AT45DB_CHIP_ERASE_ADDR, 500000, 200); +} + +static int at45db_fill_buffer1(struct flashctx *flash, uint8_t *bytes, unsigned int off, unsigned int len) +{ + const unsigned int page_size = flash->chip->page_size; + if ((off + len) > page_size) { + msg_cerr("Tried to write %u bytes at offset %u into a buffer of only %u B.\n", + len, off, page_size); + return 1; + } + + /* Create a suitable buffer to store opcode, address and data chunks for buffer1. */ + const unsigned int max_data_write = flash->pgm->spi.max_data_write; + const unsigned int max_chunk = (max_data_write > 0 && max_data_write <= page_size) ? + max_data_write : page_size; + uint8_t buf[4 + max_chunk]; + + buf[0] = AT45DB_BUFFER1_WRITE; + while (off < page_size) { + unsigned int cur_chunk = min(max_chunk, page_size - off); + buf[1] = (off >> 16) & 0xff; + buf[2] = (off >> 8) & 0xff; + buf[3] = (off >> 0) & 0xff; + memcpy(&buf[4], bytes + off, cur_chunk); + int ret = spi_send_command(flash, 4 + cur_chunk, 0, buf, NULL); + if (ret != 0) { + msg_cerr("%s: error sending buffer write!\n", __func__); + return ret; + } + off += cur_chunk; + } + return 0; +} + +static int at45db_commit_buffer1(struct flashctx *flash, unsigned int at45db_addr) +{ + const uint8_t cmd[] = { + AT45DB_BUFFER1_PAGE_PROGRAM, + (at45db_addr >> 16) & 0xff, + (at45db_addr >> 8) & 0xff, + (at45db_addr >> 0) & 0xff + }; + + /* Send buffer to device. */ + int ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); + if (ret != 0) { + msg_cerr("%s: error sending buffer to main memory command!\n", __func__); + return ret; + } + + /* Wait for completion (typically a few ms). */ + ret = at45db_wait_ready(flash, 250, 200); // 50 ms + if (ret != 0) { + msg_cerr("%s: chip did not became ready again!\n", __func__); + return ret; + } + + return 0; +} + +static int at45db_program_page(struct flashctx *flash, uint8_t *buf, unsigned int at45db_addr) +{ + int ret = at45db_fill_buffer1(flash, buf, 0, flash->chip->page_size); + if (ret != 0) { + msg_cerr("%s: filling the buffer failed!\n", __func__); + return ret; + } + + ret = at45db_commit_buffer1(flash, at45db_addr); + if (ret != 0) { + msg_cerr("%s: committing page failed!\n", __func__); + return ret; + } + + return 0; +} + +int spi_write_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) +{ + const unsigned int page_size = flash->chip->page_size; + const unsigned int total_size = flash->chip->total_size; + + if ((start % page_size) != 0 || (len % page_size) != 0) { + msg_cerr("%s: cannot write partial pages: start=%u, len=%u\n", __func__, start, len); + return 1; + } + + if ((start + len) > (total_size * 1024)) { + msg_cerr("%s: tried to write beyond flash boundary: start=%u, len=%u, size=%u\n", + __func__, start, len, total_size); + return 1; + } + + unsigned int i; + for (i = 0; i < len; i += page_size) { + if (at45db_program_page(flash, buf + i, at45db_convert_addr(start + i, page_size)) != 0) { + msg_cerr("Writing page %u failed!\n", i); + return 1; + } + } + return 0; +} Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Sun Aug 25 15:31:43 2013 (r1722) +++ trunk/chipdrivers.h Tue Aug 27 20:01:53 2013 (r1723) @@ -64,6 +64,7 @@ /* spi25_statusreg.c */ uint8_t spi_read_status_register(struct flashctx *flash); int spi_write_status_register(struct flashctx *flash, int status); +void spi_prettyprint_status_register_bit(uint8_t status, int bit); int spi_prettyprint_status_register_plain(struct flashctx *flash); int spi_prettyprint_status_register_default_welwip(struct flashctx *flash); int spi_prettyprint_status_register_default_bp1(struct flashctx *flash); @@ -109,6 +110,17 @@ int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); +/* at45db.c */ +int probe_spi_at45db(struct flashctx *flash); +int spi_prettyprint_status_register_at45db(struct flashctx *flash); +int spi_disable_blockprotect_at45db(struct flashctx *flash); +int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int spi_write_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int spi_erase_at45db_page(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_erase_at45db_sector(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_erase_at45db_chip(struct flashctx *flash, unsigned int addr, unsigned int blocklen); + /* 82802ab.c */ uint8_t wait_82802ab(struct flashctx *flash); int probe_82802ab(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Aug 25 15:31:43 2013 (r1722) +++ trunk/flashchips.c Tue Aug 27 20:01:53 2013 (r1723) @@ -2337,14 +2337,39 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB011D, - .total_size = 128 /* Size can only be determined from status register */, - .page_size = 256 /* Size can only be determined from status register */, + .total_size = 128 /* or 132, determined from status register */, + .page_size = 256 /* or 264, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, + .block_erasers = + { + { + .eraseblocks = { {256, 512} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 256, 512/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 256, 1}, + {120 * 256, 1}, + {128 * 256, 3}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, }, @@ -2354,14 +2379,39 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB021D, - .total_size = 256 /* Size can only be determined from status register */, - .page_size = 256 /* Size can only be determined from status register */, + .total_size = 256 /* or 264, determined from status register */, + .page_size = 256 /* or 264, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, + .block_erasers = + { + { + .eraseblocks = { {256, 1024} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 256, 1024/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 256, 1}, + {120 * 256, 1}, + {128 * 256, 7}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, }, @@ -2371,15 +2421,40 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB041D, - .total_size = 512 /* Size can only be determined from status register */, - .page_size = 256 /* Size can only be determined from status register */, + .total_size = 512 /* or 528, determined from status register */, + .page_size = 256 /* or 264, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, - .voltage = {2500, 3600}, /* 2.5-3.6V & 2.7-3.6V models available */ + .block_erasers = + { + { + .eraseblocks = { {256, 2048} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 256, 2048/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 256, 1}, + {248 * 256, 1}, + {256 * 256, 7}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, /* 2.5-3.6V & 2.7-3.6V models available */ }, { @@ -2388,14 +2463,39 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB081D, - .total_size = 1024 /* Size can only be determined from status register */, - .page_size = 256 /* Size can only be determined from status register */, + .total_size = 1024 /* or 1056, determined from status register */, + .page_size = 256 /* or 264, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, + .block_erasers = + { + { + .eraseblocks = { {256, 4096} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 256, 4096/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 256, 1}, + {248 * 256, 1}, + {256 * 256, 15}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, /* 2.5-3.6V & 2.7-3.6V models available */ }, @@ -2405,14 +2505,39 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB161D, - .total_size = 2048 /* Size can only be determined from status register */, - .page_size = 512 /* Size can only be determined from status register */, + .total_size = 2048 /* or 2112, determined from status register */, + .page_size = 512 /* or 528, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, + .block_erasers = + { + { + .eraseblocks = { {512, 4096} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 512, 4096/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 512, 1}, + {248 * 512, 1}, + {256 * 512, 15}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {2048 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, /* 2.5-3.6V & 2.7-3.6V models available */ }, @@ -2439,17 +2564,82 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB321D, - .total_size = 4096 /* Size can only be determined from status register */, - .page_size = 512 /* Size can only be determined from status register */, + .total_size = 4096 /* or 4224, determined from status register */, + .page_size = 512 /* or 528, determined from status register */, + /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {512, 8192} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 512, 8192/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 512, 1}, + {120 * 512, 1}, + {128 * 512, 63}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {4096 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, /* 2.5-3.6V & 2.7-3.6V models available */ + }, + + { + .vendor = "Atmel", + .name = "AT45DB321E", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT45DB321C, + .total_size = 4096 /* or 4224, determined from status register */, + .page_size = 512 /* or 528, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ .feature_bits = FEATURE_OTP, - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, - .voltage = {2700, 3600}, + .block_erasers = + { + { + .eraseblocks = { {512, 8192} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 512, 8192/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 512, 1}, + {120 * 512, 1}, + {128 * 512, 63}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {4096 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ + .printlock = spi_prettyprint_status_register_at45db, /* has a 2nd status register */ + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* Fast read (0x0B) supported */ + .voltage = {2500, 3600}, /* 2.3-3.6V & 2.5-3.6V models available */ }, { @@ -2458,14 +2648,39 @@ .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT45DB642D, - .total_size = 8192 /* Size can only be determined from status register */, - .page_size = 1024 /* Size can only be determined from status register */, + .total_size = 8192 /* or 8448, determined from status register */, + .page_size = 1024 /* or 1056, determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_REW, - .probe = probe_spi_rdid, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_at45db, .probe_timing = TIMING_ZERO, - .write = NULL, - .read = NULL, + .block_erasers = + { + { + .eraseblocks = { {1024, 8192} }, + .block_erase = spi_erase_at45db_page, + }, { + .eraseblocks = { {8 * 1024, 8192/8} }, + .block_erase = spi_erase_at45db_block, + }, { + .eraseblocks = { + {8 * 1024, 1}, + {248 * 1024, 1}, + {256 * 1024, 31}, + }, + .block_erase = spi_erase_at45db_sector + }, { + .eraseblocks = { {8192 * 1024, 1} }, + .block_erase = spi_erase_at45db_chip, + } + }, + .unlock = spi_disable_blockprotect_at45db, /* Impossible if locked down or #WP is low */ + .printlock = spi_prettyprint_status_register_at45db, + /* granularity will be set by the probing function. */ + .write = spi_write_at45db, + .read = spi_read_at45db, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, }, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun Aug 25 15:31:43 2013 (r1722) +++ trunk/flashchips.h Tue Aug 27 20:01:53 2013 (r1723) @@ -167,24 +167,25 @@ #define ATMEL_AT45D041A /* No ID available */ #define ATMEL_AT45D081A /* No ID available */ #define ATMEL_AT45D161 /* No ID available */ -#define ATMEL_AT45DB011 /* No ID available */ -#define ATMEL_AT45DB011B /* No ID available */ +#define ATMEL_AT45DB011 /* No ID (opcode) available for AT45DB011, AT45DB011B */ #define ATMEL_AT45DB011D 0x2200 -#define ATMEL_AT45DB021A /* No ID available */ -#define ATMEL_AT45DB021B /* No ID available */ +#define ATMEL_AT45DB021 /* No ID (opcode) available for AT45DB021, AT45DB021A, AT45DB021B */ #define ATMEL_AT45DB021D 0x2300 -#define ATMEL_AT45DB041A /* No ID available */ +#define ATMEL_AT45DB021E /* same as above but with EDI 0x0100 */ +#define ATMEL_AT45DB041 /* No ID (opcode) available for AT45DB041, AT45DB041A, AT45DB041B */ #define ATMEL_AT45DB041D 0x2400 -#define ATMEL_AT45DB081A /* No ID available */ +#define ATMEL_AT45DB041E /* same as above but with EDI 0x0100 */ +#define ATMEL_AT45DB081 /* No ID (opcode) available for AT45DB081, AT45DB081A, AT45DB081B */ #define ATMEL_AT45DB081D 0x2500 -#define ATMEL_AT45DB161 /* No ID available */ -#define ATMEL_AT45DB161B /* No ID available */ +#define ATMEL_AT45DB081E /* same as above but with EDI 0x0100 */ +#define ATMEL_AT45DB161 /* No ID (opcode) available for AT45DB161, AT45DB161B */ #define ATMEL_AT45DB161D 0x2600 -#define ATMEL_AT45DB321 /* No ID available */ -#define ATMEL_AT45DB321B /* No ID available */ +#define ATMEL_AT45DB161E /* same as above but with EDI 0x0100 */ +#define ATMEL_AT45DB321 /* No ID (opcode) available for AT45DB321, AT45DB321B */ #define ATMEL_AT45DB321C 0x2700 +#define ATMEL_AT45DB321E /* same as above but with EDI 0x0100 */ #define ATMEL_AT45DB321D 0x2701 /* Buggy data sheet */ -#define ATMEL_AT45DB642 /* No ID available */ +#define ATMEL_AT45DB642 /* No ID (opcode) available for AT45DB642 */ #define ATMEL_AT45DB642D 0x2800 #define ATMEL_AT49BV512 0x03 #define ATMEL_AT49F002N 0x07 /* for AT49F002(N) */ Modified: trunk/serprog.c ============================================================================== --- trunk/serprog.c Sun Aug 25 15:31:43 2013 (r1722) +++ trunk/serprog.c Tue Aug 27 20:01:53 2013 (r1723) @@ -922,8 +922,7 @@ /* FIXME: This function is optimized so that it does not split each transaction * into chip page_size long blocks unnecessarily like spi_read_chunked. This has * the advantage that it is much faster for most chips, but breaks those with - * non-contiguous address space (like AT45DB161D). When spi_read_chunked is - * fixed this method can be removed. */ + * non-continuous reads. When spi_read_chunked is fixed this method can be removed. */ static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Sun Aug 25 15:31:43 2013 (r1722) +++ trunk/spi25_statusreg.c Tue Aug 27 20:01:53 2013 (r1723) @@ -270,7 +270,7 @@ } /* Unnamed bits. */ -static void spi_prettyprint_status_register_bit(uint8_t status, int bit) +void spi_prettyprint_status_register_bit(uint8_t status, int bit) { msg_cdbg("Chip status register: Bit %i is %sset\n", bit, (status & (1 << bit)) ? "" : "not "); }

1 0

[PATCH] Enable sector erase function for selected ST M50 chips.
by Stefan Tauner 27 Aug '13

27 Aug '13

Affected chips: M50FLW040A, M50FLW040B, M50FLW080A, M50FLW080B. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- flashchips.c | 8 ++++---- stm50.c | 24 ++++++++++++++++++------ 2 files changed, 22 insertions(+), 10 deletions(-) diff --git a/flashchips.c b/flashchips.c index b83f32c..9c688e6 100644 --- a/flashchips.c +++ b/flashchips.c @@ -10766,7 +10766,7 @@ const struct flashchip flashchips[] = { {4 * 1024, 16}, /* sector */ {4 * 1024, 16}, /* sector */ }, - .block_erase = NULL, + .block_erase = erase_sector_stm50, }, { .eraseblocks = { {64 * 1024, 8}, }, .block_erase = erase_block_82802ab, @@ -10799,7 +10799,7 @@ const struct flashchip flashchips[] = { {64 * 1024, 5}, /* block */ {4 * 1024, 16}, /* sector */ }, - .block_erase = NULL, + .block_erase = erase_sector_stm50, }, { .eraseblocks = { {64 * 1024, 8}, }, .block_erase = erase_block_82802ab, @@ -10832,7 +10832,7 @@ const struct flashchip flashchips[] = { {4 * 1024, 16}, /* sector */ {4 * 1024, 16}, /* sector */ }, - .block_erase = NULL, + .block_erase = erase_sector_stm50, }, { .eraseblocks = { {64 * 1024, 16}, }, .block_erase = erase_block_82802ab, @@ -10865,7 +10865,7 @@ const struct flashchip flashchips[] = { {64 * 1024, 13}, /* block */ {4 * 1024, 16}, /* sector */ }, - .block_erase = NULL, + .block_erase = erase_sector_stm50, }, { .eraseblocks = { {64 * 1024, 16}, }, .block_erase = erase_block_82802ab, diff --git a/stm50.c b/stm50.c index f6c30a9..7e77e09 100644 --- a/stm50.c +++ b/stm50.c @@ -83,10 +83,9 @@ int unlock_stm50_uniform(struct flashctx *flash) return 0; } -/* This function is unused. */ -int erase_sector_stm50(struct flashctx *flash, unsigned int sector, unsigned int sectorsize) +static int stm50_erase_sector(struct flashctx *flash, unsigned int addr) { - chipaddr bios = flash->virtual_memory + sector; + chipaddr bios = flash->virtual_memory + addr; // clear status register chip_writeb(flash, 0x50, bios); @@ -95,8 +94,21 @@ int erase_sector_stm50(struct flashctx *flash, unsigned int sector, unsigned int chip_writeb(flash, 0xd0, bios); programmer_delay(10); - wait_82802ab(flash); + uint8_t status = wait_82802ab(flash); + print_status_82802ab(status); - /* FIXME: Check the status register for errors. */ - return 0; + return status == 0x80; +} + +/* Some ST M50* chips do support erasing of sectors. This function will derive the erase function to use from + * the length of the of the block. For calls that apparently do not address a sector (but a block) we just call + * the block erase function instead. FIXME: This duplicates the behavior of the remaining erasers for blocks and + * might be fixed when flashrom supports multiple functions per eraser or erasers that do erase parts of the + * chip only. */ +int erase_sector_stm50(struct flashctx *flash, unsigned int addr, unsigned int len) +{ + if (len == 4096) + return stm50_erase_sector(flash, addr); + else + return erase_block_82802ab(flash, addr, len); } -- Kind regards, Stefan Tauner

1 0

Re: [flashrom] flashrom cannot write on ecs-A785GM-M7
by Stefan Tauner 27 Aug '13

27 Aug '13

On Tue, 27 Aug 2013 13:09:25 +0300 Beeblebrox <zaphod(a)berentweb.com> wrote: > As you have requested, from recently built flashrom in git repo: > /sourcefiles/flashrom> # ./flashrom -p internal --output readlog.txt -r > backup.bin > IMC MBOX: Timeout! > Shutting down IMC failed. > FAILED! > FATAL ERROR! > Error: Programmer initialization failed. > > I assume 0.97 <= HEAD (?). Yes. currently there is no way to force flashrom to continue if it fails to shut down the IMC. Maybe we should provide one... Carl-Daniel? > Logfile attached. I am going to go ahead and > flash the BIOS using some other method. Will try and continue to support > your info/test requests in the mean time. Yes, that's probably the best approach for now, thanks for reporting back! -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Re: [flashrom] flashrom cannot write on ecs-A785GM-M7
by Carl-Daniel Hailfinger 27 Aug '13

27 Aug '13

Hi Beeblebrox, thanks for your report. Am 24.08.2013 16:34 schrieb Beeblebrox: > Unless I'm doing something seriously wrong, You're doing it right, but your hardware has some quirks which can only be handled by flashrom 0.9.7 or later. > flashrom cannot write to my BIOS. output of command attached. > flashrom -V -p internal -w 7857B916.ROM -o writelog.txt > > A non-text attachment 7857B916.ROM has been stripped. It is available at > http://paste.flashrom.org/view.php?id=1760 > > > flashrom v0.9.6.1-r1564 on FreeBSD 9.2-PRERELEASE (amd64) > flashrom was built with libpci 3.1.10, GCC 4.2.1 20070831 patched [FreeBSD], little endian > Command line (7 args): flashrom -V -p internal -w 7857B916.ROM -o writelog.txt > Calibrating delay loop... OS timer resolution is 1 usecs, 1642M loops per second, 10 myus = 11 us, 100 myus = 98 us, 1000 myus = 1021 us, 10000 myus = 9865 us, 4 myus = 5 us, OK. > Initializing internal programmer > No coreboot table found. > DMI string system-manufacturer: "ECS" > DMI string system-product-name: "A785GM-M7" > DMI string system-version: "1.0 " > DMI string baseboard-manufacturer: "ECS" > DMI string baseboard-product-name: "A785GM-M7" > DMI string baseboard-version: "1.0 " > DMI string chassis-type: "Desktop" > W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. > Active config mode, unknown reg 0x20 ID: 00. > Please send the output of "flashrom -V" to > flashrom(a)flashrom.org with W836xx: your board name: flashrom -V > as the subject to help us finish support for your Super I/O. Thanks. This is very interesting. It might be related to AMD IMC, but I'm not sure. > Found ITE Super I/O, ID 0x8726 on port 0x2e > Found chipset "AMD SB7x0/SB8x0/SB9x0" with PCI ID 1002:439d. Enabling flash write... SPI base address is at 0xfec10000 > AltSpiCSEnable=0, SpiRomEnable=1, AbortEnable=0 > PrefetchEnSPIFromIMC=1, PrefetchEnSPIFromHost=1, SpiOpEnInLpcMode=1 > SpiArbEnable=1, SpiAccessMacRomEn=1, SpiHostAccessRomEn=1, ArbWaitCount=4, SpiBridgeDisable=1, DropOneClkOnRd=0 > NormSpeed is 33 MHz > GPIO11 used for SPI_DO > GPIO12 used for SPI_DI > GPIO31 used for SPI_HOLD > GPIO32 used for SPI_CS > GPIO47 used for SPI_CLK > SB700 IMC is active. > The SB700 IMC is active and may interfere with SPI commands. Disabling write. Could you please retry with flashrom 0.9.7, preferably just reading the flash chip and producing a log file? See below for instructions. > ROM strap override is not active > OK. > Super I/O ID 0x8726 is not on the list of flash capable controllers. It would be great if you could run the following command with flashrom 0.9.7. flashrom -p internal --output readlog.txt -r backup.bin Then please send readlog.txt to this mailing list. I hope to get further insight from this. Regards, Carl-Daniel -- http://www.hailfinger.org/

3 2

[PATCH 2/2] Add support for ST M50LPW080.
by Stefan Tauner 26 Aug '13

26 Aug '13

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- flashchips.c | 25 +++++++++++++++++++++++++ flashchips.h | 1 + 2 files changed, 26 insertions(+) diff --git a/flashchips.c b/flashchips.c index 886e707..b83f32c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -10984,6 +10984,31 @@ const struct flashchip flashchips[] = { { .vendor = "ST", + .name = "M50LPW080", + .bustype = BUS_LPC, /* A/A Mux */ + .manufacture_id = ST_ID, + .model_id = ST_M50LPW080, + .total_size = 1024, + .page_size = 0, + .feature_bits = FEATURE_REGISTERMAP, + .tested = TEST_UNTESTED, + .probe = probe_82802ab, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 16}, }, + .block_erase = erase_block_82802ab, + } + }, + .unlock = unlock_stm50_uniform, + .write = write_82802ab, + .read = read_memmapped, + .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ + }, + + { + .vendor = "ST", .name = "M50LPW116", .bustype = BUS_LPC, /* A/A Mux */ .manufacture_id = ST_ID, diff --git a/flashchips.h b/flashchips.h index a876f25..67ce6b4 100644 --- a/flashchips.h +++ b/flashchips.h @@ -667,6 +667,7 @@ #define ST_M50FW040 0x2C #define ST_M50FW080 0x2D #define ST_M50FW016 0x2E +#define ST_M50LPW080 0x2F #define ST_M50LPW116 0x30 #define ST_M29F002B 0x34 /* Same as M29F002BB */ #define ST_M29F002T 0xB0 /* Same as M29F002BT/M29F002NT/M29F002BNT */ -- Kind regards, Stefan Tauner

1 0

[PATCH 1/2] Cleanup ST M50 driver.
by Stefan Tauner 26 Aug '13

26 Aug '13

There are two locking strategies used by this umbrella family, one uniform and one that matches the sector layout of the chip. Refactor the functions involved and rename the overly complicated file to just stm50.c and the functions accordingly. This fixes unlocking for some of the non-uniform chips, gets rid of the abuse of page_size Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- 82802ab.c | 1 + Makefile | 2 +- chipdrivers.h | 7 ++-- flashchips.c | 36 +++++++++--------- stm50.c | 102 ++++++++++++++++++++++++++++++++++++++++++++++++++ stm50flw0x0x.c | 115 --------------------------------------------------------- 6 files changed, 126 insertions(+), 137 deletions(-) create mode 100644 stm50.c delete mode 100644 stm50flw0x0x.c diff --git a/82802ab.c b/82802ab.c index 608995d..2a43813 100644 --- a/82802ab.c +++ b/82802ab.c @@ -89,6 +89,7 @@ int probe_82802ab(struct flashctx *flash) return 1; } +/* FIXME: needs timeout */ uint8_t wait_82802ab(struct flashctx *flash) { uint8_t status; diff --git a/Makefile b/Makefile index 3b24bc4..9065ee7 100644 --- a/Makefile +++ b/Makefile @@ -314,7 +314,7 @@ endif ############################################################################### # Flash chip drivers and bus support infrastructure. -CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \ +CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ opaque.o sfdp.o en29lv640b.o diff --git a/chipdrivers.h b/chipdrivers.h index 091d14c..f04cfcb 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -179,9 +179,10 @@ int printlock_at49f(struct flashctx *flash); /* w29ee011.c */ int probe_w29ee011(struct flashctx *flash); -/* stm50flw0x0x.c */ -int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int block, unsigned int blocksize); -int unlock_stm50flw0x0x(struct flashctx *flash); +/* stm50.c */ +int erase_sector_stm50(struct flashctx *flash, unsigned int block, unsigned int blocksize); +int unlock_stm50_uniform(struct flashctx *flash); +int unlock_stm50_nonuniform(struct flashctx *flash); /* en29lv640b.c */ int probe_en29lv640b(struct flashctx *flash); diff --git a/flashchips.c b/flashchips.c index 9b331c7..886e707 100644 --- a/flashchips.c +++ b/flashchips.c @@ -10752,7 +10752,7 @@ const struct flashchip flashchips[] = { .manufacture_id = ST_ID, .model_id = ST_M50FLW040A, .total_size = 512, - .page_size = 64 * 1024, + .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, @@ -10772,8 +10772,8 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50flw0x0x, .write = write_82802ab, + .unlock = unlock_stm50_uniform, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, @@ -10785,7 +10785,7 @@ const struct flashchip flashchips[] = { .manufacture_id = ST_ID, .model_id = ST_M50FLW040B, .total_size = 512, - .page_size = 64 * 1024, + .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, @@ -10805,8 +10805,8 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50flw0x0x, .write = write_82802ab, + .unlock = unlock_stm50_uniform, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, @@ -10818,7 +10818,7 @@ const struct flashchip flashchips[] = { .manufacture_id = ST_ID, .model_id = ST_M50FLW080A, .total_size = 1024, - .page_size = 64 * 1024, + .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRE, .probe = probe_82802ab, @@ -10838,7 +10838,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50flw0x0x, + .unlock = unlock_stm50_nonuniform, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -10851,7 +10851,7 @@ const struct flashchip flashchips[] = { .manufacture_id = ST_ID, .model_id = ST_M50FLW080B, .total_size = 1024, - .page_size = 64 * 1024, + .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, @@ -10871,7 +10871,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50flw0x0x, + .unlock = unlock_stm50_nonuniform, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -10884,7 +10884,7 @@ const struct flashchip flashchips[] = { .manufacture_id = ST_ID, .model_id = ST_M50FW002, .total_size = 256, - .page_size = 64 * 1024, + .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, @@ -10901,7 +10901,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50flw0x0x, + .unlock = unlock_stm50_nonuniform, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -10914,7 +10914,7 @@ const struct flashchip flashchips[] = { .manufacture_id = ST_ID, .model_id = ST_M50FW016, .total_size = 2048, - .page_size = 64 * 1024, + .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, @@ -10926,7 +10926,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50flw0x0x, + .unlock = unlock_stm50_uniform, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -10939,7 +10939,7 @@ const struct flashchip flashchips[] = { .manufacture_id = ST_ID, .model_id = ST_M50FW040, .total_size = 512, - .page_size = 64 * 1024, + .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PR, .probe = probe_82802ab, @@ -10951,7 +10951,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50flw0x0x, + .unlock = unlock_stm50_uniform, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -10964,7 +10964,7 @@ const struct flashchip flashchips[] = { .manufacture_id = ST_ID, .model_id = ST_M50FW080, .total_size = 1024, - .page_size = 64 * 1024, + .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PREW, .probe = probe_82802ab, @@ -10976,7 +10976,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50flw0x0x, + .unlock = unlock_stm50_uniform, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -10989,7 +10989,7 @@ const struct flashchip flashchips[] = { .manufacture_id = ST_ID, .model_id = ST_M50LPW116, .total_size = 2048, - .page_size = 64 * 1024, + .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, @@ -11007,7 +11007,7 @@ const struct flashchip flashchips[] = { .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50flw0x0x, + .unlock = unlock_stm50_nonuniform, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ diff --git a/stm50.c b/stm50.c new file mode 100644 index 0000000..f6c30a9 --- /dev/null +++ b/stm50.c @@ -0,0 +1,102 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2008 Claus Gindhart <claus.gindhart(a)kontron.com> + * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> + * Copyright (C) 2013 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * All ST M50 chips are locked on startup. Most of them have a uniform 64 kB block layout, but some have + * a non-uniform block/sector segmentation which has to be handled with more care. + */ + +#include "flash.h" +#include "flashchips.h" +#include "chipdrivers.h" + +static int stm50_unlock_address(struct flashctx *flash, int offset) +{ + chipaddr wrprotect = flash->virtual_registers + 2; + static const uint8_t unlock_sector = 0x00; + msg_cdbg("unlocking at 0x%x\n", offset); + chip_writeb(flash, unlock_sector, wrprotect + offset); + if (chip_readb(flash, wrprotect + offset) != unlock_sector) { + msg_cerr("Cannot unlock address 0x%x\n", offset); + return -1; + } + return 0; +} + +/* Chips known to use a non-uniform block and sector layout (for locking as well as (optionally) for erasing): + * Name Size Address range of lock registers + * M50FLW080A 1MB FFB00002 - FFBFF002 + * M50FLW080B 1MB FFB00002 - FFBFF002 + * M50FW002 256k FFBC0002 - FFBFC002 + * M50LPW116 2MB FFA00002 - FFBFC002 + */ +int unlock_stm50_nonuniform(struct flashctx *flash) +{ + int i; + struct eraseblock *eraseblocks = flash->chip->block_erasers[0].eraseblocks; + unsigned int done = 0; + for (i = 0; i < NUM_ERASEREGIONS && eraseblocks[i].count != 0; i++) { + unsigned int block_size = eraseblocks[i].size; + unsigned int block_count = eraseblocks[i].count; + + int j; + for (j = 0; j < block_count; j++) { + if (stm50_unlock_address(flash, done)) { + msg_cerr("UNLOCK FAILED!\n"); + return -1; + } + done += block_count * block_size; + } + } + return 0; +} + +/* Unlocking for uniform 64 kB blocks starting at offset 2 of the feature registers. */ +int unlock_stm50_uniform(struct flashctx *flash) +{ + int i; + for (i = 0; i < flash->chip->total_size * 1024; i+= 64 * 1024) { + if (stm50_unlock_address(flash, i)) { + msg_cerr("UNLOCK FAILED!\n"); + return -1; + } + } + return 0; +} + +/* This function is unused. */ +int erase_sector_stm50(struct flashctx *flash, unsigned int sector, unsigned int sectorsize) +{ + chipaddr bios = flash->virtual_memory + sector; + + // clear status register + chip_writeb(flash, 0x50, bios); + // now start it + chip_writeb(flash, 0x32, bios); + chip_writeb(flash, 0xd0, bios); + programmer_delay(10); + + wait_82802ab(flash); + + /* FIXME: Check the status register for errors. */ + return 0; +} diff --git a/stm50flw0x0x.c b/stm50flw0x0x.c deleted file mode 100644 index e6c7c05..0000000 --- a/stm50flw0x0x.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2008 Claus Gindhart <claus.gindhart(a)kontron.com> - * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * This module is designed for supporting the devices - * ST M50FLW040A (not yet tested) - * ST M50FLW040B (not yet tested) - * ST M50FLW080A - * ST M50FLW080B (not yet tested) - */ - -#include "flash.h" -#include "flashchips.h" -#include "chipdrivers.h" - -/* - * claus.gindhart(a)kontron.com - * The ST M50FLW080B and STM50FLW080B chips have to be unlocked, - * before you can erase them or write to them. - */ -static int unlock_block_stm50flw0x0x(struct flashctx *flash, int offset) -{ - chipaddr wrprotect = flash->virtual_registers + 2; - static const uint8_t unlock_sector = 0x00; - int j; - - /* - * These chips have to be unlocked before you can erase them or write - * to them. The size of the locking sectors depends on the type - * of chip. - * - * Sometimes, the BIOS does this for you; so you probably - * don't need to worry about that. - */ - - /* Check, if it's is a top/bottom-block with 4k-sectors. */ - /* TODO: What about the other types? */ - if ((offset == 0) || - (offset == (flash->chip->model_id == ST_M50FLW080A ? 0xE0000 : 0x10000)) - || (offset == 0xF0000)) { - - // unlock each 4k-sector - for (j = 0; j < 0x10000; j += 0x1000) { - msg_cdbg("unlocking at 0x%x\n", offset + j); - chip_writeb(flash, unlock_sector, - wrprotect + offset + j); - if (chip_readb(flash, wrprotect + offset + j) != - unlock_sector) { - msg_cerr("Cannot unlock sector @ 0x%x\n", - offset + j); - return -1; - } - } - } else { - msg_cdbg("unlocking at 0x%x\n", offset); - chip_writeb(flash, unlock_sector, wrprotect + offset); - if (chip_readb(flash, wrprotect + offset) != unlock_sector) { - msg_cerr("Cannot unlock sector @ 0x%x\n", offset); - return -1; - } - } - - return 0; -} - -int unlock_stm50flw0x0x(struct flashctx *flash) -{ - int i; - - for (i = 0; i < flash->chip->total_size * 1024; i+= flash->chip->page_size) { - if(unlock_block_stm50flw0x0x(flash, i)) { - msg_cerr("UNLOCK FAILED!\n"); - return -1; - } - } - - return 0; -} - -/* This function is unused. */ -int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int sector, - unsigned int sectorsize) -{ - chipaddr bios = flash->virtual_memory + sector; - - // clear status register - chip_writeb(flash, 0x50, bios); - // now start it - chip_writeb(flash, 0x32, bios); - chip_writeb(flash, 0xd0, bios); - programmer_delay(10); - - wait_82802ab(flash); - - /* FIXME: Check the status register for errors. */ - return 0; -} -- Kind regards, Stefan Tauner

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[PATCH 0/2] Rework ST M50 support
by Stefan Tauner 26 Aug '13

26 Aug '13

On Mon, 26 Aug 2013 00:40:28 -0400 Rich <rercola(a)pha.jhu.edu> wrote: > A brief summary: > Nothing works. Hello Rich, actually it does not look that grim at all! You just had bad luck that we have never encountered your flash chip yet and hence it was missing. When I looked at our previous code I felt the need to refactor it. I'll reply to this mail with my efforts to do that and add support for the chip you seem to have. They should be applied to r1722 so you may have to checkout flashrom from svn, see here: http://flashrom.org/Downloads#Installation_from_source Additionally, there is a patch that affects your chipset that needs some testing, but which should not change anything. Testing would be appreciated. http://patchwork.coreboot.org/patch/4022/ Stefan Tauner (2): Cleanup ST M50 driver. Add support for ST M50LPW080. 82802ab.c | 1 + Makefile | 2 +- chipdrivers.h | 7 ++-- flashchips.c | 61 +++++++++++++++++++++--------- flashchips.h | 1 + stm50.c | 102 ++++++++++++++++++++++++++++++++++++++++++++++++++ stm50flw0x0x.c | 115 --------------------------------------------------------- 7 files changed, 152 insertions(+), 137 deletions(-) create mode 100644 stm50.c delete mode 100644 stm50flw0x0x.c -- Kind regards, Stefan Tauner

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Re: [flashrom] flashrom behavior report: Sun Fire X4500 w/FlashROM 0.9.7
by Stefan Tauner 26 Aug '13

26 Aug '13

On Mon, 26 Aug 2013 16:08:29 +0200 Idwer Vollering <vidwer(a)gmail.com> wrote: > 2013/8/26 Rich <rercola(a)pha.jhu.edu> > > > A brief summary: > > Nothing works. > > > > # ./flashrom -p internal > > flashrom v0.9.7-r1711 on Linux 3.8.0-29-generic (x86_64) > > flashrom is free software, get the source code at http://www.flashrom.org > > > > Calibrating delay loop... OK. > > Found chipset "AMD AMD8111". Enabling flash write... OK. > > No EEPROM/flash device found. > > Note: flashrom can never write if the flash chip isn't found automatically. > > > > It's likely that remote management (DRAC, iLO/IPMI) peripheral hardware are > hiding the flash chip. no. it is simply an unsupported chip (M50LPW080). i am working on a patch already. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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flashrom August 2013