January 2013 - flashrom - mail.coreboot.org

Report: read
by dpcimanager＠users.sourceforge.net Jan. 11, 2013

Jan. 11, 2013

flashrom v0.9.6.1-r1622 on Darwin 12.2.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.9, LLVM Clang 4.1 ((tags/Apple/clang-421.11.66)), little endian Command line (5 args): ~/Downloads/Applications/DPCIManager.app/Contents/MacOS/flashrom -VV -r ~/Desktop/test.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 606M loops per second, 10 myus = 10 us, 100 myus = 103 us, 1000 myus = 1126 us, 10000 myus = 9904 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x00000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x00000400. No coreboot table found. DMI string system-manufacturer: "" DMI string system-product-name: "" DMI string system-version: "" DMI string baseboard-manufacturer: "" DMI string baseboard-product-name: "" DMI string baseboard-version: "" DMI string chassis-type: "" DMI chassis-type is not specific enough. ======================================================================== WARNING! You may be running flashrom on an unsupported laptop. We could not detect this for sure because your vendor has not setup the SMBIOS tables correctly. You can enforce execution by adding '-p internal:laptop=this_is_not_a_laptop' to the command line, but please read the following warning if you are not sure. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. Error: Programmer initialization failed.

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Re: [flashrom] flashrom -V NVIDIA MCP61 ASUS M2N68-LA (Compaq Presario SR5019UK)
by Stefan Tauner Jan. 9, 2013

Jan. 9, 2013

On Wed, 9 Jan 2013 11:33:18 +0000 Dave Murphy <davem(a)devkitpro.org> wrote: > Hi, > > I've just built flashrom from source and run it on my machine to see > if it's supported with a view to eventually working on coreboot for > this board. > > Any suggestiions on how to proceed from here? Hi Dave, I dont see a reason why flashrom would not work in the log (but there are some facts that may not be visible in the log without trying to write). For coreboot... I would get another board (NVidia is in general a dead end regarding coreboot). Please ask further coreboot-specific questions on the coreboot mailing list or its IRC channel. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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flashrom -V NVIDIA MCP61 ASUS M2N68-LA (Compaq Presario SR5019UK)
by Dave Murphy Jan. 9, 2013

Jan. 9, 2013

Hi, I've just built flashrom from source and run it on my machine to see if it's supported with a view to eventually working on coreboot for this board. Any suggestiions on how to proceed from here? Dave

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Re: [flashrom] Flashrom failure
by Leslie Rhorer Jan. 9, 2013

Jan. 9, 2013

Yes, the backup file, created by `flashrom -r` is precisely 8M in size - no surprises there. How can I flash this system? It doesn't have DOS or Windows on it, and if I try to create a DOS image from which to boot, the 8M file won't fit on it. _____ From: David Hendricks [mailto:dhendrix@google.com] Sent: Tuesday, January 08, 2013 8:59 PM To: Leslie Rhorer Cc: flashrom Subject: Re: [flashrom] Flashrom failure You're fine :-) Apparently M5A99X-EVO-R20-ASUS-1302.CAP is not exactly 8MB, which is the size of your flash chip (W25Q64). This is just a simple sanity check flashrom uses to help prevent flashing the wrong file to your chip. I took a quick look at a BIOS image from Asus' website and it appears that they append 2KB to their BIOS image: 007ff060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| * 00800780 50 45 49 45 2b ac f5 ff 10 00 00 00 00 00 00 00 |PEIE+...........| 00800790 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| * 008007f0 e9 0d e0 ff ff 00 00 10 00 00 78 56 00 00 f0 ff |..........xV....| 00800800 Usually this junk vendors append to their BIOSes is benign, but you never really know... I recommend looking around to see if anyone else has had success flashing this board using Flashrom. I do not recommend bypassing the size check or truncating the extra 2KB unless you have a means of recovering (Backup BIOS ROM, external programmer, etc). On Tue, Jan 8, 2013 at 5:26 PM, Leslie Rhorer <lrhorer(a)mygrande.net> wrote: I don't think I am in any jeopardy, but I need to make sure, because an attempted flashrom write failed. In addition, I would like to get it to work, because it as been recommended I upgrade the BIOS due to issues in lm-sensors. When I attempted to upgrade the BIOS, I got this error: RAID-Server:/RAID/Server-Main/Downloads/Asus Motherboards/M5A99X EVO R2.0# flashrom -w M5A99X-EVO-R20-ASUS-1302.CAP flashrom v0.9.4-r1395 on Linux 2.6.32-5-amd64 (x86_64), built with libpci 3.1.7, GCC 4.4.5, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "AMD SB700/SB710/SB750/SB850". Enabling flash write... OK. This chipset supports the following protocols: LPC, FWH, SPI. Found Winbond flash chip "W25Q64" (8192 kB, SPI) at physical address 0xff800000. Error: Image size doesn't match I then verified the flash image against the backup image and it apparently passed: RAID-Server:/RAID/Server-Main/Downloads/Asus Motherboards/M5A99X EVO R2.0# flashrom -v Safety_BIOS.cap flashrom v0.9.4-r1395 on Linux 2.6.32-5-amd64 (x86_64), built with libpci 3.1.7, GCC 4.4.5, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "AMD SB700/SB710/SB750/SB850". Enabling flash write... OK. This chipset supports the following protocols: LPC, FWH, SPI. Found Winbond flash chip "W25Q64" (8192 kB, SPI) at physical address 0xff800000. Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... done. Verifying flash... VERIFIED. Am I in jeopardy, here? How can I get flashrom to properly write the new BIOS? _______________________________________________ flashrom mailing list flashrom(a)flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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Flashrom failure
by Leslie Rhorer Jan. 9, 2013

Jan. 9, 2013

I don't think I am in any jeopardy, but I need to make sure, because an attempted flashrom write failed. In addition, I would like to get it to work, because it as been recommended I upgrade the BIOS due to issues in lm-sensors. When I attempted to upgrade the BIOS, I got this error: RAID-Server:/RAID/Server-Main/Downloads/Asus Motherboards/M5A99X EVO R2.0# flashrom -w M5A99X-EVO-R20-ASUS-1302.CAP flashrom v0.9.4-r1395 on Linux 2.6.32-5-amd64 (x86_64), built with libpci 3.1.7, GCC 4.4.5, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "AMD SB700/SB710/SB750/SB850". Enabling flash write... OK. This chipset supports the following protocols: LPC, FWH, SPI. Found Winbond flash chip "W25Q64" (8192 kB, SPI) at physical address 0xff800000. Error: Image size doesn't match I then verified the flash image against the backup image and it apparently passed: RAID-Server:/RAID/Server-Main/Downloads/Asus Motherboards/M5A99X EVO R2.0# flashrom -v Safety_BIOS.cap flashrom v0.9.4-r1395 on Linux 2.6.32-5-amd64 (x86_64), built with libpci 3.1.7, GCC 4.4.5, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "AMD SB700/SB710/SB750/SB850". Enabling flash write... OK. This chipset supports the following protocols: LPC, FWH, SPI. Found Winbond flash chip "W25Q64" (8192 kB, SPI) at physical address 0xff800000. Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... done. Verifying flash... VERIFIED. Am I in jeopardy, here? How can I get flashrom to properly write the new BIOS?

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[PATCH] Fix compilation for DOS and non-x86 targets
by Carl-Daniel Hailfinger Jan. 8, 2013

Jan. 8, 2013

Fixup for r1638. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-fix_compile_dos/hwaccess.c =================================================================== --- flashrom-fix_compile_dos/hwaccess.c (Revision 1644) +++ flashrom-fix_compile_dos/hwaccess.c (Arbeitskopie) @@ -65,31 +65,25 @@ #endif } +#if IS_X86 && !(defined(__DJGPP__) || defined(__LIBPAYLOAD__)) static int release_io_perms(void *p) { -#if IS_X86 -#if defined(__DJGPP__) || defined(__LIBPAYLOAD__) - /* Nothing to release */ -#elif defined (__sun) +#if defined (__sun) sysi86(SI86V86, V86SC_IOPL, 0); #elif IS_BSD close(io_fd); #elif IS_LINUX iopl(0); #endif -#else -/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */ -#endif return 0; } +#endif /* Get I/O permissions with automatic permission release on shutdown. */ int rget_io_perms(void) { -#if IS_X86 -#if defined(__DJGPP__) || defined(__LIBPAYLOAD__) - /* We have full permissions by default. */ -#elif defined (__sun) +#if IS_X86 && !(defined(__DJGPP__) || defined(__LIBPAYLOAD__)) +#if defined (__sun) if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { #elif IS_BSD if ((io_fd = open("/dev/io", O_RDWR)) < 0) { @@ -107,7 +101,8 @@ register_shutdown(release_io_perms, NULL); } #else -/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */ + /* DJGPP and libpayload environments have full PCI port I/O permissions by default. */ + /* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */ #endif return 0; } -- http://www.hailfinger.org/

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[commit] r1645 - trunk
by repository service Jan. 8, 2013

Jan. 8, 2013

Author: hailfinger Date: Tue Jan 8 23:49:12 2013 New Revision: 1645 URL: http://flashrom.org/trac/flashrom/changeset/1645 Log: Fix compilation for DOS and non-x86 targets. Fixup for r1638. Thanks to Idwer Vollering for testing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/hwaccess.c Modified: trunk/hwaccess.c ============================================================================== --- trunk/hwaccess.c Sun Jan 6 00:52:45 2013 (r1644) +++ trunk/hwaccess.c Tue Jan 8 23:49:12 2013 (r1645) @@ -65,31 +65,25 @@ #endif } +#if IS_X86 && !(defined(__DJGPP__) || defined(__LIBPAYLOAD__)) static int release_io_perms(void *p) { -#if IS_X86 -#if defined(__DJGPP__) || defined(__LIBPAYLOAD__) - /* Nothing to release */ -#elif defined (__sun) +#if defined (__sun) sysi86(SI86V86, V86SC_IOPL, 0); #elif IS_BSD close(io_fd); #elif IS_LINUX iopl(0); #endif -#else -/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */ -#endif return 0; } +#endif /* Get I/O permissions with automatic permission release on shutdown. */ int rget_io_perms(void) { -#if IS_X86 -#if defined(__DJGPP__) || defined(__LIBPAYLOAD__) - /* We have full permissions by default. */ -#elif defined (__sun) +#if IS_X86 && !(defined(__DJGPP__) || defined(__LIBPAYLOAD__)) +#if defined (__sun) if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { #elif IS_BSD if ((io_fd = open("/dev/io", O_RDWR)) < 0) { @@ -107,7 +101,8 @@ register_shutdown(release_io_perms, NULL); } #else -/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */ + /* DJGPP and libpayload environments have full PCI port I/O permissions by default. */ + /* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */ #endif return 0; }

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[RFC] Feature autodetection during compilation
by Carl-Daniel Hailfinger Jan. 8, 2013

Jan. 8, 2013

We enable programmer compilation based on the following criteria: - Default off unless explicitly enabled (dediprog) - Default on unless explicitly disabled (dummy) - Default on if technically possible on target machine (linux_spi) - Default on if the required libs+headers are available (ft2232_spi) The last criterion is what causes pains to no end, at least with the current Makefile infrastructure. Yes, we (I) can maintain it, but in the long run we either need a separate configure script (which may or may not work in all envorinments where GNU make works, especially exotic platforms like Windows), or we switch to something like CMake (which doesn't have the required features in ancient versions AFAIK), or we use two chained Makefiles (which would not meet my definition of "fun"). Now why is the last criterion such a PITA? All other criteria have a hard fail/success test, i.e. if a required lib/header is missing, we stop compilation. However, this criterion has a soft fail/success test, i.e. if you enable a feature and the required libraries/headers are missing, the feature simply will be silently disabled. That sort of violates the principle of least surprise, and it's the reason why our current Makefile uses nasty tricks with external files to avoid reloading itself. I would like to switch ft2232_spi to "Default on if technically possible on target machine" and spit out an improved error message in case the headers are missing. Comments? Flames? Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH] Fix linker flag bug introduced in r1623
by Carl-Daniel Hailfinger Jan. 8, 2013

Jan. 8, 2013

Spotted by Idwer Vollering. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> and committed in r1623 Index: flashrom-Makefile_libusb_libpci_ldflags_fix/Makefile =================================================================== --- flashrom-Makefile_libusb_libpci_ldflags_fix/Makefile (Revision 1624) +++ flashrom-Makefile_libusb_libpci_ldflags_fix/Makefile (Revision 1625) @@ -710,10 +710,10 @@ echo "See README for more information."; echo; \ rm -f .test.c .test.o; exit 1) @printf "Checking if libpci is present and sufficient... " - @$(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(PCILIBS) >/dev/null && \ + @$(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(LIBS) $(PCILIBS) >/dev/null && \ echo "yes." || ( echo "no."; \ printf "Checking if libz+libpci are present and sufficient..."; \ - $(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(PCILIBS) -lz >/dev/null && \ + $(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(LIBS) $(PCILIBS) -lz >/dev/null && \ ( echo "yes."; echo "NEEDLIBZ := yes" > .libdeps ) || ( echo "no."; echo; \ echo "Please install libpci (package pciutils) and/or libz."; \ echo "See README for more information."; echo; \ @@ -729,7 +729,7 @@ echo "See README for more information."; echo; \ rm -f .test.c .test.o; exit 1) @printf "Checking if libusb-0.1 is usable... " - @$(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(USBLIBS) >/dev/null && \ + @$(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(LIBS) $(USBLIBS) >/dev/null && \ echo "yes." || ( echo "no."; \ echo "Please install libusb-0.1 or libusb-compat."; \ echo "See README for more information."; echo; \ -- http://www.hailfinger.org/

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help
by 杜新雷 Jan. 6, 2013

Jan. 6, 2013

hello, Os :fedora 14 Linux 2.6.35.6-45.fc14.i686 (i686) Flashrom version : v0.9.4-r1455 #flashrom -r sysbios.bin error: mainboards information Flash chip VendorSouthbridgePCI IDsStatus intelHM658086:1c49? embedded controller mode SIO chip： IT8782 vendor :ITE mainboards VendormainboardsRequired Status topstarTEB-H8100 Hope to be able to make support topstar motherboard of TEB - H8100 flashrom program to ease of use, thank you! David Best regard！

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