flashrom August 2012

flashrom@flashrom.org

31 participants
160 discussions

[commit] r1566 - trunk
by repository service 09 Aug '12

09 Aug '12

Author: stefanct Date: Fri Aug 10 01:25:27 2012 New Revision: 1566 URL: http://flashrom.org/trac/flashrom/changeset/1566 Log: Add board enable for Biostar M7VIQ. The PCI IDs are generic VIA IDs. Only Biostar IDs are those of the LOM, but that would not be a good choice for ID. So autodetection has been disabled and the user needs to specify -p internal:mainboard=biostar:m7viq instead. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Thu Aug 9 23:09:51 2012 (r1565) +++ trunk/board_enable.c Fri Aug 10 01:25:27 2012 (r1566) @@ -554,6 +554,18 @@ /* * Suited for: + * - Biostar M7VIQ: VIA KM266 + VT8235 + */ +static int w83697xx_memw_enable_2e(void) +{ + w83697xx_memw_enable(0x2E); + + return 0; +} + + +/* + * Suited for: * - EPoX EP-8K5A2: VIA KT333 + VT8235 * - Albatron PM266A Pro: VIA P4M266A + VT8235 * - Shuttle AK31 (all versions): VIA KT266 + VT8233 @@ -2360,6 +2372,7 @@ {0x10DE, 0x0260, 0x1043, 0x81BC, 0x10DE, 0x026C, 0x1043, 0x8249, "^P5N-E SLI$",NULL, NULL, P3, "ASUS", "P5N-E SLI", 0, NT, it8718f_gpio63_raise}, {0x8086, 0x24dd, 0x1043, 0x80a6, 0x8086, 0x2570, 0x1043, 0x8157, NULL, NULL, NULL, P3, "ASUS", "P5PE-VM", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2443, 0x1043, 0x8027, 0x8086, 0x1130, 0x1043, 0x8027, NULL, NULL, NULL, P3, "ASUS", "TUSL2-C", 0, NT, intel_ich_gpio21_raise}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3116, 0x1106, 0x3116, "^KM266-8235$", "biostar", "m7viq", P3, "Biostar", "M7VIQ", 0, NT, w83697xx_memw_enable_2e}, {0x10b7, 0x9055, 0x1028, 0x0082, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, P3, "Dell", "OptiPlex GX1", 0, OK, intel_piix4_gpo30_lower}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, P3, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, {0x10de, 0x03ea, 0x1019, 0x2602, 0x10de, 0x03e0, 0x1019, 0x2602, NULL, NULL, NULL, P3, "Elitegroup", "GeForce6100SM-M", 0, OK, board_ecs_geforce6100sm_m}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Thu Aug 9 23:09:51 2012 (r1565) +++ trunk/print.c Fri Aug 10 01:25:27 2012 (r1566) @@ -749,7 +749,7 @@ B("Biostar", "H61MU3", BAD, NULL, "Probing works (Eon EN25Q32(A/B), 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Biostar", "M6TBA", BAD, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. May work now."), B("Biostar", "M7NCD Pro", OK, "http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL), - B("Biostar", "M7VIQ", BAD, NULL, "Missing board enable (W83697HF/F/HG/G), see http://www.flashrom.org/pipermail/flashrom/2012-February/008863.html"), + B("Biostar", "M7VIQ", NT, NULL, NULL), B("Biostar", "N61PB-M2S", OK, NULL, NULL), B("Biostar", "N68S3+", OK, NULL, NULL), B("Biostar", "P4M80-M4", OK, "http://www.biostar-usa.com/mbdetails.asp?model=p4m80-m4", NULL),

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ANNOUNCE: flashrom 0.9.6 is out
by Carl-Daniel Hailfinger 09 Aug '12

09 Aug '12

The flashrom developers are happy to announce the release of the flashrom 0.9.6 series. flashrom is a utility for reading, writing, erasing and verifying flash ROM chips. flashrom is designed to flash BIOS/[U]EFI/coreboot/firmware/optionROM images on mainboards, network/graphics/storage controller cards, and various programmer devices. It can do so without any special boot procedures and from your normal working environment. Highlights of flashrom ====================== * Parallel, LPC, FWH and SPI flash interfaces. * Support for onboard programming and external programmers. * 300 (+12 since 0.9.5) flash chip types/models some with a number of variants each. * 220 (+44 since 0.9.5) different chipsets, some with multiple flash controllers. * 401 (+27 since 0.9.5) mainboards verified to be working. * Flash chip package agnostic. DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32/40/48, BGA and more have all been verified to work. * 50 PCI devices, various USB and parallel port devices, and all external programmers compatible with serprog or SI Prog can be used for flashing. * No physical access needed. root access is sufficient. * No bootable floppy disk, bootable CD-ROM or other media needed. * No keyboard or monitor needed. Simply reflash remotely via SSH. * No instant reboot needed. Reflash your ROM in a running system, verify it, be happy. The new firmware will be present next time you boot. * Crossflashing and hotflashing is possible as long as the flash chips are electrically and logically compatible (same protocol). Great for recovery. * Scriptability. Reflash a whole pool of identical machines at the same time from the command line. It is recommended to check flashrom output and error codes. * Speed. flashrom is much faster than vendor flash tools. * Supports Linux, FreeBSD, NetBSD, DragonFly BSD, OpenBSD, Nexenta, Solaris, Mac OS X and DOS fully, Windows partially (no flashing of mainboards). Please refer to the README for build instructions. A list of new features can be found at http://flashrom.org/Flashrom/0.9.6 Please note that rewriting your flash chip can be dangerous and flashrom developers make no guarantees whatsoever. That said, many users have successfully replaced proprietary tools such as awdflash, amiflash and afudos with flashrom. Download ======== flashrom 0.9.6.1 can be downloaded in various ways: Anonymous checkout from the subversion repository at svn://flashrom.org/flashrom/tags/flashrom-0.9.6.1 A tarball is available for download at http://download.flashrom.org/releases/flashrom-0.9.6.1.tar.bz2 flashrom homepage with more info: http://flashrom.org/ Thanks ====== We wish to thank everyone who contributed to flashrom over the last eleven years. Patches, bug reports, tests, user support, community outreach, datasheet hunting, reverse engineering and other activities have made flashrom the universal and reliable tool it is today.

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[PATCH 1/1] Simplify processor_enable.c
by Peter Lemenkov 09 Aug '12

09 Aug '12

Hello All. This patch simplifies processor_flash_enable function a bit by simplifying the structure of the processor_enable.c. At least this patch removes more lines than introdces w/o sacrificing the simplicity. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- processor_enable.c | 26 +++++++++----------------- 1 file changed, 9 insertions(+), 17 deletions(-) diff --git a/processor_enable.c b/processor_enable.c index d680f97..d7f421d 100644 --- a/processor_enable.c +++ b/processor_enable.c @@ -24,19 +24,6 @@ #include "flash.h" #include "programmer.h" -#if defined(__i386__) || defined(__x86_64__) - -int processor_flash_enable(void) -{ - /* On x86, flash access is not processor specific except on - * AMD Elan SC520, AMD Geode and maybe other SoC-style CPUs. - * FIXME: Move enable_flash_cs5536 and get_flashbase_sc520 here. - */ - return 0; -} - -#else - #if defined (__MIPSEL__) && defined (__linux) #include <stdio.h> #include <string.h> @@ -83,15 +70,20 @@ static int is_loongson(void) int processor_flash_enable(void) { + int ret = 1; /* FIXME: detect loongson on FreeBSD and OpenBSD as well. */ #if defined (__MIPSEL__) && defined (__linux) if (is_loongson()) { flashbase = 0x1fc00000; - return 0; + ret = 0; } +#elif defined(__i386__) || defined(__x86_64__) + /* On x86, flash access is not processor specific except on + * AMD Elan SC520, AMD Geode and maybe other SoC-style CPUs. + * FIXME: Move enable_flash_cs5536 and get_flashbase_sc520 here. + */ + ret = 0; #endif /* Not implemented yet. Oh well. */ - return 1; + return ret; } - -#endif -- 1.7.9.3

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[commit] r1565 - trunk
by repository service 09 Aug '12

09 Aug '12

Author: stefanct Date: Thu Aug 9 23:09:51 2012 New Revision: 1565 URL: http://flashrom.org/trac/flashrom/changeset/1565 Log: Simplify processor_enable.c. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/processor_enable.c Modified: trunk/processor_enable.c ============================================================================== --- trunk/processor_enable.c Wed Aug 8 02:14:58 2012 (r1564) +++ trunk/processor_enable.c Thu Aug 9 23:09:51 2012 (r1565) @@ -24,19 +24,6 @@ #include "flash.h" #include "programmer.h" -#if defined(__i386__) || defined(__x86_64__) - -int processor_flash_enable(void) -{ - /* On x86, flash access is not processor specific except on - * AMD Elan SC520, AMD Geode and maybe other SoC-style CPUs. - * FIXME: Move enable_flash_cs5536 and get_flashbase_sc520 here. - */ - return 0; -} - -#else - #if defined (__MIPSEL__) && defined (__linux) #include <stdio.h> #include <string.h> @@ -71,10 +58,8 @@ while (*ptr && isspace((unsigned char)*ptr)) ptr++; fclose(cpuinfo); - return (strncmp(ptr, "ICT Loongson-2 V0.3", - strlen("ICT Loongson-2 V0.3")) == 0) - || (strncmp(ptr, "Godson2 V0.3 FPU V0.1", - strlen("Godson2 V0.3 FPU V0.1")) == 0); + return (strncmp(ptr, "ICT Loongson-2 V0.3", strlen("ICT Loongson-2 V0.3")) == 0) || + (strncmp(ptr, "Godson2 V0.3 FPU V0.1", strlen("Godson2 V0.3 FPU V0.1")) == 0); } fclose(cpuinfo); return 0; @@ -83,15 +68,21 @@ int processor_flash_enable(void) { + /* Default to 1 to catch not implemented architectures. */ + int ret = 1; + /* FIXME: detect loongson on FreeBSD and OpenBSD as well. */ #if defined (__MIPSEL__) && defined (__linux) if (is_loongson()) { flashbase = 0x1fc00000; - return 0; + ret = 0; } +#elif defined(__i386__) || defined(__x86_64__) + /* On x86, flash access is not processor specific except on + * AMD Elan SC520, AMD Geode and maybe other SoC-style CPUs. + * FIXME: Move enable_flash_cs5536 and get_flashbase_sc520 here. + */ + ret = 0; #endif - /* Not implemented yet. Oh well. */ - return 1; + return ret; } - -#endif

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Re: [flashrom] [SPAM_HEADER] - Re: Supermicro X9DR3 Intel X79: Untested chipset - Email found in subject
by Dominique Lecorre (Serviware Croissy) 09 Aug '12

09 Aug '12

Stefan, Thanks for the very detailed answer. Best Regards. DLC -----Original Message----- From: Stefan Tauner [mailto:stefan.tauner@student.tuwien.ac.at] Sent: Thu 8/9/2012 1:34 AM To: Dominique Lecorre (Serviware Croissy) Cc: flashrom(a)flashrom.org Subject: [SPAM_HEADER] - Re: [flashrom] Supermicro X9DR3 Intel X79: Untested chipset - Email found in subject On Sun, 5 Aug 2012 06:48:53 +0200 "Dominique Lecorre $Serviware Croissy$" <dlecorre(a)serviware.com> wrote: > > Hi, > Attached the flashrom -VV output on a Supermicro X9DR3 SandyBridge Patsburg Thanks Dominique! The board was already reported earlier (to be not working due to the locked region), see http://www.flashrom.org/pipermail/flashrom/2012-July/009522.html The chipset itself would most probably work, but we only mark it that way after successful writes (which is currently not possible on that board). And finally, the flash chip (Numonyx N25Q128) on that board is not fully supported yet, but would probably work well enough (with some generic code, namely SFDP). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[PATCH] Support chips MBM29F040 and W29EE512
by Andreas Seltenreich 08 Aug '12

08 Aug '12

Hi, I had to modify my copy a bit to use the PLCC chips I had salvaged somewhere as boot ROMs in Intel NICs. Patch attached. I'm not sure if the 512kB one qualifies as tested because the programmer only supports 128kB, and I had to --force it. regards, andreas

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Re: [flashrom] ZOTAC H61ITX-A-E ( ZOTAC H61-ITX WiFi )
by Stefan Tauner 08 Aug '12

08 Aug '12

On Sun, 5 Aug 2012 12:53:41 +0200 crow <crow(a)linux.org.ba> wrote: > Hello, > Another locked board: > 0x5C: 0x01ff0001 FREG2: WARNING: Management Engine region > (0x00001000-0x001fffff) is locked. > > Board url: http://www.zotac.com/index.php?page=shop.product_details&flypage=flypage_im… > > Flashrom log attached. Thanks for your report, i have added the board to our list. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Supermicro X9DR3 Intel X79: Untested chipset
by Dominique Lecorre (Serviware Croissy) 08 Aug '12

08 Aug '12

Hi, Attached the flashrom -VV output on a Supermicro X9DR3 SandyBridge Patsburg Regards. DLC

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[PATCH] Automatically release I/O permissions on shutdown
by Carl-Daniel Hailfinger 08 Aug '12

08 Aug '12

get_io_perms() is renamed to rget_io_perms() and automatically registers a function to release I/O permissions on shutdown. Actually release I/O permissions on Solaris and iopl()-supporting operating systems like Linux. This patch fixes quite a few programmers which forgot to release I/O permissions on shutdown, and it simplifies the shutdown and error handling code for all others. Note: The next steps will be to do the same with PCI init and /dev/mem accesses. That should make probably 3/4 of all explicit shutdown functions empty and obsolete. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-auto_release_io_perms/hwaccess.c =================================================================== --- flashrom-auto_release_io_perms/hwaccess.c (Revision 1547) +++ flashrom-auto_release_io_perms/hwaccess.c (Arbeitskopie) @@ -44,9 +44,25 @@ int io_fd; #endif -void get_io_perms(void) +int release_io_perms(void *p) { #if defined(__DJGPP__) || defined(__LIBPAYLOAD__) +#else +#if defined (__sun) && (defined(__i386) || defined(__amd64)) + sysi86(SI86V86, V86SC_IOPL, 0); +#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__) + close(io_fd); +#else + iopl(0); +#endif +#endif + return 0; +} + +/* Get I/O permissions with automatic permission release on shutdown. */ +void rget_io_perms(void) +{ +#if defined(__DJGPP__) || defined(__LIBPAYLOAD__) /* We have full permissions by default. */ return; #else @@ -65,17 +81,12 @@ msg_perr("single user mode.\n"); #endif exit(1); + } else { + register_shutdown(release_io_perms, NULL); } #endif } -void release_io_perms(void) -{ -#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) - close(io_fd); -#endif -} - #elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) static inline void sync_primitive(void) @@ -88,15 +99,10 @@ } /* PCI port I/O is not yet implemented on PowerPC. */ -void get_io_perms(void) +void rget_io_perms(void) { } -/* PCI port I/O is not yet implemented on PowerPC. */ -void release_io_perms(void) -{ -} - #elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips) /* sync primitive is not needed because /dev/mem on MIPS uses uncached accesses @@ -107,29 +113,20 @@ } /* PCI port I/O is not yet implemented on MIPS. */ -void get_io_perms(void) +void rget_io_perms(void) { } -/* PCI port I/O is not yet implemented on MIPS. */ -void release_io_perms(void) -{ -} - #elif defined (__arm__) static inline void sync_primitive(void) { } -void get_io_perms(void) +void rget_io_perms(void) { } -void release_io_perms(void) -{ -} - #else #error Unknown architecture Index: flashrom-auto_release_io_perms/ogp_spi.c =================================================================== --- flashrom-auto_release_io_perms/ogp_spi.c (Revision 1547) +++ flashrom-auto_release_io_perms/ogp_spi.c (Arbeitskopie) @@ -98,7 +98,6 @@ { physunmap(ogp_spibar, 4096); pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -128,7 +127,7 @@ return 1; } - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, ogp_spi); Index: flashrom-auto_release_io_perms/drkaiser.c =================================================================== --- flashrom-auto_release_io_perms/drkaiser.c (Revision 1547) +++ flashrom-auto_release_io_perms/drkaiser.c (Arbeitskopie) @@ -59,7 +59,6 @@ physunmap(drkaiser_bar, DRKAISER_MEMMAP_SIZE); /* Flash write is disabled automatically by PCI restore. */ pci_cleanup(pacc); - release_io_perms(); return 0; }; @@ -67,7 +66,7 @@ { uint32_t addr; - get_io_perms(); + rget_io_perms(); addr = pcidev_init(PCI_BASE_ADDRESS_2, drkaiser_pcidev); Index: flashrom-auto_release_io_perms/gfxnvidia.c =================================================================== --- flashrom-auto_release_io_perms/gfxnvidia.c (Revision 1547) +++ flashrom-auto_release_io_perms/gfxnvidia.c (Arbeitskopie) @@ -83,7 +83,6 @@ * by PCI restore. */ pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -91,7 +90,7 @@ { uint32_t reg32; - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, gfx_nvidia); Index: flashrom-auto_release_io_perms/nicrealtek.c =================================================================== --- flashrom-auto_release_io_perms/nicrealtek.c (Revision 1547) +++ flashrom-auto_release_io_perms/nicrealtek.c (Arbeitskopie) @@ -55,13 +55,12 @@ { /* FIXME: We forgot to disable software access again. */ pci_cleanup(pacc); - release_io_perms(); return 0; } int nicrealtek_init(void) { - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek); Index: flashrom-auto_release_io_perms/satamv.c =================================================================== --- flashrom-auto_release_io_perms/satamv.c (Revision 1547) +++ flashrom-auto_release_io_perms/satamv.c (Arbeitskopie) @@ -60,7 +60,6 @@ { physunmap(mv_bar, 0x20000); pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -85,7 +84,7 @@ uintptr_t addr; uint32_t tmp; - get_io_perms(); + rget_io_perms(); /* BAR0 has all internal registers memory mapped. */ /* No need to check for errors, pcidev_init() will not return in case @@ -161,7 +160,6 @@ error_out: pci_cleanup(pacc); - release_io_perms(); return 1; } Index: flashrom-auto_release_io_perms/internal.c =================================================================== --- flashrom-auto_release_io_perms/internal.c (Revision 1547) +++ flashrom-auto_release_io_perms/internal.c (Arbeitskopie) @@ -158,7 +158,6 @@ static int internal_shutdown(void *data) { - release_io_perms(); return 0; } @@ -225,7 +224,7 @@ } free(arg); - get_io_perms(); + rget_io_perms(); if (register_shutdown(internal_shutdown, NULL)) return 1; Index: flashrom-auto_release_io_perms/nicintel_spi.c =================================================================== --- flashrom-auto_release_io_perms/nicintel_spi.c (Revision 1547) +++ flashrom-auto_release_io_perms/nicintel_spi.c (Arbeitskopie) @@ -158,7 +158,6 @@ physunmap(nicintel_spibar, 4096); pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -167,7 +166,7 @@ { uint32_t tmp; - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); Index: flashrom-auto_release_io_perms/nicnatsemi.c =================================================================== --- flashrom-auto_release_io_perms/nicnatsemi.c (Revision 1547) +++ flashrom-auto_release_io_perms/nicnatsemi.c (Arbeitskopie) @@ -53,13 +53,12 @@ static int nicnatsemi_shutdown(void *data) { pci_cleanup(pacc); - release_io_perms(); return 0; } int nicnatsemi_init(void) { - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_natsemi); Index: flashrom-auto_release_io_perms/rayer_spi.c =================================================================== --- flashrom-auto_release_io_perms/rayer_spi.c (Revision 1547) +++ flashrom-auto_release_io_perms/rayer_spi.c (Arbeitskopie) @@ -167,7 +167,7 @@ rayer_miso_bit = 4; } - get_io_perms(); + rget_io_perms(); /* Get the initial value before writing to any line. */ lpt_outbyte = INB(lpt_iobase); Index: flashrom-auto_release_io_perms/atahpt.c =================================================================== --- flashrom-auto_release_io_perms/atahpt.c (Revision 1547) +++ flashrom-auto_release_io_perms/atahpt.c (Arbeitskopie) @@ -59,7 +59,6 @@ { /* Flash access is disabled automatically by PCI restore. */ pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -67,7 +66,7 @@ { uint32_t reg32; - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_4, ata_hpt); Index: flashrom-auto_release_io_perms/nic3com.c =================================================================== --- flashrom-auto_release_io_perms/nic3com.c (Revision 1547) +++ flashrom-auto_release_io_perms/nic3com.c (Arbeitskopie) @@ -81,13 +81,12 @@ } pci_cleanup(pacc); - release_io_perms(); return 0; } int nic3com_init(void) { - get_io_perms(); + rget_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_3com); Index: flashrom-auto_release_io_perms/satasii.c =================================================================== --- flashrom-auto_release_io_perms/satasii.c (Revision 1547) +++ flashrom-auto_release_io_perms/satasii.c (Arbeitskopie) @@ -61,7 +61,6 @@ { physunmap(sii_bar, SATASII_MEMMAP_SIZE); pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -70,7 +69,7 @@ uint32_t addr; uint16_t reg_offset; - get_io_perms(); + rget_io_perms(); pcidev_init(PCI_BASE_ADDRESS_0, satas_sii); Index: flashrom-auto_release_io_perms/nicintel.c =================================================================== --- flashrom-auto_release_io_perms/nicintel.c (Revision 1547) +++ flashrom-auto_release_io_perms/nicintel.c (Arbeitskopie) @@ -63,7 +63,6 @@ physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); pci_cleanup(pacc); - release_io_perms(); return 0; } @@ -72,9 +71,9 @@ uintptr_t addr; /* Needed only for PCI accesses on some platforms. - * FIXME: Refactor that into get_mem_perms/get_io_perms/get_pci_perms? + * FIXME: Refactor that into get_mem_perms/rget_io_perms/get_pci_perms? */ - get_io_perms(); + rget_io_perms(); /* No need to check for errors, pcidev_init() will not return in case * of errors. @@ -117,7 +116,6 @@ physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); error_out: pci_cleanup(pacc); - release_io_perms(); return 1; } Index: flashrom-auto_release_io_perms/programmer.h =================================================================== --- flashrom-auto_release_io_perms/programmer.h (Revision 1547) +++ flashrom-auto_release_io_perms/programmer.h (Arbeitskopie) @@ -300,8 +300,7 @@ struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, uint16_t card_vendor, uint16_t card_device); #endif -void get_io_perms(void); -void release_io_perms(void); +void rget_io_perms(void); #if CONFIG_INTERNAL == 1 extern int is_laptop; extern int laptop_ok; -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 2/3] Not for merge: Warn if we skipped all blocks
by Stefan Tauner 08 Aug '12

08 Aug '12

On Thu, 2 Aug 2012 15:51:32 +0200 Idwer Vollering <vidwer(a)gmail.com> wrote: > After considering the above comment: > > Acked-by: Idwer Vollering <vidwer(a)gmail.com> hmm... i am not really confident that this is a good implementation and/or should be merged. carl-daniel what do you think? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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flashrom August 2012