flashrom March 2012

flashrom@flashrom.org

46 participants
131 discussions

[PATCH] Add Spi interface support for Tunnel Creek chipset (3)
by Feldschmid, Ingo 30 Aug '12

30 Aug '12

Hi, Last changes I submitted have been vs. trunk 1424. Since there is a new version out, I will resubmit the changes built against the new flashrom trunk version: The Intel Tunnel Creek chipset supports both an SPI and an LPC bus. Set chipset table entry for Tunnel Creek to new function "enable_flash_tunnelcreek", which will read the hardware straps and return support for the bus that has been used for booting. This function uses "ich_init_spi" with ich_generation set to 7 for initializing the SPI bus if necessary. SPI functionality tested on actual hardware (see attached file flashrom.log), Tunnel Creek LPC interface not tested yet (missing hardware for that). The attached patch has been created vs. flashrom trunk 1427. Signed-off-by: Ingo Feldschmid <ifel(a)msc-ge.com> Es gelten unsere Allgemeinen Leistungsbedingungen die unter http://www.msc-ge.com/alb abrufbar sind. Our standard terms and conditions apply which are available under http://www.msc-ge.com/alb . MSC Vertriebs GmbH Sitz der Gesellschaft: Industriestrasse 16, 76297 Stutensee Handelsregister: Mannheim, HRB Nr. 10 3631 Geschaftsfuhrung: Manfred Schwarztrauber, Lothar Kummerlin, Rudiger Kuhn, Silvano Geissler Umsatzsteuer ID Nr.: DE 143 585 507 WEEE Reg. Nr. : DE 31011852 Gleichmann & Co. Electronics GmbH Sitz der Gesellschaft: Schraderstrasse 44, 67227 Frankenthal Handelsregister: Ludwigshafen, HRB Nr. 21305 Geschaftsfuhrung: Manfred Schwarztrauber, Thomas Klein Umsatzsteuer ID Nr. : DE 148 421 329 WEEE Reg. Nr.: DE 72277043 Diese E-Mail enthalt vertrauliche und/ oder rechtlich geschutzte Informationen. Wenn Sie nicht der beabsichtigte Empfanger sind, informieren Sie bitte sofort den Absender und loschen Sie diese E-Mail. The information contained in this message is confidential and/ or protected by law. If you are not the intended recipient, please contact the sender and delete this message.

3 3

[PATCH] Fix flashrom -L
by Carl-Daniel Hailfinger 27 Aug '12

27 Aug '12

flashrom -L output did not contain a list of programmers nor were all programmers listed. Fix it. (Well, mostly. Some programmers have no devices listed. And formatting on 80 column screens is totally broken for the flash chip list.) Wiki output is unchanged, and will need separate fixups. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> New output from flashrom -L follows: flashrom v0.9.2-r1196 on Linux 2.6.22.19-0.2-default (i686), built with libpci 2.2.6, LLVM Clang 2.8 (trunk 108130), little endian flashrom is free software, get the source code at http://www.flashrom.org Supported flash chips (total: 261): Vendor Device Tested Known Size/KB: Type: OK Broken (P = PROBE, R = READ, E = ERASE, W = WRITE) AMD Am29F010A/B P R E W 128 Parallel AMD Am29F002(N)BB 256 Parallel AMD Am29F002(N)BT 256 Parallel AMD Am29F016D 2048 Parallel AMD Am29F040B 512 Parallel AMD Am29F080B 1024 Parallel AMD Am29LV040B P R E W 512 Parallel AMD Am29LV081B 1024 Parallel AMIC A25L05PT 64 SPI AMIC A25L05PU 64 SPI AMIC A25L10PT 128 SPI AMIC A25L10PU 128 SPI AMIC A25L20PT 256 SPI AMIC A25L20PU 256 SPI AMIC A25L40PT P R W 512 SPI AMIC A25L40PU P R W 512 SPI AMIC A25L80P P R E W 1024 SPI AMIC A25L16PT 2048 SPI AMIC A25L16PU P R W 2048 SPI AMIC A25L512 64 SPI AMIC A25L010 128 SPI AMIC A25L020 256 SPI AMIC A25L040 512 SPI AMIC A25L080 1024 SPI AMIC A25L016 2048 SPI AMIC A25L032 4096 SPI AMIC A25LQ032 4096 SPI AMIC A29002B 256 Parallel AMIC A29002T P R W 256 Parallel AMIC A29040B 512 Parallel AMIC A49LF040A P R E W 512 LPC Atmel AT25DF021 256 SPI Atmel AT25DF041A 512 SPI Atmel AT25DF081 1024 SPI Atmel AT25DF081A 1024 SPI Atmel AT25DF161 2048 SPI Atmel AT25DF321 P R E W 4096 SPI Atmel AT25DF321A 4096 SPI Atmel AT25DF641 8192 SPI Atmel AT25DQ161 2048 SPI Atmel AT25F512B 64 SPI Atmel AT25FS010 128 SPI Atmel AT25FS040 512 SPI Atmel AT26DF041 512 SPI Atmel AT26DF081A P R 1024 SPI Atmel AT26DF161 2048 SPI Atmel AT26DF161A 2048 SPI Atmel AT26F004 512 SPI Atmel AT29C512 64 Parallel Atmel AT29C010A P R E W 128 Parallel Atmel AT29C020 256 Parallel Atmel AT29C040A 512 Parallel Atmel AT45CS1282 R 16896 SPI Atmel AT45DB011D R 128 SPI Atmel AT45DB021D R 256 SPI Atmel AT45DB041D R 512 SPI Atmel AT45DB081D R 1024 SPI Atmel AT45DB161D R 2048 SPI Atmel AT45DB321C R 4224 SPI Atmel AT45DB321D R 4096 SPI Atmel AT45DB642D R 8192 SPI Atmel AT49BV512 64 Parallel Atmel AT49F020 P R E W 256 Parallel Atmel AT49F002(N) 256 Parallel Atmel AT49F002(N)T P R W 256 Parallel Bright BM29F040 P R 512 Parallel EMST F49B002UA 256 Parallel EMST F25L008A 1024 SPI Eon EN25B05 64 SPI Eon EN25B05T 64 SPI Eon EN25B10 128 SPI Eon EN25B10T 128 SPI Eon EN25B20 256 SPI Eon EN25B20T 256 SPI Eon EN25B40 512 SPI Eon EN25B40T 512 SPI Eon EN25B80 1024 SPI Eon EN25B80T 1024 SPI Eon EN25B16 2048 SPI Eon EN25B16T 2048 SPI Eon EN25B32 4096 SPI Eon EN25B32T 4096 SPI Eon EN25B64 8192 SPI Eon EN25B64T 8192 SPI Eon EN25D16 2048 SPI Eon EN25F05 64 SPI Eon EN25F10 128 SPI Eon EN25F20 256 SPI Eon EN25F40 P 512 SPI Eon EN25F80 P R E W 1024 SPI Eon EN25F16 2048 SPI Eon EN25F32 4096 SPI Eon EN29F010 P R E W 128 Parallel Eon EN29F002(A)(N)B P R W 256 Parallel Eon EN29F002(A)(N)T P R W 256 Parallel Fujitsu MBM29F004BC 512 Parallel Fujitsu MBM29F004TC 512 Parallel Fujitsu MBM29F400BC W 512 Parallel Fujitsu MBM29F400TC 512 Parallel Hyundai HY29F002T P R E W 256 Parallel Hyundai HY29F002B 256 Parallel Hyundai HY29F040A 512 Parallel Intel 28F001BN/BX-B 128 Parallel Intel 28F001BN/BX-T 128 Parallel Intel 28F002BC/BL/BV/BX-T P R E W 256 Parallel Intel 28F008S3/S5/SC 512 Parallel Intel 28F004B5/BE/BV/BX-B 512 Parallel Intel 28F004B5/BE/BV/BX-T 512 Parallel Intel 28F400BV/BX/CE/CV-B 512 Parallel Intel 28F400BV/BX/CE/CV-T 512 Parallel Intel 82802AB P R 512 FWH Intel 82802AC P R 1024 FWH Macronix MX25L512 64 SPI Macronix MX25L1005 128 SPI Macronix MX25L2005 256 SPI Macronix MX25L4005 P R W 512 SPI Macronix MX25L8005 P R E W 1024 SPI Macronix MX25L1605 P R W 2048 SPI Macronix MX25L1635D 2048 SPI Macronix MX25L1635E 2048 SPI Macronix MX25L3205 P R W 4096 SPI Macronix MX25L3235D 4096 SPI Macronix MX25L6405 P 8192 SPI Macronix MX25L12805 16384 SPI Macronix MX29F001B 128 Parallel Macronix MX29F001T 128 Parallel Macronix MX29F002B 256 Parallel Macronix MX29F002T P R W 256 Parallel Macronix MX29F040 512 Parallel Macronix MX29LV040 512 Parallel MoselVitelic V29C51000B 64 Parallel MoselVitelic V29C51000T 64 Parallel MoselVitelic V29C51400B 512 Parallel MoselVitelic V29C51400T 512 Parallel MoselVitelic V29LC51000 64 Parallel MoselVitelic V29LC51001 128 Parallel MoselVitelic V29LC51002 256 Parallel Numonyx M25PE10 128 SPI Numonyx M25PE20 256 SPI Numonyx M25PE40 512 SPI Numonyx M25PE80 P R E W 1024 SPI Numonyx M25PE16 2048 SPI PMC Pm25LV010 128 SPI PMC Pm25LV016B 2048 SPI PMC Pm25LV020 256 SPI PMC Pm25LV040 512 SPI PMC Pm25LV080B 1024 SPI PMC Pm25LV512 64 SPI PMC Pm29F002T P R E W 256 Parallel PMC Pm29F002B 256 Parallel PMC Pm39LV010 P R E W 128 Parallel PMC Pm39LV020 256 Parallel PMC Pm39LV040 512 Parallel PMC Pm49FL002 P R E W 256 LPC,FWH PMC Pm49FL004 P R E W 512 LPC,FWH Sanyo LF25FW203A 2048 SPI Sharp LHF00L04 1024 FWH Spansion S25FL008A P R E W 1024 SPI Spansion S25FL016A P R W 2048 SPI SST SST25VF016B P R E W 2048 SPI SST SST25VF032B P R E W 4096 SPI SST SST25VF064C P R E W 8192 SPI SST SST25VF040.REMS P R 512 SPI SST SST25VF040B 512 SPI SST SST25LF040A.RES P 512 SPI SST SST25VF040B.REMS P R 512 SPI SST SST25VF080B P R E W 1024 SPI SST SST28SF040A 512 Parallel SST SST29EE010 P R W 128 Parallel SST SST29LE010 128 Parallel SST SST29EE020A P R E W 256 Parallel SST SST29LE020 P R E W 256 Parallel SST SST39SF512 64 Parallel SST SST39SF010A P R W 128 Parallel SST SST39SF020A P R E W 256 Parallel SST SST39SF040 P R E W 512 Parallel SST SST39VF512 P R E W 64 Parallel SST SST39VF010 P R E W 128 Parallel SST SST39VF020 256 Parallel SST SST39VF040 512 Parallel SST SST39VF080 1024 Parallel SST SST49LF002A/B P R E W 256 FWH SST SST49LF003A/B P R 384 FWH SST SST49LF004A/B P R E W 512 FWH SST SST49LF004C 512 FWH SST SST49LF008A P R E W 1024 FWH SST SST49LF008C 1024 FWH SST SST49LF016C P R W 2048 FWH SST SST49LF020 P R E W 256 LPC SST SST49LF020A P R E W 256 LPC SST SST49LF040 P R E W 512 LPC SST SST49LF040B P R E W 512 LPC SST SST49LF080A P R E W 1024 LPC SST SST49LF160C P R E W 2048 LPC ST M25P05-A 64 SPI ST M25P05.RES 64 SPI ST M25P10-A P R E W 128 SPI ST M25P10.RES 128 SPI ST M25P20 256 SPI ST M25P40 P R W 512 SPI ST M25P40-old 512 SPI ST M25P80 P R W 1024 SPI ST M25P16 P R W 2048 SPI ST M25P32 P R W 4096 SPI ST M25P64 8192 SPI ST M25P128 16384 SPI ST M25PX32 P R E W 4096 SPI ST M25PX64 P R E W 8192 SPI ST M29F002B 256 Parallel ST M29F002T/NT 256 Parallel ST M29F040B 512 Parallel ST M29F400BB W 512 Parallel ST M29F400BT 512 Parallel ST M29W010B 128 Parallel ST M29W040B 512 Parallel ST M29W512B P R E W 64 Parallel ST M50FLW040A 512 LPC,FWH ST M50FLW040B 512 LPC,FWH ST M50FLW080A P R E W 1024 LPC,FWH ST M50FLW080B 1024 LPC,FWH ST M50FW002 256 FWH ST M50FW016 2048 FWH ST M50FW040 P R 512 FWH ST M50FW080 P R 1024 FWH ST M50LPW116 2048 LPC SyncMOS/MoselVitelic {F,S,V}29C51001B 128 Parallel SyncMOS/MoselVitelic {F,S,V}29C51001T 128 Parallel SyncMOS/MoselVitelic {F,S,V}29C51002B 256 Parallel SyncMOS/MoselVitelic {F,S,V}29C51002T P R E W 256 Parallel SyncMOS/MoselVitelic {F,S,V}29C51004B 512 Parallel SyncMOS/MoselVitelic {F,S,V}29C51004T 512 Parallel SyncMOS/MoselVitelic {S,V}29C31004B 512 Parallel SyncMOS/MoselVitelic {S,V}29C31004T 512 Parallel TI TMS29F002RB 256 Parallel TI TMS29F002RT 256 Parallel Winbond W25Q80 P R E W 1024 SPI Winbond W25Q16 2048 SPI Winbond W25Q32 P R E W 4096 SPI Winbond W25Q64 P R W 8192 SPI Winbond W25x10 128 SPI Winbond W25x20 256 SPI Winbond W25x40 P R E W 512 SPI Winbond W25x80 P R E W 1024 SPI Winbond W25x16 P R E W 2048 SPI Winbond W25x32 P 4096 SPI Winbond W25x64 8192 SPI Winbond W29C010(M)/W29C011A/W29EE011/W29EE012 P R W 128 Parallel Winbond W29C020(C)/W29C022 P R E W 256 Parallel Winbond W29C040/P 512 Parallel Winbond W29C010(M)/W29C011A/W29EE011/W29EE012 P R E W 128 Parallel Winbond W39V040A P R W 512 LPC Winbond W39V040(F)B P R E W 512 LPC Winbond W39V040(F)C 512 LPC Winbond W39V040FA P R E W 512 FWH Winbond W39V080A 1024 LPC Winbond W49F002U/N P R E W 256 Parallel Winbond W49F020 P 256 Parallel Winbond W49V002A P R E W 256 LPC Winbond W49V002FA P R W 256 FWH Winbond W39V080FA P R E W 1024 FWH Winbond W39V080FA (dual mode) 512 FWH Supported programmers: internal, dummy, nic3com, nicrealtek, nicsmc1211, nicnatsemi, gfxnvidia, drkaiser, satasii, atahpt, it87spi, ft2232_spi, serprog, buspirate_spi, dediprog, rayer_spi, nicintel_spi Supported devices for the internal programmer: Supported chipsets (total: 152): Vendor: Chipset: PCI IDs: ALi M1533 10b9:1533 AMD AMD-768 1022:7440 AMD AMD8111 1022:7468 AMD CS5530(A) 1078:0100 AMD CS5536 1022:2080 AMD CS5536 1022:2090 AMD Elan SC520 1022:3000 AMD SB600 1002:438d AMD SB700/SB710/SB750 1002:439d AMD SC1100 100b:0510 (untested) ATI SB400 1002:4377 Broadcom OSB4 1166:0200 Broadcom HT-1000 1166:0205 Intel 3400 Desktop 8086:3b00 (untested) Intel 3400 Mobile 8086:3b01 (untested) Intel P55 8086:3b02 (untested) Intel PM55 8086:3b03 (untested) Intel H55 8086:3b06 (untested) Intel QM57 8086:3b07 Intel H57 8086:3b08 (untested) Intel HM55 8086:3b09 (untested) Intel Q57 8086:3b0a (untested) Intel HM57 8086:3b0b (untested) Intel 3400 Mobile SFF 8086:3b0d (untested) Intel B55 8086:3b0e (untested) Intel QS57 8086:3b0f (untested) Intel 3400 8086:3b12 (untested) Intel 3420 8086:3b14 (untested) Intel 3450 8086:3b16 (untested) Intel B55 8086:3b1e (untested) Intel 440MX 8086:7198 Intel 6300ESB 8086:25a1 Intel 631xESB/632xESB/3100 8086:2670 Intel EP80579 8086:5031 Intel ICH0 8086:2420 Intel ICH10 8086:3a18 Intel ICH10D 8086:3a1a Intel ICH10DO 8086:3a14 Intel ICH10R 8086:3a16 Intel ICH2 8086:2440 Intel ICH2-M 8086:244c Intel ICH3-M 8086:248c Intel ICH3-S 8086:2480 Intel ICH4/ICH4-L 8086:24c0 Intel ICH4-M 8086:24cc Intel ICH5/ICH5R 8086:24d0 Intel ICH6/ICH6R 8086:2640 Intel ICH6-M 8086:2641 Intel ICH7DH 8086:27b0 Intel ICH7/ICH7R 8086:27b8 Intel ICH7M 8086:27b9 Intel ICH7MDH 8086:27bd Intel NM10 8086:27bc Intel ICH 8086:2410 Intel ICH8DH 8086:2812 Intel ICH8DO 8086:2814 Intel ICH8/ICH8R 8086:2810 Intel ICH8M 8086:2815 Intel ICH8M-E 8086:2811 Intel ICH9 8086:2918 Intel ICH9DH 8086:2912 Intel ICH9DO 8086:2914 Intel ICH9M 8086:2919 Intel ICH9M-E 8086:2917 Intel ICH9R 8086:2916 Intel ICH9 Engineering Sample 8086:2910 Intel MPIIX 8086:1234 (untested) Intel PIIX3 8086:7000 Intel PIIX4/4E/4M 8086:7110 Intel PIIX 8086:122e Intel Poulsbo 8086:8119 NVIDIA nForce4/MCP4 10de:0030 NVIDIA CK804 10de:0050 NVIDIA CK804 10de:0051 NVIDIA NForce2 10de:0060 NVIDIA NForce3 10de:00e0 NVIDIA CK804 10de:00d3 NVIDIA MCP51 10de:0260 (untested) NVIDIA MCP51 10de:0261 (untested) NVIDIA MCP51 10de:0262 (untested) NVIDIA MCP51 10de:0263 (untested) NVIDIA MCP55 10de:0360 NVIDIA MCP55 10de:0362 NVIDIA MCP55 10de:0363 NVIDIA MCP55 10de:0364 NVIDIA MCP55 10de:0365 NVIDIA MCP55 10de:0366 NVIDIA MCP55 10de:0367 NVIDIA MCP61 10de:03e0 (untested) NVIDIA MCP61 10de:03e1 (untested) NVIDIA MCP61 10de:03e2 (untested) NVIDIA MCP61 10de:03e3 (untested) NVIDIA MCP65 10de:0440 (untested) NVIDIA MCP65 10de:0441 (untested) NVIDIA MCP65 10de:0442 (untested) NVIDIA MCP65 10de:0443 (untested) NVIDIA MCP67 10de:0548 NVIDIA MCP78S 10de:075c (untested) NVIDIA MCP78S 10de:075d (untested) NVIDIA MCP73 10de:07d7 (untested) NVIDIA MCP79 10de:0aac (untested) NVIDIA MCP79 10de:0aad (untested) NVIDIA MCP79 10de:0aae (untested) NVIDIA MCP79 10de:0aaf (untested) SiS 85C496+497 1039:0496 (untested) SiS 501/5101/5501 1039:0406 (untested) SiS 5511 1039:5511 (untested) SiS 5596 1039:5596 (untested) SiS 5571 1039:5571 (untested) SiS 5591/5592 1039:5591 (untested) SiS 5597/5598/5581/5120 1039:5597 (untested) SiS 530 1039:0530 (untested) SiS 600 1039:5600 (untested) SiS 620 1039:0620 (untested) SiS 540 1039:0540 (untested) SiS 630 1039:0630 (untested) SiS 635 1039:0635 (untested) SiS 640 1039:0640 (untested) SiS 645 1039:0645 (untested) SiS 645DX 1039:0646 (untested) SiS 648 1039:0648 (untested) SiS 650 1039:0650 (untested) SiS 651 1039:0651 (untested) SiS 655 1039:0655 (untested) SiS 661 1039:0661 SiS 730 1039:0730 (untested) SiS 733 1039:0733 (untested) SiS 735 1039:0735 SiS 740 1039:0740 (untested) SiS 741 1039:0741 SiS 745 1039:0745 SiS 746 1039:0746 (untested) SiS 748 1039:0748 (untested) SiS 755 1039:0755 (untested) VIA VT82C585VPX 1106:0585 (untested) VIA VT82C595 1106:0595 (untested) VIA VT82C597 1106:0597 (untested) VIA VT82C69x 1106:0691 (untested) VIA VT8601/VT8601A 1106:0601 (untested) VIA VT8601T 1106:8601 (untested) VIA CX700 1106:8324 VIA VT8231 1106:8231 (untested) VIA VT8233 1106:3074 (untested) VIA VT8233A 1106:3147 VIA VT8235 1106:3177 VIA VT8237 1106:3227 VIA VT8237A 1106:3337 VIA VT8237S 1106:3372 VIA VX800 1106:8353 VIA VT82C596 1106:0596 VIA VT82C586A/B 1106:0586 VIA VT82C686A/B 1106:0686 (untested) Known boards (good: 259, bad: 18): Vendor: Board: Status: Required option: A-Trend ATC-6220 OK abit AN-M2 OK (autodetected) abit AX8 OK abit BM6 OK (autodetected) abit Fatal1ty F-I90HD OK abit IC7 OK (autodetected) abit IP35 OK (autodetected) abit IP35 Pro OK (autodetected) abit IS-10 BAD abit KN8 Ultra OK (autodetected) abit NF-M2 nView OK (autodetected) abit NF7-S OK (autodetected) abit VA6 OK (autodetected) abit VT6X4 OK -m abit:vt6x4 Acorp 6A815EPD OK (autodetected) Advantech PCM-5820 OK agami Aruma OK -m AGAMI:ARUMA Albatron PM266A Pro OK (autodetected) AOpen vKM400Am-S OK Artec Group DBE61 OK -m artecgroup:dbe61 Artec Group DBE62 OK -m artecgroup:dbe62 ASI MB-5BLMP OK ASRock 775i65G OK (autodetected) ASRock 939A785GMH/128M OK ASRock A330GC OK ASRock A770CrossFire OK ASRock ALiveNF6G-DVI OK ASRock K7S41 OK (autodetected) ASRock K7VT4A+ BAD ASRock K8S8X OK ASRock M3A790GXH/128M OK ASRock P4i65GV OK (autodetected) ASUS A7N8X Deluxe OK ASUS A7N8X-E Deluxe OK ASUS A7V133 OK ASUS A7V333 OK (autodetected) ASUS A7V400-MX OK ASUS A7V600-X OK (autodetected) ASUS A7V8X OK (autodetected) ASUS A7V8X-MX OK ASUS A7V8X-MX SE OK (autodetected) ASUS A7V8X-X OK (autodetected) ASUS A8Jm OK (autodetected) ASUS A8N OK (autodetected) ASUS A8N-E OK ASUS A8N-LA (Nagami-GL8E) OK (autodetected) ASUS A8N-SLI OK ASUS A8N-SLI Premium OK ASUS A8N-VM CSM OK (autodetected) ASUS A8NE-FM/S OK ASUS A8V Deluxe OK ASUS A8V-E Deluxe OK ASUS A8V-E SE OK ASUS K8V OK ASUS K8V SE Deluxe OK ASUS K8V-X SE OK ASUS M2A-MX OK ASUS M2A-VM OK ASUS M2N32-SLI Deluxe OK ASUS M2N-E OK ASUS M2N-SLI Deluxe OK ASUS M2NBP-VM CSM OK (autodetected) ASUS M2NPV-VM OK ASUS M2V OK ASUS M2V-MX OK (autodetected) ASUS M3A76-CM OK ASUS M3A78-EM OK ASUS M4A785TD-M EVO OK ASUS M4A79T Deluxe OK ASUS M4A87TD/USB3 OK ASUS MEW-AM BAD ASUS MEW-VM BAD ASUS P2B OK ASUS P2B-D OK ASUS P2B-DS OK ASUS P2B-F OK ASUS P2B-N OK (autodetected) ASUS P2E-M OK ASUS P2L97-S OK ASUS P3B-F BAD ASUS P4B266 OK (autodetected) ASUS P4B266-LM OK (autodetected) ASUS P4B533-E OK (autodetected) ASUS P4C800-E Deluxe OK (autodetected) ASUS P4P800 OK (autodetected) ASUS P4P800-E Deluxe OK (autodetected) ASUS P4SC-E OK (autodetected) ASUS P4SD-LA OK (autodetected) ASUS P4S800-MX OK (autodetected) ASUS P5A OK -m asus:p5a ASUS P5B OK ASUS P5B-Deluxe OK ASUS P5BV-M BAD ASUS P5GC-MX/1333 OK ASUS P5GDC Deluxe OK (autodetected) ASUS P5KC OK ASUS P5L-MX OK ASUS P5GD1 Pro OK (autodetected) ASUS P5ND2-SLI Deluxe OK (autodetected) ASUS P5PE-VM OK (autodetected) ASUS P6T SE OK ASUS P6T Deluxe OK ASUS P6T Deluxe V2 OK ASUS Z8NA-D6C OK BCOM WinNET100 OK Biostar M6TBA BAD Biostar M7NCD Pro OK Biostar P4M80-M4 OK Biostar TA780G M2+ OK Boser HS-6637 BAD Congatec conga-X852 OK Dell OptiPlex GX1 OK (autodetected) Dell PowerEdge 1850 OK (autodetected) DFI 855GME-MGF BAD DFI Blood-Iron P35 T2RL OK Elitegroup GeForce6100SM-M OK Elitegroup K7S5A OK Elitegroup K7S6A OK Elitegroup K7VTA3 OK (autodetected) Elitegroup P6IWP-Fe OK Elitegroup P6VAP-A+ OK Elitegroup RS485M-M OK Emerson ATCA-7360 OK EPoX EP-8K5A2 OK (autodetected) EPoX EP-8RDA3+ OK (autodetected) EPoX EP-BX3 OK -m epox:ep-bx3 FIC VA-502 BAD Foxconn A6VMX OK Fujitsu-Siemens ESPRIMO P5915 OK GIGABYTE GA-2761GXDK OK GIGABYTE GA-6BXC OK GIGABYTE GA-6BXDU OK GIGABYTE GA-6IEM OK (autodetected) GIGABYTE GA-6ZMA OK GIGABYTE GA-MA785GMT-UD2H OK GIGABYTE GA-770TA-UD3 OK GIGABYTE GA-7DXR OK GIGABYTE GA-7VT600 OK GIGABYTE GA-7ZM OK (autodetected) GIGABYTE GA-8IRML OK (autodetected) GIGABYTE GA-8PE667 Ultra 2 OK (autodetected) GIGABYTE GA-965P-DS4 OK GIGABYTE GA-EP35-DS3L OK GIGABYTE GA-EX58-UD4P OK GIGABYTE GA-K8N-SLI OK (autodetected) GIGABYTE GA-K8N51GMF-9 OK (autodetected) GIGABYTE GA-M57SLI-S4 OK GIGABYTE GA-M61P-S3 OK GIGABYTE GA-MA69VM-S2 OK GIGABYTE GA-MA74GM-S2H (rev. 3.0) OK GIGABYTE GA-MA770T-UD3P OK GIGABYTE GA-MA78G-DS3H OK GIGABYTE GA-MA78GM-S2H OK GIGABYTE GA-MA78GPM-DS2H OK GIGABYTE GA-MA790FX-DQ6 OK GIGABYTE GA-MA790GP-DS4H OK HP ProLiant DL145 G3 OK -m hp:dl145_g3 HP ProLiant DL165 G6 OK -m hp:dl165_g6 HP Puffer2-UL8E OK (autodetected) HP Vectra VL400 OK (autodetected) HP Vectra VL420 SFF OK (autodetected) HP xw9400 OK (autodetected) IBASE MB899 OK -m ibase:mb899 IBM x3455 OK (autodetected) IEI PICOe-9452 OK Intel D201GLY OK (autodetected) Intel EP80759 OK Intel Foxhollow OK Intel Greencity OK Intel SE440BX-2 BAD (autodetected) IWILL DK8-HTX OK -m iwill:dk8_htx Jetway J7F4K1G5D-PB OK Kontron 986LCD-M OK -m kontron:986lcd-m Lex CV700A OK Mitac 6513WU OK (autodetected) MSI MS-6153 OK MSI MS-6156 OK MSI MS-6163 (MS-6163 Pro) OK (autodetected) MSI MS-6178 BAD MSI MS-6330 (K7T Turbo) OK MSI MS-6561 (745 Ultra) OK (autodetected) MSI MS-6570 (K7N2) OK MSI MS-6577 (Xenon) OK (autodetected) MSI MS-6590 (KT4 Ultra) OK (autodetected) MSI MS-6702E (K8T Neo2-F) OK (autodetected) MSI MS-6712 (KT4V) OK (autodetected) MSI MS-6787 (P4MAM-V/P4MAM-L) OK -m msi:ms6787 MSI MS-7005 (651M-L) OK (autodetected) MSI MS-7025 (K8N Neo2 Platinum) OK (autodetected) MSI MS-7046 OK (autodetected) MSI MS-7061 (KM4M-V/KM4AM-V) OK (autodetected) MSI MS-7065 OK MSI MS-7135 (K8N Neo3) OK -m msi:k8n-neo3 MSI MS-7168 (Orion) OK MSI MS-7207 (K8NGM2-L) OK (autodetected) MSI MS-7211 (PM8M3-V) OK MSI MS-7236 (945PL Neo3) OK MSI MS-7253 (K9VGM-V) OK MSI MS-7255 (P4M890M) OK MSI MS-7260, (K9N Neo) BAD MSI MS-7312 (K9MM-V) OK MSI MS-7345 (P35 Neo2-FIR) OK MSI MS-7368 (K9AG Neo2-Digital) OK MSI MS-7376 (K9A2 Platinum) OK MSI MS-7642 (890GXM-G65) OK NEC PowerMate 2000 OK Nokia IP530 OK (autodetected) PC Engines Alix.1c OK PC Engines Alix.2c2 OK PC Engines Alix.2c3 OK PC Engines Alix.3c3 OK PC Engines Alix.3d3 OK PC Engines WRAP.2E OK Portwell PEB-4700VLA OK RCA RM4100 OK Samsung Polaris 32 OK (autodetected) Shuttle AK31 OK -m shuttle:ak31 Shuttle AK38N OK (autodetected) Shuttle AV11V30 OK Shuttle FD37 OK Shuttle FN25 OK (autodetected) Shuttle X50/X50(B) OK Soyo SY-5VD BAD Soyo SY-6BA+ III OK Soyo SY-7VCA OK (autodetected) Sun Blade x6250 OK Sun Fire x4150 BAD Sun Fire x4200 BAD Sun Fire x4540 BAD Sun Fire x4600 BAD Supermicro H8QC8 OK Supermicro X8DTT-F OK T-Online S-100 OK Tekram P6Pro-A5 OK (autodetected) Termtek TK-3370 (Rev:2.5B) OK (autodetected) Thomson IP1000 OK TriGem Lomita OK Tyan S5375-1U (Tempest i5100X) OK Tyan S1846 (Tsunami ATX) OK Tyan S2466 (Tiger MPX) OK Tyan S2498 (Tomcat K7M) OK (autodetected) Tyan S2881 (Thunder K8SR) OK Tyan S2882 (Thunder K8S Pro) OK Tyan S2882-D (Thunder K8SD Pro) OK Tyan S2891 (Thunder K8SRE) OK Tyan S2892 (Thunder K8SE) OK Tyan S2895 (Thunder K8WE) OK Tyan S2915 (Thunder n6650W) OK Tyan S2915-E (Thunder n6650W) OK Tyan S2933 (Thunder n3600S) OK Tyan S3095 (Tomcat i945GM) OK Tyan S3992 (Thunder h2000M) OK Tyan S5180 (Toledo i965R) OK Tyan S5191 (Toledo i3000R) OK Tyan S5197 (Toledo i3010W) OK Tyan S5211 (Toledo i3210W) OK Tyan S5211-1U (Toledo i3200R) OK Tyan S5220 (Toledo q35T) OK Tyan S5375 (Tempest i5100X) OK Tyan S5376 (Tempest i5100W) OK Tyan S5377 (Tempest i5100T) OK Tyan S5382 (Tempest i5000PW) OK Tyan S5397 (Tempest i5400PW) OK VIA EPIA M/MII/... OK (autodetected) VIA EPIA SP OK VIA EPIA-CN OK VIA EPIA EK OK (autodetected) VIA EPIA-EX15000G OK VIA EPIA-LN OK VIA EPIA-M700 OK VIA EPIA-N/NL OK (autodetected) VIA EPIA-NX15000G OK VIA NAB74X0 OK VIA pc2500e OK VIA PC3500G OK VIA VB700X OK ZOTAC ZBOX HD-ID11 OK Known laptops (good: 2, bad: 7): Vendor: Board: Status: Required option: Acer Aspire 1520 OK Acer Aspire One BAD ASUS Eee PC 701 4G BAD Dell Latitude CPi A366XT BAD HP/Compaq nx9005 BAD HP/Compaq nx9010 BAD IBM/Lenovo Thinkpad T40p BAD IBM/Lenovo 240 BAD Lenovo 3000 V100 TF05Cxx OK Supported devices for the dummy programmer: Supported devices for the nic3com programmer: PCI devices: 3COM 3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX [10b7:9055] 3COM 3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4 [10b7:9001] (untested) 3COM 3C90xB: PCI 10BASE-T (TPO) [10b7:9004] 3COM 3C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO) [10b7:9005] (untested) 3COM 3C90xB: PCI 10BASE-T/10BASE2 (TPC) [10b7:9006] (untested) 3COM 3C90xB: PCI 10BASE-FL [10b7:900a] (untested) 3COM 3C90xB: PCI 10BASE-FX [10b7:905a] (untested) 3COM 3C905B: Cyclone 10/100/BNC [10b7:9058] 3COM 3C905C: EtherLink 10/100 PCI (TX) [10b7:9200] 3COM 3C980C: EtherLink Server 10/100 PCI (TX) [10b7:9805] (untested) Supported devices for the nicrealtek programmer: PCI devices: Realtek RTL8139/8139C/8139C+ [10ec:8139] Supported devices for the nicsmc1211 programmer: PCI devices: SMC2 1211TX [1113:1211] Supported devices for the nicnatsemi programmer: PCI devices: National Semiconductor DP83815/DP83816 [100b:20] (untested) National Semiconductor DP83820 [100b:22] (untested) Supported devices for the gfxnvidia programmer: PCI devices: NVIDIA Mutara V08 [NV2] [10de:10] (untested) NVIDIA RIVA 128 [10de:18] (untested) NVIDIA RIVA TNT [10de:20] (untested) NVIDIA RIVA TNT2/TNT2 Pro [10de:28] (untested) NVIDIA RIVA TNT2 Ultra [10de:29] (untested) NVIDIA Vanta/Vanta LT [10de:2c] (untested) NVIDIA RIVA TNT2 Model 64/Model 64 Pro [10de:2d] NVIDIA Aladdin TNT2 [10de:a0] (untested) NVIDIA GeForce 256 [10de:100] (untested) NVIDIA GeForce DDR [10de:101] (untested) NVIDIA Quadro [10de:103] (untested) NVIDIA GeForce2 MX [10de:110] (untested) NVIDIA GeForce2 MX [10de:111] (untested) NVIDIA GeForce2 GO [10de:112] (untested) NVIDIA Quadro2 MXR [10de:113] (untested) NVIDIA GeForce2 GTS/Pro [10de:150] (untested) NVIDIA GeForce2 GTS [10de:151] (untested) NVIDIA GeForce2 Ultra [10de:152] (untested) NVIDIA Quadro2 Pro [10de:153] (untested) NVIDIA GeForce 3 nFX [10de:200] (untested) NVIDIA GeForce 3 nFX [10de:201] (untested) NVIDIA GeForce 3 nFX Ultra [10de:202] (untested) NVIDIA Quadro 3 DDC [10de:203] (untested) Supported devices for the drkaiser programmer: PCI devices: Dr. Kaiser PC-Waechter (Actel FPGA) [1803:5057] Supported devices for the satasii programmer: PCI devices: Silicon Image PCI0680 Ultra ATA-133 Host Ctrl [1095:680] Silicon Image SiI 3112 [SATALink/SATARaid] SATA Ctrl [1095:3112] Silicon Image SiI 3114 [SATALink/SATARaid] SATA Ctrl [1095:3114] Silicon Image SiI 3124 PCI-X SATA Ctrl [1095:3124] Silicon Image SiI 3132 SATA Raid II Ctrl [1095:3132] Silicon Image SiI 3512 [SATALink/SATARaid] SATA Ctrl [1095:3512] Supported devices for the atahpt programmer: PCI devices: Highpoint HPT366/368/370/370A/372/372N [1103:04] (untested) Highpoint HPT372A/372N [1103:05] (untested) Highpoint HPT302/302N [1103:06] (untested) Supported devices for the ft2232_spi programmer: USB devices: FTDI FT2232H [0403:6010] FTDI FT4232H [0403:6011] Amontec JTAGkey [0403:cff8] Supported devices for the serprog programmer: Supported devices for the buspirate_spi programmer: Supported devices for the dediprog programmer: Supported devices for the rayer_spi programmer: Supported devices for the nicintel_spi programmer: PCI devices: Intel 82571EB Gigabit Ethernet Controller [8086:105e] Intel 82541PI Gigabit Ethernet Controller [8086:107c] Intel 82572EI Gigabit Ethernet Controller [8086:10b9] Patch: Index: flashrom-list_supported_programmers/flash.h =================================================================== --- flashrom-list_supported_programmers/flash.h (Revision 1196) +++ flashrom-list_supported_programmers/flash.h (Arbeitskopie) @@ -200,6 +200,7 @@ char *strcat_realloc(char *dest, const char *src); void print_version(void); void print_banner(void); +void list_programmers_linebreak(int startcol, int cols, int paren); int selfcheck(void); int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it); Index: flashrom-list_supported_programmers/pcidev.c =================================================================== --- flashrom-list_supported_programmers/pcidev.c (Revision 1196) +++ flashrom-list_supported_programmers/pcidev.c (Arbeitskopie) @@ -132,6 +132,7 @@ { int i; + msg_pinfo("PCI devices:\n"); for (i = 0; devs[i].vendor_name != NULL; i++) { msg_pinfo("%s %s [%02x:%02x]%s\n", devs[i].vendor_name, devs[i].device_name, devs[i].vendor_id, Index: flashrom-list_supported_programmers/cli_classic.c =================================================================== --- flashrom-list_supported_programmers/cli_classic.c (Revision 1196) +++ flashrom-list_supported_programmers/cli_classic.c (Arbeitskopie) @@ -33,11 +33,6 @@ static void cli_classic_usage(const char *name) { - const char *pname; - int pnamelen; - int remaining = 0; - enum programmer p; - printf("Usage: flashrom [-n] [-V] [-f] [-h|-R|-L|" #if CONFIG_PRINT_WIKI == 1 "-z|" @@ -83,32 +78,9 @@ "in wiki syntax\n" #endif " -p | --programmer <name>[:<param>] specify the programmer " - "device"); + "device\n"); - for (p = 0; p < PROGRAMMER_INVALID; p++) { - pname = programmer_table[p].name; - pnamelen = strlen(pname); - if (remaining - pnamelen - 2 < 0) { - printf("\n "); - remaining = 43; - } else { - printf(" "); - remaining--; - } - if (p == 0) { - printf("("); - remaining--; - } - printf("%s", pname); - remaining -= pnamelen; - if (p < PROGRAMMER_INVALID - 1) { - printf(","); - remaining--; - } else { - printf(")\n"); - } - } - + list_programmers_linebreak(37, 80, 1); printf("\nYou can specify one of -h, -R, -L, " #if CONFIG_PRINT_WIKI == 1 "-z, " Index: flashrom-list_supported_programmers/atahpt.c =================================================================== --- flashrom-list_supported_programmers/atahpt.c (Revision 1196) +++ flashrom-list_supported_programmers/atahpt.c (Arbeitskopie) @@ -30,7 +30,7 @@ #define PCI_VENDOR_ID_HPT 0x1103 -struct pcidev_status ata_hpt[] = { +const struct pcidev_status ata_hpt[] = { {0x1103, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"}, {0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"}, {0x1103, 0x0006, NT, "Highpoint", "HPT302/302N"}, Index: flashrom-list_supported_programmers/ft2232_spi.c =================================================================== --- flashrom-list_supported_programmers/ft2232_spi.c (Revision 1196) +++ flashrom-list_supported_programmers/ft2232_spi.c (Arbeitskopie) @@ -346,6 +346,7 @@ { int i; + msg_pinfo("USB devices:\n"); for (i = 0; devs[i].vendor_name != NULL; i++) { msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name, devs[i].device_name, devs[i].vendor_id, Index: flashrom-list_supported_programmers/flashrom.c =================================================================== --- flashrom-list_supported_programmers/flashrom.c (Revision 1196) +++ flashrom-list_supported_programmers/flashrom.c (Arbeitskopie) @@ -1332,6 +1332,46 @@ msg_ginfo("\n"); } +void list_programmers_linebreak(int startcol, int cols, int paren) +{ + const char *pname; + int pnamelen; + int remaining = 0; + int firstline = 1; + enum programmer p; + + for (p = 0; p < PROGRAMMER_INVALID; p++) { + pname = programmer_table[p].name; + pnamelen = strlen(pname); + if (remaining - pnamelen - 2 < 0) { + if (firstline) + firstline = 0; + else + printf("\n"); + for (int i = 0; i < startcol; i++) + printf(" "); + remaining = cols - startcol; + } else { + printf(" "); + remaining--; + } + if (paren && (p == 0)) { + printf("("); + remaining--; + } + printf("%s", pname); + remaining -= pnamelen; + if (p < PROGRAMMER_INVALID - 1) { + printf(","); + remaining--; + } else { + if (paren) + printf(")"); + printf("\n"); + } + } +} + void print_sysinfo(void) { #if HAVE_UTSNAME == 1 Index: flashrom-list_supported_programmers/print.c =================================================================== --- flashrom-list_supported_programmers/print.c (Revision 1196) +++ flashrom-list_supported_programmers/print.c (Arbeitskopie) @@ -223,50 +223,90 @@ void print_supported(void) { - print_supported_chips(); + print_supported_chips(); + + printf("\nSupported programmers:\n"); + list_programmers_linebreak(0, 80, 0); #if CONFIG_INTERNAL == 1 - print_supported_chipsets(); - print_supported_boards_helper(boards_known, "boards"); - print_supported_boards_helper(laptops_known, "laptops"); + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_INTERNAL].name); + print_supported_chipsets(); + print_supported_boards_helper(boards_known, "boards"); + print_supported_boards_helper(laptops_known, "laptops"); #endif -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1 - printf("\nSupported PCI devices flashrom can use " - "as programmer:\n\n"); +#if CONFIG_DUMMY == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_DUMMY].name); + /* FIXME */ #endif #if CONFIG_NIC3COM == 1 - print_supported_pcidevs(nics_3com); + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_NIC3COM].name); + print_supported_pcidevs(nics_3com); #endif #if CONFIG_NICREALTEK == 1 - print_supported_pcidevs(nics_realtek); - print_supported_pcidevs(nics_realteksmc1211); + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_NICREALTEK].name); + print_supported_pcidevs(nics_realtek); + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_NICREALTEK2].name); + print_supported_pcidevs(nics_realteksmc1211); #endif #if CONFIG_NICNATSEMI == 1 - print_supported_pcidevs(nics_natsemi); + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_NICNATSEMI].name); + print_supported_pcidevs(nics_natsemi); #endif #if CONFIG_GFXNVIDIA == 1 - print_supported_pcidevs(gfx_nvidia); + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_GFXNVIDIA].name); + print_supported_pcidevs(gfx_nvidia); #endif #if CONFIG_DRKAISER == 1 - print_supported_pcidevs(drkaiser_pcidev); + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_DRKAISER].name); + print_supported_pcidevs(drkaiser_pcidev); #endif #if CONFIG_SATASII == 1 - print_supported_pcidevs(satas_sii); + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_SATASII].name); + print_supported_pcidevs(satas_sii); #endif #if CONFIG_ATAHPT == 1 - print_supported_pcidevs(ata_hpt); + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_ATAHPT].name); + print_supported_pcidevs(ata_hpt); #endif -#if CONFIG_NICINTEL_SPI == 1 - print_supported_pcidevs(nics_intel_spi); +#if CONFIG_FT2232_SPI == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_FT2232_SPI].name); + print_supported_usbdevs(devs_ft2232spi); #endif - -#if CONFIG_FT2232_SPI+CONFIG_DEDIPROG >= 1 - printf("\nSupported USB devices flashrom can use " - "as programmer:\n\n"); +#if CONFIG_SERPROG == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_SERPROG].name); + /* FIXME */ #endif - -#if CONFIG_FT2232_SPI == 1 - print_supported_usbdevs(devs_ft2232spi); +#if CONFIG_BUSPIRATE_SPI == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_BUSPIRATE_SPI].name); + /* FIXME */ #endif +#if CONFIG_DEDIPROG == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_DEDIPROG].name); + /* FIXME */ +#endif +#if CONFIG_RAYER_SPI == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_RAYER_SPI].name); + /* FIXME */ +#endif +#if CONFIG_NICINTEL_SPI == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_NICINTEL_SPI].name); + print_supported_pcidevs(nics_intel_spi); +#endif } #if CONFIG_INTERNAL == 1 -- http://www.hailfinger.org/

4 8

Re: [flashrom] [PATCH 6/8] use getpagesize() to determine physmap's length in nicintel_spi.c
by Carl-Daniel Hailfinger 26 Aug '12

26 Aug '12

Am 15.03.2011 16:29 schrieb Stefan Tauner: > Signed-off-by: Stefan Tauner<stefan.tauner(a)student.tuwien.ac.at> > Right, this is a really good idea. Could you patch physmap instead to round down the requested address and round up the end of the range? Then we could just request the amount we need without having to care in each programmer driver about page size. I think somewhere in flashrom we even have rounding code for physmap, it just needs to be moved from a driver to the generic physmap. Your code looks solid. > --- > nicintel_spi.c | 7 +++++-- > 1 files changed, 5 insertions(+), 2 deletions(-) > > diff --git a/nicintel_spi.c b/nicintel_spi.c > index 5a6e04d..811ed6e 100644 > --- a/nicintel_spi.c > +++ b/nicintel_spi.c > @@ -26,11 +26,14 @@ > */ > > #include<stdlib.h> > +#include<unistd.h> > #include "flash.h" > #include "programmer.h" > > #define PCI_VENDOR_ID_INTEL 0x8086 > > +#define MEMMAP_SIZE getpagesize() > + > #define EECD 0x10 > #define FLA 0x1c > > @@ -148,7 +151,7 @@ int nicintel_spi_init(void) > io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); > > nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", > - io_base_addr, 4096); > + io_base_addr, MEMMAP_SIZE); > tmp = pci_mmio_readl(nicintel_spibar + EECD); > tmp&= ~FLASH_WRITES_DISABLED; > tmp |= FLASH_WRITES_ENABLED; > @@ -173,7 +176,7 @@ int nicintel_spi_shutdown(void) > tmp |= FLASH_WRITES_DISABLED; > pci_mmio_writel(tmp, nicintel_spibar + EECD); > > - physunmap(nicintel_spibar, 4096); > + physunmap(nicintel_spibar, MEMMAP_SIZE); > pci_cleanup(pacc); > release_io_perms(); > > Regards, Carl-Daniel -- http://www.hailfinger.org/

2 8

[PATCH 1/1] Simplify hwaccess.c
by Peter Lemenkov 26 Aug '12

26 Aug '12

This file is saturated with superfluous ifdefs arranged into several nested levels. This in turn adds additional complexity to process of adding another architecture. I re-arranged all ifdef blocks and killed duplicated function definitions. Also I added define(__amd64) to the list of x86-arches. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- hwaccess.c | 85 +++++++++++++++++++++-------------------------------------- 1 files changed, 30 insertions(+), 55 deletions(-) diff --git a/hwaccess.c b/hwaccess.c index 3a61e60..4e87642 100644 --- a/hwaccess.c +++ b/hwaccess.c @@ -29,30 +29,47 @@ #endif #include "flash.h" +#if !( defined(__i386__) || \ + defined(__x86_64__) || defined(__amd64) || \ + defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips) || \ + defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__)) +#error Unknown architecture +#endif + #if defined(__i386__) || defined(__x86_64__) +#if defined(__FreeBSD__) || defined(__DragonFly__) +int io_fd; +#endif +#endif -/* sync primitive is not needed because x86 uses uncached accesses - * which have a strongly ordered memory model. - */ static inline void sync_primitive(void) { -} - -#if defined(__FreeBSD__) || defined(__DragonFly__) -int io_fd; +/* sync primitive is needed only on PowerPC because + * x86 uses uncached accesses which have a strongly ordered memory model + * /dev/mem on MIPS uses uncached accesses in mode 2 which has a strongly ordered memory model. + */ +#if defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) + /* Prevent reordering and/or merging of reads/writes to hardware. + * Such reordering and/or merging would break device accesses which + * depend on the exact access order. + */ + asm("eieio" : : : "memory"); #endif +} void get_io_perms(void) { +/* PCI port I/O is not yet implemented on PowerPC or MIPS. */ +#if defined(__i386__) || defined(__x86_64__) || defined(__amd64) #if defined(__DJGPP__) /* We have full permissions by default. */ return; #else -#if defined (__sun) && (defined(__i386) || defined(__amd64)) +#if defined (__sun) if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { #elif defined(__FreeBSD__) || defined (__DragonFly__) if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#else +#else if (iopl(3) != 0) { #endif msg_perr("ERROR: Could not get I/O privileges (%s).\n" @@ -65,60 +82,18 @@ void get_io_perms(void) exit(1); } #endif +#endif } void release_io_perms(void) { +/* PCI port I/O is not yet implemented on PowerPC or MIPS. */ +#if defined(__i386__) || defined(__x86_64__) || defined(__amd64) #if defined(__FreeBSD__) || defined(__DragonFly__) close(io_fd); #endif -} - -#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) - -static inline void sync_primitive(void) -{ - /* Prevent reordering and/or merging of reads/writes to hardware. - * Such reordering and/or merging would break device accesses which - * depend on the exact access order. - */ - asm("eieio" : : : "memory"); -} - -/* PCI port I/O is not yet implemented on PowerPC. */ -void get_io_perms(void) -{ -} - -/* PCI port I/O is not yet implemented on PowerPC. */ -void release_io_perms(void) -{ -} - -#elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips) - -/* sync primitive is not needed because /dev/mem on MIPS uses uncached accesses - * in mode 2 which has a strongly ordered memory model. - */ -static inline void sync_primitive(void) -{ -} - -/* PCI port I/O is not yet implemented on MIPS. */ -void get_io_perms(void) -{ -} - -/* PCI port I/O is not yet implemented on MIPS. */ -void release_io_perms(void) -{ -} - -#else - -#error Unknown architecture - #endif +} void mmio_writeb(uint8_t val, void *addr) { -- 1.7.2.3

2 1

Re: [flashrom] [PATCH 5/7] warn if SMM BIOS Write Protection is detected in BIOS_CNTL
by Stefan Reinauer 26 Aug '12

26 Aug '12

On 5/23/11 4:23 PM, Stefan Tauner wrote: > Signed-off-by: Stefan Tauner<stefan.tauner(a)student.tuwien.ac.at> > --- > chipset_enable.c | 12 +++++++++++- > 1 files changed, 11 insertions(+), 1 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 83b49ad..339c6bb 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -264,8 +264,18 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, > (old& (1<< 0)) ? "en" : "dis"); > msg_pdbg("BIOS_CNTL is 0x%x\n", old); > > - new = old | 1; > + /* > + * Quote from the 6 Series datasheet: > + * "5: SMM BIOS Write Protect Disable (SMM_BWP) > + * 1 = BIOS region SMM protection is enabled. > + * The BIOS Region is not writable unless all processors are in SMM." > + * In earlier chipsets this bit is reserved. */ > + if (old& (5<< 1)) { > + msg_pinfo("WARNING: BIOS region SMM protection is enabled!\n"); > + return -1; You might still be successful doing the write, in case the SMM handler does not enforce the protection, so maybe you should just print a warning but not return here? > + } > > + new = old | 1; > if (new == old) > return 0; >

2 5

rtl8169 support - Final
by Jon Shadow 25 Aug '12

25 Aug '12

Fixed a few things. Still need someone to test it. Signed-off-by: Sergey Lichack <shadowpilot34(a)gmail.com>

4 3

[PATCH] board enable for DFI AD77
by Tadas Slotkus 25 Aug '12

25 Aug '12

Hello, Thank you people on the IRC for helping with assembler :) Happy Easter!

3 5

[PATCH] Make satasii driver more robust
by David Borg 25 Aug '12

25 Aug '12

Sorry, forgot to CC.the list. Updated patch to apply cleanly against latest revision (1151) and changed the string as pointed out by Rudolf Marek. Regards, David >-----BEGIN PGP SIGNED MESSAGE----- >Hash: SHA1 > >Hi thanks for doing that. > >Carl-Daniel Hailfinger wrote: >> Make the satasii driver more robust. >> >> Untested. >> >> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2...(a)gmx.net> >> >> Index: flashrom-satasii_robust/satasii.c >> =================================================================== >> --- flashrom-satasii_robust/satasii.c (Revision 1005) >> +++ flashrom-satasii_robust/satasii.c (Arbeitskopie) >> @@ -44,6 +44,7 @@ >> { >> uint32_t addr; >> uint16_t reg_offset; >> + uint32_t tmp; >> >> get_io_perms(); >> >> @@ -59,12 +60,19 @@ >> reg_offset = 0x50; >> } >> >> - sii_bar = physmap("SATA SIL registers", addr, 0x100) + reg_offset; >> + sii_bar = physmap("SATA SiI registers", addr, 0x100) + reg_offset; >> >> /* Check if ROM cycle are OK. */ >> if ((id != 0x0680) && (!(mmio_readl(sii_bar) & (1 << 26)))) >> msg_pinfo("Warning: Flash seems unconnected.\n"); >> >> + msg_pdbg("Using BAR5 access method.\n"); >> + tmp = pci_read_long(pcidev_dev, 0x40) & (1 << 1); >> + msg_pdbg("BAR5 Indirect Access is %snabled\n", tmp ? "en" : "dis"); >> + /* This bit has contradicting definitions in the 3512 datasheet. */ > >this looks strange you get dissnabled or ensabled ;) > >> + tmp = pci_read_long(pcidev_dev, 0x88) & (1 << 16); >> + msg_pdbg("BAR5 Access is %snabled\n", tmp ? "en" : "dis"); > >This Reg is EN_66 in other controllers so I guess it just this and not the >BA5_EN. It looks like it is driven by strap resistor only anyway. > >Interesting would be to test if BA5_EN is not enabled if you can access it >through indirect access through C0/C4 regs. > >Thanks, >Rudolf > > >> + >> buses_supported = CHIP_BUSTYPE_PARALLEL; >> >> return 0; >> @@ -81,6 +89,7 @@ >> void satasii_chip_writeb(uint8_t val, chipaddr addr) >> { >> uint32_t ctrl_reg, data_reg; >> + int i = 0; >> >> while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ; >> >> @@ -92,12 +101,19 @@ >> mmio_writel(data_reg, (sii_bar + 4)); >> mmio_writel(ctrl_reg, sii_bar); >> >> - while (mmio_readl(sii_bar) & (1 << 25)) ; >> + while (mmio_readl(sii_bar) & (1 << 25)) { >> + if (++i > 10000) { >> + msg_perr("%s: control reg stuck at %08x, aborting\n", >> + __func__, mmio_readl(sii_bar)); >> + break; >> + } >> + } >> } >> >> uint8_t satasii_chip_readb(const chipaddr addr) >> { >> uint32_t ctrl_reg; >> + int i = 0; >> >> while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ; >> >> @@ -107,7 +123,13 @@ >> >> mmio_writel(ctrl_reg, sii_bar); >> >> - while (mmio_readl(sii_bar) & (1 << 25)) ; >> + while (mmio_readl(sii_bar) & (1 << 25)) { >> + if (++i > 10000) { >> + msg_perr("%s: control reg stuck at %08x, aborting\n", >> + __func__, mmio_readl(sii_bar)); >> + break; >> + } >> + } >> >> return (mmio_readl(sii_bar + 4)) & 0xff; >> } >> >> >-----BEGIN PGP SIGNATURE----- >Version: GnuPG v1.4.10 (GNU/Linux) >Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org > >iEYEARECAAYFAkv4VwUACgkQ3J9wPJqZRNU4BQCfYmc1fp2kmy5SjQHjirrsKP82 >enkAoKQLbvmaCGs6/qNfawamobV7RayX >=7NEj >-----END PGP SIGNATURE----- > -- David Borg

2 1

Re: [flashrom] [PATCH] Make struct flashchip a field in struct flashctx instead of a complete copy.
by Carl-Daniel Hailfinger 25 Aug '12

25 Aug '12

Am 26.02.2012 02:05 schrieb Stefan Tauner: > This is not tested very thoroughly, but it compiles and writing the dummy works. > Most of the transformation is quite obvious and painless (well, it was no pleasure, > so i would rather not rebase this often. :) > I have introduced dedicated struct flashchip variables where the functions use the > chip field a lot and some of those (not) introduced variables may be debatable, > but one gets at least a feeling how the code would look like with this change. > > One major FIXME is: the code allocates "the new field" while probing and copies > the data from the *const* struct flashchip in the flashchips.c array into it. > We need to free that sometime... it is probably obvious (scope of fill_flash), but i > have not looked into it yet and this is my reminder. I have answered that in annotations. > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Good idea. It was too dangerous to do this directly before 0.9.5, but now that the tree has reopened, I think we can merge such a patch early in the cycle (now) and have enough time to get it tested. > diff --git a/cli_classic.c b/cli_classic.c > index 972043b..4bce7d7 100644 > --- a/cli_classic.c > +++ b/cli_classic.c > @@ -166,6 +166,7 @@ int main(int argc, char *argv[]) > const struct flashchip *flash; > struct flashctx flashes[3]; > struct flashctx *fill_flash; > + const struct flashchip *chip; > const char *name; > int namelen, opt, i, j; > int startchip = -1, chipcount = 0, option_index = 0, force = 0; > @@ -441,11 +442,13 @@ int main(int argc, char *argv[]) > } > } > > + fill_flash = &flashes[0]; Can you move this assignment back to where it was? > + chip = fill_flash->chip; And move this assignment together with the other one? > if (chipcount > 1) { > printf("Multiple flash chips were detected: \"%s\"", > - flashes[0].name); > + chip->name); Can you please use flashes[0].chip->name here to keep the code consistent? Besides that, do you have any idea why the current code is so screwed up? Moving a printf for flashes[0] outside a perfectly working for loop seems odd to me. It would be nice if you could just let the loop below start at i=0 and remove the chip name part from the printf above. > for (i = 1; i < chipcount; i++) > - printf(", \"%s\"", flashes[i].name); > + printf(", \"%s\"", flashes[i].chip->name); > printf("\nPlease specify which chip to use with the " > "-c <chipname> option.\n"); > ret = 1; > @@ -464,7 +467,7 @@ int main(int argc, char *argv[]) > /* This loop just counts compatible controllers. */ > for (j = 0; j < registered_programmer_count; j++) { > pgm = &registered_programmers[j]; > - if (pgm->buses_supported & flashes[0].bustype) > + if (pgm->buses_supported & chip->bustype) flashes[0].chip->bustype please. Note to self: This code needs to be audited again if it should really run against flashes[0] here. It looks odd, at least when looking only at the patch. > compatible_programmers++; > } > if (compatible_programmers > 1) > @@ -491,19 +494,17 @@ int main(int argc, char *argv[]) > goto out_shutdown; > } else if (!chip_to_probe) { > /* repeat for convenience when looking at foreign logs */ > - tempstr = flashbuses_to_text(flashes[0].bustype); > + tempstr = flashbuses_to_text(chip->bustype); > msg_gdbg("Found %s flash chip \"%s\" (%d kB, %s).\n", > - flashes[0].vendor, flashes[0].name, > - flashes[0].total_size, tempstr); > + chip->vendor, chip->name, > + chip->total_size, tempstr); And the flashes[0].chip dance again. > free(tempstr); > } > > - fill_flash = &flashes[0]; > - > - check_chip_supported(fill_flash); > + check_chip_supported(chip); > > - size = fill_flash->total_size * 1024; > - if (check_max_decode(fill_flash->pgm->buses_supported & fill_flash->bustype, size) && > + size = chip->total_size * 1024; > + if (check_max_decode(fill_flash->pgm->buses_supported & chip->bustype, size) && > (!force)) { > fprintf(stderr, "Chip is too big for this programmer " > "(-V gives details). Use --force to override.\n"); > diff --git a/flash.h b/flash.h > index 0dac13d..ed64512 100644 > --- a/flash.h > +++ b/flash.h > @@ -87,6 +87,7 @@ enum chipbustype { > #define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN) > > struct flashctx; > +typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen); > > struct flashchip { > const char *vendor; > @@ -135,7 +136,7 @@ struct flashchip { > } eraseblocks[NUM_ERASEREGIONS]; > /* a block_erase function should try to erase one block of size > * 'blocklen' at address 'blockaddr' and return 0 on success. */ > - int (*block_erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); > + erasefunc_t *block_erase; I really really hate that typedef. I wonder if we could keep the code here and use typeof() instead of the typedef elsewhere. > } block_erasers[NUM_ERASEFUNCTIONS]; > > int (*printlock) (struct flashctx *flash); > @@ -148,35 +149,14 @@ struct flashchip { > } voltage; > }; > > -/* struct flashctx must always contain struct flashchip at the beginning. */ > struct flashctx { > - const char *vendor; > - const char *name; > - enum chipbustype bustype; > - uint32_t manufacture_id; > - uint32_t model_id; > - int total_size; > - int page_size; > - int feature_bits; > - uint32_t tested; > - int (*probe) (struct flashctx *flash); > - int probe_timing; > - struct block_eraser block_erasers[NUM_ERASEFUNCTIONS]; > - int (*printlock) (struct flashctx *flash); > - int (*unlock) (struct flashctx *flash); > - int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); > - int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); > - struct voltage voltage; > - /* struct flashchip ends here. */ > - > + struct flashchip *chip; Yay! > chipaddr virtual_memory; > /* Some flash devices have an additional register space. */ > chipaddr virtual_registers; > struct registered_programmer *pgm; > }; > > -typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen); > - > #define TEST_UNTESTED 0 > > #define TEST_OK_PROBE (1 << 0) > diff --git a/flashrom.c b/flashrom.c > index cad043b..0b6cca3 100644 > --- a/flashrom.c > +++ b/flashrom.c > @@ -522,7 +522,7 @@ char *extract_programmer_param(const char *param_name) > } > > /* Returns the number of well-defined erasers for a chip. */ > -static unsigned int count_usable_erasers(const struct flashctx *flash) > +static unsigned int count_usable_erasers(const struct flashchip *flash) Do we want to count usable erasers for the current programmer (for chips with erase functions limited to certain buses)? If yes, please keep struct flashctx. > { > unsigned int usable_erasefunctions = 0; > int k; > @@ -941,32 +942,38 @@ int check_max_decode(enum chipbustype buses, uint32_t size) > int probe_flash(struct registered_programmer *pgm, int startchip, > struct flashctx *fill_flash, int force) > { > - const struct flashchip *flash; > + const struct flashchip *chip; > unsigned long base = 0; > char location[64]; > uint32_t size; > enum chipbustype buses_common; > char *tmp; > > - for (flash = flashchips + startchip; flash && flash->name; flash++) { > - if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) > + for (chip = flashchips + startchip; chip && chip->name; chip++) { > + if (chip_to_probe && strcmp(chip->name, chip_to_probe) != 0) > continue; > - buses_common = pgm->buses_supported & flash->bustype; > + buses_common = pgm->buses_supported & chip->bustype; > if (!buses_common) > continue; > msg_gdbg("Probing for %s %s, %d kB: ", > - flash->vendor, flash->name, flash->total_size); > - if (!flash->probe && !force) { > + chip->vendor, chip->name, chip->total_size); > + if (!chip->probe && !force) { > msg_gdbg("failed! flashrom has no probe function for " > "this flash chip.\n"); > continue; > } > > - size = flash->total_size * 1024; > + size = chip->total_size * 1024; > check_max_decode(buses_common, size); > > /* Start filling in the dynamic data. */ > - memcpy(fill_flash, flash, sizeof(struct flashchip)); > + /* FIXME: when to free? */ Tricky, but I think we are lucky here because there is only one path which returns a non-match and that's the only path where we want to free. I have annotated that place a few hunks below. > + fill_flash->chip = malloc(sizeof(struct flashchip)); > + if (fill_flash->chip == NULL) { > + msg_gerr("%s: out of memory.\n", __func__); > + return -1; Can we return an explicit code for OOM here or would that screw up the caller? > + } > + memcpy(fill_flash->chip, chip, sizeof(struct flashchip)); > fill_flash->pgm = pgm; > > base = flashbase ? flashbase : (0xffffffff - size + 1); > @@ -985,11 +992,11 @@ int probe_flash(struct registered_programmer *pgm, int startchip, > * one for this programmer interface and thus no other chip has > * been found on this interface. > */ > - if (startchip == 0 && fill_flash->model_id == SFDP_DEVICE_ID) { > + if (startchip == 0 && chip->model_id == SFDP_DEVICE_ID) { We used fill_flash for consistency (i.e. only use the rw copy of the flashchip entry) here, and if we want to keep that consistency, it's fill_flash->chip->model_id. > msg_cinfo("===\n" > "SFDP has autodetected a flash chip which is " > "not natively supported by flashrom yet.\n"); > - if (count_usable_erasers(fill_flash) == 0) > + if (count_usable_erasers(chip) == 0) See the count_usable_erasers comment a few hunks above. > msg_cinfo("The standard operations read and " > "verify should work, but to support " > "erase, write and all other " > @@ -1010,15 +1017,15 @@ int probe_flash(struct registered_programmer *pgm, int startchip, > } > > if (startchip == 0 || > - ((fill_flash->model_id != GENERIC_DEVICE_ID) && > - (fill_flash->model_id != SFDP_DEVICE_ID))) > + ((chip->model_id != GENERIC_DEVICE_ID) && > + (chip->model_id != SFDP_DEVICE_ID))) See above for fill_flash->chip->model_id. > break; > > notfound: > programmer_unmap_flash_region((void *)fill_flash->virtual_memory, size); > } > > - if (!flash || !flash->name) > + if (!chip || !chip->name) Here you have to free flash->chip. No other freeing is needed AFAICS. > return -1; > > #if CONFIG_INTERNAL == 1 > @@ -1028,27 +1035,27 @@ notfound: > #endif > snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name); > > - tmp = flashbuses_to_text(flash->bustype); > + tmp = flashbuses_to_text(chip->bustype); fill_flash->chip->... > msg_cinfo("%s %s flash chip \"%s\" (%d kB, %s) %s.\n", > - force ? "Assuming" : "Found", fill_flash->vendor, > - fill_flash->name, fill_flash->total_size, tmp, location); > + force ? "Assuming" : "Found", chip->vendor, > + chip->name, chip->total_size, tmp, location); dito > free(tmp); > > /* Flash registers will not be mapped if the chip was forced. Lock info > * may be stored in registers, so avoid lock info printing. > */ > if (!force) > - if (fill_flash->printlock) > - fill_flash->printlock(fill_flash); > + if (chip->printlock) dito > + chip->printlock(fill_flash); dito > > /* Return position of matching chip. */ > - return flash - flashchips; > + return chip - flashchips; > } > > int verify_flash(struct flashctx *flash, uint8_t *buf) > @@ -1308,7 +1315,7 @@ static int walk_eraseregions(struct flashctx *flash, int erasefunction, > return 0; > } > > -static int check_block_eraser(const struct flashctx *flash, int k, int log) > +static int check_block_eraser(const struct flashchip *flash, int k, int log) No conversion, please. See below. > { > struct block_eraser eraser = flash->block_erasers[k]; > > @@ -1357,7 +1366,7 @@ int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents, > break; > } > msg_cdbg("Trying erase function %i... ", k); > - if (check_block_eraser(flash, k, 1)) > + if (check_block_eraser(chip, k, 1)) This one is debatable. We know that some chips support certain erase functions only on some buses, e.g. Sharp LHF00L04 which can do a full-chip erase only if it is accesses in A/A Mux mode, not in FWH mode. My mid-term plan is to augment erase functions (and possibly also read/write/probe) with a list of valid buses for any given function. > continue; > usable_erasefunctions--; > ret = walk_eraseregions(flash, k, &erase_and_write_block_helper, > @@ -1550,14 +1559,6 @@ int selfcheck(void) > msg_gerr("Flashchips table miscompilation!\n"); > ret = 1; > } > - /* Check that virtual_memory in struct flashctx is placed directly > - * after the members copied from struct flashchip. > - */ > - if (sizeof(struct flashchip) != > - offsetof(struct flashctx, virtual_memory)) { > - msg_gerr("struct flashctx broken!\n"); > - ret = 1; > - } Glad to lose this hunk! > for (flash = flashchips; flash && flash->name; flash++) > if (selfcheck_eraseblocks(flash)) > ret = 1; > @@ -1642,7 +1643,7 @@ void check_chip_supported(const struct flashctx *flash) > /* FIXME: This function signature needs to be improved once doit() has a better > * function signature. > */ > -int chip_safety_check(struct flashctx *flash, int force, int read_it, > +int chip_safety_check(const struct flashchip *flash, int force, int read_it, Can you please make sure that all pointers to struct flashchip are called "chip"? Otherwise grepping for "chip->" won't return all accesses to struct flashchip. The same comment applies to other hunks of the patch as well. However, chip_safety_check can not be converted to a different calling convention because we need struct flashctx here. Admittedly we don't need it right now, but we will need it once programmer_may_write is part of the programmer struct in struct flashctx. > int write_it, int erase_it, int verify_it) > { > if (!programmer_may_write && (write_it || erase_it)) { > @@ -1710,9 +1711,10 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, > uint8_t *oldcontents; > uint8_t *newcontents; > int ret = 0; > - unsigned long size = flash->total_size * 1024; > + const struct flashchip *chip = flash->chip; > + unsigned long size = chip->total_size * 1024; > > - if (chip_safety_check(flash, force, read_it, write_it, erase_it, verify_it)) { > + if (chip_safety_check(chip, force, read_it, write_it, erase_it, verify_it)) { No conversion, please. See above. > msg_cerr("Aborting.\n"); > ret = 1; > goto out_nofree; > @@ -1791,7 +1793,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, > > // This should be moved into each flash part's code to do it > // cleanly. This does the job. > - handle_romentries(flash, oldcontents, newcontents); > + handle_romentries(chip, oldcontents, newcontents); No conversion, please. See two hunks below. > > // //////////////////////////////////////////////////////////// > > diff --git a/jedec.c b/jedec.c > index 69c0c0c..5c549a2 100644 > --- a/jedec.c > +++ b/jedec.c > @@ -93,7 +93,7 @@ void data_polling_jedec(const struct flashctx *flash, chipaddr dst, > msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i); > } > > -static unsigned int getaddrmask(struct flashctx *flash) > +static unsigned int getaddrmask(const struct flashchip *flash) Hm yes, const makes sense. In fact, const makes sense in many more places. > { > switch (flash->feature_bits & FEATURE_ADDR_MASK) { > case FEATURE_ADDR_FULL: > diff --git a/layout.c b/layout.c > index 90d3cce..f0f7a6f 100644 > --- a/layout.c > +++ b/layout.c > @@ -302,7 +302,7 @@ romlayout_t *get_next_included_romentry(unsigned int start) > return best_entry; > } > > -int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents) > +int handle_romentries(const struct flashchip *flash, uint8_t *oldcontents, uint8_t *newcontents) Will we have to change this back once we try to merge the layout patches? In that case, we need some way to get permissible regions from the programmer, and that would probably be done via the programmer struct. > { > unsigned int start = 0; > romlayout_t *entry; > diff --git a/spi25.c b/spi25.c > index b7e8189..2accb6d 100644 > --- a/spi25.c > +++ b/spi25.c > @@ -416,22 +416,23 @@ void spi_prettyprint_status_register_sst25vf040b(uint8_t status) > > int spi_prettyprint_status_register(struct flashctx *flash) > { > + const struct flashchip *chip = flash->chip; const struct flashchip here, but just struct flashchip in the next hunk. What's the reason? Same question applies to other hunks of the patch as well. > uint8_t status; > > status = spi_read_status_register(flash); > msg_cdbg("Chip status register is %02x\n", status); > - switch (flash->manufacture_id) { > + switch (chip->manufacture_id) { > case ST_ID: > - if (((flash->model_id & 0xff00) == 0x2000) || > - ((flash->model_id & 0xff00) == 0x2500)) > + if (((chip->model_id & 0xff00) == 0x2000) || > + ((chip->model_id & 0xff00) == 0x2500)) > spi_prettyprint_status_register_st_m25p(status); > break; > case MACRONIX_ID: > - if ((flash->model_id & 0xff00) == 0x2000) > + if ((chip->model_id & 0xff00) == 0x2000) > spi_prettyprint_status_register_st_m25p(status); > break; > case SST_ID: > - switch (flash->model_id) { > + switch (chip->model_id) { > case 0x2541: > spi_prettyprint_status_register_sst25vf016(status); > break; > @@ -862,16 +863,17 @@ static int spi_write_status_register_wren(struct flashctx *flash, int status) > > int spi_write_status_register(struct flashctx *flash, int status) > { > + struct flashchip *chip = flash->chip; > int ret = 1; > > - if (!(flash->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { > + if (!(chip->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { > msg_cdbg("Missing status register write definition, assuming " > "EWSR is needed\n"); > - flash->feature_bits |= FEATURE_WRSR_EWSR; > + chip->feature_bits |= FEATURE_WRSR_EWSR; > } > - if (flash->feature_bits & FEATURE_WRSR_WREN) > + if (chip->feature_bits & FEATURE_WRSR_WREN) > ret = spi_write_status_register_wren(flash, status); > - if (ret && (flash->feature_bits & FEATURE_WRSR_EWSR)) > + if (ret && (chip->feature_bits & FEATURE_WRSR_EWSR)) > ret = spi_write_status_register_ewsr(flash, status); > return ret; > } I think the next iteration of this patch can go in. Regards, Carl-Daniel -- http://www.hailfinger.org/

2 7

New flash chips, AT49F010 and CAT28F512
by Andrew Morgan 14 Aug '12

14 Aug '12

AT49F010 patch is basically a copy of the existing AT49F020 code, but with half the size and the correct ID. The log was from a write of random data, after the chip already contained different random data. I did separate read, erase, write tests before but this log seems to show that PREW all work. CAT28F512 I have successfully probed and read data from, but erase fails. Could be because it needs 12v VPP. The CAT28F512 I have is soldered on to a NIC. I haven't investigated if VPP is connected at all yet. Thought I'd include the patch as-is anyway. Both patches: Signed-off-by: Andrew Morgan <ziltro(a)ziltro.com> -- Andrew.

3 10

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flashrom March 2012