flashrom February 2012

flashrom@flashrom.org

43 participants
189 discussions

Just asking some basic advice before I flash the BIOS.
by Sergio Cipolla 15 Feb '12

15 Feb '12

Hello. First of all, thank you for flashrom. I have an ECS k7vta3 mobo with VT8233A southbridge. # flashrom -r bios.old flashrom v0.9.4-r1394 on Linux 3.2.0-1-686-pae (i686), built with libpci 3.1.7, GCC 4.6.1, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "VIA VT8233A". Enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Found PMC flash chip "Pm29F002T" (256 kB, Parallel) at physical address 0xfffc0000. === This flash part has status UNTESTED for operations: WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! I have the latest BIOS (k7vta330d.exe) here. To write it I would simply run # flashrom -wv k7vta330d.exe right? Should I add any -V just in case too?

1 0

Re: [flashrom] [PATCH] Reformat the internal programmer section in the man page.
by Carl-Daniel Hailfinger 15 Feb '12

15 Feb '12

Am 14.02.2012 15:51 schrieb Stefan Tauner: > The section describing the various options of the internal programmer has grown > out of proportions and it has become confusing. This patch adds some headlines > to devide the unrelated topics a bit. > --- > I would also like to make the syntax examples non-bold so that the headlines > stick out more (TBH i don't see the point in making the examples stick out that > much by making them bold and reside on their own line at all). I don't really care about whether we make examples bold or not, but they must (in the RFC sense) be on their own line to avoid catastropical word wrapping and automatic hyphenation as much as possible. > The dummy programmer probably needs something similar rather > sooner than later. > > Opinions and other format command suggestions are very welcome! > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

Re: [flashrom] [PATCH] dummyflasher: Add a status register to SPI chips.
by Carl-Daniel Hailfinger 15 Feb '12

15 Feb '12

Am 31.01.2012 06:51 schrieb Stefan Tauner: > This is just a quick hack, that could be expanded. What do you think? > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Very good idea! > --- a/dummyflasher.c > +++ b/dummyflasher.c > @@ -55,6 +55,7 @@ static unsigned int emu_jedec_be_52_size = 0; > static unsigned int emu_jedec_be_d8_size = 0; > static unsigned int emu_jedec_ce_60_size = 0; > static unsigned int emu_jedec_ce_c7_size = 0; > +static uint8_t emu_status = 0; > #endif > #endif > > @@ -126,6 +127,9 @@ int dummy_init(void) > { > char *bustext = NULL; > char *tmp = NULL; > +#if EMULATE_SPI_CHIP > + char *status = NULL; > +#endif > #if EMULATE_CHIP > struct stat image_stat; > #endif > @@ -178,6 +182,14 @@ int dummy_init(void) > goto dummy_init_out; > } > #if EMULATE_SPI_CHIP > + status = extract_programmer_param("status"); > + if (status) { > + emu_status = atoi(status); > + msg_pdbg("Initial status register is set to 0x%02x.\n", > + emu_status); > + free(status); > + } > + > if (!strcmp(tmp, "M25P10.RES")) { > emu_chip = EMULATE_ST_M25P10_RES; > emu_chip_size = 128 * 1024; > @@ -385,10 +397,26 @@ static int emulate_spi_chip_response(unsigned int writecnt, > if (readcnt > 2) > readarr[2] = 0x4a; > break; > - case JEDEC_RDSR: > - memset(readarr, 0, readcnt); > + case JEDEC_RDSR: { > + uint8_t tmp_status = emu_status; > if (aai_active) > - memset(readarr, 1 << 6, readcnt); > + tmp_status |= 1 << 6; The WIP (write in progress) / WEL (write enable latch) /AIP (AAI in progress) logic should be moved to the respective commands so RDSR just does memset(readarr, emu_status, readcnt); > + memset(readarr, tmp_status, readcnt); > + break; > + } > + case JEDEC_WREN: > + emu_status |= (1 << 1); > + break; > + case JEDEC_WRSR: > + if (!(emu_status & (1 << 1))) { > + msg_perr("WRSR attempted, but WEL is 0!\n"); > + return 1; Don't return 1 because a real chip wouldn't return an error either, it would just ignore the command. > + } > + if (aai_active) { > + msg_perr("WRSR attempted during AAI sequence!\n"); > + return 1; dito. > + } > + emu_status = writearr[1] & 0xFC; /* resets WEL and WIP */ > break; > case JEDEC_READ: > offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; After the end of the switch statement we should clear WEL if the command was not WREN/EWSR. Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

[PATCH 5/5] Add support for Atmel's AT25F series of SPI flash chips.
by Stefan Tauner 15 Feb '12

15 Feb '12

Besides the definitions of the the chips in flashchips.c this includes - a dedicated probing method (probe_spi_at25f) - a pretty printing method (spi_prettyprint_status_register_at25f), and - an unlocking method (spi_disable_blockprotect_at25f) Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- at25.c | 98 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ chipdrivers.h | 3 ++ flashchips.c | 90 ++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 10 ++--- spi.h | 9 +++-- 5 files changed, 200 insertions(+), 10 deletions(-) diff --git a/at25.c b/at25.c index 803e7e4..d0761f7 100644 --- a/at25.c +++ b/at25.c @@ -63,6 +63,24 @@ static void spi_prettyprint_status_register_atmel_at25_swp(uint8_t status) } } +/* used for AT25F512(A), AT25F1024(A) */ +int spi_prettyprint_status_register_at25f(struct flashctx *flash) +{ + uint8_t status; + + status = spi_read_status_register(flash); + msg_cdbg("Chip status register is %02x\n", status); + + spi_prettyprint_status_register_atmel_at25_wpen(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_bit(status, 5); + spi_prettyprint_status_register_bit(status, 4); + /* FIXME: Bit 3 is undefined on AT25F512A */ + spi_prettyprint_status_register_bp(status, 1); + spi_prettyprint_status_register_welwip(status); + return 0; +} + int spi_prettyprint_status_register_at25df(struct flashctx *flash) { uint8_t status; @@ -154,6 +172,58 @@ int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash) return 0; } +int spi_disable_blockprotect_at25f(struct flashctx *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(flash); + /* If block protection is disabled (BP0 and BP1 are 0), stop here. */ + if ((status & (3 << 2)) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling... "); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Write Protect Enable (WPEN)\n"); + /* The following is used in spi_disable_blockprotect_at25df + * to check the state of the hardware lock pin. This is not + * possible with this chip, so we have to try. + if ((status & (1 << 4)) == 0) { + msg_cerr("WP# pin is active, disabling " + "write protection is impossible.\n"); + return 1; + } + */ + /* All bits except bit 7 (WPEN) are readonly. If the WP pin is + * low, WPEN is readonly and this will fail. */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + status = spi_read_status_register(flash); + if (status & (1 << 7)) { + msg_cerr("WP# pin is probably active, disabling " + "write protection is impossible.\n"); + return 1; + } + + } + /* Global unprotect. Make sure to mask WPEN as well. */ + result = spi_write_status_register(flash, status & ~0x8c); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + status = spi_read_status_register(flash); + if ((status & (3 << 2)) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + msg_cdbg("done.\n"); + return 0; +} + int spi_disable_blockprotect_at25df(struct flashctx *flash) { uint8_t status; @@ -279,3 +349,31 @@ int spi_disable_blockprotect_at25fs040(struct flashctx *flash) msg_cdbg("done.\n"); return 0; } + +int probe_spi_at25f(struct flashctx *flash) +{ + static const unsigned char cmd[AT25F_RDID_OUTSIZE] = { AT25F_RDID }; + unsigned char readarr[AT25F_RDID_INSIZE]; + uint32_t id1; + uint32_t id2; + + if (spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr)) { + msg_cdbg("\n"); + return 0; + } + id1 = readarr[0]; + id2 = readarr[1]; + + msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); + + if (id1 == flash->manufacture_id && id2 == flash->model_id) { + /* Print the status register to tell the + * user about possible write protection. + */ + spi_prettyprint_status_register_at25f(flash); + + return 1; + } + + return 0; +} diff --git a/chipdrivers.h b/chipdrivers.h index 44eca65..9996493 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -74,15 +74,18 @@ int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash); /* at25.c */ int spi_prettyprint_status_register_at25df(struct flashctx *flash); int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash); +int spi_prettyprint_status_register_at25f(struct flashctx *flash); int spi_prettyprint_status_register_at25f512b(struct flashctx *flash); int spi_prettyprint_status_register_at25fs010(struct flashctx *flash); int spi_prettyprint_status_register_at25fs040(struct flashctx *flash); int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash); int spi_disable_blockprotect_at25df(struct flashctx *flash); int spi_disable_blockprotect_at25df_sec(struct flashctx *flash); +int spi_disable_blockprotect_at25f(struct flashctx *flash); int spi_disable_blockprotect_at25f512b(struct flashctx *flash); int spi_disable_blockprotect_at25fs010(struct flashctx *flash); int spi_disable_blockprotect_at25fs040(struct flashctx *flash); +int probe_spi_at25f(struct flashctx *flash); /* 82802ab.c */ uint8_t wait_82802ab(struct flashctx *flash); diff --git a/flashchips.c b/flashchips.c index 80f29f6..b2d1fcc 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1651,6 +1651,65 @@ const struct flashchip flashchips[] = { { .vendor = "Atmel", + .name = "AT25F512", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F512, + .total_size = 64, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f, + .unlock = spi_disable_blockprotect_at25f, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Atmel", + .name = "AT25F512A", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F512A, + .total_size = 64, + .page_size = 128, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f, + /* Not correct to use this one, because the BP1 bit is N/A. */ + .unlock = spi_disable_blockprotect_at25f, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Atmel", .name = "AT25F512B", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, @@ -1693,6 +1752,37 @@ const struct flashchip flashchips[] = { { .vendor = "Atmel", + /* The A suffix indicates 33MHz instead of 20MHz clock rate. + * All other properties seem to be the same.*/ + .name = "AT25F1024(A)", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F1024, + .total_size = 128, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f, + .unlock = spi_disable_blockprotect_at25f, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Atmel", .name = "AT25FS010", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, diff --git a/flashchips.h b/flashchips.h index 03efb86..888fd1a 100644 --- a/flashchips.h +++ b/flashchips.h @@ -134,13 +134,11 @@ #define ATMEL_AT25DF321A 0x4701 #define ATMEL_AT25DF641 0x4800 #define ATMEL_AT25DQ161 0x8600 -#define ATMEL_AT25F512 /* No device ID found in datasheet. Vendor ID - * can be read with AT25F512A_RDID */ -#define ATMEL_AT25F512A 0x65 /* Needs AT25F512A_RDID */ +#define ATMEL_AT25F512 0x65 /* guessed, no device ID in datasheet. + * Vendor ID can be read with AT25F_RDID */ +#define ATMEL_AT25F512A 0x65 /* Needs AT25F_RDID */ #define ATMEL_AT25F512B 0x6500 -#define ATMEL_AT25F1024 /* No device ID found in datasheet. Vendor ID - * can be read with AT25F512A_RDID */ -#define ATMEL_AT25F1024A 0x60 /* Needs AT25F512A_RDID */ +#define ATMEL_AT25F1024 0x60 /* Needs AT25F_RDID */ #define ATMEL_AT25FS010 0x6601 #define ATMEL_AT25FS040 0x6604 #define ATMEL_AT26DF041 0x4400 diff --git a/spi.h b/spi.h index adb9109..a5c3406 100644 --- a/spi.h +++ b/spi.h @@ -30,10 +30,11 @@ /* INSIZE may be 0x04 for some chips*/ #define JEDEC_RDID_INSIZE 0x03 -/* AT25F512A has bit 3 as don't care bit in commands */ -#define AT25F512A_RDID 0x15 /* 0x15 or 0x1d */ -#define AT25F512A_RDID_OUTSIZE 0x01 -#define AT25F512A_RDID_INSIZE 0x02 +/* Some Atmel AT25F* models have bit 3 as don't care bit in commands */ +/* 0x15 or 0x1d */ +#define AT25F_RDID 0x15 +#define AT25F_RDID_OUTSIZE 0x01 +#define AT25F_RDID_INSIZE 0x02 /* Read Electronic Manufacturer Signature */ #define JEDEC_REMS 0x90 -- 1.7.1

1 0

[PATCH 4/5] Add spi_block_erase_62.
by Stefan Tauner 15 Feb '12

15 Feb '12

This is used by the AT25F series (only?), but is generic enough to reside in spi25.c. The only currently supported chip is the AT25F512B. Other members of that series need some additional infrastructure code, hence this patch adds the erase function to the AT25F512B only. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipdrivers.h | 1 + flashchips.c | 3 +++ spi.h | 5 +++++ spi25.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 56 insertions(+), 0 deletions(-) diff --git a/chipdrivers.h b/chipdrivers.h index 420564d..44eca65 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -40,6 +40,7 @@ int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int b int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); diff --git a/flashchips.c b/flashchips.c index 3656794..80f29f6 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1679,6 +1679,9 @@ const struct flashchip flashchips[] = { }, { .eraseblocks = { {64 * 1024, 1} }, .block_erase = spi_block_erase_c7, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_62, } }, .printlock = spi_prettyprint_status_register_at25f512b, diff --git a/spi.h b/spi.h index b908603..adb9109 100644 --- a/spi.h +++ b/spi.h @@ -61,6 +61,11 @@ #define JEDEC_CE_60_OUTSIZE 0x01 #define JEDEC_CE_60_INSIZE 0x00 +/* Chip Erase 0x62 is supported by Atmel AT25F chips. */ +#define JEDEC_CE_62 0x62 +#define JEDEC_CE_62_OUTSIZE 0x01 +#define JEDEC_CE_62_INSIZE 0x00 + /* Chip Erase 0xc7 is supported by SST/ST/EON/Macronix chips. */ #define JEDEC_CE_C7 0xc7 #define JEDEC_CE_C7_OUTSIZE 0x01 diff --git a/spi25.c b/spi25.c index 5c5048d..0d02559 100644 --- a/spi25.c +++ b/spi25.c @@ -488,6 +488,43 @@ int spi_chip_erase_60(struct flashctx *flash) return 0; } +int spi_chip_erase_62(struct flashctx *flash) +{ + int result; + struct spi_command cmds[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_CE_62_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_CE_62 }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + result = spi_send_multicommand(flash, cmds); + if (result) { + msg_cerr("%s failed during command execution\n", + __func__); + return result; + } + /* Wait until the Write-In-Progress bit is cleared. + * This usually takes 2-5 s, so wait in 100 ms steps. + */ + /* FIXME: We assume spi_read_status_register will never fail. */ + while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) + programmer_delay(100 * 1000); + /* FIXME: Check the status register for errors. */ + return 0; +} + int spi_chip_erase_c7(struct flashctx *flash) { int result; @@ -712,6 +749,16 @@ int spi_block_erase_60(struct flashctx *flash, unsigned int addr, return spi_chip_erase_60(flash); } +int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + if ((addr != 0) || (blocklen != flash->total_size * 1024)) { + msg_cerr("%s called with incorrect arguments\n", + __func__); + return -1; + } + return spi_chip_erase_62(flash); +} + int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { -- 1.7.1

1 0

[PATCH 3/5] Rename AT25F512B-specific code.
by Stefan Tauner 15 Feb '12

15 Feb '12

The AT25F512B is quite different from the other (older and yet unsupported) chips in the AT25F* familiy, hence rename 512B-specific stuff to make room for the generic AT25F* code Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- at25.c | 4 ++-- chipdrivers.h | 4 ++-- flashchips.c | 5 +++-- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/at25.c b/at25.c index 817e769..803e7e4 100644 --- a/at25.c +++ b/at25.c @@ -86,7 +86,7 @@ int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash) return spi_prettyprint_status_register_at25df(flash); } -int spi_prettyprint_status_register_at25f(struct flashctx *flash) +int spi_prettyprint_status_register_at25f512b(struct flashctx *flash) { uint8_t status; @@ -202,7 +202,7 @@ int spi_disable_blockprotect_at25df_sec(struct flashctx *flash) return spi_disable_blockprotect_at25df(flash); } -int spi_disable_blockprotect_at25f(struct flashctx *flash) +int spi_disable_blockprotect_at25f512b(struct flashctx *flash) { /* spi_disable_blockprotect_at25df is not really the right way to do * this, but the side effects of said function work here as well. diff --git a/chipdrivers.h b/chipdrivers.h index b20030b..420564d 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -73,13 +73,13 @@ int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash); /* at25.c */ int spi_prettyprint_status_register_at25df(struct flashctx *flash); int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash); -int spi_prettyprint_status_register_at25f(struct flashctx *flash); +int spi_prettyprint_status_register_at25f512b(struct flashctx *flash); int spi_prettyprint_status_register_at25fs010(struct flashctx *flash); int spi_prettyprint_status_register_at25fs040(struct flashctx *flash); int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash); int spi_disable_blockprotect_at25df(struct flashctx *flash); int spi_disable_blockprotect_at25df_sec(struct flashctx *flash); -int spi_disable_blockprotect_at25f(struct flashctx *flash); +int spi_disable_blockprotect_at25f512b(struct flashctx *flash); int spi_disable_blockprotect_at25fs010(struct flashctx *flash); int spi_disable_blockprotect_at25fs040(struct flashctx *flash); diff --git a/flashchips.c b/flashchips.c index ca1c57f..3656794 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1657,6 +1657,7 @@ const struct flashchip flashchips[] = { .model_id = ATMEL_AT25F512B, .total_size = 64, .page_size = 256, + /* TODO: chip features 128-byte one-time programmable region */ .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, @@ -1680,8 +1681,8 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_at25f, - .unlock = spi_disable_blockprotect_at25f, + .printlock = spi_prettyprint_status_register_at25f512b, + .unlock = spi_disable_blockprotect_at25f512b, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, -- 1.7.1

1 0

[PATCH 2/5] Refine messages of SPI block protection disables.
by Stefan Tauner 15 Feb '12

15 Feb '12

Make them real progress indicators with a final "done" message on success. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- at25.c | 21 ++++++++++++--------- spi25.c | 5 +++-- 2 files changed, 15 insertions(+), 11 deletions(-) diff --git a/at25.c b/at25.c index 8891e2b..817e769 100644 --- a/at25.c +++ b/at25.c @@ -164,7 +164,7 @@ int spi_disable_blockprotect_at25df(struct flashctx *flash) if ((status & (3 << 2)) == 0) return 0; - msg_cdbg("Some block protection in effect, disabling\n"); + msg_cdbg("Some block protection in effect, disabling... "); if (status & (1 << 7)) { msg_cdbg("Need to disable Sector Protection Register Lock\n"); if ((status & (1 << 4)) == 0) { @@ -175,7 +175,7 @@ int spi_disable_blockprotect_at25df(struct flashctx *flash) /* All bits except bit 7 (SPRL) are readonly. */ result = spi_write_status_register(flash, status & ~(1 << 7)); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } @@ -183,7 +183,7 @@ int spi_disable_blockprotect_at25df(struct flashctx *flash) /* Global unprotect. Make sure to mask SPRL as well. */ result = spi_write_status_register(flash, status & ~0xbc); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } status = spi_read_status_register(flash); @@ -191,6 +191,7 @@ int spi_disable_blockprotect_at25df(struct flashctx *flash) msg_cerr("Block protection could not be disabled!\n"); return 1; } + msg_cdbg("done.\n"); return 0; } @@ -219,20 +220,20 @@ int spi_disable_blockprotect_at25fs010(struct flashctx *flash) if ((status & 0x6c) == 0) return 0; - msg_cdbg("Some block protection in effect, disabling\n"); + msg_cdbg("Some block protection in effect, disabling... "); if (status & (1 << 7)) { msg_cdbg("Need to disable Status Register Write Protect\n"); /* Clear bit 7 (WPEN). */ result = spi_write_status_register(flash, status & ~(1 << 7)); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } } /* Global unprotect. Make sure to mask WPEN as well. */ result = spi_write_status_register(flash, status & ~0xec); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } status = spi_read_status_register(flash); @@ -240,6 +241,7 @@ int spi_disable_blockprotect_at25fs010(struct flashctx *flash) msg_cerr("Block protection could not be disabled!\n"); return 1; } + msg_cdbg("done.\n"); return 0; } @@ -253,20 +255,20 @@ int spi_disable_blockprotect_at25fs040(struct flashctx *flash) if ((status & 0x7c) == 0) return 0; - msg_cdbg("Some block protection in effect, disabling\n"); + msg_cdbg("Some block protection in effect, disabling... "); if (status & (1 << 7)) { msg_cdbg("Need to disable Status Register Write Protect\n"); /* Clear bit 7 (WPEN). */ result = spi_write_status_register(flash, status & ~(1 << 7)); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } } /* Global unprotect. Make sure to mask WPEN as well. */ result = spi_write_status_register(flash, status & ~0xfc); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } status = spi_read_status_register(flash); @@ -274,5 +276,6 @@ int spi_disable_blockprotect_at25fs040(struct flashctx *flash) msg_cerr("Block protection could not be disabled!\n"); return 1; } + msg_cdbg("done.\n"); return 0; } diff --git a/spi25.c b/spi25.c index eaae204..5c5048d 100644 --- a/spi25.c +++ b/spi25.c @@ -951,10 +951,10 @@ int spi_disable_blockprotect(struct flashctx *flash) if ((status & 0x3c) == 0) return 0; - msg_cdbg("Some block protection in effect, disabling\n"); + msg_cdbg("Some block protection in effect, disabling... "); result = spi_write_status_register(flash, status & ~0x3c); if (result) { - msg_cerr("spi_write_status_register failed\n"); + msg_cerr("spi_write_status_register failed.\n"); return result; } status = spi_read_status_register(flash); @@ -962,6 +962,7 @@ int spi_disable_blockprotect(struct flashctx *flash) msg_cerr("Block protection could not be disabled!\n"); return 1; } + msg_cdbg("done.\n"); return 0; } -- 1.7.1

1 0

[PATCH 1/5] Clean up a25.c, at25.c, spi25.c.
by Stefan Tauner 15 Feb '12

15 Feb '12

- introduce spi_prettyprint_status_register_atmel_at25_wpen() - use spi_prettyprint_status_register_bit() where possible - generify spi_prettyprint_status_register_bp3210 and use it in at25.c too Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- a25.c | 8 ++++---- at25.c | 31 +++++++++++-------------------- chipdrivers.h | 2 +- spi25.c | 15 +++++++++------ 4 files changed, 25 insertions(+), 31 deletions(-) diff --git a/a25.c b/a25.c index b0c6b90..8c38f87 100644 --- a/a25.c +++ b/a25.c @@ -40,7 +40,7 @@ int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash) spi_prettyprint_status_register_bit(status, 6); spi_prettyprint_status_register_bit(status, 5); spi_prettyprint_status_register_bit(status, 4); - spi_prettyprint_status_register_bp3210(status, 1); + spi_prettyprint_status_register_bp(status, 1); spi_prettyprint_status_register_welwip(status); return 0; } @@ -55,7 +55,7 @@ int spi_prettyprint_status_register_amic_a25l40p(struct flashctx *flash) spi_prettyprint_status_register_amic_a25_srwd(status); spi_prettyprint_status_register_bit(status, 6); spi_prettyprint_status_register_bit(status, 5); - spi_prettyprint_status_register_bp3210(status, 2); + spi_prettyprint_status_register_bp(status, 2); spi_prettyprint_status_register_welwip(status); return 0; } @@ -72,7 +72,7 @@ int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash) "is %i KB\n", (status & (1 << 6)) ? 4 : 64); msg_cdbg("Chip status register: Top/Bottom (TB) " "is %s\n", (status & (1 << 5)) ? "bottom" : "top"); - spi_prettyprint_status_register_bp3210(status, 2); + spi_prettyprint_status_register_bp(status, 2); spi_prettyprint_status_register_welwip(status); msg_cdbg("Chip status register 2 is NOT decoded!\n"); return 0; @@ -90,7 +90,7 @@ int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash) "is %i KB\n", (status & (1 << 6)) ? 4 : 64); msg_cdbg("Chip status register: Top/Bottom (TB) " "is %s\n", (status & (1 << 5)) ? "bottom" : "top"); - spi_prettyprint_status_register_bp3210(status, 2); + spi_prettyprint_status_register_bp(status, 2); spi_prettyprint_status_register_welwip(status); msg_cdbg("Chip status register 2 is NOT decoded!\n"); return 0; diff --git a/at25.c b/at25.c index ec9b4b6..8891e2b 100644 --- a/at25.c +++ b/at25.c @@ -23,6 +23,12 @@ /* Prettyprint the status register. Works for Atmel A25/A26 series. */ +static void spi_prettyprint_status_register_atmel_at25_wpen(uint8_t status) +{ + msg_cdbg("Chip status register: Write Protect Enable (WPEN) " + "is %sset\n", (status & (1 << 7)) ? "" : "not "); +} + static void spi_prettyprint_status_register_atmel_at25_srpl(uint8_t status) { msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) " @@ -91,10 +97,7 @@ int spi_prettyprint_status_register_at25f(struct flashctx *flash) spi_prettyprint_status_register_bit(status, 6); spi_prettyprint_status_register_atmel_at25_epewpp(status); spi_prettyprint_status_register_bit(status, 3); - msg_cdbg("Chip status register: Block Protect 0 (BP0) is " - "%sset, %s sectors are protected\n", - (status & (1 << 2)) ? "" : "not ", - (status & (1 << 2)) ? "all" : "no"); + spi_prettyprint_status_register_bp(status, 0); spi_prettyprint_status_register_welwip(status); return 0; } @@ -106,14 +109,12 @@ int spi_prettyprint_status_register_at25fs010(struct flashctx *flash) status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " - "is %sset\n", (status & (1 << 7)) ? "" : "not "); + spi_prettyprint_status_register_atmel_at25_wpen(status); msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is " "%sset\n", (status & (1 << 6)) ? "" : "not "); msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " "%sset\n", (status & (1 << 5)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 4 is " - "%sset\n", (status & (1 << 4)) ? "" : "not "); + spi_prettyprint_status_register_bit(status, 4); msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is " "%sset\n", (status & (1 << 3)) ? "" : "not "); msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is " @@ -130,18 +131,8 @@ int spi_prettyprint_status_register_at25fs040(struct flashctx *flash) status = spi_read_status_register(flash); msg_cdbg("Chip status register is %02x\n", status); - msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " - "is %sset\n", (status & (1 << 7)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is " - "%sset\n", (status & (1 << 6)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " - "%sset\n", (status & (1 << 5)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is " - "%sset\n", (status & (1 << 4)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is " - "%sset\n", (status & (1 << 3)) ? "" : "not "); - msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is " - "%sset\n", (status & (1 << 2)) ? "" : "not "); + spi_prettyprint_status_register_atmel_at25_wpen(status); + spi_prettyprint_status_register_bp(status, 4); /* FIXME: Pretty-print detailed sector protection status. */ spi_prettyprint_status_register_welwip(status); return 0; diff --git a/chipdrivers.h b/chipdrivers.h index a1d0cd9..b20030b 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -47,7 +47,7 @@ int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int uint8_t spi_read_status_register(struct flashctx *flash); int spi_write_status_register(struct flashctx *flash, int status); void spi_prettyprint_status_register_bit(uint8_t status, int bit); -void spi_prettyprint_status_register_bp3210(uint8_t status, int bp); +void spi_prettyprint_status_register_bp(uint8_t status, int bp); void spi_prettyprint_status_register_welwip(uint8_t status); int spi_prettyprint_status_register(struct flashctx *flash); int spi_disable_blockprotect(struct flashctx *flash); diff --git a/spi25.c b/spi25.c index 3ce7f08..eaae204 100644 --- a/spi25.c +++ b/spi25.c @@ -327,21 +327,24 @@ void spi_prettyprint_status_register_welwip(uint8_t status) } /* Prettyprint the status register. Common definitions. */ -void spi_prettyprint_status_register_bp3210(uint8_t status, int bp) +void spi_prettyprint_status_register_bp(uint8_t status, int bp) { switch (bp) { /* Fall through. */ + case 4: + msg_cdbg("Chip status register: Block Protect 4 (BP4) " + "is %sset\n", (status & (1 << 5)) ? "" : "not "); case 3: - msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) " + msg_cdbg("Chip status register: Block Protect 3 (BP3) " "is %sset\n", (status & (1 << 5)) ? "" : "not "); case 2: - msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) " + msg_cdbg("Chip status register: Block Protect 2 (BP2) " "is %sset\n", (status & (1 << 4)) ? "" : "not "); case 1: - msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) " + msg_cdbg("Chip status register: Block Protect 1 (BP1) " "is %sset\n", (status & (1 << 3)) ? "" : "not "); case 0: - msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) " + msg_cdbg("Chip status register: Block Protect 0 (BP0) " "is %sset\n", (status & (1 << 2)) ? "" : "not "); } } @@ -355,7 +358,7 @@ void spi_prettyprint_status_register_bit(uint8_t status, int bit) static void spi_prettyprint_status_register_common(uint8_t status) { - spi_prettyprint_status_register_bp3210(status, 3); + spi_prettyprint_status_register_bp(status, 3); spi_prettyprint_status_register_welwip(status); } -- 1.7.1

1 0

[PATCH 0/5] AT25F* 3.0
by Stefan Tauner 15 Feb '12

15 Feb '12

Rebased this old series... 2/5 is new. The bunch of block protection disables may be valid target for refactoring because they share lots of code, but have slightly different constants… Stefan Tauner (5): Clean up a25.c, at25.c, spi25.c. Refine messages of SPI block protection disables. Rename AT25F512B-specific code. Add spi_block_erase_62. Add support for Atmel's AT25F series of SPI flash chips. a25.c | 8 ++-- at25.c | 154 +++++++++++++++++++++++++++++++++++++++++++++----------- chipdrivers.h | 6 ++- flashchips.c | 94 +++++++++++++++++++++++++++++++++++ flashchips.h | 10 ++-- spi.h | 14 ++++-- spi25.c | 67 ++++++++++++++++++++++--- 7 files changed, 299 insertions(+), 54 deletions(-)

1 0

Re: [flashrom] FAILED: FR597AA-AKD m9360.pl (FR597AA#AKD)
by Michael Karcher 15 Feb '12

15 Feb '12

Am Dienstag, den 14.02.2012, 11:39 +0100 schrieb Mariusz Cygan: >> Verifying flash... VERIFY FAILED at 0x00011a00! Expected=0x05, Read=0xff, >> failed byte count from 0x00000000-0x000fffff: 0x1f8 >> Your flash chip is in an unknown state. >> Get help on IRC at irc.freenode.net (channel #flashrom) or >> mail flashrom(a)flashrom.org with FAILED: your board name in the subject line! > :( and now I have to pay for the reprogramming of bone BIOS. Restored > back however, and so does not work. I don't completely understand what you mean by "restore back", if it means "reboot", you are right, the chip likely needs to be reprogrammed outside of that mainboard. In case of a desktop, the chip is likely socketed (8-pin DIP) and easily replaceable. Also, as only a low amount of bytes failed to get reprogrammed, chances are good that some flash recovery mode (if supported by that BIOS) kicks in if you try to power on the machine. On the other hand, if "restore back" means restoring the old bios (a backup you did with flashrom) and the thus the upgrade didn't work, please give it a second try. As I read the error message, writing the new image *nearly* worked, only around 500 bytes mismatched, and at least the first byte mismatch is likely explained by missing programming of a "page" of 256 bytes. Many flash chips are quite picky on how the write instruction is issued, and it might be that flashrom is slightly unreliable in getting it completely right so the flash chip ignored the write instruction if something looks fishy. I have to admit I don't know what exactly might cause such a failure, though. If that theory is indeed right, just retrying to write NT35.bin a second time would likely have fixed the situation too, especially as flashrom detects what areas really need to be reprogrammed and leaves the correctly written areas alone. If restoring the old BIOS worked as I guessed in the three steps above, I would encourage you to try writing the new image again, please run flashrom in verbose mode (add -V) and send the output to the mailing list. If writing fails again, please retry with the same image, and attach the log of the write process to the mail, too. Regards, Michael Karcher

1 0

← Newer
1
...
11
12
13
14
15
16
17
18
19
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

flashrom February 2012