flashrom March 2011

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[PATCH] Add support for "ST M25PX16" chip.
by Carl Worth 06 Mar '11

06 Mar '11

This was created by simply copying the M25PX32 block and verifying with the M25PX16 datasheet which values needed to be changed. (The only changes are the model_id and the 4 size-related fields). Also, this commit sets the new M25PX16 as having write support tested, (where the M25PX32 does not). This is after running successful write and verify operations to 4 different M25PX16 chips with a Dediprog SF100. Signed-off-by: Carl Worth <carl.d.worth(a)intel.com> --- flashchips.c | 29 +++++++++++++++++++++++++++++ flashchips.h | 1 + 2 files changed, 30 insertions(+), 0 deletions(-) diff --git a/flashchips.c b/flashchips.c index e7a2223..0b84ae1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6269,6 +6269,35 @@ struct flashchip flashchips[] = { { .vendor = "ST", + .name = "M25PX16", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ST_ID, + .model_id = ST_M25PX16, + .total_size = 2048, + .page_size = 256, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 4 * 1024, 512 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "ST", .name = "M25PX32", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ST_ID, diff --git a/flashchips.h b/flashchips.h index 6504edf..bbdb5ae 100644 --- a/flashchips.h +++ b/flashchips.h @@ -531,6 +531,7 @@ #define ST_M25P32 0x2016 #define ST_M25P64 0x2017 #define ST_M25P128 0x2018 +#define ST_M25PX16 0x7115 #define ST_M25PX32 0x7116 #define ST_M25PX64 0x7117 #define ST_M25PE10 0x8011 -- 1.7.2.3

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[commit] r1270 - trunk
by repository service 06 Mar '11

06 Mar '11

Author: hailfinger Date: Sun Mar 6 19:45:40 2011 New Revision: 1270 URL: http://flashrom.org/trac/flashrom/changeset/1270 Log: Add support for ST M25PX16 and mark it as supported. Tests were performed with write and verify operations to 4 different M25PX16 chips with a Dediprog SF100. Signed-off-by: Carl Worth <carl.d.worth(a)intel.com> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Mar 6 19:31:11 2011 (r1269) +++ trunk/flashchips.c Sun Mar 6 19:45:40 2011 (r1270) @@ -6516,6 +6516,35 @@ { .vendor = "ST", + .name = "M25PX16", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ST_ID, + .model_id = ST_M25PX16, + .total_size = 2048, + .page_size = 256, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 4 * 1024, 512 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "ST", .name = "M25PX32", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ST_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun Mar 6 19:31:11 2011 (r1269) +++ trunk/flashchips.h Sun Mar 6 19:45:40 2011 (r1270) @@ -533,6 +533,7 @@ #define ST_M25P32 0x2016 #define ST_M25P64 0x2017 #define ST_M25P128 0x2018 +#define ST_M25PX16 0x7115 #define ST_M25PX32 0x7116 #define ST_M25PX64 0x7117 #define ST_M25PE10 0x8011

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SST49LF080A fully tested and EVGA nForce 780i board supported
by Brandon Dowdy 06 Mar '11

06 Mar '11

This patch marks this chip as fully tested and the nForce 780i mainboard as supported. Signed-off-by: Brandon Dowdy <brandonrd7(a)gmail.com>

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[commit] r1269 - trunk
by repository service 06 Mar '11

06 Mar '11

Author: hailfinger Date: Sun Mar 6 19:31:11 2011 New Revision: 1269 URL: http://flashrom.org/trac/flashrom/changeset/1269 Log: Mark SST49LF080A as fully tested. Mark EVGA nForce 780i board as supported. Full logs are here: http://www.flashrom.org/pipermail/flashrom/2011-January/005779.html Signed-off-by: Brandon Dowdy <brandonrd7(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c trunk/print.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Mar 6 18:58:05 2011 (r1268) +++ trunk/flashchips.c Sun Mar 6 19:31:11 2011 (r1269) @@ -6144,7 +6144,7 @@ .total_size = 1024, .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = TIMING_FIXME, .block_erasers = Modified: trunk/print.c ============================================================================== --- trunk/print.c Sun Mar 6 18:58:05 2011 (r1268) +++ trunk/print.c Sun Mar 6 19:31:11 2011 (r1269) @@ -463,6 +463,7 @@ B("EPoX", "EP-8NPA7I", 1, "http://epox.com/product.asp?ID=EP-8NPA7I", NULL), B("EPoX", "EP-8RDA3+", 1, "http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL), B("EPoX", "EP-BX3", 1, "http://www.epox.com/product.asp?ID=EP-BX3", NULL), + B("EVGA", "132-CK-NF78", 1, "http://http://www.evga.com/articles/385.asp", NULL), B("FIC", "VA-502", 0, "ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. Seems the PCI subsystem IDs are identical with the Tekram P6Pro-A5. May work now."), B("Foxconn", "A6VMX", 1, "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=…", NULL), B("Fujitsu-Siemens", "ESPRIMO P5915", 1, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRI…", "Mainboard model is D2312-A2."),

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Add NSC PC87364 support to superiotool
by Michael Karcher 06 Mar '11

06 Mar '11

Hello jankeso, in the process of writing a board enable procedure for your mainboard I stumbled upon the fact that the chip used to control the write enable line is most likely your Super I/O chip, which is a NSC PC87364. superiotool currently does not support dumping that chip, so I can not verify that indeed the GPIO port of the Super I/O chip is accessed (at address 0x80C). I attached a patch to dump the contents of that chip to this mail. Please apply that patch to current superiotool CVS sources (to be obtained from svn://coreboot.org/repos/trunk/util/superiotool) and attach the output to a reply to this mail or upload to paste.flashrom.org. This mail has been cc'ed to the coreboot list for getting this patch included into superiotool. If something is wrong with that patch, please Cc: me, as I am not subscribed to the coreboot list. Thanks. Regards, Michael Karcher

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[commit] r1268 - trunk
by repository service 06 Mar '11

06 Mar '11

Author: mkarcher Date: Sun Mar 6 18:58:05 2011 New Revision: 1268 URL: http://flashrom.org/trac/flashrom/changeset/1268 Log: Add W39L040 Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/w39.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Sun Mar 6 18:37:30 2011 (r1267) +++ trunk/chipdrivers.h Sun Mar 6 18:58:05 2011 (r1268) @@ -110,6 +110,7 @@ int unlock_sst_fwhub(struct flashchip *flash); /* w39.c */ +int printlock_w39l040(struct flashchip * flash); int printlock_w39v040a(struct flashchip *flash); int printlock_w39v040b(struct flashchip *flash); int printlock_w39v040c(struct flashchip *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Mar 6 18:37:30 2011 (r1267) +++ trunk/flashchips.c Sun Mar 6 18:58:05 2011 (r1268) @@ -7820,6 +7820,36 @@ { .vendor = "Winbond", + .name = "W39L040", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = WINBOND_ID, + .model_id = WINBOND_W39L040, + .total_size = 512, + .page_size = 64 * 1024, + .feature_bits = FEATURE_EITHER_RESET, + .tested = TEST_OK_PR, + .probe = probe_jedec, + .probe_timing = 10, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_block_jedec, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, + .printlock = printlock_w39l040, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { + .vendor = "Winbond", .name = "W39V040A", .bustype = CHIP_BUSTYPE_LPC, .manufacture_id = WINBOND_ID, Modified: trunk/w39.c ============================================================================== --- trunk/w39.c Sun Mar 6 18:37:30 2011 (r1267) +++ trunk/w39.c Sun Mar 6 18:58:05 2011 (r1268) @@ -161,6 +161,22 @@ return 0; } +int printlock_w39l040(struct flashchip * flash) +{ + uint8_t lock; + int ret; + + lock = w39_idmode_readb(flash, 0x00002); + msg_cdbg("Bottom boot block:\n"); + ret = printlock_w39_bootblock_64k16k(lock); + + lock = w39_idmode_readb(flash, 0x7fff2); + msg_cdbg("Top boot block:\n"); + ret |= printlock_w39_bootblock_64k16k(lock); + + return ret; +} + int printlock_w39v040a(struct flashchip *flash) { uint8_t lock;

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patch resend
by Brandon Dowdy 06 Mar '11

06 Mar '11

This is a resend of the same patch. »[PATCH]« Signed-off-by: Brandon Dowdy <brandonrd7 at gmail.com <http://www.flashrom.org/mailman/listinfo/flashrom>>

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[commit] r1267 - trunk
by repository service 06 Mar '11

06 Mar '11

Author: mkarcher Date: Sun Mar 6 18:37:30 2011 New Revision: 1267 URL: http://flashrom.org/trac/flashrom/changeset/1267 Log: Add coreboot IDs to make manual selection of HP xw9400 possible Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sun Mar 6 13:09:05 2011 (r1266) +++ trunk/board_enable.c Sun Mar 6 18:37:30 2011 (r1267) @@ -1965,7 +1965,7 @@ {0x8086, 0x2580, 0x103c, 0x2a08, 0x8086, 0x2640, 0x103c, 0x2a0a, NULL, NULL, NULL, "HP", "Puffer2-UL8E", 0, OK, intel_ich_gpio18_raise}, {0x8086, 0x2415, 0x103c, 0x1249, 0x10b7, 0x9200, 0x103c, 0x1246, NULL, NULL, NULL, "HP", "Vectra VL400", 0, OK, board_hp_vl400}, {0x8086, 0x1a30, 0x103c, 0x1a30, 0x8086, 0x2443, 0x103c, 0x2440, "^VL420$", NULL, NULL, "HP", "Vectra VL420 SFF", 0, OK, intel_ich_gpio22_raise}, - {0x10de, 0x0369, 0x103c, 0x12fe, 0x10de, 0x0364, 0x103c, 0x12fe, NULL, NULL, NULL, "HP", "xw9400", 0, OK, nvidia_mcp_gpio5_raise}, + {0x10de, 0x0369, 0x103c, 0x12fe, 0x10de, 0x0364, 0x103c, 0x12fe, NULL, "hp", "xw9400", "HP", "xw9400", 0, OK, nvidia_mcp_gpio5_raise}, {0x8086, 0x27A0, 0, 0, 0x8086, 0x27B9, 0, 0, NULL, "ibase", "mb899", "IBASE", "MB899", 0, OK, intel_ich_gpio26_raise}, {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, OK, board_ibm_x3455}, {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi},

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Re: [flashrom] [PATCH 1/1] Board-enable for GA-K8N51GMF
by Carl-Daniel Hailfinger 06 Mar '11

06 Mar '11

Auf 04.02.2011 10:55, Michael Karcher schrieb: > Gigabyte is not really helpful with their PCI IDs for us, the subsystem > IDs used just mean "gigabyte northbridge" and "gigabyte southbridge". > We should investigate whether autodetection of this board is causing > interference with other boards. > > real version 2: Extend list of PCI IDs for nvidia southbridges. > > flashrom -V: http://paste.flashrom.org/view.php?id=326 > lspic: http://paste.flashrom.org/view.php?id=328 > superiotool: http://paste.flashrom.org/view.php?id=329 > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 1/1] Add HP e-Vectra P2706T
by Carl-Daniel Hailfinger 06 Mar '11

06 Mar '11

Auf 03.03.2011 23:42, Michael Karcher schrieb: > Reported by: Michal Janke <jankeso(a)gmail.com> > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > Thanks for reverse engineering this board enable! Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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flashrom March 2011