flashrom December 2011

flashrom@flashrom.org

45 participants
143 discussions

Re: [flashrom] [PATCH 3/3] serprog: add support for setting the SPI frequency
by Uwe Hermann 03 Feb '12

03 Feb '12

On Thu, Sep 08, 2011 at 12:56:23AM +0200, Stefan Tauner wrote: > +0x14 Set SPI clock frequency 16-bit requested frequency ACK + 16-bit set frequency / NAK ^ "Set SPI clock frequency (in Hz)" > + 0x14 (S_SPI_SCK): Please rename to S_SPI_FREQ (also all other places with 'SCK'). SCK is often used to name a clock pin, this is unnecessarily confusing here. > + Set the SPI clock frequency. ^ in Hz > + f_spi = extract_programmer_param("sck"); sck -> freq > + if (f_spi && strlen(f_spi)) { > + uint8_t buf[2]; > + uint16_t tmp = atoi(f_spi); Hm, maybe use strtol() later and check for errors, atoi() is not so good for that. > + if (sp_check_commandavail(S_CMD_S_SPI_SCK) == 0) > + msg_pdbg(MSGHEADER "Setting SPI clock rate is " > + "not supported!\n"); > + else if (sp_docommand(S_CMD_S_SPI_SCK, 2, buf, 2, buf) > + == 0) { > + tmp = buf[0] | (buf[1]<<8); ^^ Missing spaces. > + msg_pdbg(MSGHEADER "Requested to set SPI clock " > + "frequency to %s kHz. It was actually " > + "set to %d kHz\n", f_spi, tmp); kHz -> Hz I would highly recommend to use Hz as the unit for setting the frequency (in the API). The frontend (flashrom) can easily allow freq=1000, or freq=1khz, or freq=1mhz etc. for user friendlyness, but the API should maintain max. flexibility IMHO. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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FOSDEM 2012
by Carl-Daniel Hailfinger 28 Jan '12

28 Jan '12

Hey, it seems we forgot to apply for a devroom (well, at least I didn't see anything on the mailing list). Should we submit talks to the individual devrooms? Should we ask for a coreboot/flashrom booth/table? Regards, Carl-Daniel

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[PATCH] Clean up error code definitions
by Carl-Daniel Hailfinger 11 Jan '12

11 Jan '12

This is split off the bus pirate buffer management revamp patch where it didn't really belong. Thanks to Stefan Tauner for the suggestion. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-errorcodes/flash.h =================================================================== --- flashrom-errorcodes/flash.h (Revision 1463) +++ flashrom-errorcodes/flash.h (Arbeitskopie) @@ -33,10 +33,18 @@ #undef max #endif +/* Error code list, specific errors first, generic errors second. */ +/* Out of memory */ +#define ERROR_OOM -100 +/* Timeout */ +#define ERROR_TIMEOUT -101 +/* Something happened that shouldn't happen, but we can go on. */ +#define ERROR_NONFATAL -110 +/* Something happened that shouldn't happen, we'll abort. */ +#define ERROR_FATAL -111 +/* For functions which can only return pointers */ #define ERROR_PTR ((void*)-1) -/* Error codes */ -#define TIMEOUT_ERROR -101 typedef unsigned long chipaddr; @@ -224,12 +232,6 @@ #define OK 0 #define NT 1 /* Not tested */ -/* Something happened that shouldn't happen, but we can go on. */ -#define ERROR_NONFATAL 0x100 - -/* Something happened that shouldn't happen, we'll abort. */ -#define ERROR_FATAL -0xee - /* cli_output.c */ /* Let gcc and clang check for correct printf-style format strings. */ int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3))); Index: flashrom-errorcodes/spi25.c =================================================================== --- flashrom-errorcodes/spi25.c (Revision 1463) +++ flashrom-errorcodes/spi25.c (Arbeitskopie) @@ -769,7 +769,7 @@ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) { if (++i > 490) { msg_cerr("Error: WIP bit after WRSR never cleared\n"); - return TIMEOUT_ERROR; + return ERROR_TIMEOUT; } programmer_delay(10 * 1000); } @@ -817,7 +817,7 @@ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) { if (++i > 490) { msg_cerr("Error: WIP bit after WRSR never cleared\n"); - return TIMEOUT_ERROR; + return ERROR_TIMEOUT; } programmer_delay(10 * 1000); } -- http://www.hailfinger.org/

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X8DTT-H
by Jimmie Tauriainen 09 Jan '12

09 Jan '12

Hi, This is a Supermicro X8DTT-HIBQF but it uses the same BIOS as X8DTT-H as refered in DMI. Probably all H8DTT* boards uses same. Anyway attaching flashrom -V outputs. root@spts-10-143:~/flashrom# dmidecode -t baseboard # dmidecode 2.9 SMBIOS 2.6 present. Handle 0x0002, DMI type 2, 15 bytes Base Board Information Manufacturer: Supermicro Product Name: X8DTT-H Version: 2.0 Serial Number: 1234567890 Asset Tag: 1234567890 Features: Board is a hosting board Board is replaceable Location In Chassis: 1234567890 Chassis Handle: 0x0003 Type: Motherboard Contained Object Handles: 0 Best regards, Jimmie

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2CHIPSET: Alix 6F2
by Philip Prindeville 04 Jan '12

04 Jan '12

# flashrom flashrom v0.9.3-r1205 on Linux 2.6.39.4 (i586), built with libpci 3.1.7, GCC 4.5.4 20110808 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found chipset "AMD CS5536", enabling flash write... OK. WARNING: unexpected second chipset match: "AMD CS5536" ignoring, please report lspci and board URL to flashrom(a)flashrom.org with 2CHIPSET: your board name in the subject line. This chipset supports the following protocols: Non-SPI. Found chip "AMIC A49LF040A" (512 KB, LPC) at physical address 0xfff80000. No operations were specified. #

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AMD SB7xx/SB8xx w/IMC: enable specs
by Joshua Roys 03 Jan '12

03 Jan '12

Hello all, The specific board this is for is the Supermicro H8DGT. Attached is only the specification, which is not guaranteed to be correct. Use with care. Also, after using this, you may want to turn off and unplug the computer for a few minutes to restore the correct operational state. The AMD SB700/710/750 Register Reference Guide (#43009) was used as a reference. Thanks, Josh

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Re: [flashrom] Help: unable to upgrade bios
by Stefan Tauner 03 Jan '12

03 Jan '12

On Thu, 29 Dec 2011 12:09:42 +0530 Raghuramchary Jallipalli <Raghuramchary.Jallipalli(a)lntinfotech.com> wrote: > Hello Experts, > I have tried installing the flashrom-0.9.4 in my laptop having Ubuntu 9.10. The flashchip is AT25DF321A and the chipset is QM67. When I tried to execute the flashrom utility I got the below output: > ######################### > > root@ubuntu:~# > > root@ubuntu:~# flashrom > > flashrom v0.9.4-r1395 on Linux 2.6.31-14-generic (i686), built with libpci 3.0.0, GCC 4.4.1, little endian flashrom is free software, get the source code at http://www.flashrom.org > > > > Calibrating delay loop... OK. > > ======================================================================== > > WARNING! You seem to be running flashrom on an unsupported laptop. > > Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller > > (EC) in these machines often interacts badly with flashing. > > See http://www.flashrom.org/Laptops for details. > > > > If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. > > Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. > > You have been warned. > > ======================================================================== > > Aborting. > > root@ubuntu:~# > > root@ubuntu:~# > ########################### > > Can anyone please help on how to proceed further? > Hello Raghu! The answer to your question can be found in the manpage of flashrom. The warning is set up for a reason (explained in the warning itself, the linked webpage and also in the manpage). If you understand and accept the possible consequences go ahead with the procedure in the manpage. Most probably it will not work even then, because the QM67 chipset can is probably locked down, which we can not unlock yet. We could verify that with a verbose log (after following the manpage). It would also be interesting to know which laptop that is (then). This procedure is not to annoy you, but to ensure that users do not take the warning lightly and look at it more closely. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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MSI K9N2 SLI Platinum - MCP SPI flashrom information dumps
by Alistair Tonner 31 Dec '11

31 Dec '11

One zip file containing 3 output files from : ./flashrom -V lspci -nnvvvxxx superiotool -deV commands. - in dmidecode this board is shown as: MS-7374 The bios update can be found at: http://www.msi.com/service/download/bios-14652.html I'm looking to see if I can setup some sort of backup on this -- If I can I will try the flash and report results.

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Re: [flashrom] Difference of factory bios and dumped image
by Prakash Punnoor 31 Dec '11

31 Dec '11

On Saturday 31 December 2011 13:55:45 Idwer Vollering wrote: > 2011/12/31 Prakash Punnoor <prakashp(a)arcor.de>: > > On 31.12.2011 11:39, Paul Menzel wrote: > >> Am Samstag, den 31.12.2011, 10:55 +0100 schrieb Prakash Punnoor: > >>> flashrom v0.9.4-r1395 on Linux 3.2.0-rc7+ (x86_64), built with > >>> libpci 3.1.7, GCC 4.5.2, little endian > >>> flashrom is free software, get the source code at > >>> http://www.flashrom.org > >>> > >>> Calibrating delay loop... OK. > >>> Found chipset "AMD SB700/SB710/SB750/SB850". Enabling flash write... > >>> OK. This chipset supports the following protocols: LPC, FWH, SPI. > >>> Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical > >>> address 0xfff00000. > >>> No operations were specified. > >> > >> Unfortunately this question seems not be listed in the FAQ. Most of > >> the > >> time some areas differ because the MAC address and other configuration > >> data of the downloaded images differs [2]. I hope you mean the > >> downloaded image by factory/vendor image. > > > > To clarify: > > - Image I got from vendor web page: Flashed with flashrom won't work > > (machine doesn't POST). Flashed with awdflash works. > > Is the bootblock in the downloaded image intact/present? You can use > bios_extract: http://cgit.freedesktop.org/~libv/bios_extract I don't know how to find that out. This is the output: Found Award BIOS. 0x30000 ( 75940 bytes) -> 8a660a1a.BIN (131072 bytes) 0x428A6 ( 37836 bytes) -> awardext.rom ( 53520 bytes) 0x4BC73 ( 13651 bytes) -> ACPITBL.BIN ( 30519 bytes) 0x4F1C7 ( 25463 bytes) -> awardeyt.rom ( 50864 bytes) 0x5553F ( 11719 bytes) -> _EN_CODE.BIN ( 26512 bytes) 0x58307 ( 3989 bytes) -> _ITEM.BIN ( 9600 bytes) 0x5929D ( 5657 bytes) -> _DMI.BIN ( 9456 bytes) 0x5A8B7 ( 3396 bytes) -> SPIFLASH.BIN ( 9184 bytes) 0x5B5FC ( 581 bytes) -> SMI32COD.BIN ( 736 bytes) 0x5B842 ( 1105 bytes) -> SMIAPCOD.BIN ( 34784 bytes) 0x5BC94 ( 38294 bytes) -> ROMs\VBIOS\13B27721.019 ( 60416 bytes) 0x6522B ( 33303 bytes) -> ROMs\SRAID_33.BIN ( 52224 bytes) 0x6D443 ( 9230 bytes) -> HFSROM.BIN ( 13824 bytes) 0x6F852 ( 34171 bytes) -> ROMs\8056.LOM ( 55808 bytes) 0x77DCE ( 75010 bytes) -> HFSXROM.DLL (135168 bytes) 0x8A2D1 ( 26405 bytes) -> AHCI.BIN ( 27648 bytes) 0x909F7 ( 11355 bytes) -> AGESACPU.ROM ( 34424 bytes) 0xA6E69 ( 5511 bytes) -> ROMs\AMD940.BMP (307980 bytes) The output from the dumped file looks the same, btw. > What happens when you reset the CMOS/ESCD data after flashing with > flashrom? awdflash does that with the /cp parameter, see > http://www.plasma-online.de/textual/howto/flash_award.html I will try that, if you can confirm that the image contains a boot block. > Do you have a POST card? You can get one off dealextreme.. > http://www.dealextreme.com/p/pc-motherboard-repair-troubleshoot-boot-failure > -diagnostic-pci-card-21997 Good idea. I ordered one (from a different place, as i live in Germany). Thanks, Prakash

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Difference of factory bios and dumped image
by Prakash Punnoor 31 Dec '11

31 Dec '11

Hi, flashrom kind of works on my system, but not with the factory images. If I read it out with flashrom and write it back with flashrom (also to a different chip) it works. The sizes of factory and dumped image are same but they are somewhat binary different. Any idea? The motherboard is Abit A-S78H. As I am playing around with coreboot - so far unsuccessfully - I want to know whether flashrom is writing the generated image correctly... I can upload both images somewhere if interested. This is flashrom output on my system: flashrom v0.9.4-r1395 on Linux 3.2.0-rc7+ (x86_64), built with libpci 3.1.7, GCC 4.5.2, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "AMD SB700/SB710/SB750/SB850". Enabling flash write... OK. This chipset supports the following protocols: LPC, FWH, SPI. Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address 0xfff00000. No operations were specified. Regards, Prakash

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flashrom December 2011