flashrom October 2011

flashrom@flashrom.org

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[PATCH] Implement unknown Dediprog commands
by Carl-Daniel Hailfinger 19 Dec '11

19 Dec '11

Secret knowledge is cool, but public knowledge is better. Implement all Dediprog commands found in USB traces, even if their purpose is not yet known. Annotate unknown commands with info about the call sequence they are embedded in and the firmware version of the log. Add a new shutdown command for firmware 5.x. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-dediprog_unknown_commands/dediprog.c =================================================================== --- flashrom-dediprog_unknown_commands/dediprog.c (Revision 1232) +++ flashrom-dediprog_unknown_commands/dediprog.c (Arbeitskopie) @@ -27,6 +27,7 @@ #define DEFAULT_TIMEOUT 3000 static usb_dev_handle *dediprog_handle; +static int dediprog_firmwareversion; #if 0 /* Might be useful for other pieces of code as well. */ @@ -228,6 +229,7 @@ fw[1], fw[2]); return 1; } + dediprog_firmwareversion = fw[0]; return 0; } @@ -253,6 +255,32 @@ return 0; } +#if 0 +/* Something. + * Present in eng_detect_blink.log with firmware 3.1.8 + * Always preceded by Command Receive Device String + */ +static int dediprog_command_b(void) +{ + int ret; + char buf[0x3]; + + memset(buf, 0, sizeof(buf)); + ret = usb_control_msg(dediprog_handle, 0xc3, 0x7, 0x0, 0xef00, buf, 0x3, DEFAULT_TIMEOUT); + if (ret < 0) { + msg_perr("Command B failed (%s)!\n", usb_strerror()); + return 1; + } + if ((ret != 0x3) || (buf[0] != 0xff) || (buf[1] != 0xff) || + (buf[2] != 0xff)) { + msg_perr("Unexpected response to Command B!\n"); + return 1; + } + + return 0; +} +#endif + /* Command C is only sent after dediprog_check_devicestring, but not after every * invocation of dediprog_check_devicestring. It is only sent after the first * dediprog_command_a(); dediprog_check_devicestring() sequence in each session. @@ -264,7 +292,7 @@ ret = usb_control_msg(dediprog_handle, 0x42, 0x4, 0x0, 0x0, NULL, 0x0, DEFAULT_TIMEOUT); if (ret != 0x0) { - msg_perr("Unexpected response to Command C!\n"); + msg_perr("Command C failed (%s)!\n", usb_strerror()); return 1; } return 0; @@ -274,6 +302,7 @@ /* Very strange. Seems to be a programmer keepalive or somesuch. * Wait unsuccessfully for timeout ms to read one byte. * Is usually called after setting voltage to 0. + * Present in all logs with Firmware 2.1.1 and 3.1.8 */ static int dediprog_command_f(int timeout) { @@ -282,14 +311,90 @@ memset(buf, 0, sizeof(buf)); ret = usb_control_msg(dediprog_handle, 0xc2, 0x11, 0xff, 0xff, buf, 0x1, timeout); + /* This check is most probably wrong. Command F always causes a timeout + * in the logs, so we should check for timeout instead of checking for + * success. + */ + if (ret != 0x1) { + msg_perr("Command F failed (%s)!\n", usb_strerror()); + return 1; + } + return 0; +} + +/* Start/stop blinking? + * Present in eng_detect_blink.log with firmware 3.1.8 + * Preceded by Command J + */ +static int dediprog_command_g(void) +{ + int ret; + + ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, 0x03, NULL, 0x0, DEFAULT_TIMEOUT); if (ret != 0x0) { - msg_perr("Unexpected response to Command F!\n"); + msg_perr("Command G failed (%s)!\n", usb_strerror()); return 1; } return 0; } + +/* Something. + * Present in all logs with firmware 5.1.5 + * Always preceded by Command Receive Device String + * Always followed by Command Set SPI Voltage nonzero + */ +static int dediprog_command_h(void) +{ + int ret; + + ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, 0x05, NULL, 0x0, DEFAULT_TIMEOUT); + if (ret != 0x0) { + msg_perr("Command H failed (%s)!\n", usb_strerror()); + return 1; + } + return 0; +} #endif +/* Shutdown for firmware 5.x? + * Present in all logs with firmware 5.1.5 + * Often preceded by a SPI operation (Command Read SPI Bulk or Receive SPI) + * Always followed by Command Set SPI Voltage 0x0000 + */ +static int dediprog_command_i(void) +{ + int ret; + + ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, 0x06, NULL, 0x0, DEFAULT_TIMEOUT); + if (ret != 0x0) { + msg_perr("Command I failed (%s)!\n", usb_strerror()); + return 1; + } + return 0; +} + +#if 0 +/* Start/stop blinking? + * Present in all logs with firmware 5.1.5 + * Always preceded by Command Receive Device String on 5.1.5 + * Always followed by Command Set SPI Voltage nonzero on 5.1.5 + * Present in eng_detect_blink.log with firmware 3.1.8 + * Preceded by Command B in eng_detect_blink.log + * Followed by Command G in eng_detect_blink.log + */ +static int dediprog_command_j(void) +{ + int ret; + + ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, 0x07, NULL, 0x0, DEFAULT_TIMEOUT); + if (ret != 0x0) { + msg_perr("Command J failed (%s)!\n", usb_strerror()); + return 1; + } + return 0; +} +#endif + static int parse_voltage(char *voltage) { char *tmp = NULL; @@ -445,9 +550,11 @@ /* URB 136 is just URB 9. */ /* URB 137 is just URB 11. */ - /* Command I is probably Start Bulk Read. Data is u16 blockcount, u16 blocksize. */ - /* Command J is probably Start Bulk Write. Data is u16 blockcount, u16 blocksize. */ - /* Bulk transfer sizes for Command I/J are always 512 bytes, rest is filled with 0xff. */ + /* Command Start Bulk Read. Data is u16 blockcount, u16 blocksize. */ + /* Command Start Bulk Write. Data is u16 blockcount, u16 blocksize. */ + /* Bulk transfer sizes for Command Start Bulk Read/Write are always + * 512 bytes, rest is filled with 0xff. + */ return 0; } @@ -457,6 +564,10 @@ { msg_pspew("%s\n", __func__); + /* Shutdown on firmware 5.x */ + if (dediprog_firmwareversion == 5) + if (dediprog_command_i()) + return 1; /* URB 28. Command Set SPI Voltage to 0. */ if (dediprog_set_spi_voltage(0x0)) return 1; -- http://www.hailfinger.org/

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[PATCH] Register Parallel/LPC/FWH programmers
by Carl-Daniel Hailfinger 09 Nov '11

09 Nov '11

Register Parallel/LPC/FWH programmers the same way SPI programmers are registered. This patch is not yet 100% clean (80 column limit violations etc.), but the general idea should be clear. We need something like this patch to handle programmers with multiple flash chips (e.g. LPC/FWH chips mapped to different regions on mainboards). TODO: - Should register_par_programmer(...) be called before or after setting max_rom_decode.*? - Is there a better name for register_par_programmer? - Should max_rom_decode.* be part of the registration? - Should map_flash_region/unmap_flash_region be part of the registration? Please check that all programmers have a register_par_programmer call unless the chip_* functions were noop. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-register_par_programmer/drkaiser.c =================================================================== --- flashrom-register_par_programmer/drkaiser.c (Revision 1325) +++ flashrom-register_par_programmer/drkaiser.c (Arbeitskopie) @@ -37,6 +37,17 @@ static uint8_t *drkaiser_bar; +static const struct par_programmer par_programmer_drkaiser = { + .chip_readb = drkaiser_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = drkaiser_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + int drkaiser_init(void) { uint32_t addr; @@ -53,7 +64,8 @@ drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", addr, 128 * 1024); - buses_supported = CHIP_BUSTYPE_PARALLEL; + register_par_programmer(&par_programmer_drkaiser, CHIP_BUSTYPE_PARALLEL); + max_rom_decode.parallel = 131072; return 0; } Index: flashrom-register_par_programmer/it87spi.c =================================================================== --- flashrom-register_par_programmer/it87spi.c (Revision 1325) +++ flashrom-register_par_programmer/it87spi.c (Arbeitskopie) @@ -193,7 +193,7 @@ free(portpos); exit_conf_mode_ite(port); it8716f_flashport = flashport; - if (buses_supported & CHIP_BUSTYPE_SPI) + if (internal_buses_supported & CHIP_BUSTYPE_SPI) msg_pdbg("Overriding chipset SPI with IT87 SPI.\n"); /* FIXME: Add the SPI bus or replace the other buses with it? */ register_spi_programmer(&spi_programmer_it87xx); Index: flashrom-register_par_programmer/gfxnvidia.c =================================================================== --- flashrom-register_par_programmer/gfxnvidia.c (Revision 1325) +++ flashrom-register_par_programmer/gfxnvidia.c (Arbeitskopie) @@ -60,6 +60,17 @@ {}, }; +static const struct par_programmer par_programmer_gfxnvidia = { + .chip_readb = gfxnvidia_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = gfxnvidia_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + int gfxnvidia_init(void) { uint32_t reg32; @@ -78,7 +89,7 @@ nvidia_bar = physmap("NVIDIA", io_base_addr, 16 * 1024 * 1024); - buses_supported = CHIP_BUSTYPE_PARALLEL; + register_par_programmer(&par_programmer_gfxnvidia, CHIP_BUSTYPE_PARALLEL); /* Write/erase doesn't work. */ programmer_may_write = 0; Index: flashrom-register_par_programmer/nicrealtek.c =================================================================== --- flashrom-register_par_programmer/nicrealtek.c (Revision 1325) +++ flashrom-register_par_programmer/nicrealtek.c (Arbeitskopie) @@ -36,13 +36,24 @@ {}, }; +static const struct par_programmer par_programmer_nicrealtek = { + .chip_readb = nicrealtek_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nicrealtek_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + int nicrealtek_init(void) { get_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek); - buses_supported = CHIP_BUSTYPE_PARALLEL; + register_par_programmer(&par_programmer_nicrealtek, CHIP_BUSTYPE_PARALLEL); return 0; } Index: flashrom-register_par_programmer/serprog.c =================================================================== --- flashrom-register_par_programmer/serprog.c (Revision 1325) +++ flashrom-register_par_programmer/serprog.c (Arbeitskopie) @@ -295,6 +295,19 @@ return 0; } +static const struct par_programmer par_programmer_serprog = { + .chip_readb = serprog_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = serprog_chip_readn, + .chip_writeb = serprog_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +enum chipbustype serprog_buses_supported = CHIP_BUSTYPE_NONE; + int serprog_init(void) { uint16_t iface; @@ -454,7 +467,7 @@ msg_perr("Warning: NAK to query supported buses\n"); c = CHIP_BUSTYPE_NONSPI; /* A reasonable default for now. */ } - buses_supported = c; + serprog_buses_supported = c; if (sp_docommand(S_CMD_O_INIT, 0, NULL, 0, NULL)) { msg_perr("Error: NAK to initialize operation buffer\n"); @@ -490,6 +503,8 @@ sp_max_read_n = 0; } + register_par_programmer(&par_programmer_serprog, serprog_buses_supported); + sp_prev_was_write = 0; sp_streamed_transmit_ops = 0; sp_streamed_transmit_bytes = 0; Index: flashrom-register_par_programmer/satamv.c =================================================================== --- flashrom-register_par_programmer/satamv.c (Revision 1325) +++ flashrom-register_par_programmer/satamv.c (Arbeitskopie) @@ -40,6 +40,17 @@ #define PCI_BAR2_CONTROL 0x00c08 #define GPIO_PORT_CONTROL 0x104f0 +static const struct par_programmer par_programmer_satamv = { + .chip_readb = satamv_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = satamv_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + /* * Random notes: * FCE# Flash Chip Enable @@ -125,7 +136,7 @@ mv_iobar = tmp & 0xffff; msg_pspew("Activating I/O BAR at 0x%04x\n", mv_iobar); - buses_supported = CHIP_BUSTYPE_PARALLEL; + register_par_programmer(&par_programmer_satamv, CHIP_BUSTYPE_PARALLEL); /* 512 kByte with two 8-bit latches, and * 4 MByte with additional 3-bit latch. */ Index: flashrom-register_par_programmer/dummyflasher.c =================================================================== --- flashrom-register_par_programmer/dummyflasher.c (Revision 1325) +++ flashrom-register_par_programmer/dummyflasher.c (Arbeitskopie) @@ -73,6 +73,20 @@ .read = default_spi_read, .write_256 = dummy_spi_write_256, }; + +static const struct par_programmer par_programmer_dummy = { + .chip_readb = dummy_chip_readb, + .chip_readw = dummy_chip_readw, + .chip_readl = dummy_chip_readl, + .chip_readn = dummy_chip_readn, + .chip_writeb = dummy_chip_writeb, + .chip_writew = dummy_chip_writew, + .chip_writel = dummy_chip_writel, + .chip_writen = dummy_chip_writen, +}; + +enum chipbustype dummy_buses_supported = CHIP_BUSTYPE_NONE; + int dummy_init(void) { char *bustext = NULL; @@ -90,24 +104,31 @@ /* Convert the parameters to lowercase. */ tolower_string(bustext); - buses_supported = CHIP_BUSTYPE_NONE; + dummy_buses_supported = CHIP_BUSTYPE_NONE; if (strstr(bustext, "parallel")) { - buses_supported |= CHIP_BUSTYPE_PARALLEL; + dummy_buses_supported |= CHIP_BUSTYPE_PARALLEL; msg_pdbg("Enabling support for %s flash.\n", "parallel"); } if (strstr(bustext, "lpc")) { - buses_supported |= CHIP_BUSTYPE_LPC; + dummy_buses_supported |= CHIP_BUSTYPE_LPC; msg_pdbg("Enabling support for %s flash.\n", "LPC"); } if (strstr(bustext, "fwh")) { - buses_supported |= CHIP_BUSTYPE_FWH; + dummy_buses_supported |= CHIP_BUSTYPE_FWH; msg_pdbg("Enabling support for %s flash.\n", "FWH"); } + if (dummy_buses_supported & (CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | + CHIP_BUSTYPE_FWH)) + register_par_programmer(&par_programmer_dummy, + dummy_buses_supported & + (CHIP_BUSTYPE_PARALLEL | + CHIP_BUSTYPE_LPC | + CHIP_BUSTYPE_FWH)); if (strstr(bustext, "spi")) { register_spi_programmer(&spi_programmer_dummyflasher); msg_pdbg("Enabling support for %s flash.\n", "SPI"); } - if (buses_supported == CHIP_BUSTYPE_NONE) + if (dummy_buses_supported == CHIP_BUSTYPE_NONE) msg_pdbg("Support for all flash bus types disabled.\n"); free(bustext); Index: flashrom-register_par_programmer/internal.c =================================================================== --- flashrom-register_par_programmer/internal.c (Revision 1325) +++ flashrom-register_par_programmer/internal.c (Arbeitskopie) @@ -127,6 +127,19 @@ int is_laptop = 0; int laptop_ok = 0; +static const struct par_programmer par_programmer_internal = { + .chip_readb = internal_chip_readb, + .chip_readw = internal_chip_readw, + .chip_readl = internal_chip_readl, + .chip_readn = internal_chip_readn, + .chip_writeb = internal_chip_writeb, + .chip_writew = internal_chip_writew, + .chip_writel = internal_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +enum chipbustype internal_buses_supported = CHIP_BUSTYPE_NONE; + int internal_init(void) { #if __FLASHROM_LITTLE_ENDIAN__ @@ -180,9 +193,10 @@ get_io_perms(); /* Default to Parallel/LPC/FWH flash devices. If a known host controller - * is found, the init routine sets the buses_supported bitfield. + * is found, the host controller init routine sets the + * internal_buses_supported bitfield. */ - buses_supported = CHIP_BUSTYPE_NONSPI; + internal_buses_supported = CHIP_BUSTYPE_NONSPI; /* Initialize PCI access for flash enables */ pacc = pci_alloc(); /* Get the pci_access structure */ @@ -267,6 +281,11 @@ * Besides that, we don't check the board enable return code either. */ #if defined(__i386__) || defined(__x86_64__) || defined (__mips) + register_par_programmer(&par_programmer_internal, internal_buses_supported); + /* FIXME: Move this message out of chipset_enable.c. */ + msg_pinfo("This chipset supports the following protocols: %s.\n", + flashbuses_to_text(buses_supported)); + return 0; #else msg_perr("Your platform is not supported yet for the internal " Index: flashrom-register_par_programmer/nicnatsemi.c =================================================================== --- flashrom-register_par_programmer/nicnatsemi.c (Revision 1325) +++ flashrom-register_par_programmer/nicnatsemi.c (Arbeitskopie) @@ -35,13 +35,24 @@ {}, }; +static const struct par_programmer par_programmer_nicnatsemi = { + .chip_readb = nicnatsemi_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nicnatsemi_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + int nicnatsemi_init(void) { get_io_perms(); io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_natsemi); - buses_supported = CHIP_BUSTYPE_PARALLEL; + register_par_programmer(&par_programmer_nicnatsemi, CHIP_BUSTYPE_PARALLEL); /* The datasheet shows address lines MA0-MA16 in one place and MA0-MA15 * in another. My NIC has MA16 connected to A16 on the boot ROM socket Index: flashrom-register_par_programmer/it85spi.c =================================================================== --- flashrom-register_par_programmer/it85spi.c (Revision 1325) +++ flashrom-register_par_programmer/it85spi.c (Arbeitskopie) @@ -254,7 +254,11 @@ INDIRECT_A3(shm_io_base, (base >> 24)); #endif #ifdef LPC_MEMORY - base = (chipaddr)programmer_map_flash_region("it85 communication", + /* WTF?!? FIXME: This should use physmap instead. And it should + * automatically block accessing that region for anything else. + * Major TODO here, and it will be a lot of work. + */ + base = (chipaddr)physmap("it85 communication", 0xFFFFF000, 0x1000); msg_pdbg("%s():%d base=0x%08x\n", __func__, __LINE__, (unsigned int)base); @@ -282,16 +286,17 @@ { int ret; - if (!(buses_supported & CHIP_BUSTYPE_FWH)) { + if (!(internal_buses_supported & CHIP_BUSTYPE_FWH)) { msg_pdbg("%s():%d buses not support FWH\n", __func__, __LINE__); return 1; } ret = it85xx_spi_common_init(s); msg_pdbg("FWH: %s():%d ret=%d\n", __func__, __LINE__, ret); if (!ret) { - msg_pdbg("%s():%d buses_supported=0x%x\n", __func__, __LINE__, - buses_supported); - if (buses_supported & CHIP_BUSTYPE_FWH) + msg_pdbg("%s():%d internal_buses_supported=0x%x\n", __func__, __LINE__, + internal_buses_supported); + /* FIXME: We check for FWH, but claim SPI override? WTF? */ + if (internal_buses_supported & CHIP_BUSTYPE_FWH) msg_pdbg("Overriding chipset SPI with IT85 FWH|SPI.\n"); /* Really leave FWH enabled? */ /* Set this as spi controller. */ Index: flashrom-register_par_programmer/atahpt.c =================================================================== --- flashrom-register_par_programmer/atahpt.c (Revision 1325) +++ flashrom-register_par_programmer/atahpt.c (Arbeitskopie) @@ -38,6 +38,17 @@ {}, }; +static const struct par_programmer par_programmer_atahpt = { + .chip_readb = atahpt_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = atahpt_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + int atahpt_init(void) { uint32_t reg32; @@ -51,7 +62,7 @@ reg32 |= (1 << 24); rpci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32); - buses_supported = CHIP_BUSTYPE_PARALLEL; + register_par_programmer(&par_programmer_atahpt, CHIP_BUSTYPE_PARALLEL); return 0; } Index: flashrom-register_par_programmer/nic3com.c =================================================================== --- flashrom-register_par_programmer/nic3com.c (Revision 1325) +++ flashrom-register_par_programmer/nic3com.c (Arbeitskopie) @@ -55,6 +55,17 @@ {}, }; +static const struct par_programmer par_programmer_nic3com = { + .chip_readb = nic3com_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nic3com_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + int nic3com_init(void) { get_io_perms(); @@ -81,8 +92,8 @@ */ OUTW(SELECT_REG_WINDOW + 0, io_base_addr + INT_STATUS); - buses_supported = CHIP_BUSTYPE_PARALLEL; max_rom_decode.parallel = 128 * 1024; + register_par_programmer(&par_programmer_nic3com, CHIP_BUSTYPE_PARALLEL); return 0; } Index: flashrom-register_par_programmer/satasii.c =================================================================== --- flashrom-register_par_programmer/satasii.c (Revision 1325) +++ flashrom-register_par_programmer/satasii.c (Arbeitskopie) @@ -40,6 +40,17 @@ {}, }; +static const struct par_programmer par_programmer_satasii = { + .chip_readb = satasii_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = satasii_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + int satasii_init(void) { uint32_t addr; @@ -65,7 +76,7 @@ if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) msg_pinfo("Warning: Flash seems unconnected.\n"); - buses_supported = CHIP_BUSTYPE_PARALLEL; + register_par_programmer(&par_programmer_satasii, CHIP_BUSTYPE_PARALLEL); return 0; } Index: flashrom-register_par_programmer/nicintel.c =================================================================== --- flashrom-register_par_programmer/nicintel.c (Revision 1325) +++ flashrom-register_par_programmer/nicintel.c (Arbeitskopie) @@ -41,6 +41,17 @@ #define CSR_FCR 0x0c +static const struct par_programmer par_programmer_nicintel = { + .chip_readb = nicintel_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nicintel_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + int nicintel_init(void) { uintptr_t addr; @@ -78,9 +89,8 @@ */ pci_rmmio_writew(0x0001, nicintel_control_bar + CSR_FCR); - buses_supported = CHIP_BUSTYPE_PARALLEL; - max_rom_decode.parallel = NICINTEL_MEMMAP_SIZE; + register_par_programmer(&par_programmer_nicintel, CHIP_BUSTYPE_PARALLEL); return 0; Index: flashrom-register_par_programmer/chipset_enable.c =================================================================== --- flashrom-register_par_programmer/chipset_enable.c (Revision 1325) +++ flashrom-register_par_programmer/chipset_enable.c (Arbeitskopie) @@ -208,7 +208,7 @@ uint16_t old, new; uint16_t xbcs = 0x4e; /* X-Bus Chip Select register. */ - buses_supported = CHIP_BUSTYPE_PARALLEL; + internal_buses_supported = CHIP_BUSTYPE_PARALLEL; old = pci_read_word(dev, xbcs); @@ -286,7 +286,7 @@ * FWH_DEC_EN1, but they are called FB_SEL1, FB_SEL2, FB_DEC_EN1 and * FB_DEC_EN2. */ - buses_supported = CHIP_BUSTYPE_FWH; + internal_buses_supported = CHIP_BUSTYPE_FWH; return enable_flash_ich(dev, name, 0x4e); } @@ -383,9 +383,9 @@ msg_pdbg("\nMaximum FWH chip size: 0x%x bytes", max_rom_decode.fwh); /* If we're called by enable_flash_ich_dc_spi, it will override - * buses_supported anyway. + * internal_buses_supported anyway. */ - buses_supported = CHIP_BUSTYPE_FWH; + internal_buses_supported = CHIP_BUSTYPE_FWH; return enable_flash_ich(dev, name, 0xdc); } @@ -405,7 +405,7 @@ if (new != old) rpci_write_byte(dev, 0xd9, new); - buses_supported = CHIP_BUSTYPE_FWH; + internal_buses_supported = CHIP_BUSTYPE_FWH; return 0; } @@ -458,7 +458,7 @@ * on ICH7 when the southbridge is strapped to LPC */ - buses_supported = CHIP_BUSTYPE_FWH; + internal_buses_supported = CHIP_BUSTYPE_FWH; if (ich_generation == 7) { if(bbs == ICH_STRAP_LPC) { /* No further SPI initialization required */ @@ -466,7 +466,7 @@ } else /* Disable LPC/FWH if strapped to PCI or SPI */ - buses_supported = 0; + internal_buses_supported = 0; } /* this adds CHIP_BUSTYPE_SPI */ @@ -557,7 +557,7 @@ #define CS5530_ENABLE_SA2320 (1 << 2) #define CS5530_ENABLE_SA20 (1 << 6) - buses_supported = CHIP_BUSTYPE_PARALLEL; + internal_buses_supported = CHIP_BUSTYPE_PARALLEL; /* Decode 0x000E0000-0x000FFFFF (128 kB), not just 64 kB, and * decode 0xFF000000-0xFFFFFFFF (16 MB), not just 256 kB. * FIXME: Should we really touch the low mapping below 1 MB? Flashrom @@ -707,7 +707,7 @@ (prot & 0xfffff800) + (((prot & 0x7fc) << 8) | 0x3ff)); } - buses_supported = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH; + internal_buses_supported = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH; ret = sb600_probe_spi(dev); @@ -793,7 +793,7 @@ { uint8_t tmp; - buses_supported = CHIP_BUSTYPE_PARALLEL; + internal_buses_supported = CHIP_BUSTYPE_PARALLEL; tmp = INB(0xc06); tmp |= 0x1; @@ -893,7 +893,7 @@ switch ((val >> 5) & 0x3) { case 0x0: ret = enable_flash_mcp55(dev, name); - buses_supported = CHIP_BUSTYPE_LPC; + internal_buses_supported = CHIP_BUSTYPE_LPC; msg_pdbg("Flash bus type is LPC\n"); break; case 0x2: @@ -901,14 +901,14 @@ /* SPI is added in mcp6x_spi_init if it works. * Do we really want to disable LPC in this case? */ - buses_supported = CHIP_BUSTYPE_NONE; + internal_buses_supported = CHIP_BUSTYPE_NONE; msg_pdbg("Flash bus type is SPI\n"); msg_perr("SPI on this chipset is WIP. Write is unsupported!\n"); programmer_may_write = 0; break; default: /* Should not happen. */ - buses_supported = CHIP_BUSTYPE_NONE; + internal_buses_supported = CHIP_BUSTYPE_NONE; msg_pdbg("Flash bus type is unknown (none)\n"); msg_pinfo("Something went wrong with bus type detection.\n"); goto out_msg; @@ -1215,8 +1215,5 @@ msg_pinfo("PROBLEMS, continuing anyway\n"); } - msg_pinfo("This chipset supports the following protocols: %s.\n", - flashbuses_to_text(buses_supported)); - return ret; } Index: flashrom-register_par_programmer/programmer.c =================================================================== --- flashrom-register_par_programmer/programmer.c (Revision 1325) +++ flashrom-register_par_programmer/programmer.c (Arbeitskopie) @@ -19,7 +19,21 @@ */ #include "flash.h" +#include "programmer.h" +static const struct par_programmer par_programmer_none = { + .chip_readb = noop_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = noop_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +const struct par_programmer *par_programmer = &par_programmer_none; + /* No-op shutdown() for programmers which don't need special handling */ int noop_shutdown(void) { @@ -96,3 +110,9 @@ buf[i] = chip_readb(addr + i); return; } + +void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses) +{ + par_programmer = pgm; + buses_supported |= buses; +} Index: flashrom-register_par_programmer/flashrom.c =================================================================== --- flashrom-register_par_programmer/flashrom.c (Revision 1325) +++ flashrom-register_par_programmer/flashrom.c (Arbeitskopie) @@ -132,14 +132,6 @@ .shutdown = internal_shutdown, .map_flash_region = physmap, .unmap_flash_region = physunmap, - .chip_readb = internal_chip_readb, - .chip_readw = internal_chip_readw, - .chip_readl = internal_chip_readl, - .chip_readn = internal_chip_readn, - .chip_writeb = internal_chip_writeb, - .chip_writew = internal_chip_writew, - .chip_writel = internal_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -151,14 +143,6 @@ .shutdown = dummy_shutdown, .map_flash_region = dummy_map, .unmap_flash_region = dummy_unmap, - .chip_readb = dummy_chip_readb, - .chip_readw = dummy_chip_readw, - .chip_readl = dummy_chip_readl, - .chip_readn = dummy_chip_readn, - .chip_writeb = dummy_chip_writeb, - .chip_writew = dummy_chip_writew, - .chip_writel = dummy_chip_writel, - .chip_writen = dummy_chip_writen, .delay = internal_delay, }, #endif @@ -170,14 +154,6 @@ .shutdown = nic3com_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = nic3com_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = nic3com_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -191,14 +167,6 @@ .shutdown = nicrealtek_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = nicrealtek_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = nicrealtek_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -210,14 +178,6 @@ .shutdown = nicnatsemi_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = nicnatsemi_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = nicnatsemi_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -229,14 +189,6 @@ .shutdown = gfxnvidia_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = gfxnvidia_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = gfxnvidia_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -248,14 +200,6 @@ .shutdown = drkaiser_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = drkaiser_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = drkaiser_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -267,14 +211,6 @@ .shutdown = satasii_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = satasii_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = satasii_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -286,14 +222,6 @@ .shutdown = atahpt_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = atahpt_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = atahpt_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -305,14 +233,6 @@ .shutdown = noop_shutdown, /* Missing shutdown */ .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = noop_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = noop_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -324,14 +244,6 @@ .shutdown = serprog_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = serprog_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = serprog_chip_readn, - .chip_writeb = serprog_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = serprog_delay, }, #endif @@ -343,14 +255,6 @@ .shutdown = buspirate_spi_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = noop_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = noop_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -362,14 +266,6 @@ .shutdown = dediprog_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = noop_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = noop_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -381,14 +277,6 @@ .shutdown = noop_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = noop_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = noop_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -400,14 +288,6 @@ .shutdown = nicintel_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = nicintel_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = nicintel_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -419,14 +299,6 @@ .shutdown = nicintel_spi_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = noop_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = noop_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -438,14 +310,6 @@ .shutdown = ogp_spi_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = noop_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = noop_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -457,14 +321,6 @@ .shutdown = satamv_shutdown, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, - .chip_readb = satamv_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = satamv_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif @@ -566,42 +422,42 @@ void chip_writeb(uint8_t val, chipaddr addr) { - programmer_table[programmer].chip_writeb(val, addr); + par_programmer->chip_writeb(val, addr); } void chip_writew(uint16_t val, chipaddr addr) { - programmer_table[programmer].chip_writew(val, addr); + par_programmer->chip_writew(val, addr); } void chip_writel(uint32_t val, chipaddr addr) { - programmer_table[programmer].chip_writel(val, addr); + par_programmer->chip_writel(val, addr); } void chip_writen(uint8_t *buf, chipaddr addr, size_t len) { - programmer_table[programmer].chip_writen(buf, addr, len); + par_programmer->chip_writen(buf, addr, len); } uint8_t chip_readb(const chipaddr addr) { - return programmer_table[programmer].chip_readb(addr); + return par_programmer->chip_readb(addr); } uint16_t chip_readw(const chipaddr addr) { - return programmer_table[programmer].chip_readw(addr); + return par_programmer->chip_readw(addr); } uint32_t chip_readl(const chipaddr addr) { - return programmer_table[programmer].chip_readl(addr); + return par_programmer->chip_readl(addr); } void chip_readn(uint8_t *buf, chipaddr addr, size_t len) { - programmer_table[programmer].chip_readn(buf, addr, len); + par_programmer->chip_readn(buf, addr, len); } void programmer_delay(int usecs) Index: flashrom-register_par_programmer/programmer.h =================================================================== --- flashrom-register_par_programmer/programmer.h (Revision 1325) +++ flashrom-register_par_programmer/programmer.h (Arbeitskopie) @@ -95,14 +95,6 @@ size_t len); void (*unmap_flash_region) (void *virt_addr, size_t len); - void (*chip_writeb) (uint8_t val, chipaddr addr); - void (*chip_writew) (uint16_t val, chipaddr addr); - void (*chip_writel) (uint32_t val, chipaddr addr); - void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len); - uint8_t (*chip_readb) (const chipaddr addr); - uint16_t (*chip_readw) (const chipaddr addr); - uint32_t (*chip_readl) (const chipaddr addr); - void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len); void (*delay) (int usecs); }; @@ -302,6 +294,7 @@ extern int force_boardmismatch; void probe_superio(void); int register_superio(struct superio s); +extern enum chipbustype internal_buses_supported; int internal_init(void); int internal_shutdown(void); void internal_chip_writeb(uint8_t val, chipaddr addr); @@ -357,6 +350,18 @@ uint16_t fallback_chip_readw(const chipaddr addr); uint32_t fallback_chip_readl(const chipaddr addr); void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); +struct par_programmer { + void (*chip_writeb) (uint8_t val, chipaddr addr); + void (*chip_writew) (uint16_t val, chipaddr addr); + void (*chip_writel) (uint32_t val, chipaddr addr); + void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len); + uint8_t (*chip_readb) (const chipaddr addr); + uint16_t (*chip_readw) (const chipaddr addr); + uint32_t (*chip_readl) (const chipaddr addr); + void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len); +}; +extern const struct par_programmer *par_programmer; +void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses); /* dummyflasher.c */ #if CONFIG_DUMMY == 1 Index: flashrom-register_par_programmer/board_enable.c =================================================================== --- flashrom-register_par_programmer/board_enable.c (Revision 1325) +++ flashrom-register_par_programmer/board_enable.c (Arbeitskopie) @@ -424,7 +424,7 @@ /* Check if at least one flash segment is enabled. */ if (tmp & 0xf0) { /* The IT8705F will respond to LPC cycles and translate them. */ - buses_supported = CHIP_BUSTYPE_PARALLEL; + internal_buses_supported = CHIP_BUSTYPE_PARALLEL; /* Flash ROM I/F Writes Enable */ tmp |= 0x04; msg_pdbg("Enabling IT8705F flash ROM interface write.\n"); -- http://www.hailfinger.org/

3 6

report_flashrom_H55_chipset
by gregina 07 Nov '11

07 Nov '11

su Passwort: [root@gregina2 gl]# flashrom -V -r /home/gl/msibackup.bin flashrom v0.9.4-r1395 on Linux 3.0-ARCH (x86_64), built with libpci 3.1.7, GCC 4.6.1, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1534M loops per second, 10 myus = 10 us, 100 myus = 105 us, 1000 myus = 1008 us, 10000 myus = 10514 us, 4 myus = 6 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "MSI" DMI string system-product-name: "MS-7635" DMI string system-version: "1.0" DMI string baseboard-manufacturer: "MSI" DMI string baseboard-product-name: "H55M-ED55 (MS-7635) " DMI string baseboard-version: "1.0" DMI string chassis-type: "Desktop" Found chipset "Intel H55" with PCI ID 8086:3b06. This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x8 Root Complex Register Block address = 0xfed1c000 GCS = 0xc64: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x3 (LPC) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0x6008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x00001000 (FADDR) 0x50: 0x00000a0b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b 0x54: 0x00000000 (FREG0: Flash Descriptor) 0x00000000-0x00000fff is read-only 0x58: 0x07ff0600 (FREG1: BIOS) 0x00600000-0x007fffff is read-write 0x5C: 0x05ff0001 (FREG2: Management Engine) 0x00001000-0x005fffff is locked 0x60: 0x00000fff (FREG3: Gigabit Ethernet) Gigabit Ethernet region is unused. 0x64: 0x00000fff (FREG4: Platform Data) Platform Data region is unused. 0x74: 0x00000000 (PR0) 0x78: 0x00000000 (PR1) 0x7C: 0x00000000 (PR2) 0x80: 0x00000000 (PR3) 0x84: 0x00000000 (PR4) 0x90: 0x04 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0xf80000 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0 0x94: 0x0006 (PREOP) 0x96: 0x543b (OPTYPE) 0x98: 0x05200302 (OPMENU) 0x9C: 0x0006019f (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xD0: 0x00000000 (FPB) Programming OPCODES... program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190 done preop0=0x06, preop1=0x50 op[0]=0x02, 3, 0 op[1]=0x03, 2, 0 op[2]=0xd8, 3, 0 op[3]=0x05, 0, 0 op[4]=0x90, 2, 0 op[5]=0x01, 1, 0 op[6]=0x9f, 0, 0 op[7]=0xc7, 1, 0 SPI Read Configuration: prefetching enabled, caching enabled, OK. This chipset supports the following protocols: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xef, id2 0x16 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x16 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for SST SST25LF040A.RES, 512 kB: program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190 on-the-fly OPCODE (0xAB) re-programmed, op-pos=2 probe_spi_res2: id1 0x16, id2 0x16 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x16 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Chip status register is 00 Found Winbond flash chip "W25Q64" (8192 kB, SPI) at physical address 0xff800000. Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x16 Reading flash... Transaction error! SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0 Running OPCODE 0x03 failed at address 0x001000 (payload length was 64). Read operation failed! FAILED. Restoring MMIO space at 0x7f5a264068a0 Restoring MMIO space at 0x7f5a2640689c Restoring MMIO space at 0x7f5a26406898 Restoring MMIO space at 0x7f5a26406896 Restoring MMIO space at 0x7f5a26406894 Restoring PCI config space for 00:1f:0 reg 0xdc [root@gregina2 gl]# Many thangs for your work!! Best regards Greg

2 1

SST49LF080A - ERASE FAILED at 0x000a3d28!
by Rudolf Marek 03 Nov '11

03 Nov '11

Hi all, It worked with this chip some time ago (a year). Erasing with -E also fails but the next one will succeed. If I write back content again and do it all again I can reproduce this. It seems like a timing issue. Log attached. Changing probe_timing to 10000 is not helping. Tried with latest flashrom, older ended with SIGSEGV. Any clue? Thanks Rudolf

2 1

PMC Flash Pm29F002T-90PC - Write OK
by Marcos Felipe Rasia de Mello 31 Oct '11

31 Oct '11

It was tested in an Asus TUV4X (the original flash is a Winbond W49F002U-12B). Unfortunately this board uses the infamous AS99127F: http://www.flashrom.org/pipermail/flashrom/2010-February/002339.html After "modprobe i2c-dev; i2cset 0 0x48 0x80 0x80" flashrom works normally and update both chips without problems. (didn't need to unload w83781d because I don't have lm-sensors installed here) Log attached. Regards, Marcos

1 0

Successful test on Asus P5K-VM
by Grischa Ebinger 31 Oct '11

31 Oct '11

Hello, I was able to successfully reflash the BIOS of a P5K-VM motherboard with flashrom-0.9.4. It recognized 2 different flash chips (AT25DF081A and AT26DF081A) at the same address. I selected the first of the two chipsets. I wasn't sure if flashrom did support my hardware. According to your wiki it wasn't tested before. Luckily, it did its job without a hiccup. Thank you a lot for providing such a useful tool, I hope I can help you by sending you this new data. greetings, greb Here the requested debug data: $ flashrom -V flashrom v0.9.4-r1395 on Linux 3.0.6-gentoo (x86_64), built with libpci 3.1.7, GCC 4.5.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1996M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10000 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "P5K-VM" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "P5K-VM" DMI string baseboard-version: "Rev 1.xx" DMI string chassis-type: "Desktop" Found chipset "Intel ICH9" with PCI ID 8086:2918. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 Root Complex Register Block address = 0xfed1c000 GCS = 0x1464: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0x2008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=0, FLOCKDN=0 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x00000000 (FADDR) 0x50: 0x00000202 (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x02, BRRA 0x02 0x54: 0x00001fff (FREG0: Flash Descriptor) Flash Descriptor region is unused. 0x58: 0x00001fff (FREG1: BIOS) BIOS region is unused. 0x5C: 0x00001fff (FREG2: Management Engine) Management Engine region is unused. 0x60: 0x00001fff (FREG3: Gigabit Ethernet) Gigabit Ethernet region is unused. 0x64: 0x00001fff (FREG4: Platform Data) Platform Data region is unused. 0x74: 0x00000000 (PR0) 0x78: 0x00000000 (PR1) 0x7C: 0x00000000 (PR2) 0x80: 0x00000000 (PR3) 0x84: 0x00000000 (PR4) 0x90: 0x04 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0x004140 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=4, DBC=1, SME=0, SCF=0 0x94: 0x0000 (PREOP) 0x96: 0xd43b (OPTYPE) 0x98: 0x05200302 (OPMENU) 0x9C: 0x3906019f (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xD0: 0x00000000 (FPB) Programming OPCODES... program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190 done preop0=0x06, preop1=0x50 op[0]=0x02, 3, 0 op[1]=0x03, 2, 0 op[2]=0xd8, 3, 0 op[3]=0x05, 0, 0 op[4]=0x90, 2, 0 op[5]=0x01, 1, 0 op[6]=0x9f, 0, 0 op[7]=0xc7, 1, 0 SPI Read Configuration: prefetching disabled, caching enabled, OK. This chipset supports the following protocols: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Chip status register is 00 Found Atmel flash chip "AT25DF081A" (1024 kB, SPI) at physical address 0xfff00000. Ignoring security lockdown (if present) Ignoring status register byte 2 Chip status register is 00 Chip status register: Sector Protection Register Lock (SRPL) is not set Chip status register: Bit 6 is not set Chip status register: Erase/Program Error (EPE) is not set Chip status register: WP# pin (WPP) is asserted Chip status register: Software Protection Status (SWP): no sectors are protected Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Chip status register is 00 Found Atmel flash chip "AT26DF081A" (1024 kB, SPI) at physical address 0xfff00000. Chip status register is 00 Chip status register: Sector Protection Register Lock (SRPL) is not set Chip status register: Sequential Program Mode Status (SPM) is not set Chip status register: Erase/Program Error (EPE) is not set Chip status register: WP# pin (WPP) is asserted Chip status register: Software Protection Status (SWP): no sectors are protected Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x35, id2 0xc6, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xff, id2 0xff Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xff, id2 0xff Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST SST25LF040A.RES, 512 kB: program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190 on-the-fly OPCODE (0xAB) re-programmed, op-pos=2 probe_spi_res2: id1 0xff, id2 0xff Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xff, id2 0xff Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x35, id2 0xc6, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x51, id2 0x39, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x35, id2 0xc6, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x35, id2 0xc6, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4501 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xff, id2 0xff Multiple flash chips were detected: "AT25DF081A", "AT26DF081A" Please specify which chip to use with the -c <chipname> option. Restoring MMIO space at 0x7f1d122d58a0 Restoring MMIO space at 0x7f1d122d589c Restoring MMIO space at 0x7f1d122d5898 Restoring MMIO space at 0x7f1d122d5896 Restoring MMIO space at 0x7f1d122d5894 Restoring PCI config space for 00:1f:0 reg 0xdc $ lspci -nnvvxxx 00:00.0 Host bridge [0600]: Intel Corporation 82G33/G31/P35/P31 Express DRAM Controller [8086:29c0] (rev 02) Subsystem: ASUSTeK Computer Inc. Device [1043:8276] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR+ INTx- Latency: 0 Capabilities: [e0] Vendor Specific Information: Len=0b <?> Kernel driver in use: agpgart-intel 00: 86 80 c0 29 06 00 90 a0 02 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 76 82 30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 40: 01 90 d1 fe 01 00 00 00 01 00 6b 7f 00 00 00 00 50: 00 00 30 01 09 00 00 00 00 00 00 00 00 00 00 00 60: 01 00 00 e0 00 00 00 00 01 80 d1 fe 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 10 11 01 00 00 33 33 00 ff 03 00 00 00 1a 38 00 a0: 20 00 00 08 00 00 80 7f 00 00 70 7f 00 00 70 7f b0: 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 49 00 00 00 00 00 00 00 e0: 09 00 0b 01 20 00 25 09 47 0c 06 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 90 0f 03 00 00 00 00 00 00:02.0 VGA compatible controller [0300]: Intel Corporation 82G33/G31 Express Integrated Graphics Controller [8086:29c2] (rev 02) (prog-if 00 [VGA controller]) Subsystem: ASUSTeK Computer Inc. Device [1043:8276] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 16 Region 0: Memory at fe980000 (32-bit, non-prefetchable) [size=512K] Region 1: I/O ports at bc00 [size=8] Region 2: Memory at d0000000 (32-bit, prefetchable) [size=256M] Region 3: Memory at fe800000 (32-bit, non-prefetchable) [size=1M] Expansion ROM at <unassigned> [disabled] Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit- Address: 00000000 Data: 0000 Capabilities: [d0] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: i915 00: 86 80 c2 29 07 00 90 00 02 00 00 03 00 00 00 00 10: 00 00 98 fe 01 bc 00 00 08 00 00 d0 00 00 80 fe 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 76 82 30: 00 00 00 00 90 00 00 00 00 00 00 00 0b 01 00 00 40: 09 00 0b 01 20 00 25 09 47 0c 06 00 00 00 00 00 50: 00 00 30 01 09 00 00 00 00 00 00 00 00 00 80 7f 60: 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 05 d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 11 11 00 00 00 00 06 03 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 00 22 00 00 00 00 00 00 00 00 00 00 01 02 00 e0: 00 00 00 00 00 00 00 00 00 80 00 00 00 00 00 00 f0: 12 00 03 00 00 00 00 00 90 0f 03 00 f4 e0 68 7f 00:1a.0 USB Controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #4 [8086:2937] (rev 02) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 16 Region 4: I/O ports at b480 [size=32] Capabilities: [50] Vendor Specific Information: Len=06 <?> Kernel driver in use: uhci_hcd 00: 86 80 37 29 05 00 90 02 02 00 03 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 81 b4 00 00 00 00 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1a.1 USB Controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #5 [8086:2938] (rev 02) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 21 Region 4: I/O ports at b800 [size=32] Capabilities: [50] Vendor Specific Information: Len=06 <?> Kernel driver in use: uhci_hcd 00: 86 80 38 29 05 00 90 02 02 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 b8 00 00 00 00 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 50 00 00 00 00 00 00 00 03 02 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1a.2 USB Controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #6 [8086:2939] (rev 02) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 4: I/O ports at b880 [size=32] Capabilities: [50] Vendor Specific Information: Len=06 <?> Kernel driver in use: uhci_hcd 00: 86 80 39 29 05 00 90 02 02 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 81 b8 00 00 00 00 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 50 00 00 00 00 00 00 00 05 03 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1a.7 USB Controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #2 [8086:293c] (rev 02) (prog-if 20 [EHCI]) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 0: Memory at fe97bc00 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Debug port: BAR=1 offset=00a0 Capabilities: [98] Vendor Specific Information: Len=06 <?> Kernel driver in use: ehci_hcd 00: 86 80 3c 29 06 00 90 02 02 20 03 0c 00 00 00 00 10: 00 bc 97 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 50 00 00 00 00 00 00 00 05 03 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00 60: 20 20 ff 01 00 00 00 00 01 00 00 00 00 00 08 c0 70: 00 00 cf 0f 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 09 00 06 20 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 88 85 40 00 86 0f 02 00 06 17 02 20 00:1b.0 Audio device [0403]: Intel Corporation 82801I (ICH9 Family) HD Audio Controller [8086:293e] (rev 02) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 22 Region 0: Memory at fe974000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [60] MSI: Enable- Count=1/1 Maskable- 64bit+ Address: 0000000000000000 Data: 0000 Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE- FLReset+ DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=1 ArbSelect=Fixed TC/VC=80 Status: NegoPending- InProgress- Capabilities: [130 v1] Root Complex Link Desc: PortNumber=0f ComponentID=00 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000fed1c000 Kernel driver in use: HDA Intel 00: 86 80 3e 29 06 00 10 00 02 00 03 04 08 00 00 00 10: 04 40 97 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 50 00 00 00 00 00 00 00 0f 01 00 00 40: 01 00 00 07 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 60 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 60: 05 70 80 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 10 00 91 00 00 00 00 10 00 08 10 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 04 00 01 00 00 00 00 31 00 a3 02 00 00 00 00 d0: 61 00 a3 02 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1c.0 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 1 [8086:2940] (rev 02) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 00001000-00001fff Memory behind bridge: 7fd00000-800fffff Prefetchable memory behind bridge: 00000000fdf00000-00000000fdffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x4, ASPM L0s L1, Latency L0 <1us, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #0, PowerLimit 10.000W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit- Address: 00000000 Data: 0000 Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed+ WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- Capabilities: [180 v1] Root Complex Link Desc: PortNumber=01 ComponentID=00 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000fed1c000 Kernel driver in use: pcieport 00: 86 80 40 29 07 01 10 00 02 00 04 06 08 00 81 00 10: 00 00 00 00 00 00 00 00 00 03 03 00 10 10 00 00 20: d0 7f 00 80 f1 fd f1 fd 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0a 01 02 00 40: 10 80 41 01 00 80 00 00 00 00 10 00 41 4c 11 01 50: 00 00 01 10 60 05 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 0d a0 00 00 43 10 77 82 00 00 00 00 00 00 00 00 a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 11 08 00 00 00 00 e0: 00 00 c7 00 06 07 08 00 30 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1c.4 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 5 [8086:2948] (rev 02) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: 7f900000-7fafffff Prefetchable memory behind bridge: 000000007fb00000-000000007fcfffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #5, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #0, PowerLimit 10.000W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit- Address: 00000000 Data: 0000 Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed+ WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- Capabilities: [180 v1] Root Complex Link Desc: PortNumber=05 ComponentID=00 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000fed1c000 Kernel driver in use: pcieport 00: 86 80 48 29 07 01 10 00 02 00 04 06 08 00 81 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 d0 d0 00 00 20: 90 7f a0 7f b1 7f c1 7f 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0a 01 02 00 40: 10 80 41 01 00 80 00 00 00 00 10 00 11 2c 11 05 50: 40 00 11 30 60 05 00 00 00 00 48 01 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 0d a0 00 00 43 10 77 82 00 00 00 00 00 00 00 00 a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 11 08 00 00 00 00 e0: 00 00 c7 00 06 07 08 00 30 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1c.5 PCI bridge [0604]: Intel Corporation 82801I (ICH9 Family) PCI Express Port 6 [8086:294a] (rev 02) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000c000-0000cfff Memory behind bridge: fea00000-feafffff Prefetchable memory behind bridge: 000000007f700000-000000007f8fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #6, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #0, PowerLimit 10.000W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit- Address: 00000000 Data: 0000 Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed+ WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- Capabilities: [180 v1] Root Complex Link Desc: PortNumber=06 ComponentID=00 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000fed1c000 Kernel driver in use: pcieport 00: 86 80 4a 29 07 01 10 00 02 00 04 06 08 00 81 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 c0 c0 00 00 20: a0 fe a0 fe 71 7f 81 7f 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 02 02 00 40: 10 80 41 01 00 80 00 00 00 00 10 00 11 2c 11 06 50: 40 00 11 30 60 05 00 00 00 00 48 01 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 0d a0 00 00 43 10 77 82 00 00 00 00 00 00 00 00 a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 11 08 00 00 00 00 e0: 00 00 c7 00 06 07 08 00 30 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1d.0 USB Controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #1 [8086:2934] (rev 02) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 23 Region 4: I/O ports at b000 [size=32] Capabilities: [50] Vendor Specific Information: Len=06 <?> Kernel driver in use: uhci_hcd 00: 86 80 34 29 05 00 90 02 02 00 03 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 b0 00 00 00 00 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 50 00 00 00 00 00 00 00 0e 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1d.1 USB Controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #2 [8086:2935] (rev 02) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 19 Region 4: I/O ports at b080 [size=32] Capabilities: [50] Vendor Specific Information: Len=06 <?> Kernel driver in use: uhci_hcd 00: 86 80 35 29 05 00 90 02 02 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 81 b0 00 00 00 00 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 02 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1d.2 USB Controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #3 [8086:2936] (rev 02) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 4: I/O ports at b400 [size=32] Capabilities: [50] Vendor Specific Information: Len=06 <?> Kernel driver in use: uhci_hcd 00: 86 80 36 29 05 00 90 02 02 00 03 0c 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 b4 00 00 00 00 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 50 00 00 00 00 00 00 00 05 03 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 2f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1d.7 USB Controller [0c03]: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #1 [8086:293a] (rev 02) (prog-if 20 [EHCI]) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 23 Region 0: Memory at fe97b800 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Debug port: BAR=1 offset=00a0 Capabilities: [98] Vendor Specific Information: Len=06 <?> Kernel driver in use: ehci_hcd 00: 86 80 3a 29 06 00 90 02 02 20 03 0c 00 00 00 00 10: 00 b8 97 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 50 00 00 00 00 00 00 00 0e 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00 60: 20 20 ff 01 00 00 00 00 01 00 00 00 00 00 08 c0 70: 00 00 df 0f 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 09 00 06 20 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 88 85 40 00 86 0f 02 00 06 17 02 20 00:1e.0 PCI bridge [0604]: Intel Corporation 82801 PCI Bridge [8086:244e] (rev 92) (prog-if 01 [Subtractive decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=04, subordinate=04, sec-latency=32 I/O behind bridge: 0000e000-0000efff Memory behind bridge: feb00000-febfffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR+ BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Subsystem: ASUSTeK Computer Inc. Device [1043:8277] 00: 86 80 4e 24 07 01 10 00 92 01 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 04 04 20 e0 e0 80 a2 20: b0 fe b0 fe f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 02 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 12 00 00 50: 0d 00 00 00 43 10 77 82 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1f.0 ISA bridge [0601]: Intel Corporation 82801IB (ICH9) LPC Interface Controller [8086:2918] (rev 02) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [e0] Vendor Specific Information: Len=0c <?> 00: 86 80 18 29 07 00 10 02 02 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 40: 01 08 00 00 80 00 00 00 81 04 00 00 10 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 8b 8a 85 8b d0 00 00 00 8a 83 8f 8e f8 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 0f 14 95 02 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 28 06 00 00 39 00 00 00 13 00 00 00 00 03 00 00 b0: 00 00 f0 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 33 22 11 00 67 45 00 00 c0 c0 00 00 00 00 00 00 e0: 09 00 0c 10 20 00 24 0a 60 00 00 00 00 00 00 00 f0: 01 c0 d1 fe 03 79 0e 00 86 0f 02 00 00 00 00 00 00:1f.2 IDE interface [0101]: Intel Corporation 82801IB (ICH9) 2 port SATA IDE Controller [8086:2921] (rev 02) (prog-if 8f [Master SecP SecO PriP PriO]) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 22 Region 0: I/O ports at 9c00 [size=8] Region 1: I/O ports at 9880 [size=4] Region 2: I/O ports at 9800 [size=8] Region 3: I/O ports at 9480 [size=4] Region 4: I/O ports at 9400 [size=16] Region 5: I/O ports at 9080 [size=16] Capabilities: [70] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- Capabilities: [b0] Vendor Specific Information: Len=06 <?> Kernel driver in use: ata_piix 00: 86 80 21 29 07 00 b0 02 02 8f 01 01 00 00 00 00 10: 01 9c 00 00 81 98 00 00 01 98 00 00 81 94 00 00 20: 01 94 00 00 81 90 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 70 00 00 00 00 00 00 00 0f 02 00 00 40: 07 a3 03 a3 00 00 00 00 05 00 01 01 00 00 00 00 50: 00 00 00 00 f0 50 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 01 b0 03 00 08 00 00 00 00 00 00 00 00 00 00 00 80: 05 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 03 83 93 01 00 00 00 00 00 00 01 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1f.3 SMBus [0c05]: Intel Corporation 82801I (ICH9 Family) SMBus Controller [8086:2930] (rev 02) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin C routed to IRQ 18 Region 0: Memory at fe97b400 (64-bit, non-prefetchable) [size=256] Region 4: I/O ports at 0400 [size=32] Kernel driver in use: i801_smbus 00: 86 80 30 29 03 00 80 02 02 00 05 0c 00 00 00 00 10: 04 b4 97 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 04 00 00 00 00 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 03 00 00 40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 03 04 04 00 00 00 08 08 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 00:1f.5 IDE interface [0101]: Intel Corporation 82801I (ICH9 Family) 2 port SATA IDE Controller [8086:2926] (rev 02) (prog-if 85 [Master SecO PriO]) Subsystem: ASUSTeK Computer Inc. Device [1043:8277] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 22 Region 0: I/O ports at ac00 [size=8] Region 1: I/O ports at a880 [size=4] Region 2: I/O ports at a800 [size=8] Region 3: I/O ports at a480 [size=4] Region 4: I/O ports at a400 [size=16] Region 5: I/O ports at a080 [size=16] Capabilities: [70] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- Capabilities: [b0] Vendor Specific Information: Len=06 <?> Kernel driver in use: ata_piix 00: 86 80 26 29 07 00 b0 02 02 85 01 01 00 00 00 00 10: 01 ac 00 00 81 a8 00 00 01 a8 00 00 81 a4 00 00 20: 01 a4 00 00 81 a0 00 00 00 00 00 00 43 10 77 82 30: 00 00 00 00 70 00 00 00 00 00 00 00 0f 02 00 00 40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 01 b0 03 00 08 00 00 00 00 00 00 00 00 00 00 00 80: 05 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00 01:00.0 Ethernet controller [0200]: Marvell Technology Group Ltd. 88E8056 PCI-E Gigabit Ethernet Controller [11ab:4364] (rev 12) Subsystem: ASUSTeK Computer Inc. Device [1043:81f8] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 17 Region 0: Memory at feafc000 (64-bit, non-prefetchable) [size=16K] Region 2: I/O ports at c800 [size=256] Expansion ROM at feac0000 [disabled] [size=128K] Capabilities: [48] Power Management version 3 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data Product Name: Marvell Yukon 88E8056 Gigabit Ethernet Controller Read-only fields: [PN] Part number: Yukon 88E8056 [EC] Engineering changes: Rev. 1.2 [MN] Manufacture ID: 4d 61 72 76 65 6c 6c [SN] Serial number: AbCdEfGDA0F5F [CP] Extended capability: 01 10 cc 03 [RV] Reserved: checksum good, 9 byte(s) reserved Read/write fields: [RW] Read-write area: 121 byte(s) free End Capabilities: [5c] MSI: Enable- Count=1/1 Maskable- 64bit+ Address: 0000000000000000 Data: 0000 Capabilities: [e0] Express (v1) Legacy Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 unlimited ClockPM+ Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ AERCap: First Error Pointer: 1f, GenCap- CGenEn- ChkCap- ChkEn- Kernel driver in use: sky2 00: ab 11 64 43 07 00 10 00 12 00 00 02 08 00 00 00 10: 04 c0 af fe 00 00 00 00 01 c8 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 f8 81 30: 00 00 ac fe 48 00 00 00 00 00 00 00 0a 01 00 00 40: 00 00 f0 01 00 80 a0 01 01 50 03 fe 00 20 00 13 50: 03 5c fc 80 00 00 00 78 00 00 00 01 05 e0 80 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 70 00 00 00 00 00 00 82 a8 e8 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 10 00 11 00 c0 8f 28 00 00 20 19 00 11 ac 07 00 f0: 48 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00 02:00.0 IDE interface [0101]: JMicron Technology Corp. JMB368 IDE controller [197b:2368] (prog-if 85 [Master SecO PriO]) Subsystem: ASUSTeK Computer Inc. Device [1043:827e] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 11 Region 0: I/O ports at dc00 [size=8] Region 1: I/O ports at d880 [size=4] Region 2: I/O ports at d800 [size=8] Region 3: I/O ports at d480 [size=4] Region 4: I/O ports at d400 [size=16] Capabilities: [68] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] Express (v1) Legacy Endpoint, MSI 01 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s, Latency L0 <1us, L1 <16us ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- 00: 7b 19 68 23 07 00 10 00 00 85 01 01 08 00 00 00 10: 01 dc 00 00 81 d8 00 00 01 d8 00 00 81 d4 00 00 20: 01 d4 00 00 00 00 00 00 00 00 00 00 43 10 7e 82 30: 00 00 00 00 68 00 00 00 00 00 00 00 0b 01 00 00 40: bd 00 c0 00 08 08 80 e0 00 00 00 00 00 00 00 00 50: 10 00 11 02 00 00 00 00 00 20 08 00 11 44 02 01 60: 40 00 11 10 00 00 00 00 01 50 02 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 a0 01 00 00 0f 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 31 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 c0: c3 8b 38 70 03 45 02 00 00 00 00 00 00 00 00 00 d0: 18 00 00 80 00 00 00 10 00 00 eb 00 00 00 00 01 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 04:02.0 FireWire (IEEE 1394) [0c00]: VIA Technologies, Inc. VT6306 Fire II IEEE 1394 OHCI Link Layer Controller [1106:3044] (rev c0) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc. M4A series motherboard [1043:81fe] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64 (8000ns max), Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 20 Region 0: Memory at febff800 (32-bit, non-prefetchable) [size=2K] Region 1: I/O ports at ec00 [size=128] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2+ AuxCurrent=0mA PME(D0-,D1-,D2+,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: firewire_ohci 00: 06 11 44 30 17 00 10 02 c0 10 00 0c 08 40 00 00 10: 00 f8 bf fe 01 ec 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 fe 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0a 01 00 20 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 02 e4 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

1 0

Flashing FM28V100 through satasii
by Alexei Gladkikh 31 Oct '11

31 Oct '11

Hi, I'm tried to flash memory FM28V100-TG using flashrom software, but flashrom didn't find it ("Flash seems unconnected"). Could this memory IC be added to supported IC's list? I'm use it because it's only type of IC that I could find now (I have to wait for long standard flash chips). I've read datasheet on this IC and know that isn't standard flash memory, but it has parallel interface and it compatible with JEDEC pinout. -- regards, Alexei mailto:GladkikhAlexei@gmail.com

1 0

Report log
by La cigale 27 Oct '11

27 Oct '11

Hi, if I can help you finish support for your chipset... :) I Have the motherboard ASUS M2N68-AM PLUS. Good luck...

1 0

Re: [flashrom] Programming an A25L40 EEPROM
by Arup Basak 27 Oct '11

27 Oct '11

I have the 512KB bios file, and was trying to program it with flashrom and buspirate. Looks like one version of flashrom says "missing libftdi.dll" while another version says programmer buspirate_spi not supported. Can you give me link of any latest version. I have tried to copy the libftdi.dll into the flashrom directory, also tried 'regsrv32 libftdi.dll' in a command-box (where regsrv32 looks to be absent in Windows 7) One more thing, when I hooked up the SPI chip to buspirate, if I use terminal mode of buspirate and set correct mode, then if I try to read some block using CS enables, I get 0x00 and if I keep CS disabled I get 0xFF. I've tried to write anything with both CS enabled and disabled. But values are read as above. Maybe I've settled up wrong mode while trying to access EEPROM from buspirate terminal mode. . I've worked with mode 5 spi, 125khz, Clock polarity:Idle low , Output clock edge:Active to idle, Input sample phase:middle, Output mode: Normal (H=3.3V, L=GND), W(power supplies on). I didn't need to do so because for flashing my BIOS chip, I am trying to use flashrom. This is the fresh chip I bought for recovery. http://in.rsdelivers.com/product/amic-technology/a25l040m-f/spi-flash-4mb-s… Note: The BIOS chips is of my tablet, and not PC, so no problem if it takes few days to resolve issues and program it. It isn't much serious case when someone corrupts motherboard's BIOS. I know flashrom's support is free and takes few hours to get reply. It's not an issue in my case.

1 0

Re: [flashrom] Flashrom report
by Stefan Tauner 27 Oct '11

27 Oct '11

On Thu, 27 Oct 2011 09:17:23 +0200 Piotr Czepek <piotr.czepek(a)gmail.com> wrote: > Hello, > I tried to re-flash VIA Epia mb with flashrom. > Chipset is marked as untested, so I attached report for you. > > Just for test - I read flash image to file and I wrote it back. > After reboot system is alive, so I think flasrom works fine with this mb ;) > Hello Piotr, Thanks for your effort! If you look at the end of your write log you will see a lot of address ranges followed by an 'S'. This indicates that flashrom has detected that the current content already matches the data to write and *S*kips that range. Naturally in your case it skips the whole image and hence the log is no proof of erase + write working correctly. If you have means to recover a failed write (or an UPS and some patience) or if you are brave enough you can try to first erase the chip with -E and write the backup image afterwards like you did already. I have no experience with the VIA chips you have, so i can't say if it is fairly safe or not (i guess so). If that would be my productive machine i would not try it... some glitch can always occur... -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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flashrom October 2011