The ECS P6IWP-Fe can be added to the list of out of the box boards.
Confirmed with two Intel 82802AB
But it killed a PMC Pm49FL004 as well as another 512KB FWH chip (I think
it was a SST).
-Anders
NetBSD needs libpciutils (which is called libpci on pretty much every
other platform and lives in the pciutils package) and apparently the
libpciutils on NetBSD needs the NetBSD-native libpci (no equivalent on
other platforms).
Thanks to Jonathan A. Kollasch for reporting.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Index: flashrom-netbsd/Makefile
===================================================================
--- flashrom-netbsd/Makefile (Revision 1028)
+++ flashrom-netbsd/Makefile (Arbeitskopie)
@@ -220,8 +220,10 @@
FEATURE_CFLAGS += -D'NEED_PCI=1'
PROGRAMMER_OBJS += pcidev.o physmap.o hwaccess.o
ifeq ($(OS_ARCH), NetBSD)
-LIBS += -lpciutils # The libpci we want.
-LIBS += -l$(shell uname -p) # For (i386|x86_64)_iopl(2).
+# The libpci we want is called libpciutils on NetBSD and needs NetBSD libpci.
+LIBS += -lpciutils -lpci
+# For (i386|x86_64)_iopl(2).
+LIBS += -l$(shell uname -p)
else
ifeq ($(OS_ARCH), DOS)
# FIXME There needs to be a better way to do this
--
http://www.hailfinger.org/
Author: hailfinger
Date: Sat Jun 5 01:24:57 2010
New Revision: 1033
URL: http://flashrom.org/trac/coreboot/changeset/1033
Log:
NetBSD needs libpciutils (which is called libpci on pretty much every
other platform and lives in the pciutils package) and apparently the
libpciutils on NetBSD needs the NetBSD-native libpci (no equivalent on
other platforms).
Thanks to Jonathan A. Kollasch for reporting.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Acked-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net>
Modified:
trunk/Makefile
Modified: trunk/Makefile
==============================================================================
--- trunk/Makefile Sat Jun 5 01:20:21 2010 (r1032)
+++ trunk/Makefile Sat Jun 5 01:24:57 2010 (r1033)
@@ -220,8 +220,10 @@
FEATURE_CFLAGS += -D'NEED_PCI=1'
PROGRAMMER_OBJS += pcidev.o physmap.o hwaccess.o
ifeq ($(OS_ARCH), NetBSD)
-LIBS += -lpciutils # The libpci we want.
-LIBS += -l$(shell uname -p) # For (i386|x86_64)_iopl(2).
+# The libpci we want is called libpciutils on NetBSD and needs NetBSD libpci.
+LIBS += -lpciutils -lpci
+# For (i386|x86_64)_iopl(2).
+LIBS += -l$(shell uname -p)
else
ifeq ($(OS_ARCH), DOS)
# FIXME There needs to be a better way to do this
Here is the output of the requested information for the HP NetServer E
800, chipset not detected by flashrom.
BIOS and other onboard firmware (SCSI controller/s):
http://h20000.www2.hp.com/bizsupport/TechSupport/SoftwareIndex.jsp?lang=en&…
The name is the name of the machine, I don't know if the board has a
different identifier.
--
Andrew.
Hello,
I tried out flashrom on an ASUS A8N-VM CSM board: read seemed to go fine, but
write failed. Information about the board:
http://www.asus.com/product.aspx?P_ID=JBqqlpj4cspbSa3s
flashrom -V, lspci -nnvvxxx, superiotool -deV, flashrom -rV and flashrom -wV
output is attached. The BIOS I was trying to write was the rev 1001 one
available from the above ASUS page.
Per agaran's and roysjosh's friendly help on IRC I checked the BIOS I read
with -r with -v and it says VERIFIED so I suppose I'll go ahead and reboot
later today.
One note about the board testing Wiki page you may want to clarify:
"To check if you can read the existing BIOS image from the chip, run flashrom
-r backup.bin. Make sure that backup.bin contains a useful BIOS image. (Some
chipsets will return 0xff for large areas of flash without any error
messages.)"
For a BIOS newbie like me, the remark in parenthesis doesn't tell much - is it
a good or a bad sign if a chipset returns 0xff for large areas of flash
without any error messages? (Bad, I guess ;))
The internal programmer needs correct information about flash_base and
chip window top/bottom alignment on non-x86 before it can be used. Abort
any internal programmer action for now until the code is fixed.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Index: flashrom-disable_internal_nonx86/internal.c
===================================================================
--- flashrom-disable_internal_nonx86/internal.c (Revision 1013)
+++ flashrom-disable_internal_nonx86/internal.c (Arbeitskopie)
@@ -165,16 +165,22 @@
pci_init(pacc); /* Initialize the PCI library */
pci_scan_bus(pacc); /* We want to get the list of devices */
- /* We look at the lbtable first to see if we need a
+#if defined(__i386__) || defined(__x86_64__)
+ /* We look at the cbtable first to see if we need a
* mainboard specific flash enable sequence.
*/
coreboot_init();
-#if defined(__i386__) || defined(__x86_64__)
dmi_init();
/* Probe for the Super I/O chip and fill global struct superio. */
probe_superio();
+#else
+ /* FIXME: Enable cbtable searching on all non-x86 platforms supported
+ * by coreboot.
+ * FIXME: Find a replacement for DMI on non-x86.
+ * FIXME: Enable SuperI/O probing once port I/O is possible.
+ */
#endif
/* Warn if a laptop is detected. */
@@ -200,6 +206,7 @@
}
}
+#if __FLASHROM_LITTLE_ENDIAN__
/* try to enable it. Failure IS an option, since not all motherboards
* really need this to be done, etc., etc.
*/
@@ -220,7 +227,25 @@
* The error code might have been a warning only.
* Besides that, we don't check the board enable return code either.
*/
+#if defined(__i386__) || defined(__x86_64__)
return 0;
+#else
+ msg_perr("Your platform is not supported yet for the internal "
+ "programmer due to missing flash_base and top/bottom "
+ "alignment information.\n"
+ "Aborting.\n");
+ return 1;
+#endif
+#else
+ /* FIXME: Remove this unconditional abort once all PCI drivers are
+ * converted to use little-endian accesses for memory BARs.
+ */
+ msg_perr("Your platform is not supported yet for the internal "
+ "programmer because it has not been converted from native "
+ "endian to little endian access yet.\n"
+ "Aborting.\n");
+ return 1;
+#endif
}
int internal_shutdown(void)
--
http://www.hailfinger.org/
Author: hailfinger
Date: Fri Jun 4 21:05:39 2010
New Revision: 1031
URL: http://flashrom.org/trac/coreboot/changeset/1031
Log:
The internal programmer needs correct information about flash_base and
chip window top/bottom alignment on non-x86 before it can be used.
Abort any internal programmer action for now until the code is fixed.
Add the concept of a processor enable for systems where flashing is
impacted by processor settings or processor model.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Added:
trunk/processor_enable.c
Modified:
trunk/Makefile
trunk/flash.h
trunk/internal.c
Modified: trunk/Makefile
==============================================================================
--- trunk/Makefile Fri Jun 4 19:07:39 2010 (r1030)
+++ trunk/Makefile Fri Jun 4 21:05:39 2010 (r1031)
@@ -124,7 +124,7 @@
ifeq ($(CONFIG_INTERNAL), yes)
FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1'
-PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o dmi.o internal.o
+PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o dmi.o internal.o
# FIXME: The PROGRAMMER_OBJS below should only be included on x86.
PROGRAMMER_OBJS += it87spi.o ichspi.o sb600spi.o wbsio_spi.o
NEED_PCI := yes
Modified: trunk/flash.h
==============================================================================
--- trunk/flash.h Fri Jun 4 19:07:39 2010 (r1030)
+++ trunk/flash.h Fri Jun 4 21:05:39 2010 (r1031)
@@ -361,6 +361,9 @@
/* chipset_enable.c */
int chipset_flash_enable(void);
+/* processor_enable.c */
+int processor_flash_enable(void);
+
/* physmap.c */
void *physmap(const char *descr, unsigned long phys_addr, size_t len);
void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len);
Modified: trunk/internal.c
==============================================================================
--- trunk/internal.c Fri Jun 4 19:07:39 2010 (r1030)
+++ trunk/internal.c Fri Jun 4 21:05:39 2010 (r1031)
@@ -165,16 +165,28 @@
pci_init(pacc); /* Initialize the PCI library */
pci_scan_bus(pacc); /* We want to get the list of devices */
- /* We look at the lbtable first to see if we need a
+ if (processor_flash_enable()) {
+ msg_perr("Processor detection/init failed.\n"
+ "Aborting.\n");
+ return 1;
+ }
+
+#if defined(__i386__) || defined(__x86_64__)
+ /* We look at the cbtable first to see if we need a
* mainboard specific flash enable sequence.
*/
coreboot_init();
-#if defined(__i386__) || defined(__x86_64__)
dmi_init();
/* Probe for the Super I/O chip and fill global struct superio. */
probe_superio();
+#else
+ /* FIXME: Enable cbtable searching on all non-x86 platforms supported
+ * by coreboot.
+ * FIXME: Find a replacement for DMI on non-x86.
+ * FIXME: Enable Super I/O probing once port I/O is possible.
+ */
#endif
/* Warn if a laptop is detected. */
@@ -200,6 +212,7 @@
}
}
+#if __FLASHROM_LITTLE_ENDIAN__
/* try to enable it. Failure IS an option, since not all motherboards
* really need this to be done, etc., etc.
*/
@@ -220,7 +233,26 @@
* The error code might have been a warning only.
* Besides that, we don't check the board enable return code either.
*/
+#if defined(__i386__) || defined(__x86_64__)
return 0;
+#else
+ msg_perr("Your platform is not supported yet for the internal "
+ "programmer due to missing\n"
+ "flash_base and top/bottom alignment information.\n"
+ "Aborting.\n");
+ return 1;
+#endif
+#else
+ /* FIXME: Remove this unconditional abort once all PCI drivers are
+ * converted to use little-endian accesses for memory BARs.
+ */
+ msg_perr("Your platform is not supported yet for the internal "
+ "programmer because it has\n"
+ "not been converted from native endian to little endian "
+ "access yet.\n"
+ "Aborting.\n");
+ return 1;
+#endif
}
int internal_shutdown(void)
Added: trunk/processor_enable.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ trunk/processor_enable.c Fri Jun 4 21:05:39 2010 (r1031)
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2010 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*
+ * Contains the processor specific flash enables and system settings.
+ */
+
+#include "flash.h"
+
+#if defined(__i386__) || defined(__x86_64__)
+
+int processor_flash_enable(void)
+{
+ /* On x86, flash access is not processor specific except on
+ * AMD Elan SC520, AMD Geode and maybe other SoC-style CPUs.
+ * FIXME: Move enable_flash_cs5536 and get_flashbase_sc520 here.
+ */
+ return 0;
+}
+
+#else
+
+int processor_flash_enable(void)
+{
+ /* Not implemented yet. Oh well. */
+ return 1;
+}
+
+#endif