flashrom April 2010

flashrom@flashrom.org

55 participants
102 discussions

[PATCH 05/11] Rebased Board Enable Patch: A8JM board_enable patch (was Re: A8JM flashrom unable to erase)
by Sean Nelson 09 Aug '10

09 Aug '10

This patch replaces the earlier one sent, and adds A8JM (and possibly all A8J series) support, and additionally adds DMI detection of A8J, after the r896 fix to dmi detection. Signed-off-by: James Lancaster <deathstalker(a)gmail.com> The DMI identification triggers on either the 2nd or 5th dmi strings, which are both "A8J" followed by different numbers of spaces. Combined with the PCI IDs, it might work on any of the A8J series seeing that the main difference in all but the A8JS is the video card/screen (possibly that too, while there they did add sata in place of IDE). I believe (based on having a video card that was supposed to only be on the A8JS, that it has a different device number (1232), that the A8JS will not be picked up.) I've tested this on my own computer, it picks it up and appears to flash just fine. I think I probably should have added Acked by as it works, but I'll be conservative on the issue. --- board_enable.c | 11 ++++++++++- 1 files changed, 10 insertions(+), 1 deletions(-) diff --git a/board_enable.c b/board_enable.c index 36bf6e4..89dad8a 100644 --- a/board_enable.c +++ b/board_enable.c @@ -910,26 +910,34 @@ static int intel_ich_gpio_set(int gpio, int raise) return 0; } /** * Suited for Abit IP35: Intel P35 + ICH9R. * Suited for Abit IP35 Pro: Intel P35 + ICH9R. */ static int intel_ich_gpio16_raise(const char *name) { return intel_ich_gpio_set(16, 1); } /** + * Suited for ASUS A8JM: Intel 945 + ICH7 + */ +static int intel_ich_gpio34_raise(const char *name) +{ + return intel_ich_gpio_set(34, 1); +} + +/** * Suited for MSI MS-7046: LGA775 + 915P + ICH6. */ static int intel_ich_gpio19_raise(const char *name) { return intel_ich_gpio_set(19, 1); } /** * Suited for: * - Asus P4B266LM (Sony Vaio PCV-RX650): socket478 + 845D + ICH2. * - Asus P4C800-E Deluxe: socket478 + 875P + ICH5. * - Asus P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R. */ @@ -1290,26 +1298,27 @@ struct board_pciid_enable board_pciid_enables[] = { {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, "Abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "Abit", "VT6X4", 0, NT, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, NULL, "Albatron", "PM266A", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, NULL, "AOpen", "vKM400Am-S", 0, OK, it8705f_write_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, OK, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, NULL, "ASUS", "A7V600-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, NULL, "ASUS", "A7V8X", 0, OK, board_asus_a7v8x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x80A1, NULL, NULL, NULL, "ASUS", "A7V8X-X", 0, OK, it8712f_gpio3_1_raise}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, OK, w836xx_memw_enable_2e}, + {0x8086, 0x27A0, 0x1043, 0x1287, 0x8086, 0x27DF, 0x1043, 0x1287, "^A8J", NULL, NULL, "ASUS", "A8JM", 0, NT, intel_ich_gpio34_raise}, {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, NULL, NULL, NULL, "ASUS", "A8N", 0, NT, board_shuttle_fn25}, {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise}, {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, "ASUS", "P4B266", 0, OK, intel_ich_gpio22_raise}, {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, "ASUS", "P4B266-LM", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x24D3, 0x1043, 0x80A6, 0x8086, 0x2578, 0x1043, 0x80F6, NULL, NULL, NULL, "ASUS", "P4C800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, OK, intel_ich_gpio21_raise}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "^P5A$", "asus", "p5a", "ASUS", "P5A", 0, OK, board_asus_p5a}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, OK, nvidia_mcp_gpio10_raise}, {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, NULL, "Biostar", "P4M80-M4", 0, OK, it8705f_write_enable_2e}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, NULL, "Dell", "PowerEdge 1850", 0, OK, intel_ich_gpio23_raise}, {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, NULL, "Elitegroup", "K7S6A", 0, OK, it8705f_write_enable_2e}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, "Elitegroup", "K7VTA3", 256, OK, it8705f_write_enable_2e}, @@ -1323,27 +1332,27 @@ struct board_pciid_enable board_pciid_enables[] = { {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, NULL, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, OK, it87xx_probe_spi_flash}, {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x7910, 0x1458, 0x5000, 0x1002, 0x438D, 0x1458, 0x5001, NULL, NULL, NULL, "GIGABYTE", "GA-MA69VM-S2", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, OK, it87xx_probe_spi_flash}, {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, OK, it87xx_probe_spi_flash}, {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, OK, board_hp_dl145_g3_enable}, {0x8086, 0x2415, 0x103c, 0x1249, 0x10b7, 0x9200, 0x103c, 0x1246, NULL, NULL, NULL, "HP", "Vectra VL400", 0, OK, board_hp_vl400}, {0x8086, 0x1a30, 0x103c, 0x1a30, 0x8086, 0x2443, 0x103c, 0x2440, "^VL420$", NULL, NULL, "HP", "VL420 SFF", 0, OK, intel_ich_gpio22_raise}, {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, NULL, "IBM", "x3455", 0, OK, board_ibm_x3455}, {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, NULL, "Intel", "D201GLY", 0, OK, wbsio_check_for_spi}, {0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower}, {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, NULL, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e}, - {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, + {0x8086, 0x27A0, 0x8086, 0x27a0, 0x8086, 0x27b8, 0x8086, 0x27b8, NULL, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m}, {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, "Mitac", "6513WU", 0, OK, board_mitac_6513wu}, {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, OK, board_msi_kt4v}, {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio4_4_raise_2e}, {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, OK, board_msi_kt4v}, {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, OK, board_msi_651ml}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise}, {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, OK, w83627thf_gpio4_4_raise_4e}, {0x10DE, 0x0270, 0x1462, 0x7207, 0x10DE, 0x0264, 0x1462, 0x7207, NULL, NULL, NULL, "MSI", "MS-7207 (K8N GM2-L)", 0, NT, nvidia_mcp_gpio2_raise}, {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, "MSI", "K8N Neo4-F", 0, OK, nvidia_mcp_gpio2_raise}, {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", 256, OK, it8705f_write_enable_2e}, {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", 0, OK, board_shuttle_fn25}, {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, "Soyo", "SY-7VCA", 0, OK, board_soyo_sy_7vca}, -- 1.6.6

2 3

[PATCH] Board enable for ASUS A8N-LA (HP NAGAMI)
by Sean Nelson 08 Aug '10

08 Aug '10

Reversed-engineered board enable for the ASUS A8N-LA. IDs are ISA and SMBus. Added dmi string to match 3 HP boards: Nagami, Nagami2, Nagami2L. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

3 4

tested boardenable/flashing on iBase:MB899
by Bernhard M. Wiedemann 08 Aug '10

08 Aug '10

# flashrom -p internal:boardenable=force -m iBASE:MB899 -w coreboot.rom flashrom v0.9.1-runknown on Linux 2.6.18-skas3-v9-pre9-default (i686), built with libpci 2.2.4-pre4, GCC 3.4.6 (Debian 3.4.6-5) No coreboot table found. Found chipset "Intel ICH7M", enabling flash write... OK. This chipset supports the following protocols: FWH. NOTE: Running an untested board enable procedure. Please report success/failure to flashrom(a)flashrom.org. Disabling flash write protection for board "iBASE MB899"... Intel ICH LPC Bridge: Raising GPIO26. OK. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Writing flash chip... Erasing flash chip... SUCCESS. Programming page: DONE!ss: 0x0007f000 COMPLETE. Verifying flash... VERIFIED. -- Bernhard M. Wiedemann software engineer

2 1

Re: [flashrom] Unable to use flasrom0.9.1 in my board
by sougata.barik＠wipro.com 02 Aug '10

02 Aug '10

Hi, I am using flashrom 0.9.1 in intel EP80579 processor which is connected to flash SST25VF016B by spi interface but when I am trying to use it, it shows following error [root@localhost flashrom-0.9.1]# ./flashrom -V flashrom v0.9.1-r710 No coreboot table found. Found chipset "Intel EP80579", enabling flash write... 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x0 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x1 0x7fffffff/0x7fffffff FWH IDSEL: 0x4 0x7fffffff/0x7fffffff FWH IDSEL: 0x5 0x7fffffff/0x7fffffff FWH IDSEL: 0x6 0x7fffffff/0x7fffffff FWH IDSEL: 0x7 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled 0x7fffffff/0x7fffffff FWH decode enabled BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 Root Complex Register Block address = 0xfed1c000 GCS = 0xd70260: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x0 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3020 0x00: 0x8004 (SPIS) 0x02: 0x4240 (SPIC) 0x04: 0x00f4d606 (SPIA) 0x08: 0x41bf41bf (SPID0) 0x0c: 0x00000000 (SPID0+4) 0x10: 0x00000000 (SPID1) 0x14: 0x00000000 (SPID1+4) 0x18: 0x00000000 (SPID2) 0x1c: 0x00000000 (SPID2+4) 0x20: 0x00000000 (SPID3) 0x24: 0x00000000 (SPID3+4) 0x28: 0x00000000 (SPID4) 0x2c: 0x00000000 (SPID4+4) 0x30: 0x00000000 (SPID5) 0x34: 0x00000000 (SPID5+4) 0x38: 0x00000000 (SPID6) 0x3c: 0x00000000 (SPID6+4) 0x40: 0x00000000 (SPID7) 0x44: 0x00000000 (SPID7+4) 0x50: 0x00e00000 (BBAR) 0x54: 0x5006 (PREOP) 0x56: 0x163b (OPTYPE) 0x58: 0x05200302 (OPMENU) 0x5c: 0x00016090 (OPMENU+4) 0x60: 0x00000000 (PBR0) 0x64: 0x00000000 (PBR1) 0x68: 0x00000000 (PBR2) 0x6c: 0x00000000 (PBR3) WARNING: SPI Configuration Lockdown activated. Generating OPCODES... done SPI Read Configuration: prefetching disabled, caching enabled, OK. This chipset supports the following protocols: SPI. Calibrating delay loop... 341M loops per second, 100 myus = 199 us. OK. Probing for AMD Am29F010A/B, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F016D, 2048 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F040B, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for AMD Am29F080B, 1024 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for AMD Am29LV040B, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for AMD Am29LV081B, 1024 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for ASD AE49F2008, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Atmel AT25DF021, 256 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT25DF041A, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT25DF081, 1024 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT25DF161, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT25DF321, 4096 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT25DF321A, 4096 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT25DF641, 8192 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT25F512B, 64 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT25FS010, 128 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT25FS040, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT26DF041, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT26DF081A, 1024 KB: RDID returned 0xbf 0x41 0xbf. probe_spi_rdid_generic: id1 0xbf, id2 0x41bf Probing for Atmel AT26DF161, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT26DF161A, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT26F004, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT29C512, 64 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Atmel AT29C010A, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Atmel AT29C020, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Atmel AT29C040A, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Atmel AT45CS1282, 16896 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT45DB011D, 128 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT45DB021D, 256 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT45DB041D, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT45DB081D, 1024 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT45DB161D, 2048 KB: RDID returned 0xbf 0x41 0xbf. probe_spi_rdid_generic: id1 0xbf, id2 0x41bf Probing for Atmel AT45DB321C, 4224 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT45DB321D, 4096 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT45DB642D, 8192 KB: Transaction error! run OPCODE 0x90 failed Probing for Atmel AT49BV512, 64 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N), 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for AMIC A25L40P, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for AMIC A29002B, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for AMIC A29002T, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for AMIC A29040B, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for AMIC A49LF040A, 512 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for EMST F49B002UA, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Eon EN25B05, 64 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25B10, 128 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25B20, 256 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25B40, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25B80, 1024 KB: RDID returned 0xbf 0x41 0xbf. probe_spi_rdid_generic: id1 0xbf, id2 0x41bf Probing for Eon EN25B16, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25B32, 4096 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25B64, 8192 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25D16, 2048 KB: RDID returned 0xbf 0x41 0xbf. probe_spi_rdid_generic: id1 0xbf, id2 0x41bf Probing for Eon EN25F05, 64 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25F10, 128 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25F20, 256 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25F40, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25F80, 1024 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25F16, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for Eon EN25F32, 4096 KB: Transaction error! run OPCODE 0x90 failed Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-B, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Intel 28F001BX-T, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Intel 82802AB, 512 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for Intel 82802AC, 1024 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for Macronix MX25L512, 64 KB: Transaction error! run OPCODE 0x90 failed Probing for Macronix MX25L1005, 128 KB: Transaction error! run OPCODE 0x90 failed Probing for Macronix MX25L2005, 256 KB: Transaction error! run OPCODE 0x90 failed Probing for Macronix MX25L4005, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for Macronix MX25L8005, 1024 KB: Transaction error! run OPCODE 0x90 failed Probing for Macronix MX25L1605, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for Macronix MX25L1635D, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for Macronix MX25L3205, 4096 KB: Transaction error! run OPCODE 0x90 failed Probing for Macronix MX25L3235D, 4096 KB: Transaction error! run OPCODE 0x90 failed Probing for Macronix MX25L6405, 8192 KB: Transaction error! run OPCODE 0x90 failed Probing for Macronix MX25L12805, 16384 KB: Transaction error! run OPCODE 0x90 failed Probing for Macronix MX29F001B, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Macronix MX29F001T, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Macronix MX29F002B, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Macronix MX29F002T, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Macronix MX29LV040, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Numonyx M25PE10, 128 KB: RDID returned 0xbf 0x41 0xbf. probe_spi_rdid_generic: id1 0xbf, id2 0x41bf Probing for Numonyx M25PE20, 256 KB: Transaction error! run OPCODE 0x90 failed Probing for Numonyx M25PE40, 256 KB: Transaction error! run OPCODE 0x90 failed Probing for Numonyx M25PE80, 1024 KB: Transaction error! run OPCODE 0x90 failed Probing for Numonyx M25PE16, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for PMC Pm25LV010, 128 KB: Transaction error! run OPCODE 0x90 failed Probing for PMC Pm25LV016B, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for PMC Pm25LV020, 256 KB: Transaction error! run OPCODE 0x90 failed Probing for PMC Pm25LV040, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for PMC Pm25LV080B, 1024 KB: RDID returned 0xbf 0x41 0xbf. probe_spi_rdid_generic: id1 0xbf, id2 0x41bf Probing for PMC Pm25LV512, 64 KB: Transaction error! run OPCODE 0x90 failed Probing for PMC Pm29F0002T, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for PMC Pm29F0002B, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for PMC Pm39LV010, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for PMC Pm49FL002, 256 KB: skipped. Host bus type SPI and chip bus type LPC,FWH are incompatible. Probing for PMC Pm49FL004, 512 KB: skipped. Host bus type SPI and chip bus type LPC,FWH are incompatible. Probing for Sharp LHF00L04, 1024 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for Spansion S25FL016A, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for SST SST25VF016B, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for SST SST25VF032B, 4096 KB: Transaction error! run OPCODE 0x90 failed Probing for SST SST25VF040B, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for SST SST25VF040.REMS, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for SST SST25VF040B.REMS, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for SST SST25VF080B, 1024 KB: Transaction error! run OPCODE 0x90 failed Probing for SST SST28SF040A, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST29EE010, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST29LE010, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST29EE020A, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST29LE020, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST39SF010A, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST39SF020A, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST39SF040, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF512, 64 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF010, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF020, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF040, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST39VF080, 1024 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SST SST49LF002A/B, 256 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for SST SST49LF003A/B, 384 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for SST SST49LF004A/B, 512 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for SST SST49LF004C, 512 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for SST SST49LF008A, 1024 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for SST SST49LF008C, 1024 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for SST SST49LF016C, 2048 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for SST SST49LF020, 256 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for SST SST49LF020A, 256 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for SST SST49LF040, 512 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for SST SST49LF040B, 512 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for SST SST49LF080A, 1024 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for SST SST49LF160C, 2048 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for ST M25P05-A, 64 KB: Transaction error! run OPCODE 0x90 failed Probing for ST M25P05.RES, 64 KB: Transaction error! run OPCODE 0x90 failed Invalid OPCODE 0xab Probing for ST M25P10-A, 128 KB: Transaction error! run OPCODE 0x90 failed Probing for ST M25P10.RES, 128 KB: Transaction error! run OPCODE 0x90 failed Invalid OPCODE 0xab Probing for ST M25P20, 256 KB: Transaction error! run OPCODE 0x90 failed Probing for ST M25P40, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for ST M25P40-old, 512 KB: Transaction error! run OPCODE 0x90 failed Invalid OPCODE 0xab Probing for ST M25P80, 1024 KB: Transaction error! run OPCODE 0x90 failed Probing for ST M25P16, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for ST M25P32, 4096 KB: Transaction error! run OPCODE 0x90 failed Probing for ST M25P64, 8192 KB: RDID returned 0xbf 0x41 0xbf. probe_spi_rdid_generic: id1 0xbf, id2 0x41bf Probing for ST M25P128, 16384 KB: Transaction error! run OPCODE 0x90 failed Probing for ST M29F002B, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for ST M29F002T/NT, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for ST M29F040B, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for ST M29F400BT, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for ST M29W010B, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for ST M29W040B, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for ST M50FLW040A, 512 KB: skipped. Host bus type SPI and chip bus type LPC,FWH are incompatible. Probing for ST M50FLW040B, 512 KB: skipped. Host bus type SPI and chip bus type LPC,FWH are incompatible. Probing for ST M50FLW080A, 1024 KB: skipped. Host bus type SPI and chip bus type LPC,FWH are incompatible. Probing for ST M50FLW080B, 1024 KB: skipped. Host bus type SPI and chip bus type LPC,FWH are incompatible. Probing for ST M50FW002, 256 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for ST M50FW016, 2048 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for ST M50FW040, 512 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for ST M50FW080, 1024 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for ST M50LPW116, 2048 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for SyncMOS S29C31004T, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51001T, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51002T, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for SyncMOS S29C51004T, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for TI TMS29F002RB, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for TI TMS29F002RT, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Winbond W25x10, 128 KB: Transaction error! run OPCODE 0x90 failed Probing for Winbond W25x20, 256 KB: Transaction error! run OPCODE 0x90 failed Probing for Winbond W25x40, 512 KB: Transaction error! run OPCODE 0x90 failed Probing for Winbond W25x80, 1024 KB: Transaction error! run OPCODE 0x90 failed Probing for Winbond W25x16, 2048 KB: Transaction error! run OPCODE 0x90 failed Probing for Winbond W29C011, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Winbond W29C020C, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Winbond W29C040P, 512 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Winbond W29EE011, 128 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Winbond W39V040A, 512 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for Winbond W39V040B, 512 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for Winbond W39V040C, 512 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for Winbond W39V040FA, 512 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for Winbond W39V080A, 1024 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for Winbond W49F002U, 256 KB: skipped. Host bus type SPI and chip bus type Parallel are incompatible. Probing for Winbond W49V002A, 256 KB: skipped. Host bus type SPI and chip bus type LPC are incompatible. Probing for Winbond W49V002FA, 256 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for Winbond W39V080FA, 1024 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Host bus type SPI and chip bus type FWH are incompatible. Probing for Atmel unknown Atmel SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. Transaction error! run OPCODE 0x90 failed Not unmapping zero size at (nil) Probing for EON unknown EON SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. Transaction error! run OPCODE 0x90 failed Not unmapping zero size at (nil) Probing for Macronix unknown Macronix SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. Transaction error! run OPCODE 0x90 failed Not unmapping zero size at (nil) Probing for PMC unknown PMC SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. Transaction error! run OPCODE 0x90 failed Not unmapping zero size at (nil) Probing for SST unknown SST SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. Transaction error! run OPCODE 0x90 failed Not unmapping zero size at (nil) Probing for ST unknown ST SPI chip, 0 KB: Not mapping flash chip, zero size at 0x00000000. RDID returned 0xbf 0x41 0xbf. probe_spi_rdid_generic: id1 0xbf, id2 0x41bf Not unmapping zero size at (nil) No EEPROM/flash device found. If you know which flash chip you have, and if this version of flashrom supports a similar flash chip, you can try to force read your chip. Run: flashrom -f -r -c similar_supported_flash_chip filename Note: flashrom can never write when the flash chip isn't found automatically. [root@localhost flashrom-0.9.1]# CTRL-A Z for help |115200 8N1 | NOR | Minicom 2.3 | VT102 | Offline [root@localhost flashrom-0.9.1]# ./flashrom -c SST25VF016B flashrom v0.9.1-r710 No coreboot table found. Found chipset "Intel EP80579", enabling flash write... WARNING: SPI Configuration Lockdown activated. OK. This chipset supports the following protocols: SPI. Calibrating delay loop... OK. No EEPROM/flash device found. If you know which flash chip you have, and if this version of flashrom supports a similar flash chip, you can try to force read your chip. Run: flashrom -f -r -c similar_supported_flash_chip filename Note: flashrom can never write when the flash chip isn't found automatically. [root@localhost flashrom-0.9.1]# please tell me what should I do to work this utility in my board and how I can download flashrom from svn?? regards, Sougata Please do not print this email unless it is absolutely necessary. The information contained in this electronic message and any attachments to this message are intended for the exclusive use of the addressee(s) and may contain proprietary, confidential or privileged information. If you are not the intended recipient, you should not disseminate, distribute or copy this e-mail. Please notify the sender immediately and destroy all copies of this message and any attachments. WARNING: Computer viruses can be transmitted via email. The recipient should check this email and any attachments for the presence of viruses. The company accepts no liability for any damage caused by any virus transmitted by this email. www.wipro.com

2 1

Flashing on ASUS P6T SE works
by Sinisa Dukanovic 29 Jul '10

29 Jul '10

I have successfully read, verified and updated my BIOS with flashrom.

2 1

Working Motherboard (out of the box): ASUS P6T Deluxe
by Konstantin Matuschek 29 Jul '10

29 Jul '10

Hi :-) I was told to send this email on irc, so here it comes ;-) Yesterday I flashed my Motherboard with Flashrom (first backed up with -r, then flashed with -w), it worked out of the box. Note that the V2 Version of this Board, that is already listed on your support list, is a different board and not just a revision (missing SAS, more SATA, different Audio afaik). Motherboard Name: ASUS P6T Deluxe Motherboard Revision: (unknown, my graphics card hides the text and it's quite difficult to remove it - probably there is only one revision) Product Link: http://www.asus.com/product.aspx?P_ID=vXixf82co6Q5v0BZ&templete=2 Bios flashed from v1904 to v2101 Flashrom Version: 0.9.1 Operating System: Gentoo Linux, Vanilla Kernel 2.6.33 Notes: CONFIG_X86_PAT=y and CONFIG_STRICT_DEVMEM=y The output of flashrom -V, lspci -nnvvvxxx and superiotool -deV are linked below, I also attached a file for each of these. Thanks and greetings, Konstantin flashrom -V http://coreboot.pastebin.com/vsDvLvXA lspci -nnvvvxxx http://coreboot.pastebin.com/A0LJ45g4 superiotool -deV http://coreboot.pastebin.com/XkpiHgYH

2 1

Add URLs for three boards, fix a typo and add a note
by Idwer Vollering 27 Jul '10

27 Jul '10

Add URLs for boards ASUS K8V, ASUS K8V SE Deluxe, Elitegroup K7S5A. FIxes a typo, adds a note for ASUS M2N-E. Signed-off-by: Idwer Vollering <vidwer(a)gmail.com>

3 2

[PATCH] drkaiser: MEM BAR fixes
by Carl-Daniel Hailfinger 17 Jul '10

17 Jul '10

Use the BAR value returned by pcidev_init which automatically uses the correct BAR mask. Truncate flash chip addresses to fit into the 128 kB memory window. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-drkaiser_pcibar_mask_mem_bounds_checking/drkaiser.c =================================================================== --- flashrom-drkaiser_pcibar_mask_mem_bounds_checking/drkaiser.c (Revision 946) +++ flashrom-drkaiser_pcibar_mask_mem_bounds_checking/drkaiser.c (Arbeitskopie) @@ -40,16 +40,13 @@ uint32_t addr; get_io_perms(); - pcidev_init(PCI_VENDOR_ID_DRKAISER, PCI_BASE_ADDRESS_2, - drkaiser_pcidev, programmer_param); + addr = pcidev_init(PCI_VENDOR_ID_DRKAISER, PCI_BASE_ADDRESS_2, + drkaiser_pcidev, programmer_param); /* Write magic register to enable flash write. */ pci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE); - /* TODO: Mask lower bits? How many? 3? 7? */ - addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_2) & ~0x03; - /* Map 128KB flash memory window. */ drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", addr, 128 * 1024); @@ -70,10 +67,12 @@ void drkaiser_chip_writeb(uint8_t val, chipaddr addr) { - mmio_writeb(val, drkaiser_bar + addr); + /* Restrict flash accesses to the 128kB memory window. */ + mmio_writeb(val, drkaiser_bar + (addr & ((1 << 17) - 1))); } uint8_t drkaiser_chip_readb(const chipaddr addr) { - return mmio_readb(drkaiser_bar + addr); + /* Restrict flash accesses to the 128kB memory window. */ + return mmio_readb(drkaiser_bar + (addr & ((1 << 17) - 1))); } -- "I do consider assignment statements and pointer variables to be among computer science's most valuable treasures." -- Donald E. Knuth

2 4

[PATCH] Partial writes for SPI
by Carl-Daniel Hailfinger 11 Jul '10

11 Jul '10

Every SPI programmer driver had its own completely different chip write implementation, and all of them were insufficiently commented. Create spi_write_chunked as a copy of spi_read_chunked and convert all SPI programmers to use it. No functional changes except: - Bus Pirate uses 12 Byte writes instead of 8 Byte writes - SB600 uses 5 Byte writes instead of 1 Byte writes Should work. Not for 0.9.1, but since I had that thing on my disk anyway, I figured I'd post it to the list in case someone wants to experiment with partial writes. Tests appreciated. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-partial_write_spi/spi25.c =================================================================== --- flashrom-partial_write_spi/spi25.c (Revision 982) +++ flashrom-partial_write_spi/spi25.c (Arbeitskopie) @@ -1,7 +1,7 @@ /* * This file is part of the flashrom project. * - * Copyright (C) 2007, 2008, 2009 Carl-Daniel Hailfinger + * Copyright (C) 2007, 2008, 2009, 2010 Carl-Daniel Hailfinger * Copyright (C) 2008 coresystems GmbH * * This program is free software; you can redistribute it and/or modify @@ -874,7 +874,7 @@ } /* - * Read a complete flash chip. + * Read a part of the flash chip. * Each page is read separately in chunks with a maximum size of chunksize. */ int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize) @@ -913,6 +913,52 @@ } /* + * Write a part of the flash chip. + * Each page is written separately in chunks with a maximum size of chunksize. + */ +int spi_write_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize) +{ + int rc = 0; + int i, j, starthere, lenhere; + /* FIXME: page_size is the wrong variable. We need max_writechunk_size + * in struct flashchip to do this properly. All chips using + * spi_chip_write_256 have page_size set to max_writechunk_size, so + * we're OK for now. + */ + int page_size = flash->page_size; + int towrite; + + /* Warning: This loop has a very unusual condition and body. + * The loop needs to go through each page with at least one affected + * byte. The lowest page number is (start / page_size) since that + * division rounds down. The highest page number we want is the page + * where the last byte of the range lives. That last byte has the + * address (start + len - 1), thus the highest page number is + * (start + len - 1) / page_size. Since we want to include that last + * page as well, the loop condition uses <=. + */ + for (i = start / page_size; i <= (start + len - 1) / page_size; i++) { + /* Byte position of the first byte in the range in this page. */ + /* starthere is an offset to the base address of the chip. */ + starthere = max(start, i * page_size); + /* Length of bytes in the range in this page. */ + lenhere = min(start + len, (i + 1) * page_size) - starthere; + for (j = 0; j < lenhere; j += chunksize) { + towrite = min(chunksize, lenhere - j); + rc = spi_nbyte_program(starthere + j, buf + starthere - start + j, towrite); + if (rc) + break; + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + programmer_delay(10); + } + if (rc) + break; + } + + return rc; +} + +/* * Program chip using byte programming. (SLOW!) * This is for chips which can only handle one byte writes * and for chips where memory mapped programming is impossible Index: flashrom-partial_write_spi/buspirate_spi.c =================================================================== --- flashrom-partial_write_spi/buspirate_spi.c (Revision 982) +++ flashrom-partial_write_spi/buspirate_spi.c (Arbeitskopie) @@ -1,7 +1,7 @@ /* * This file is part of the flashrom project. * - * Copyright (C) 2009 Carl-Daniel Hailfinger + * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -319,7 +319,6 @@ int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf) { int total_size = 1024 * flash->total_size; - int i; spi_disable_blockprotect(); /* Erase first. */ @@ -330,25 +329,5 @@ } msg_pinfo("done.\n"); - /* FIXME: We could do 12 byte writes, but then we'd have to make sure - * not to cross a 256 byte page boundary. This problem only applies to - * writes, reads can cross page boundaries just fine. - */ - for (i = 0; i < total_size; i += 8) { - int l, r; - if (i + 8 <= total_size) - l = 8; - else - l = total_size - i; - - if ((r = spi_nbyte_program(i, &buf[i], l))) { - msg_perr("%s: write fail %d\n", __func__, r); - return 1; - } - - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - /* loop */; - } - - return 0; + return spi_write_chunked(flash, buf, 0, total_size, 12); } Index: flashrom-partial_write_spi/bitbang_spi.c =================================================================== --- flashrom-partial_write_spi/bitbang_spi.c (Revision 982) +++ flashrom-partial_write_spi/bitbang_spi.c (Arbeitskopie) @@ -1,7 +1,7 @@ /* * This file is part of the flashrom project. * - * Copyright (C) 2009 Carl-Daniel Hailfinger + * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -142,24 +142,7 @@ int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf) { int total_size = 1024 * flash->total_size; - int i; msg_pdbg("total_size is %d\n", total_size); - for (i = 0; i < total_size; i += 256) { - int l, r; - if (i + 256 <= total_size) - l = 256; - else - l = total_size - i; - - if ((r = spi_nbyte_program(i, &buf[i], l))) { - msg_perr("%s: write fail %d\n", __func__, r); - return 1; - } - - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - /* loop */; - } - - return 0; + return spi_write_chunked(flash, buf, 0, total_size, 256); } Index: flashrom-partial_write_spi/ft2232_spi.c =================================================================== --- flashrom-partial_write_spi/ft2232_spi.c (Revision 982) +++ flashrom-partial_write_spi/ft2232_spi.c (Arbeitskopie) @@ -2,7 +2,7 @@ * This file is part of the flashrom project. * * Copyright (C) 2009 Paul Fox <pgf(a)laptop.org> - * Copyright (C) 2009 Carl-Daniel Hailfinger + * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -288,7 +288,6 @@ int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf) { int total_size = 1024 * flash->total_size; - int i; spi_disable_blockprotect(); /* Erase first. */ @@ -299,23 +298,7 @@ } msg_pinfo("done.\n"); msg_pdbg("total_size is %d\n", total_size); - for (i = 0; i < total_size; i += 256) { - int l, r; - if (i + 256 <= total_size) - l = 256; - else - l = total_size - i; - - if ((r = spi_nbyte_program(i, &buf[i], l))) { - msg_perr("%s: write fail %d\n", __func__, r); - return 1; - } - - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - /* loop */; - } - - return 0; + return spi_write_chunked(flash, buf, 0, total_size, 256); } #endif Index: flashrom-partial_write_spi/sb600spi.c =================================================================== --- flashrom-partial_write_spi/sb600spi.c (Revision 982) +++ flashrom-partial_write_spi/sb600spi.c (Arbeitskopie) @@ -4,6 +4,7 @@ * Copyright (C) 2008 Wang Qingpei <Qingpei.Wang(a)amd.com> * Copyright (C) 2008 Joe Bao <Zheng.Bao(a)amd.com> * Copyright (C) 2008 Advanced Micro Devices, Inc. + * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -49,7 +50,6 @@ /* FIXME: SB600 can write 5 bytes per transaction. */ int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf) { - int i; int total_size = flash->total_size * 1024; int result = 0; @@ -63,19 +63,7 @@ msg_pinfo("done.\n"); msg_pinfo("Programming flash"); - for (i = 0; i < total_size; i++, buf++) { - result = spi_nbyte_program(i, buf, 1); - if (result) { - msg_perr("Write error!\n"); - return result; - } - - /* wait program complete. */ - if (i % 0x8000 == 0) - msg_pspew("."); - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - ; - } + result = spi_write_chunked(flash, buf, 0, total_size, 5); msg_pinfo(" done.\n"); return result; } Index: flashrom-partial_write_spi/ichspi.c =================================================================== --- flashrom-partial_write_spi/ichspi.c (Revision 982) +++ flashrom-partial_write_spi/ichspi.c (Arbeitskopie) @@ -5,7 +5,7 @@ * Copyright (C) 2008 Claus Gindhart <claus.gindhart(a)kontron.com> * Copyright (C) 2008 Dominik Geyer <dominik.geyer(a)kontron.com> * Copyright (C) 2008 coresystems GmbH <info(a)coresystems.de> - * Copyright (C) 2009 Carl-Daniel Hailfinger + * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -160,8 +160,6 @@ static int program_opcodes(OPCODES * op); static int run_opcode(OPCODE op, uint32_t offset, uint8_t datalength, uint8_t * data); -static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, - int offset, int maxdata); /* for pairing opcodes with their required preop */ struct preop_opcode_pair { @@ -645,28 +643,6 @@ return -1; } -static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, - int offset, int maxdata) -{ - int page_size = flash->page_size; - uint32_t remaining = page_size; - int towrite; - - msg_comm_debug("ich_spi_write_page: offset=%d, number=%d, buf=%p\n", - offset, page_size, bytes); - - for (; remaining > 0; remaining -= towrite) { - towrite = min(remaining, maxdata); - if (spi_nbyte_program(offset + (page_size - remaining), - &bytes[page_size - remaining], towrite)) { - printf_debug("Error writing"); - return 1; - } - } - - return 0; -} - int ich_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len) { int maxdata = 64; @@ -679,12 +655,14 @@ int ich_spi_write_256(struct flashchip *flash, uint8_t * buf) { - int i, j, rc = 0; + int i, ret = 0; int total_size = flash->total_size * 1024; - int page_size = flash->page_size; int erase_size = 64 * 1024; int maxdata = 64; + if (spi_controller == SPI_CONTROLLER_VIA) + maxdata = 16; + spi_disable_blockprotect(); /* Erase first */ printf("Erasing flash before programming... "); @@ -696,19 +674,15 @@ printf("Programming page: \n"); for (i = 0; i < total_size / erase_size; i++) { - if (spi_controller == SPI_CONTROLLER_VIA) - maxdata = 16; - - for (j = 0; j < erase_size / page_size; j++) { - ich_spi_write_page(flash, - (void *)(buf + (i * erase_size) + (j * page_size)), - (i * erase_size) + (j * page_size), maxdata); - } + ret = spi_write_chunked(flash, buf + (i * erase_size), + i * erase_size, erase_size, maxdata); + if (ret) + break; } printf("\n"); - return rc; + return ret; } int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, Index: flashrom-partial_write_spi/chipdrivers.h =================================================================== --- flashrom-partial_write_spi/chipdrivers.h (Revision 982) +++ flashrom-partial_write_spi/chipdrivers.h (Arbeitskopie) @@ -51,6 +51,7 @@ int spi_nbyte_program(int addr, uint8_t *bytes, int len); int spi_nbyte_read(int addr, uint8_t *bytes, int len); int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); +int spi_write_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); int spi_aai_write(struct flashchip *flash, uint8_t *buf); /* 82802ab.c */ -- http://www.hailfinger.org/

3 8

Re: [flashrom] [PATCH] Board-enable for MS-7025 (K8N Neo2 Platinum)
by rider 13 Jun '10

13 Jun '10

So, it works like a charm. I would like to thank Michael once again, it was truly amazing expirience. Cheers, Valentine "Pegasus rider" Yatsenko.

3 2

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

flashrom April 2010