flashrom February 2010

flashrom@flashrom.org

55 participants
173 discussions

JIDA CMOS
by Marc Ferland 17 Feb '10

17 Feb '10

Hi all, I work with kontron based COM boards. We currently use their home (DOS) tools fptup and jidacmos to update the bios of our boards. These tools work correctly but they must be run separatly from the rest of the "factory" tools used to prepare the machines. Our current factory tools use Linux to correctly update the different firmwares and softwares we run on the machines. The only missing part is the BIOS. So I am searching a way to integrate the BIOS update procedure to our standard update procedure to simplify to whole process. That being said, I tried the flashrom utility. I works for updating the BIOS image, but doesn't seem to be able to update the configuration part of the BIOS. The result is an updated BIOS version with a wrong configuration (which fails to boot correctly). Searching a little deeper, I found that to succesfully update the BIOS on these boards, you not only have to update the BIOS image but you also need to "pre-configure" it correctly. This is done by executing the jidacmos DOS utility using the following cmds: jidacmos rtc /clean jidacmos eep /clean So my question is: What is this jidacmos utility? Kontron doesn't give much details about it. You guys have any idea of how I could reproduce the behaviour of the jidacmos utility (cleaning the rtc and EEPROM I suppose)? Any info would be appreciated! Regards, Marc Tech info: Board model: SU9300 Chipset: ICH9M The board uses the: AT25DF321 chip.

3 4

Log from Asus M4N78-Pro
by Vikram Noel Ambrose 16 Feb '10

16 Feb '10

CPU: Phenom X3 710 Mobo: Asus M4N78-Pro Vid1: nforce IGP (unused) Vid2: ATi HD4870 flashrom -V lspci -nnvvvxxx superiotool -deV

1 0

Re: [flashrom] [PATCH] Fix PIIX4 GPO set
by Michael Karcher 16 Feb '10

16 Feb '10

[copied to the mailing list] Am Dienstag, den 16.02.2010, 10:23 -0600 schrieb Zach Stuart: > Here is the latest flashrom -V output. [...] > Disabling flash write protection for board "Intel SE440BX-2"... Port 8037 was 6f > should be set to 67 and is now 6f > OK. [...] The "OK" might be fixed, as it is not OK, because the value read after writing is not the value written. The code that produced this output has not appeared on the mailing list, so I include it here for reference: | /* PM IO base */ | base = pci_read_long(dev, 0x40) & 0x0000FFC0; | | gpo_byte = gpo >> 3; | gpo_bit = gpo & 7; | tmp = INB(base + 0x34 + gpo_byte); /* GPO register */ | msg_pdbg("Port %04x was %02x\n", base + 0x34 + gpo_byte, tmp); | if (raise) | tmp |= 0x01 << gpo_bit; | else | tmp &= ~(0x01 << gpo_bit); | OUTB(tmp, base + 0x34 + gpo_byte); | msg_pdbg("should be set to %02x and is now %02x\n", tmp, INB(base+0x34+gpo_byte)); Anyone got an idea what could be wrong here? The following ideas have already been rejected: 1) The pin is configured as input Rejected because: On the PIIX4, there are no GPIOs, GPI and GPO are on different pins. 2) Multiplexing of pins makes this GPO not available Rejected because: GPO27 is not multiplexed 3) The write to the GPO port is trapped. Rejected because: The datasheet doesn't tell anything about trapability or making the GPO register read only. 4) You need a special magic dance to write to this register Rejected because: The SMI code from that board does a plain and operation just like we do, without a magic dance. Of course, SMM is a different execution environment than flashrom userspace, but the datasheet doesn't mention anything about availability only in SMM. Regards, Michael Karcher

1 0

[patch] more NetBSD fixes (w/ patch)
by Jonathan A. Kollasch 16 Feb '10

16 Feb '10

Cast input to tolower() to unsigned char to work around how tolower() is implemented on NetBSD. Also, use CPPFLAGS (rather than overriding CFLAGS) for the NetBSD/DragonFly build example. Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> ---

2 2

[commit] r905 - trunk
by repository service 16 Feb '10

16 Feb '10

Author: mkarcher Date: Tue Feb 16 01:49:50 2010 New Revision: 905 URL: http://flashrom.org/trac/coreboot/changeset/905 Log: more NetBSD fixes (w/ patch) Cast input to tolower() to unsigned char to work around how tolower() is implemented on NetBSD. Also, use CPPFLAGS (rather than overriding CFLAGS) for the NetBSD/DragonFly build example. Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/README trunk/dummyflasher.c Modified: trunk/README ============================================================================== --- trunk/README Sun Feb 14 02:20:28 2010 (r904) +++ trunk/README Tue Feb 16 01:49:50 2010 (r905) @@ -68,7 +68,7 @@ To compile on NetBSD or DragonFly BSD, use: ln -s /usr/pkg/include/pciutils pci - gmake CFLAGS=-I. LDFLAGS="-L/usr/pkg/lib -Wl,-rpath-link,/usr/pkg/lib" + gmake CPPFLAGS=-I. LDFLAGS="-L/usr/pkg/lib -Wl,-rpath-link,/usr/pkg/lib" To compile and run on Darwin/Mac OS X: Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Sun Feb 14 02:20:28 2010 (r904) +++ trunk/dummyflasher.c Tue Feb 16 01:49:50 2010 (r905) @@ -38,7 +38,8 @@ programmer_param = strdup("parallel,lpc,fwh,spi"); /* Convert the parameters to lowercase. */ for (i = 0; programmer_param[i] != '\0'; i++) - programmer_param[i] = (char)tolower(programmer_param[i]); + programmer_param[i] = + (char)tolower((unsigned char)programmer_param[i]); buses_supported = CHIP_BUSTYPE_NONE; if (strstr(programmer_param, "parallel")) {

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[patch] more NetBSD fixes
by Jonathan A. Kollasch 15 Feb '10

15 Feb '10

1 0

Asus A6000... nevermind, thanks!
by Matteo Laffranchi 15 Feb '10

15 Feb '10

Nevermind, I used this: sudo flashrom -v current_image.img to do a comparison between my actual BIOS and the backup file and it was successful, so I thought my BIOS was untouched. I rebooted and it's all OK, my BIOS still works. I think I'll use the EasyFlash Utility provided in my BIOS to do the flashing, I didn't notice it existed before. I did a stupid thing. ;-) Thanks!

2 1

Problem flashing a ASUS A6000 Notebook BIOS. Can you please help me?
by Matteo Laffranchi 15 Feb '10

15 Feb '10

Hi! Sorry to bother you, but I'm having big trouble trying to flash my notebook BIOS. I have an old Asus A6000 A6VC notebook. Here is the problem: my PC cannot boot Windows anymore (viruses), in normal and safe mode RPCSS locks and I can't reach my Desktop. For an unknown reason (virus? faulty BIOS?) my PC ignores bootable CDs, even if I change the boot order in the BIOS putting CD/DVDs at the top. I tried different CDs, Windows and Linux, but nothing works. I can only manage to use bootable USB pens, so I'm triyng Xubuntu to flash my BIOS and try to solve the problem. Today I installed flashrom like this: sudo apt-get update sudo apt-get install flashrom And everything's fine. I downloaded the original BIOS from here: http://support.asus.com/download/download.aspx The problem is this: I cannot write the BIOS correctly. I used this command sudo flashrom -r current_image.img sudo flashrom -w A6VCAS.205 The result is in "terminal.txt". My notebook is still "ON". Please help me! An attachment has been stripped: current_rom.img An attachment has been stripped: A6VCAS.205 ubuntu@ubuntu:~$ sudo flashrom flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. No operations were specified. ubuntu@ubuntu:~$ man flashrom ubuntu@ubuntu:~$ man flashrom ubuntu@ubuntu:~$ sudo flashrom flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. No operations were specified. ubuntu@ubuntu:~$ sudo flashrom -V flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode disabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... 493M loops per second, 100 myus = 201 us. OK. Probing for AMD Am29F010A/B, 128 KB: probe_29f040b: id1 0x8d, id2 0x0f Probing for AMD Am29F002(N)BB, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for AMD Am29F002(N)BT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for AMD Am29F016D, 2048 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F080B, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29LV081B, 1024 KB: probe_29f040b: id1 0xff, id2 0xff Probing for ASD AE49F2008, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT29C010A, 128 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT29C020, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT29C040A, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT49F002(N), 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Atmel AT49F002(N)T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for AMIC A25L40P, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for AMIC A29002T, 256 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for AMIC A29040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMIC A49LF040A, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for EMST F49B002UA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Eon EN25B05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for EON EN29F002(A)(N)T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Fujitsu MBM29F004BC, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Fujitsu MBM29F004TC, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Intel 28F001BX-B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Intel 28F001BX-T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Macronix MX25L512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for Macronix MX29F001T, 128 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for Macronix MX29F002B, 256 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for Macronix MX29F002T, 256 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for Macronix MX29LV040, 512 KB: probe_29f002: id1 0xbf, id2 0x60 Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm29F0002T, 256 KB: probe_29f040b: id1 0x49, id2 0x84 Probing for PMC Pm29F0002B, 256 KB: probe_29f040b: id1 0x49, id2 0x84 Probing for PMC Pm39LV010, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for PMC Pm49FL002, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for PMC Pm49FL004, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Sharp LHF00L04, 1024 KB: probe_lhf00l04: id1 0xff, id2 0xff Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0xff, id2 0xff Probing for SST SST29EE010, 128 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST29LE010, 128 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST29EE020A, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST29LE020, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39SF010A, 128 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39SF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39SF040, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39VF512, 64 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39VF010, 128 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39VF020, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39VF040, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST39VF080, 1024 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST49LF003A/B, 384 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST49LF004A/B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Lock status for 0x000000 (size 0x010000) is 00, full access Lock status for 0x010000 (size 0x010000) is 00, full access Lock status for 0x020000 (size 0x010000) is 00, full access Lock status for 0x030000 (size 0x010000) is 00, full access Lock status for 0x040000 (size 0x010000) is 00, full access Lock status for 0x050000 (size 0x010000) is 00, full access Lock status for 0x060000 (size 0x010000) is 00, full access Lock status for 0x070000 (size 0x010000) is 00, full access Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF008A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST49LF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST49LF040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M25P05-A, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for ST M29F002T/NT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for ST M29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29W010B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for ST M29W040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for ST M50FLW040A, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x60 Probing for ST M50FLW040B, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x60 Probing for ST M50FLW080A, 1024 KB: probe_stm50flw0x0x: id1 0xff, id2 0xff Probing for ST M50FLW080B, 1024 KB: probe_stm50flw0x0x: id1 0xff, id2 0xff Probing for ST M50FW002, 256 KB: probe_49lfxxxc: id1 0x49, id2 0x84 Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50LPW116, 2048 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C31004T, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SyncMOS S29C51001T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SyncMOS S29C51002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for SyncMOS S29C51004T, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for TI TMS29F002RB, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for TI TMS29F002RT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W25x10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W29C020C, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W29C040P, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W29EE011, 128 KB: Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. Probing for Winbond W39V040A, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W39V040B, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W39V040C, 512 KB: probe_w39v040c: id1 0xbf, id2 0x60 Probing for Winbond W39V040FA, 512 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W39V080A, 1024 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W49V002A, 256 KB: probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W49V002FA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x60 Probing for Winbond W39V080FA, 1024 KB: probe_winbond_fwhub: id1 0xff, id2 0xff Probing for Winbond W39V080FA (dual mode), 512 KB: probe_winbond_fwhub: id1 0xbf, id2 0x60 Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. No operations were specified. ubuntu@ubuntu:~$ man flashrom ubuntu@ubuntu:~$ cd /media ubuntu@ubuntu:/media$ ls ubuntu@ubuntu:/media$ cd .. ubuntu@ubuntu:/$ ls bin cdrom etc initrd.img media opt rofs sbin srv tmp var boot dev home lib mnt proc root selinux sys usr vmlinuz ubuntu@ubuntu:/$ cd media/ ubuntu@ubuntu:/media$ ls disk ubuntu@ubuntu:/media$ cd disk/ ubuntu@ubuntu:/media/disk$ ls BIOS Claudio Data ldlinux.sys lifeblog pb syslinux.cfg system ubninit ubnkern vesamenu.c32 ubuntu@ubuntu:/media/disk$ cd BIOS\ Claudio/ ubuntu@ubuntu:/media/disk/BIOS Claudio$ ls A6VCAS.205 AFLASH2.EXE ubuntu@ubuntu:/media/disk/BIOS Claudio$ sudo flashrom A6VCAS.205 flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. No operations were specified. ubuntu@ubuntu:/media/disk/BIOS Claudio$ sudo flashrom -r current_rom.img flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Reading flash... done. ubuntu@ubuntu:/media/disk/BIOS Claudio$ ls A6VCAS.205 AFLASH2.EXE current_rom.img ubuntu@ubuntu:/media/disk/BIOS Claudio$ sudo flashrom -w A6VCAS.205 flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... ERASE FAILED at 0x000061f8! Expected=0xff, Read=0x40, failed byte count from 0x00000000-0x0000ffff: 0x9d68 ERASE FAILED! ERASE FAILED! ERASE FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net channel #flashrom or mail flashrom(a)flashrom.org ------------------------------------------------------------ DO NOT REBOOT OR POWEROFF! ubuntu@ubuntu:/media/disk/BIOS Claudio$ sudo flashrom -w current_rom.img flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6-M", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... ERASE FAILED at 0x000061f8! Expected=0xff, Read=0x40, failed byte count from 0x00000000-0x0000ffff: 0x9d68 ERASE FAILED! ERASE FAILED! ERASE FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net channel #flashrom or mail flashrom(a)flashrom.org ------------------------------------------------------------ DO NOT REBOOT OR POWEROFF! ubuntu@ubuntu:/media/disk/BIOS Claudio$

1 0

[PATCH] register_shutdown for execution on programmer shutdown
by Carl-Daniel Hailfinger 14 Feb '10

14 Feb '10

Some programmers want to run certain functions during programmer shutdown, but the function choice depends on the code path taken during programmer init. Rather than rebuilding the whole init logic in the shutdown function, it is now possible to register functions for execution on programmer shutdown. The behaviour is similar to atexit(), but the registered functions will be run on programmer shutdown instead of on exit. Registered functions must have the prototype void function(void); and will be executed in reverse registration order directly before calling the programmer-specific shutdown() function. It is recommended to have shutdown() only disable programmer/hardware access and leave all code path sensitive shutdown to functions registered with register_shutdown(). If in doubt, consult man atexit. Usage example (try running the dummy flasher with this patch applied): > --- dummyflasher.c 2010-02-12 02:35:18.000000000 +0100 > +++ dummyflasher.c 2010-02-12 03:52:59.000000000 +0100 > @@ -24,6 +24,18 @@ > #include <sys/types.h> > #include "flash.h" > > +void foo(void) > +{ > + msg_pinfo("This is %s and was added first, will be executed second.\n", > + __func__); > +} > + > +void bar(void) > +{ > + msg_pinfo("This is %s and was added second, will be executed first.\n", > + __func__); > +} > + > int dummy_init(void) > { > int i; > @@ -61,6 +73,9 @@ > if (buses_supported == CHIP_BUSTYPE_NONE) > msg_pdbg("Support for all flash bus types disabled.\n"); > free(programmer_param); > + > + register_shutdown(foo); > + register_shutdown(bar); > return 0; > } > The most prominent use case is resetting the EC after flashing on laptops. Anders, this should fit your requirements. Note: There are quite a few code paths in flashrom which proceed to terminate flashrom without any programmer shutdown. Those code paths will not get the benefit of register_shutdown() and they should be changed wherever possible. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-register_shutdown/flash.h =================================================================== --- flashrom-register_shutdown/flash.h (Revision 895) +++ flashrom-register_shutdown/flash.h (Arbeitskopie) @@ -100,6 +100,7 @@ extern const struct programmer_entry programmer_table[]; int programmer_init(void); +int register_shutdown(void (*function)(void)); int programmer_shutdown(void); void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, size_t len); Index: flashrom-register_shutdown/flashrom.c =================================================================== --- flashrom-register_shutdown/flashrom.c (Revision 895) +++ flashrom-register_shutdown/flashrom.c (Arbeitskopie) @@ -313,8 +313,28 @@ return programmer_table[programmer].init(); } +#define SHUTDOWN_MAXFN 4 +static int shutdown_fn_count = 0; +void (*shutdown_fn[SHUTDOWN_MAXFN]) (void); + +int register_shutdown(void (*function)(void)) +{ + if (shutdown_fn_count >= SHUTDOWN_MAXFN) { + msg_perr("Tried to register more than %n shutdown functions.\n", + SHUTDOWN_MAXFN); + return 1; + } + shutdown_fn[shutdown_fn_count++] = function; + + return 0; +} + int programmer_shutdown(void) { + int i; + + for (i = shutdown_fn_count - 1; i >= 0; i--) + shutdown_fn[i](); return programmer_table[programmer].shutdown(); } -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

3 11

[commit] r904 - trunk
by repository service 14 Feb '10

14 Feb '10

Author: hailfinger Date: Sun Feb 14 02:20:28 2010 New Revision: 904 URL: http://flashrom.org/trac/coreboot/changeset/904 Log: Some programmers want to run certain functions during programmer shutdown, but the function choice depends on the code path taken during programmer init. Rather than rebuilding the whole init logic in the shutdown function, it is now possible to register functions for execution on programmer shutdown. The behaviour is similar to atexit(), but the registered functions will be run on programmer shutdown instead of on exit and the functions will be called with a void * argument that is specified on registration. Registered functions must have the prototype void function(void *); and will be executed in reverse registration order directly before calling the programmer-specific shutdown() function. It is recommended to have shutdown() only disable programmer/hardware access and leave all code path sensitive shutdown to functions registered with register_shutdown(). The most prominent use case is resetting the EC after flashing on laptops. Note: There are quite a few code paths in flashrom which proceed to terminate flashrom without any programmer shutdown. Those code paths will not get the benefit of register_shutdown() and they should be changed wherever possible. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/flash.h trunk/flashrom.c Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sun Feb 14 02:00:36 2010 (r903) +++ trunk/flash.h Sun Feb 14 02:20:28 2010 (r904) @@ -99,6 +99,8 @@ extern const struct programmer_entry programmer_table[]; +int register_shutdown(void (*function) (void *data), void *data); + int programmer_init(void); int programmer_shutdown(void); void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sun Feb 14 02:00:36 2010 (r903) +++ trunk/flashrom.c Sun Feb 14 02:20:28 2010 (r904) @@ -308,6 +308,35 @@ {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; +#define SHUTDOWN_MAXFN 4 +static int shutdown_fn_count = 0; +struct shutdown_func_data { + void (*func) (void *data); + void *data; +} shutdown_fn[SHUTDOWN_MAXFN]; + +/* Register a function to be executed on programmer shutdown. + * The advantage over atexit() is that you can supply a void pointer which will + * be used as parameter to the registered function upon programmer shutdown. + * This pointer can point to arbitrary data used by said function, e.g. undo + * information for GPIO settings etc. If unneeded, set data=NULL. + * Please note that the first (void *data) belongs to the function signature of + * the function passed as first parameter. + */ +int register_shutdown(void (*function) (void *data), void *data) +{ + if (shutdown_fn_count >= SHUTDOWN_MAXFN) { + msg_perr("Tried to register more than %n shutdown functions.\n", + SHUTDOWN_MAXFN); + return 1; + } + shutdown_fn[shutdown_fn_count].func = function; + shutdown_fn[shutdown_fn_count].data = data; + shutdown_fn_count++; + + return 0; +} + int programmer_init(void) { return programmer_table[programmer].init(); @@ -315,6 +344,10 @@ int programmer_shutdown(void) { + int i; + + for (i = shutdown_fn_count - 1; i >= 0; i--) + shutdown_fn[i].func(shutdown_fn[i].data); return programmer_table[programmer].shutdown(); }

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flashrom February 2010