flashrom December 2010

flashrom@flashrom.org

46 participants
127 discussions

[commit] r1243 - trunk
by repository service 04 Dec '10

04 Dec '10

Author: hailfinger Date: Sat Dec 4 12:56:52 2010 New Revision: 1243 URL: http://flashrom.org/trac/flashrom/changeset/1243 Log: Stop reading layout info when the max layout count has been reached. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/layout.c Modified: trunk/layout.c ============================================================================== --- trunk/layout.c Sat Dec 4 04:26:40 2010 (r1242) +++ trunk/layout.c Sat Dec 4 12:56:52 2010 (r1243) @@ -152,6 +152,14 @@ while (!feof(romlayout)) { char *tstr1, *tstr2; + + if (romimages >= MAX_ROMLAYOUT) { + msg_gerr("Maximum number of ROM images (%i) in layout " + "file reached before end of layout file.\n", + MAX_ROMLAYOUT); + msg_gerr("Ignoring the rest of the layout file.\n"); + break; + } if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[romimages].name)) continue; #if 0

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[PATCH] jedec timing cleanup
by David Borg 04 Dec '10

04 Dec '10

Fix TIMING_IGNORED with correct timing info. Regards, David Signed-off-by: David Borg <borg.db(a)gmail.com> Index: flashchips.c =================================================================== --- flashchips.c (revision 1145) +++ flashchips.c (working copy) @@ -155,7 +155,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -181,7 +181,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -233,7 +233,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -256,10 +256,11 @@ .model_id = AM_29LV080B, .total_size = 1024, .page_size = 64 * 1024, + /* datasheet specifies address as don't care */ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -890,7 +891,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -921,7 +922,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PRW, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -952,7 +953,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3737,7 +3738,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3769,7 +3770,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3801,7 +3802,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3832,7 +3833,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PRW, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3863,7 +3864,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6125,7 +6126,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_ZERO, /* datasheet specifies no timing */ .block_erasers = { {

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[commit] r1242 - trunk
by repository service 04 Dec '10

04 Dec '10

Author: hailfinger Date: Sat Dec 4 04:26:40 2010 New Revision: 1242 URL: http://flashrom.org/trac/flashrom/changeset/1242 Log: Annotate the following chips with probe timing: Am29F016D, Am29F040B, Am29LV040B, Am29LV081B, A29002B, A29002T, A29040B, MX29F001B, MX29F001T, MX29F002B, MX29F002T, MX29LV040, M29F040B Signed-off-by: David Borg <borg.db(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri Dec 3 15:48:11 2010 (r1241) +++ trunk/flashchips.c Sat Dec 4 04:26:40 2010 (r1242) @@ -155,7 +155,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -181,7 +181,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -233,7 +233,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PRE, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -256,10 +256,10 @@ .model_id = AMD_AM29LV080B, .total_size = 1024, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, /* datasheet specifies address as don't care */ .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -898,7 +898,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -929,7 +929,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PR, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -960,7 +960,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3818,7 +3818,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3850,7 +3850,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3882,7 +3882,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3913,7 +3913,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PR, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3970,7 +3970,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -6398,7 +6398,7 @@ .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_ZERO, /* datasheet specifies no timing */ .block_erasers = { {

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Request support for Zotac GeForce 9300-ITX WIFI. (MCP7A)
by Serge Blais 03 Dec '10

03 Dec '10

Here included is the output of flashrom -V The flash is on a socket and if it gets borked, I can reprogram it using a flashrom/FT2232H programmer I can assemble quickly. Thanks.

1 0

Re: [flashrom] [PATCH] Add support for the Open Graphics Project card as a programmer
by Carl-Daniel Hailfinger 03 Dec '10

03 Dec '10

On 03.12.2010 14:00, Mark Marshall wrote: > You're right, the naming in the first patch was a little off. > The problem is that I'm not really sure what name to use - OGP > is the project, OGD1 is the first development card and OGA1 is > the first real card (which is still in the future). I've moved > to calling it OGP - in the scope of flashrom this seems like > the best choice. IF we have multiple different cards then I can > add a parameter to choose between them. > > I've also folded in your changes, and written a short entry > for the man page. > Thanks for incorporating the review comments! > Signed-off-by: Mark Marshall > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> and committed with minor changes (cosmetics) in r1241. Regards, Carl-Daniel > On 01.12.2010 19:12, Mark Marshall wrote: > >> The attached patch adds support for the Open Graphics Project >> development card, OGD1, as a SPI flash programmer. The project is in >> the the process of designing and making a complete, open source, >> graphics card. Check out http://wiki.opengraphics.org. >> >> The first development card is a PCI add in card containing a couple of >> FPGAs and a couple of serial flash chips (amongst other things). The >> FPGA's are called XP10 and S3 (their part numbers). The XP10 contains >> it's own flash and does not need to be programmed by flashrom - it >> ensures that the device can enumerate on the PCI bus without needing >> further configuration. >> >> The larger FPGA is the S3. This is configured from a large serial >> flash (2M bytes). The second serial flash is used to store the VGA >> BIOS. It is smaller (128K bytes). >> >> The attached patch adds support for programming either of the two >> serial flash chips. They are both serial SPI devices. >> >> The programmer device takes one configuration option which selects >> which of the two flash chips is accessed. This must be set to either >> "cprom" or "bprom". (The project refers to the two chips as "cprom" / >> "bprom", "s3" and "bios" are more readable alternatives). >> -- http://www.hailfinger.org/

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[commit] r1241 - trunk
by repository service 03 Dec '10

03 Dec '10

Author: hailfinger Date: Fri Dec 3 15:48:11 2010 New Revision: 1241 URL: http://flashrom.org/trac/flashrom/changeset/1241 Log: Add support for the Open Graphics Project development card, OGD1, as a SPI flash programmer. The project is in the the process of designing and making a complete, open source, graphics card. More info at http://wiki.opengraphics.org. The first development card is a PCI add in card containing a couple of FPGAs and a couple of serial flash chips (amongst other things). The FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its own flash and does not need to be programmed by flashrom - it ensures that the device can enumerate on the PCI bus without needing further configuration. The larger FPGA is the S3. This is configured from a large SPI flash (2 MBytes). The second SPI flash is used to store the VGA BIOS. It is smaller (128 KBytes). This patch adds support for programming either of the two SPI flash chips. The programmer device takes one configuration option which selects which of the two flash chips is accessed. This must be set to either "cprom" or "bprom". (The project refers to the two chips as "cprom" / "bprom", "s3" and "bios" are more readable alternatives). Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested for write. Signed-off-by: Mark Marshall <mark.marshall(a)csr.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Added: trunk/ogp_spi.c Modified: trunk/Makefile trunk/flashchips.c trunk/flashrom.8 trunk/flashrom.c trunk/print.c trunk/print_wiki.c trunk/programmer.h trunk/spi.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/Makefile Fri Dec 3 15:48:11 2010 (r1241) @@ -146,6 +146,9 @@ # Always enable SPI on Intel NICs for now. CONFIG_NICINTEL_SPI ?= yes +# Always enable SPI on OGP cards for now. +CONFIG_OGP_SPI ?= yes + # Always enable Bus Pirate SPI for now. CONFIG_BUSPIRATE_SPI ?= yes @@ -165,10 +168,14 @@ ifeq ($(CONFIG_NICINTEL_SPI), yes) override CONFIG_BITBANG_SPI = yes else +ifeq ($(CONFIG_OGP_SPI), yes) +override CONFIG_BITBANG_SPI = yes +else CONFIG_BITBANG_SPI ?= no endif endif endif +endif ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' @@ -258,6 +265,12 @@ NEED_PCI := yes endif +ifeq ($(CONFIG_OGP_SPI), yes) +FEATURE_CFLAGS += -D'CONFIG_OGP_SPI=1' +PROGRAMMER_OBJS += ogp_spi.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_BUSPIRATE_SPI), yes) FEATURE_CFLAGS += -D'CONFIG_BUSPIRATE_SPI=1' PROGRAMMER_OBJS += buspirate_spi.o Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/flashchips.c Fri Dec 3 15:48:11 2010 (r1241) @@ -4897,13 +4897,42 @@ { .vendor = "SST", + .name = "SST25VF010.REMS", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = SST_ID, + .model_id = SST_SST25VF010_REMS, + .total_size = 128, + .page_size = 256, + .tested = TEST_OK_PREW, + .probe = probe_spi_rems, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_1, + .read = spi_chip_read, + }, + + { + .vendor = "SST", .name = "SST25VF016B", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = SST_ID, .model_id = SST_SST25VF016B, .total_size = 2048, .page_size = 256, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/flashrom.8 Fri Dec 3 15:48:11 2010 (r1241) @@ -198,6 +198,9 @@ .BR "* nicintel_spi" " (for SPI flash ROMs attached to an Intel Gigabit \ network cards)" .sp +.BR "* ogp_spi" " (for SPI flash ROMs attached to an Open Graphics Project \ +graphics card)" +.sp Some programmers have optional or mandatory parameters which are described in detail in the .B PROGRAMMER SPECIFIC INFO @@ -432,6 +435,34 @@ .sp More information about the hardware is available at http://rayer.ic.cz/elektro/spipgm.htm +.TP +.BR "ogp_spi " programmer +The FLASH ROM chip to access must be specified with the +.B rom +parameter. +.sp +.B " flashrom \-p ogp_spi:rom=name" +.sp +Where +.B name +is either +.B cprom +or +.B s3 +for the configuration ROM and +.B bprom +or +.B bios +for the BIOS ROM. If more than one card supported by the ogp_spi programmer +is installed in your system, you have to specify the PCI address of the card +you want to use with the +.B pci= +parameter as explained in the +.B nic3com +section above. +.sp +More information about the hardware is available at +http://wiki.opengraphics.org .SH EXIT STATUS flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem (/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails. @@ -480,6 +511,9 @@ can be run as normal user on most operating systems if appropriate device permissions are set. .sp +.B ogp +needs PCI configuration space read access and raw memory access. +.sp On OpenBSD, you can obtain raw access permission by setting securelevel=-1 in /etc/rc.securelevel and rebooting, or rebooting into single user mode. @@ -538,6 +572,8 @@ .br Li-Ta Lo .br +Mark Marshall +.br Markus Boas .br Mattias Mattsson Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/flashrom.c Fri Dec 3 15:48:11 2010 (r1241) @@ -52,7 +52,7 @@ * if more than one of them is selected. If only one is selected, it is clear * that the user wants that one to become the default. */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL_SPI > 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI > 1 #error Please enable either CONFIG_DUMMY or CONFIG_INTERNAL or disable support for all programmers except one. #endif enum programmer programmer = @@ -96,6 +96,9 @@ #if CONFIG_NICINTEL_SPI == 1 PROGRAMMER_NICINTEL_SPI #endif +#if CONFIG_OGP_SPI == 1 + PROGRAMMER_OGP_SPI +#endif ; #endif @@ -428,6 +431,25 @@ .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, .chip_readb = noop_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = noop_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, +#endif + +#if CONFIG_OGP_SPI == 1 + { + .name = "ogp_spi", + .init = ogp_spi_init, + .shutdown = ogp_spi_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = noop_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, .chip_readn = fallback_chip_readn, Added: trunk/ogp_spi.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/ogp_spi.c Fri Dec 3 15:48:11 2010 (r1241) @@ -0,0 +1,145 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Mark Marshall + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include <string.h> +#include "flash.h" +#include "programmer.h" + +#define PCI_VENDOR_ID_OGP 0x1227 + +/* These are the register addresses for the OGD1 / OGA1. If they are + * different for later versions of the hardware then we will need + * logic to select between the different hardware versions. */ +#define OGA1_XP10_BPROM_SI 0x0040 /* W */ +#define OGA1_XP10_BPROM_SO 0x0040 /* R */ +#define OGA1_XP10_BPROM_CE_BAR 0x0044 /* W */ +#define OGA1_XP10_BPROM_SCK 0x0048 /* W */ +#define OGA1_XP10_BPROM_REG_SEL 0x004C /* W */ +#define OGA1_XP10_CPROM_SI 0x0050 /* W */ +#define OGA1_XP10_CPROM_SO 0x0050 /* R */ +#define OGA1_XP10_CPROM_CE_BAR 0x0054 /* W */ +#define OGA1_XP10_CPROM_SCK 0x0058 /* W */ +#define OGA1_XP10_CPROM_REG_SEL 0x005C /* W */ + +static uint8_t *ogp_spibar; + +static uint32_t ogp_reg_sel; +static uint32_t ogp_reg_siso; +static uint32_t ogp_reg__ce; +static uint32_t ogp_reg_sck; + +const struct pcidev_status ogp_spi[] = { + {PCI_VENDOR_ID_OGP, 0x0000, OK, "Open Graphics Project", "Development Board OGD1"}, + {}, +}; + +static void ogp_request_spibus(void) +{ + pci_mmio_writel(1, ogp_spibar + ogp_reg_sel); +} + +static void ogp_release_spibus(void) +{ + pci_mmio_writel(0, ogp_spibar + ogp_reg_sel); +} + +static void ogp_bitbang_set_cs(int val) +{ + pci_mmio_writel(val, ogp_spibar + ogp_reg__ce); +} + +static void ogp_bitbang_set_sck(int val) +{ + pci_mmio_writel(val, ogp_spibar + ogp_reg_sck); +} + +static void ogp_bitbang_set_mosi(int val) +{ + pci_mmio_writel(val, ogp_spibar + ogp_reg_siso); +} + +static int ogp_bitbang_get_miso(void) +{ + uint32_t tmp; + + tmp = pci_mmio_readl(ogp_spibar + ogp_reg_siso); + return tmp & 0x1; +} + +static const struct bitbang_spi_master bitbang_spi_master_ogp = { + .type = BITBANG_SPI_MASTER_OGP, + .set_cs = ogp_bitbang_set_cs, + .set_sck = ogp_bitbang_set_sck, + .set_mosi = ogp_bitbang_set_mosi, + .get_miso = ogp_bitbang_get_miso, + .request_bus = ogp_request_spibus, + .release_bus = ogp_release_spibus, +}; + +int ogp_spi_init(void) +{ + char *type; + + type = extract_programmer_param("rom"); + + if (!type) { + msg_perr("Please use flashrom -p ogp_spi:rom=... to specify " + "which flashchip you want to access.\n"); + return 1; + } else if (!strcasecmp(type, "bprom") || !strcasecmp(type, "bios")) { + ogp_reg_sel = OGA1_XP10_BPROM_REG_SEL; + ogp_reg_siso = OGA1_XP10_BPROM_SI; + ogp_reg__ce = OGA1_XP10_BPROM_CE_BAR; + ogp_reg_sck = OGA1_XP10_BPROM_SCK; + } else if (!strcasecmp(type, "cprom") || !strcasecmp(type, "s3")) { + ogp_reg_sel = OGA1_XP10_CPROM_REG_SEL; + ogp_reg_siso = OGA1_XP10_CPROM_SI; + ogp_reg__ce = OGA1_XP10_CPROM_CE_BAR; + ogp_reg_sck = OGA1_XP10_CPROM_SCK; + } else { + msg_perr("Invalid or missing rom= parameter.\n"); + return 1; + } + + get_io_perms(); + + io_base_addr = pcidev_init(PCI_VENDOR_ID_OGP, PCI_BASE_ADDRESS_0, + ogp_spi); + + ogp_spibar = physmap("OGP registers", io_base_addr, 4096); + + /* no delay for now. */ + if (bitbang_spi_init(&bitbang_spi_master_ogp, 0)) + return 1; + + buses_supported = CHIP_BUSTYPE_SPI; + spi_controller = SPI_CONTROLLER_OGP; + + return 0; +} + +int ogp_spi_shutdown(void) +{ + physunmap(ogp_spibar, 4096); + pci_cleanup(pacc); + release_io_perms(); + + return 0; +} Modified: trunk/print.c ============================================================================== --- trunk/print.c Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/print.c Fri Dec 3 15:48:11 2010 (r1241) @@ -312,6 +312,11 @@ programmer_table[PROGRAMMER_NICINTEL_SPI].name); print_supported_pcidevs(nics_intel_spi); #endif +#if CONFIG_OGP_SPI == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_OGP_SPI].name); + print_supported_pcidevs(ogp_spi); +#endif } #if CONFIG_INTERNAL == 1 Modified: trunk/print_wiki.c ============================================================================== --- trunk/print_wiki.c Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/print_wiki.c Fri Dec 3 15:48:11 2010 (r1241) @@ -299,6 +299,9 @@ #if CONFIG_NICINTEL_SPI == 1 print_supported_pcidevs_wiki(nics_intel_spi); #endif +#if CONFIG_OGP_SPI == 1 + print_supported_pcidevs_wiki(ogp_spi); +#endif printf("\n|}\n"); } Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/programmer.h Fri Dec 3 15:48:11 2010 (r1241) @@ -76,6 +76,9 @@ #if CONFIG_NICINTEL_SPI == 1 PROGRAMMER_NICINTEL_SPI, #endif +#if CONFIG_OGP_SPI == 1 + PROGRAMMER_OGP_SPI, +#endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -121,6 +124,9 @@ BITBANG_SPI_MASTER_MCP, #endif #endif +#if CONFIG_OGP_SPI == 1 + BITBANG_SPI_MASTER_OGP, +#endif }; struct bitbang_spi_master { @@ -221,7 +227,7 @@ #endif /* print.c */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI >= 1 void print_supported_pcidevs(const struct pcidev_status *devs); #endif @@ -402,6 +408,13 @@ extern const struct pcidev_status nics_intel_spi[]; #endif +/* ogp_spi.c */ +#if CONFIG_OGP_SPI == 1 +int ogp_spi_init(void); +int ogp_spi_shutdown(void); +extern const struct pcidev_status ogp_spi[]; +#endif + /* satasii.c */ #if CONFIG_SATASII == 1 int satasii_init(void); @@ -523,6 +536,9 @@ #if CONFIG_NICINTEL_SPI == 1 SPI_CONTROLLER_NICINTEL, #endif +#if CONFIG_OGP_SPI == 1 + SPI_CONTROLLER_OGP, +#endif SPI_CONTROLLER_INVALID /* This must always be the last entry. */ }; extern const int spi_programmer_count; Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Thu Dec 2 22:59:42 2010 (r1240) +++ trunk/spi.c Fri Dec 3 15:48:11 2010 (r1241) @@ -146,6 +146,15 @@ }, #endif +#if CONFIG_OGP_SPI == 1 + { /* SPI_CONTROLLER_OGP */ + .command = bitbang_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = bitbang_spi_read, + .write_256 = bitbang_spi_write_256, + }, +#endif + {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */ };

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[PATCH] Add support for the Open Graphics Project card as a programmer
by Mark Marshall 03 Dec '10

03 Dec '10

Hi. The attached patch adds support for the Open Graphics Project development card, OGD1, as a SPI flash programmer. The project is in the the process of designing and making a complete, open source, graphics card. Check out http://wiki.opengraphics.org. The first development card is a PCI add in card containing a couple of FPGAs and a couple of serial flash chips (amongst other things). The FPGA's are called XP10 and S3 (their part numbers). The XP10 contains it's own flash and does not need to be programmed by flashrom - it ensures that the device can enumerate on the PCI bus without needing further configuration. The larger FPGA is the S3. This is configured from a large serial flash (2M bytes). The second serial flash is used to store the VGA BIOS. It is smaller (128K bytes). The attached patch adds support for programming either of the two serial flash chips. They are both serial SPI devices. The programmer device takes one configuration option which selects which of the two flash chips is accessed. This must be set to either "cprom" or "bprom". (The project refers to the two chips as "cprom" / "bprom", "s3" and "bios" are more readable alternatives). I have also attached a log of the modified flashrom talking to both devices. I can read, erase, write and verify to both. The chips installed on my card are a SST25VF010 and a SST25VF016B. I have added a section to flashchips.c for the former. I have modified the flags of the later to say that writing works. Signed-off-by: Mark Marshall <mark.marshall(a)csr.com> Thanks, MM

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[PATCH] Do not crash with forced chips
by Carl-Daniel Hailfinger 02 Dec '10

02 Dec '10

Avoid printing the chip locks if chip detection was forced because lock access may involve flash chip registers which will not be mapped. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-no_force_register_access/flashrom.c =================================================================== --- flashrom-no_force_register_access/flashrom.c (Revision 1238) +++ flashrom-no_force_register_access/flashrom.c (Arbeitskopie) @@ -1163,8 +1163,12 @@ flash->vendor, flash->name, flash->total_size, flashbuses_to_text(flash->bustype), base); - if (flash->printlock) - flash->printlock(flash); + /* Flash registers will not be mapped if the chip was forced. Lock info + * may be stored in registers, so avoid lock info printing. + */ + if (!force) + if (flash->printlock) + flash->printlock(flash); return flash; } -- http://www.hailfinger.org/

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[commit] r1240 - trunk
by repository service 02 Dec '10

02 Dec '10

Author: hailfinger Date: Thu Dec 2 22:59:42 2010 New Revision: 1240 URL: http://flashrom.org/trac/flashrom/changeset/1240 Log: Avoid printing the chip locks if chip detection was forced because lock access may involve flash chip registers which will not be mapped. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashrom.c Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Thu Dec 2 22:57:42 2010 (r1239) +++ trunk/flashrom.c Thu Dec 2 22:59:42 2010 (r1240) @@ -1163,8 +1163,12 @@ flash->vendor, flash->name, flash->total_size, flashbuses_to_text(flash->bustype), base); - if (flash->printlock) - flash->printlock(flash); + /* Flash registers will not be mapped if the chip was forced. Lock info + * may be stored in registers, so avoid lock info printing. + */ + if (!force) + if (flash->printlock) + flash->printlock(flash); return flash; }

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[PATCH] Add a board-enable for the MSI MS-6391 (845 Pro4)
by Uwe Hermann 02 Dec '10

02 Dec '10

See patch. Will send logs and lspci/superiotool later, don't have them here right now. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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flashrom December 2010