by Yair K.
Hi,
Per discussion in IRC, I'm attaching "flashrom -V" and "lspci -nnvx" output.
Flashrom 0.9.0 flashing works. Hopefully the attached files will help with
autodetection.
Yours,
Yair K.
by Jelle Geerts
Hello,
I've ran flashrom -v {-E,-r,-v,-w} on my MS-7094 board.
For more info regarding the board, please see
http://www.msi.com/index.php?func=proddesc&maincat_no=1&cat2_no=&cat3_no=&p…
I've attached the results to this e-mail. Reading/verifying/writing
worked fine. Erasing however, didn't go so well, as you can see in the
attached log.
BTW, two thumbs up to the flashrom developers: the Award flash utility
did not work (kept saying 'Unknown flash type'), but flashrom did. ;)
HTH,
Jelle Geerts
by Putlinuxonit
Hi,
I've tested this board with flashrom-0.9.0-r695 as well as superiotool
r4424.
Also contained are dumps from* #lspci -vvnnxxxx*, *#dmidecode* and *#lshw*.
i tried a forced read via *#flashrom -f -r -c SST39SF020A
oldfirmware.bin*and provide the dumps as well though that maybe
useless as i was warned.
A lot of the info is probably duplicated but is provided for the sake of
completeness.
Bios: AMI
> Board: Asrock K7VT4A+
> Flash Chip: SST39SF020A (PLCC)
> Chipset: Via VT8235
>
Enjoy!,
Udu E. Ogah
.~~~~~~~~~~.
by Carl-Daniel Hailfinger
This is a bitbanging SPI driver without hardware support. If you want
support for a particular piece of hardware, just fill in a few
functions. That's it.
Tested, trace looks OK.
Not 0.9.1 material. If I get an ack, I'll commit after 0.9.1.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Index: flashrom-bitbang_spi/flash.h
===================================================================
--- flashrom-bitbang_spi/flash.h (Revision 682)
+++ flashrom-bitbang_spi/flash.h (Arbeitskopie)
@@ -90,6 +90,7 @@
#if SERPROG_SUPPORT == 1
PROGRAMMER_SERPROG,
#endif
+ PROGRAMMER_BITBANGSPI,
PROGRAMMER_INVALID /* This must always be the last entry. */
};
@@ -390,6 +391,12 @@
int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf);
+/* bitbang_spi.c */
+int bitbang_spi_init(void);
+int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
+int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf);
+
/* flashrom.c */
extern char *programmer_param;
extern int verbose;
@@ -428,6 +435,7 @@
SPI_CONTROLLER_WBSIO,
SPI_CONTROLLER_FT2232,
SPI_CONTROLLER_DUMMY,
+ SPI_CONTROLLER_BITBANG,
};
struct spi_command {
unsigned int writecnt;
Index: flashrom-bitbang_spi/bitbang_spi.c
===================================================================
--- flashrom-bitbang_spi/bitbang_spi.c (Revision 0)
+++ flashrom-bitbang_spi/bitbang_spi.c (Revision 0)
@@ -0,0 +1,183 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2009 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include "flash.h"
+#include "spi.h"
+
+#if BITBANG_SPI_SUPPORT == 1
+
+/* Length of half a clock period in usecs */
+int bitbang_half_period = 0;
+
+/* Empty functions, need to be replaced with actual driver implementation. */
+void bitbang_set_cs(int val)
+{
+}
+
+void bitbang_set_sck(int val)
+{
+}
+
+void bitbang_set_mosi(int val)
+{
+}
+
+int bitbang_get_miso(void)
+{
+ return 1;
+}
+
+int bitbang_spi_init(void)
+{
+ bitbang_set_cs(1);
+ bitbang_set_sck(0);
+
+ buses_supported = CHIP_BUSTYPE_SPI;
+ spi_controller = SPI_CONTROLLER_BITBANG;
+
+ return 0;
+}
+
+uint8_t bitbang_spi_readwrite_byte(uint8_t val)
+{
+ uint8_t ret = 0;
+ int i;
+
+ for (i = 7; i >= 0; i--) {
+ bitbang_set_mosi((val >> i) & 1);
+ programmer_delay(bitbang_half_period);
+ bitbang_set_sck(1);
+ ret <<= 1;
+ ret |= bitbang_get_miso();
+ programmer_delay(bitbang_half_period);
+ bitbang_set_sck(0);
+ }
+ return ret;
+}
+
+int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr)
+{
+ static unsigned char *bufout = NULL;
+ static unsigned char *bufin = NULL;
+ static int oldbufsize = 0;
+ int bufsize = max(writecnt + readcnt, 260);
+ int i;
+
+ /* Arbitrary size limitation here. We're only constrained by memory. */
+ if (writecnt > 65536 || readcnt > 65536)
+ return SPI_INVALID_LENGTH;
+
+ if (bufsize != oldbufsize) {
+ bufout = realloc(bufout, bufsize);
+ if (!bufout) {
+ fprintf(stderr, "Out of memory!\n");
+ if (bufin)
+ free(bufin);
+ exit(1);
+ }
+ bufin = realloc(bufout, bufsize);
+ if (!bufin) {
+ fprintf(stderr, "Out of memory!\n");
+ if (bufout)
+ free(bufout);
+ exit(1);
+ }
+ }
+
+ memcpy(bufout, writearr, writecnt);
+ /* Shift out 0x00 while reading data. */
+ memset(bufout + writecnt, 0x00, readcnt);
+ /* Make sure any non-read data is 0xff. */
+ memset(bufin + writecnt, 0xff, readcnt);
+
+ bitbang_set_cs(0);
+ for (i = 0; i < readcnt + writecnt; i++) {
+ bufin[i] = bitbang_spi_readwrite_byte(bufout[i]);
+ }
+ programmer_delay(bitbang_half_period);
+ bitbang_set_cs(1);
+ programmer_delay(bitbang_half_period);
+ memcpy(readarr, bufin + writecnt, readcnt);
+
+ return 0;
+}
+
+int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
+{
+ /* Maximum read length is unlimited, use 64k bytes. */
+ return spi_read_chunked(flash, buf, start, len, 64 * 1024);
+}
+
+int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf)
+{
+ int total_size = 1024 * flash->total_size;
+ int i;
+
+ printf_debug("total_size is %d\n", total_size);
+ for (i = 0; i < total_size; i += 256) {
+ int l, r;
+ if (i + 256 <= total_size)
+ l = 256;
+ else
+ l = total_size - i;
+
+ if ((r = spi_nbyte_program(i, &buf[i], l))) {
+ fprintf(stderr, "%s: write fail %d\n", __FUNCTION__, r);
+ return 1;
+ }
+
+ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+ /* loop */;
+ }
+
+ return 0;
+}
+
+#else
+int bitbang_spi_init(void)
+{
+ fprintf(stderr, "Bitbanging SPI support was not compiled in\n");
+ exit(1);
+}
+
+int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr)
+{
+ fprintf(stderr, "Bitbanging SPI support was not compiled in\n");
+ exit(1);
+}
+
+int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
+{
+ fprintf(stderr, "Bitbanging SPI support was not compiled in\n");
+ exit(1);
+}
+
+int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf)
+{
+ fprintf(stderr, "Bitbanging SPI support was not compiled in\n");
+ exit(1);
+}
+#endif
Index: flashrom-bitbang_spi/spi.c
===================================================================
--- flashrom-bitbang_spi/spi.c (Revision 682)
+++ flashrom-bitbang_spi/spi.c (Arbeitskopie)
@@ -95,6 +95,13 @@
.read = NULL,
.write_256 = NULL,
},
+
+ { /* SPI_CONTROLLER_BITBANG */
+ .command = bitbang_spi_send_command,
+ .multicommand = default_spi_send_multicommand,
+ .read = bitbang_spi_read,
+ .write_256 = bitbang_spi_write_256,
+ },
};
Index: flashrom-bitbang_spi/Makefile
===================================================================
--- flashrom-bitbang_spi/Makefile (Revision 682)
+++ flashrom-bitbang_spi/Makefile (Arbeitskopie)
@@ -67,11 +67,19 @@
# Always enable serprog for now. Needs to be disabled on Windows.
CONFIG_SERPROG = yes
+# Bitbanging SPI is not yet ready.
+CONFIG_BITBANG_SPI = yes
+
ifeq ($(CONFIG_SERPROG), yes)
FEATURE_CFLAGS += -D'SERPROG_SUPPORT=1'
OBJS += serprog.o
endif
+ifeq ($(CONFIG_BITBANG_SPI), yes)
+FEATURE_CFLAGS += -D'BITBANG_SPI_SUPPORT=1'
+OBJS += bitbang_spi.o
+endif
+
FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'FT2232_SPI_SUPPORT=1'")
FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-lftdi")
Index: flashrom-bitbang_spi/flashrom.c
===================================================================
--- flashrom-bitbang_spi/flashrom.c (Revision 682)
+++ flashrom-bitbang_spi/flashrom.c (Arbeitskopie)
@@ -158,6 +158,23 @@
},
#endif
+ {
+ .name = "bitbangspi",
+ .init = bitbang_spi_init,
+ .shutdown = fallback_shutdown,
+ .map_flash_region = fallback_map,
+ .unmap_flash_region = fallback_unmap,
+ .chip_readb = dummy_chip_readb,
+ .chip_readw = fallback_chip_readw,
+ .chip_readl = fallback_chip_readl,
+ .chip_readn = fallback_chip_readn,
+ .chip_writeb = fallback_chip_writeb,
+ .chip_writew = fallback_chip_writew,
+ .chip_writel = fallback_chip_writel,
+ .chip_writen = fallback_chip_writen,
+ .delay = internal_delay,
+ },
+
{}, /* This entry corresponds to PROGRAMMER_INVALID. */
};
@@ -512,7 +529,7 @@
" -z | --list-supported-wiki: print supported devices in wiki syntax\n"
" -p | --programmer <name>: specify the programmer device\n"
" (internal, dummy, nic3com, satasii,\n"
- " it87spi, ft2232spi, serprog)\n"
+ " it87spi, ft2232spi, serprog, bitbangspi)\n"
" -h | --help: print this help text\n"
" -R | --version: print the version (release)\n"
"\nYou can specify one of -E, -r, -w, -v or no operation. If no operation is\n"
--
http://www.hailfinger.org/
by Carl-Daniel Hailfinger
Introduce proper error checking for SPI programming.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Index: flashrom-spi_program_errorcheck/spi.c
===================================================================
--- flashrom-spi_program_errorcheck/spi.c (Revision 725)
+++ flashrom-spi_program_errorcheck/spi.c (Arbeitskopie)
@@ -971,7 +971,7 @@
int spi_chip_write_1(struct flashchip *flash, uint8_t *buf)
{
int total_size = 1024 * flash->total_size;
- int i;
+ int i, result = 0;
spi_disable_blockprotect();
/* Erase first */
@@ -982,7 +982,9 @@
}
printf("done.\n");
for (i = 0; i < total_size; i++) {
- spi_byte_program(i, buf[i]);
+ result = spi_byte_program(i, buf[i]);
+ if (result)
+ return 1;
while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
programmer_delay(10);
}
Index: flashrom-spi_program_errorcheck/sb600spi.c
===================================================================
--- flashrom-spi_program_errorcheck/sb600spi.c (Revision 725)
+++ flashrom-spi_program_errorcheck/sb600spi.c (Arbeitskopie)
@@ -48,9 +48,9 @@
/* FIXME: SB600 can write 5 bytes per transaction. */
int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf)
{
- int rc = 0, i;
+ int i;
int total_size = flash->total_size * 1024;
- int result;
+ int result = 0;
spi_disable_blockprotect();
/* Erase first */
@@ -63,10 +63,10 @@
printf("Programming flash");
for (i = 0; i < total_size; i++, buf++) {
- result = spi_byte_program(i, *buf);
+ result = spi_nbyte_program(i, buf, 1);
if (result) {
- // spi_byte_program reported the error for us already
- printf_debug("... continuing anyway.\n");
+ fprintf(stderr, "Write error!\n");
+ return result;
}
/* wait program complete. */
@@ -76,7 +76,7 @@
;
}
printf(" done.\n");
- return rc;
+ return result;
}
static void reset_internal_fifo_pointer(void)
--
http://www.hailfinger.org/
by Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
someone else please commit.
Index: flashrom-eraseblocks_mx25/flashchips.c
===================================================================
--- flashrom-eraseblocks_mx25/flashchips.c (Revision 719)
+++ flashrom-eraseblocks_mx25/flashchips.c (Arbeitskopie)
@@ -44,6 +44,11 @@
* .probe = Probe function
* .probe_timing = Probe function delay
* .erase = Chip erase function
+ * .block_erasers[] = Array of erase layouts and erase functions
+ * {
+ * .eraseblocks[] = Array of { blocksize, blockcount }
+ * .block_erase = Block erase function
+ * }
* .write = Chip write function
* .read = Chip read function
*/
@@ -1235,20 +1240,16 @@
{
.eraseblocks = { {4 * 1024, 16} },
.block_erase = spi_block_erase_20,
- },
- {
+ }, {
.eraseblocks = { {64 * 1024, 1} },
.block_erase = spi_block_erase_52,
- },
- {
+ }, {
.eraseblocks = { {64 * 1024, 1} },
.block_erase = spi_block_erase_d8,
- },
- {
+ }, {
.eraseblocks = { {64 * 1024, 1} },
.block_erase = spi_block_erase_60,
- },
- {
+ }, {
.eraseblocks = { {64 * 1024, 1} },
.block_erase = spi_block_erase_c7,
},
@@ -1274,16 +1275,13 @@
{
.eraseblocks = { {4 * 1024, 32} },
.block_erase = spi_block_erase_20,
- },
- {
+ }, {
.eraseblocks = { {64 * 1024, 2} },
.block_erase = spi_block_erase_d8,
- },
- {
+ }, {
.eraseblocks = { {128 * 1024, 1} },
.block_erase = spi_block_erase_60,
- },
- {
+ }, {
.eraseblocks = { {128 * 1024, 1} },
.block_erase = spi_block_erase_c7,
},
@@ -1304,6 +1302,25 @@
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.erase = spi_chip_erase_60_c7,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 64} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {64 * 1024, 4} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 4} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {256 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {256 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ },
+ },
.write = spi_chip_write_256,
.read = spi_chip_read,
},
@@ -1320,6 +1337,25 @@
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.erase = spi_chip_erase_60_c7,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 128} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {64 * 1024, 8} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 8} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {512 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {512 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ },
+ },
.write = spi_chip_write_256,
.read = spi_chip_read,
},
@@ -1336,6 +1372,25 @@
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.erase = spi_chip_erase_60_c7,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 256} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {64 * 1024, 16} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 16} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ },
+ },
.write = spi_chip_write_256,
.read = spi_chip_read,
},
@@ -1352,6 +1407,25 @@
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.erase = spi_chip_erase_60_c7,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 512} },
+ .block_erase = spi_block_erase_20, /* This erase function has 64k blocksize for eLiteFlash */
+ }, {
+ .eraseblocks = { {64 * 1024, 32} }, /* Not supported in MX25L1605 (eLiteFlash) and MX25L1605D/MX25L1635D */
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 32} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {2 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {2 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ },
+ },
.write = spi_chip_write_256,
.read = spi_chip_read,
},
Index: flashrom-eraseblocks_mx25/flashchips.h
===================================================================
--- flashrom-eraseblocks_mx25/flashchips.h (Revision 719)
+++ flashrom-eraseblocks_mx25/flashchips.h (Arbeitskopie)
@@ -251,7 +251,7 @@
* and use the same set of IDs.
*/
#define MX_ID 0xC2 /* Macronix (MX) */
-#define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
+#define MX_25L512 0x2010 /* Same as MX25V512 */
#define MX_25L1005 0x2011
#define MX_25L2005 0x2012
#define MX_25L4005 0x2013 /* MX25L4005{,A} */
--
http://www.hailfinger.org/
by svn＠flashrom.org
Author: uwe
Date: 2009-09-30 20:29:55 +0200 (Wed, 30 Sep 2009)
New Revision: 737
Added:
trunk/gfxnvidia.c
Modified:
trunk/Makefile
trunk/flash.h
trunk/flashrom.8
trunk/flashrom.c
trunk/pcidev.c
Log:
Add initial support for flashing some NVIDIA graphics cards.
The new option is '-p gfxnvidia', rest of the interface is as usual.
I tested a successful identify and read on a "RIVA TNT2 Model 64/Model 64 Pro"
card for now, erase and write did NOT work properly so far!
Please do not attempt to write/erase cards yet, unless you can recover!
In addition to the NVIDIA handling code it was required to call
programmer_shutdown() in a lot more places, otherwise the graphics card
will be disabled in the init function, but never enabled again as the
shutdown function is not called.
The shutdown handling may be changed to use atexit() later.
Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Acked-by: Luc Verhaegen <libv(a)skynet.be>
Modified: trunk/Makefile
===================================================================
--- trunk/Makefile 2009-09-28 13:15:16 UTC (rev 736)
+++ trunk/Makefile 2009-09-30 18:29:55 UTC (rev 737)
@@ -74,6 +74,9 @@
# Always enable 3Com NICs for now.
CONFIG_NIC3COM ?= yes
+# Always enable NVIDIA graphics cards for now.
+CONFIG_GFXNVIDIA ?= yes
+
# Always enable SiI SATA controllers for now.
CONFIG_SATASII ?= yes
@@ -107,6 +110,11 @@
OBJS += nic3com.o
endif
+ifeq ($(CONFIG_GFXNVIDIA), yes)
+FEATURE_CFLAGS += -D'GFXNVIDIA_SUPPORT=1'
+OBJS += gfxnvidia.o
+endif
+
ifeq ($(CONFIG_SATASII), yes)
FEATURE_CFLAGS += -D'SATASII_SUPPORT=1'
OBJS += satasii.o
Modified: trunk/flash.h
===================================================================
--- trunk/flash.h 2009-09-28 13:15:16 UTC (rev 736)
+++ trunk/flash.h 2009-09-30 18:29:55 UTC (rev 737)
@@ -88,6 +88,9 @@
#if NIC3COM_SUPPORT == 1
PROGRAMMER_NIC3COM,
#endif
+#if GFXNVIDIA_SUPPORT == 1
+ PROGRAMMER_GFXNVIDIA,
+#endif
#if DRKAISER_SUPPORT == 1
PROGRAMMER_DRKAISER,
#endif
@@ -437,6 +440,13 @@
uint8_t nic3com_chip_readb(const chipaddr addr);
extern struct pcidev_status nics_3com[];
+/* gfxnvidia.c */
+int gfxnvidia_init(void);
+int gfxnvidia_shutdown(void);
+void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr);
+uint8_t gfxnvidia_chip_readb(const chipaddr addr);
+extern struct pcidev_status gfx_nvidia[];
+
/* drkaiser.c */
int drkaiser_init(void);
int drkaiser_shutdown(void);
Modified: trunk/flashrom.8
===================================================================
--- trunk/flashrom.8 2009-09-28 13:15:16 UTC (rev 736)
+++ trunk/flashrom.8 2009-09-30 18:29:55 UTC (rev 737)
@@ -140,6 +140,8 @@
.sp
.BR "* nic3com" " (for flash ROMs on 3COM network cards)"
.sp
+.BR "* gfxnvidia" " (for flash ROMs on NVIDIA graphics cards)"
+.sp
.BR "* drkaiser" " (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)"
.sp
.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)"
@@ -180,6 +182,7 @@
.sp
Currently the following programmers support this mechanism:
.BR nic3com ,
+.BR gfxnvidia ,
.BR satasii .
.sp
The it87spi programmer has an optional parameter which will set the I/O base
Modified: trunk/flashrom.c
===================================================================
--- trunk/flashrom.c 2009-09-28 13:15:16 UTC (rev 736)
+++ trunk/flashrom.c 2009-09-30 18:29:55 UTC (rev 737)
@@ -92,6 +92,25 @@
},
#endif
+#if GFXNVIDIA_SUPPORT == 1
+ {
+ .name = "gfxnvidia",
+ .init = gfxnvidia_init,
+ .shutdown = gfxnvidia_shutdown,
+ .map_flash_region = fallback_map,
+ .unmap_flash_region = fallback_unmap,
+ .chip_readb = gfxnvidia_chip_readb,
+ .chip_readw = fallback_chip_readw,
+ .chip_readl = fallback_chip_readl,
+ .chip_readn = fallback_chip_readn,
+ .chip_writeb = gfxnvidia_chip_writeb,
+ .chip_writew = fallback_chip_writew,
+ .chip_writel = fallback_chip_writel,
+ .chip_writen = fallback_chip_writen,
+ .delay = internal_delay,
+ },
+#endif
+
#if DRKAISER_SUPPORT == 1
{
.name = "drkaiser",
@@ -824,6 +843,9 @@
#if NIC3COM_SUPPORT == 1
print_supported_pcidevs(nics_3com);
#endif
+#if GFXNVIDIA_SUPPORT == 1
+ print_supported_pcidevs(gfx_nvidia);
+#endif
#if DRKAISER_SUPPORT == 1
print_supported_pcidevs(drkaiser_pcidev);
#endif
@@ -868,6 +890,7 @@
for (i = 0; i < ARRAY_SIZE(flashes) && flashes[i]; i++)
printf(" %s", flashes[i]->name);
printf("\nPlease specify which chip to use with the -c <chipname> option.\n");
+ programmer_shutdown();
exit(1);
} else if (!flashes[0]) {
printf("No EEPROM/flash device found.\n");
@@ -890,6 +913,7 @@
return read_flash(flashes[0], filename);
}
// FIXME: flash writes stay enabled!
+ programmer_shutdown();
exit(1);
}
@@ -935,12 +959,14 @@
if (!(read_it | write_it | verify_it | erase_it)) {
printf("No operations were specified.\n");
// FIXME: flash writes stay enabled!
+ programmer_shutdown();
exit(1);
}
if (!filename && !erase_it) {
printf("Error: No filename specified.\n");
// FIXME: flash writes stay enabled!
+ programmer_shutdown();
exit(1);
}
@@ -956,6 +982,7 @@
fprintf(stderr, "Erase is not working on this chip. ");
if (!force) {
fprintf(stderr, "Aborting.\n");
+ programmer_shutdown();
return 1;
} else {
fprintf(stderr, "Continuing anyway.\n");
@@ -963,11 +990,14 @@
}
if (erase_flash(flash)) {
emergency_help_message();
+ programmer_shutdown();
return 1;
}
} else if (read_it) {
- if (read_flash(flash, filename))
+ if (read_flash(flash, filename)) {
+ programmer_shutdown();
return 1;
+ }
} else {
struct stat image_stat;
@@ -976,6 +1006,7 @@
"and erase is needed for write. ");
if (!force) {
fprintf(stderr, "Aborting.\n");
+ programmer_shutdown();
return 1;
} else {
fprintf(stderr, "Continuing anyway.\n");
@@ -985,6 +1016,7 @@
fprintf(stderr, "Write is not working on this chip. ");
if (!force) {
fprintf(stderr, "Aborting.\n");
+ programmer_shutdown();
return 1;
} else {
fprintf(stderr, "Continuing anyway.\n");
@@ -992,14 +1024,17 @@
}
if ((image = fopen(filename, "r")) == NULL) {
perror(filename);
+ programmer_shutdown();
exit(1);
}
if (fstat(fileno(image), &image_stat) != 0) {
perror(filename);
+ programmer_shutdown();
exit(1);
}
if (image_stat.st_size != flash->total_size * 1024) {
fprintf(stderr, "Error: Image size doesn't match\n");
+ programmer_shutdown();
exit(1);
}
@@ -1008,6 +1043,7 @@
fclose(image);
if (numbytes != size) {
fprintf(stderr, "Error: Failed to read file. Got %ld bytes, wanted %ld!\n", numbytes, size);
+ programmer_shutdown();
return 1;
}
}
@@ -1022,12 +1058,14 @@
printf("Writing flash chip... ");
if (!flash->write) {
fprintf(stderr, "Error: flashrom has no write function for this flash chip.\n");
+ programmer_shutdown();
return 1;
}
ret = flash->write(flash, buf);
if (ret) {
fprintf(stderr, "FAILED!\n");
emergency_help_message();
+ programmer_shutdown();
return 1;
} else {
printf("COMPLETE.\n");
Added: trunk/gfxnvidia.c
===================================================================
--- trunk/gfxnvidia.c (rev 0)
+++ trunk/gfxnvidia.c 2009-09-30 18:29:55 UTC (rev 737)
@@ -0,0 +1,104 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe(a)hermann-uwe.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include <sys/types.h>
+#include "flash.h"
+
+#define PCI_VENDOR_ID_NVIDIA 0x10de
+
+uint8_t *nvidia_bar;
+
+struct pcidev_status gfx_nvidia[] = {
+ {0x10de, 0x0010, PCI_NT, "NVIDIA", "Mutara V08 [NV2]" },
+ {0x10de, 0x0018, PCI_NT, "NVIDIA", "RIVA 128" },
+ {0x10de, 0x0020, PCI_NT, "NVIDIA", "RIVA TNT" },
+ {0x10de, 0x0028, PCI_NT, "NVIDIA", "RIVA TNT2/TNT2 Pro" },
+ {0x10de, 0x0029, PCI_NT, "NVIDIA", "RIVA TNT2 Ultra" },
+ {0x10de, 0x002c, PCI_NT, "NVIDIA", "Vanta/Vanta LT" },
+ {0x10de, 0x002d, PCI_OK, "NVIDIA", "RIVA TNT2 Model 64/Model 64 Pro" },
+ {0x10de, 0x00a0, PCI_NT, "NVIDIA", "Aladdin TNT2" },
+ {0x10de, 0x0100, PCI_NT, "NVIDIA", "GeForce 256" },
+ {0x10de, 0x0101, PCI_NT, "NVIDIA", "GeForce DDR" },
+ {0x10de, 0x0103, PCI_NT, "NVIDIA", "Quadro" },
+ {0x10de, 0x0110, PCI_NT, "NVIDIA", "GeForce2 MX" },
+ {0x10de, 0x0111, PCI_NT, "NVIDIA", "GeForce2 MX" },
+ {0x10de, 0x0112, PCI_NT, "NVIDIA", "GeForce2 GO" },
+ {0x10de, 0x0113, PCI_NT, "NVIDIA", "Quadro2 MXR" },
+ {0x10de, 0x0150, PCI_NT, "NVIDIA", "GeForce2 GTS/Pro" },
+ {0x10de, 0x0151, PCI_NT, "NVIDIA", "GeForce2 GTS" },
+ {0x10de, 0x0152, PCI_NT, "NVIDIA", "GeForce2 Ultra" },
+ {0x10de, 0x0153, PCI_NT, "NVIDIA", "Quadro2 Pro" },
+ {0x10de, 0x0200, PCI_NT, "NVIDIA", "GeForce 3 nFX" },
+ {0x10de, 0x0201, PCI_NT, "NVIDIA", "GeForce 3 nFX" },
+ {0x10de, 0x0202, PCI_NT, "NVIDIA", "GeForce 3 nFX Ultra" },
+ {0x10de, 0x0203, PCI_NT, "NVIDIA", "Quadro 3 DDC" },
+
+ {},
+};
+
+int gfxnvidia_init(void)
+{
+ uint32_t reg32;
+
+ get_io_perms();
+
+ io_base_addr = pcidev_init(PCI_VENDOR_ID_NVIDIA, PCI_BASE_ADDRESS_0,
+ gfx_nvidia, programmer_param);
+ io_base_addr += 0x300000;
+ printf("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr);
+
+ /* Allow access to flash interface (will disable screen). */
+ reg32 = pci_read_long(pcidev_dev, 0x50);
+ reg32 &= ~(1 << 0);
+ pci_write_long(pcidev_dev, 0x50, reg32);
+
+ nvidia_bar = physmap("NVIDIA", io_base_addr, 16 * 1024 * 1024);
+
+ buses_supported = CHIP_BUSTYPE_PARALLEL;
+
+ return 0;
+}
+
+int gfxnvidia_shutdown(void)
+{
+ uint32_t reg32;
+
+ /* Disallow access to flash interface (and re-enable screen). */
+ reg32 = pci_read_long(pcidev_dev, 0x50);
+ reg32 |= (1 << 0);
+ pci_write_long(pcidev_dev, 0x50, reg32);
+
+ free(programmer_param);
+ pci_cleanup(pacc);
+ release_io_perms();
+ return 0;
+}
+
+void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr)
+{
+ mmio_writeb(val, nvidia_bar + addr);
+}
+
+uint8_t gfxnvidia_chip_readb(const chipaddr addr)
+{
+ return mmio_readb(nvidia_bar + addr);
+}
Modified: trunk/pcidev.c
===================================================================
--- trunk/pcidev.c 2009-09-28 13:15:16 UTC (rev 736)
+++ trunk/pcidev.c 2009-09-30 18:29:55 UTC (rev 737)
@@ -28,7 +28,8 @@
struct pci_filter filter;
struct pci_dev *pcidev_dev = NULL;
-uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, struct pcidev_status *devs)
+uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar,
+ struct pcidev_status *devs)
{
int i;
uint32_t addr;
@@ -37,12 +38,16 @@
if (dev->device_id != devs[i].device_id)
continue;
- /* Don't use dev->base_addr[x] (as value for 'bar'), won't work on older libpci. */
+ /*
+ * Don't use dev->base_addr[x] (as value for 'bar'), won't
+ * work on older libpci.
+ */
addr = pci_read_long(dev, bar) & ~0x03;
printf("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x).\n",
- devs[i].vendor_name, devs[i].device_name, dev->vendor_id,
- dev->device_id, dev->bus, dev->dev, dev->func);
+ devs[i].vendor_name, devs[i].device_name,
+ dev->vendor_id, dev->device_id, dev->bus, dev->dev,
+ dev->func);
if (devs[i].status == PCI_NT) {
printf("===\nThis PCI device is UNTESTED. Please "
@@ -57,7 +62,8 @@
return 0;
}
-uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, struct pcidev_status *devs, char *pcidev_bdf)
+uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar,
+ struct pcidev_status *devs, char *pcidev_bdf)
{
struct pci_dev *dev;
char *msg = NULL;
