flashrom December 2009

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Re: [flashrom] MCP51 - Asus M2NBP-VM CSM - File Archive as Link
by ying.w＠a-power.com 28 Dec '09

28 Dec '09

http://ying.apdir.com/files/mcp51_flashrom_1.tar.gz

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[PATCH] Boards: Remove it8705_rom_write_enable.
by Luc Verhaegen 26 Dec '09

26 Dec '09

Should be functionally the same as it8705f_write_enable_2e. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> --- board_enable.c | 80 +++++++++++++++++++++----------------------------------- 1 files changed, 30 insertions(+), 50 deletions(-) diff --git a/board_enable.c b/board_enable.c index 3c0057c..abe1d47 100644 --- a/board_enable.c +++ b/board_enable.c @@ -205,6 +205,33 @@ static int w836xx_memw_enable_2e(const char *name) return 0; } +/** + * + */ +static int it8705f_write_enable(uint8_t port, const char *name) +{ + enter_conf_mode_ite(port); + sio_mask(port, 0x24, 0x04, 0x04); /* Flash ROM I/F Writes Enable */ + exit_conf_mode_ite(port); + + return 0; +} + +/** + * Suited for: + * - AOpen vKM400Am-S: VIA KM400 + VT8237 + IT8705F. + * - Biostar P4M80-M4: VIA P4M800 + VT8237 + IT8705AF + * - Elitegroup K7S6A: SiS745 + ITE IT8705F + * - Elitegroup K7VTA3: VIA Apollo KT266/A/333 + VIA VT8235 + ITE IT8705F + * - GIGABYTE GA-7VT600: VIA KT600 + VT8237 + IT8705 + * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F + * + * SIS950 superio probably requires the same flash write enable. + */ +static int it8705f_write_enable_2e(const char *name) +{ + return it8705f_write_enable(0x2e, name); +} /** * VT823x: Set one of the GPIO pins. @@ -889,33 +916,6 @@ static int board_kontron_986lcd_m(const char *name) } /** - * Suited for: - * - Biostar P4M80-M4: VIA P4M800 + VT8237 + IT8705AF - * - GIGABYTE GA-7VT600: VIA KT600 + VT8237 + IT8705 - * - AOpen vKM400Am-S: VIA KM400 + VT8237 + IT8705F. - * - * SIS950 superio probably requires the same flash write enable. - */ -static int it8705_rom_write_enable(const char *name) -{ - /* enter IT87xx conf mode */ - enter_conf_mode_ite(0x2e); - - /* select right flash chip */ - sio_mask(0x2e, 0x22, 0x80, 0x80); - - /* bit 3: flash chip write enable - * bit 7: map flash chip at 1MB-128K (why though? ignoring this.) - */ - sio_mask(0x2e, 0x24, 0x04, 0x04); - - /* exit IT87xx conf mode */ - exit_conf_mode_ite(0x2e); - - return 0; -} - -/** * Suited for Soyo SY-7VCA: Pro133A + VT82C686. */ static int board_soyo_sy_7vca(const char *name) @@ -978,26 +978,6 @@ static int board_msi_651ml(const char *name) return 0; } -static int it8705f_write_enable(uint8_t port, const char *name) -{ - enter_conf_mode_ite(port); - sio_mask(port, 0x24, 0x04, 0x04); /* Flash ROM I/F Writes Enable */ - exit_conf_mode_ite(port); - - return 0; -} - -/** - * Suited for: - * - Elitegroup K7S6A: SiS745 + ITE IT8705F - * - Elitegroup K7VTA3: VIA Apollo KT266/A/333 + VIA VT8235 + ITE IT8705F - * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F - */ -static int it8705f_write_enable_2e(const char *name) -{ - return it8705f_write_enable(0x2e, name); -} - /** * Find the runtime registers of an SMSC Super I/O, after verifying its * chip ID. @@ -1201,7 +1181,7 @@ struct board_pciid_enable board_pciid_enables[] = { {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, "ASRock", "P4i65GV", 0, intel_ich_gpio23_raise}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami", "Aruma", 0, w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, "Albatron", "PM266A", 0, w836xx_memw_enable_2e}, - {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705_rom_write_enable}, + {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705f_write_enable_2e}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, board_artecgroup_dbe6x}, {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, board_artecgroup_dbe6x}, {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, "ASUS", "A7V600-X", 0, board_asus_a7v600x}, @@ -1213,7 +1193,7 @@ struct board_pciid_enable board_pciid_enables[] = { {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, intel_ich_gpio21_raise}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS", "P5A", 0, board_asus_p5a}, {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, nvidia_mcp_gpio10_raise}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705_rom_write_enable}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705f_write_enable_2e}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, "Dell", "PowerEdge 1850", 0, intel_ich_gpio23_raise}, {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, "Elitegroup", "K7S6A", 0, it8705f_write_enable_2e}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", 256, it8705f_write_enable_2e}, @@ -1221,7 +1201,7 @@ struct board_pciid_enable board_pciid_enables[] = { {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, "EPoX", "EP-8RDA3+", 0, nvidia_mcp_gpio31_raise}, {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, board_epox_ep_bx3}, {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, it87xx_probe_spi_flash}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705_rom_write_enable}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705f_write_enable_2e}, {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, nvidia_mcp_gpio21_raise}, {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, it87xx_probe_spi_flash}, {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, it87xx_probe_spi_flash}, -- 1.6.0.2 --NU0Ex4SbNnrxsi6C--

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[PATCH] Boards: Add max_rom_decode_parallel entry to board enable table.
by Luc Verhaegen 26 Dec '09

26 Dec '09

This is a quick fix for board specific parallel addressing limits. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> --- board_enable.c | 129 +++++++++++++++++++++++++++----------------------------- flash.h | 1 + 2 files changed, 63 insertions(+), 67 deletions(-) diff --git a/board_enable.c b/board_enable.c index 2446ddd..3c0057c 100644 --- a/board_enable.c +++ b/board_enable.c @@ -991,19 +991,10 @@ static int it8705f_write_enable(uint8_t port, const char *name) * Suited for: * - Elitegroup K7S6A: SiS745 + ITE IT8705F * - Elitegroup K7VTA3: VIA Apollo KT266/A/333 + VIA VT8235 + ITE IT8705F + * - Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F */ -static int elitegroup_k7vta3(const char *name) +static int it8705f_write_enable_2e(const char *name) { - max_rom_decode.parallel = 256 * 1024; - return it8705f_write_enable(0x2e, name); -} - -/** - * Suited for: Shuttle AK38N: VIA KT333CF + VIA VT8235 + ITE IT8705F - */ -static int shuttle_ak38n(const char *name) -{ - max_rom_decode.parallel = 256 * 1024; return it8705f_write_enable(0x2e, name); } @@ -1204,62 +1195,62 @@ static int board_asus_a7v600x(const char *name) /* Please keep this list alphabetically ordered by vendor/board name. */ struct board_pciid_enable board_pciid_enables[] = { - /* first pci-id set [4], second pci-id set [4], coreboot id [2], vendor name board name flash enable */ - {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, "Abit", "IP35", intel_ich_gpio16_raise}, - {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, "Acorp", "6A815EPD", board_acorp_6a815epd}, - {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, "ASRock", "P4i65GV", intel_ich_gpio23_raise}, - {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami", "Aruma", w83627hf_gpio24_raise_2e}, - {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, "Albatron", "PM266A", w836xx_memw_enable_2e}, - {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, "AOpen", "vKM400Am-S", it8705_rom_write_enable}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group", "DBE61", board_artecgroup_dbe6x}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group", "DBE62", board_artecgroup_dbe6x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, "ASUS", "A7V600-X", board_asus_a7v600x}, - {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, "ASUS", "A7V8X", board_asus_a7v8x}, - {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS", "A7V8X-MX SE", w836xx_memw_enable_2e}, - {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, "ASUS", "M2V-MX", via_vt823x_gpio5_raise}, - {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS", "P4B266", intel_ich_gpio22_raise}, - {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, "ASUS", "P4B266-LM", intel_ich_gpio21_raise}, - {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, "ASUS", "P4P800-E Deluxe", intel_ich_gpio21_raise}, - {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS", "P5A", board_asus_p5a}, - {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", nvidia_mcp_gpio10_raise}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", it8705_rom_write_enable}, - {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, "Dell", "PowerEdge 1850", intel_ich_gpio23_raise}, - {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, "Elitegroup", "K7S6A", elitegroup_k7vta3}, - {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", elitegroup_k7vta3}, - {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, "EPoX", "EP-8K5A2", w836xx_memw_enable_2e}, - {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, "EPoX", "EP-8RDA3+", nvidia_mcp_gpio31_raise}, - {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX", "EP-BX3", board_epox_ep_bx3}, - {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", it87xx_probe_spi_flash}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", it8705_rom_write_enable}, - {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", nvidia_mcp_gpio21_raise}, - {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", it87xx_probe_spi_flash}, - {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, "GIGABYTE", "GA-M61P-S3", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", it87xx_probe_spi_flash}, - {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", it87xx_probe_spi_flash}, - {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, "hp", "dl145_g3", "HP", "DL145 G3", board_hp_dl145_g3_enable}, - {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, "IBM", "x3455", board_ibm_x3455}, - {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, "Intel", "D201GLY", wbsio_check_for_spi}, - {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, "iwill", "dk8_htx", "IWILL", "DK8-HTX", w83627hf_gpio24_raise_2e}, - {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, "kontron", "986lcd-m", "Kontron", "986LCD-M", board_kontron_986lcd_m}, - {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, "Mitac", "6513WU", board_mitac_6513wu}, - {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, - {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e}, - {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, - {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, "MSI", "MS-7005 (651M-L)", board_msi_651ml}, - {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, - {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, - {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise}, - {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, "shuttle", "ak31", "Shuttle", "AK31", w836xx_memw_enable_2e}, - {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, "Shuttle", "AK38N", shuttle_ak38n}, - {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, "Shuttle", "FN25", board_shuttle_fn25}, - {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, "Soyo", "SY-7VCA", board_soyo_sy_7vca}, - {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", w836xx_memw_enable_2e}, - {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA", "EPIA M/MII/...", via_vt823x_gpio15_raise}, - {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, "VIA", "EPIA-N/NL", via_vt823x_gpio9_raise}, - {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, "VIA", "PC3500G", it87xx_probe_spi_flash}, - - { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL}, /* end marker */ + /* first pci-id set [4], second pci-id set [4], coreboot id [2], vendor name board name max_rom_... flash enable */ + {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, "Abit", "IP35", 0, intel_ich_gpio16_raise}, + {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, "Acorp", "6A815EPD", 0, board_acorp_6a815epd}, + {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, "ASRock", "P4i65GV", 0, intel_ich_gpio23_raise}, + {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami", "Aruma", 0, w83627hf_gpio24_raise_2e}, + {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, "Albatron", "PM266A", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, "AOpen", "vKM400Am-S", 0, it8705_rom_write_enable}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group", "DBE61", 0, board_artecgroup_dbe6x}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group", "DBE62", 0, board_artecgroup_dbe6x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3065, 0x1043, 0x80ED, NULL, NULL, "ASUS", "A7V600-X", 0, board_asus_a7v600x}, + {0x1106, 0x3189, 0x1043, 0x807F, 0x1106, 0x3177, 0x1043, 0x808C, NULL, NULL, "ASUS", "A7V8X", 0, board_asus_a7v8x}, + {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS", "A7V8X-MX SE", 0, w836xx_memw_enable_2e}, + {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, "ASUS", "M2V-MX", 0, via_vt823x_gpio5_raise}, + {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS", "P4B266", 0, intel_ich_gpio22_raise}, + {0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, "ASUS", "P4B266-LM", 0, intel_ich_gpio21_raise}, + {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, "ASUS", "P4P800-E Deluxe", 0, intel_ich_gpio21_raise}, + {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS", "P5A", 0, board_asus_p5a}, + {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", 0, nvidia_mcp_gpio10_raise}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", 0, it8705_rom_write_enable}, + {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, "Dell", "PowerEdge 1850", 0, intel_ich_gpio23_raise}, + {0x1039, 0x5513, 0x1019, 0x0A41, 0x1039, 0x0018, 0, 0, NULL, NULL, "Elitegroup", "K7S6A", 0, it8705f_write_enable_2e}, + {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", 256, it8705f_write_enable_2e}, + {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, "EPoX", "EP-8K5A2", 0, w836xx_memw_enable_2e}, + {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, "EPoX", "EP-8RDA3+", 0, nvidia_mcp_gpio31_raise}, + {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, board_epox_ep_bx3}, + {0x1039, 0x0761, 0, 0, 0x10EC, 0x8168, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", 0, it87xx_probe_spi_flash}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", 0, it8705_rom_write_enable}, + {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, nvidia_mcp_gpio21_raise}, + {0x10DE, 0x0360, 0x1458, 0x0C11, 0x10DE, 0x0369, 0x1458, 0x5001, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", 0, it87xx_probe_spi_flash}, + {0x10de, 0x03e0, 0, 0, 0x10DE, 0x03D0, 0, 0, NULL, NULL, "GIGABYTE", "GA-M61P-S3", 0, it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", 0, it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", 0, it87xx_probe_spi_flash}, + {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, NULL, NULL, "GIGABYTE", "GA-MA790FX-DQ6", 0, it87xx_probe_spi_flash}, + {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, "hp", "dl145_g3", "HP", "DL145 G3", 0, board_hp_dl145_g3_enable}, + {0x1166, 0x0205, 0x1014, 0x0347, 0x1002, 0x515E, 0x1014, 0x0325, NULL, NULL, "IBM", "x3455", 0, board_ibm_x3455}, + {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, "Intel", "D201GLY", 0, wbsio_check_for_spi}, + {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, "iwill", "dk8_htx", "IWILL", "DK8-HTX", 0, w83627hf_gpio24_raise_2e}, + {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0, "kontron", "986lcd-m", "Kontron", "986LCD-M", 0, board_kontron_986lcd_m}, + {0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, "Mitac", "6513WU", 0, board_mitac_6513wu}, + {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, "MSI", "MS-6590 (KT4 Ultra)", 0, board_msi_kt4v}, + {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, "MSI", "MS-6702E (K8T Neo2-F)", 0, w83627thf_gpio4_4_raise_2e}, + {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, "MSI", "MS-6712 (KT4V)", 0, board_msi_kt4v}, + {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, "MSI", "MS-7005 (651M-L)", 0, board_msi_651ml}, + {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI", "MS-7046", 0, intel_ich_gpio19_raise}, + {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, w83627thf_gpio4_4_raise_4e}, + {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, "MSI", "K8N Neo4-F", 0, nvidia_mcp_gpio2_raise}, + {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, "shuttle", "ak31", "Shuttle", "AK31", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, "Shuttle", "AK38N", 256, it8705f_write_enable_2e}, + {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, "Shuttle", "FN25", 0, board_shuttle_fn25}, + {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, "Soyo", "SY-7VCA", 0, board_soyo_sy_7vca}, + {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", 0, w836xx_memw_enable_2e}, + {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA", "EPIA M/MII/...", 0, via_vt823x_gpio15_raise}, + {0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, "VIA", "EPIA-N/NL", 0, via_vt823x_gpio9_raise}, + {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, NULL, NULL, "VIA", "PC3500G", 0, it87xx_probe_spi_flash}, + + { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, 0, NULL}, /* end marker */ }; /** @@ -1364,6 +1355,10 @@ int board_flash_enable(const char *vendor, const char *part) board = board_match_pci_card_ids(); if (board) { + if (board->max_rom_decode_parallel) + max_rom_decode.parallel = + board->max_rom_decode_parallel * 1024; + printf("Disabling flash write protection for board \"%s %s\"... ", board->vendor_name, board->board_name); diff --git a/flash.h b/flash.h index 069b903..75a84b0 100644 --- a/flash.h +++ b/flash.h @@ -269,6 +269,7 @@ struct board_pciid_enable { const char *vendor_name; const char *board_name; + int max_rom_decode_parallel; int (*enable) (const char *name); }; -- 1.6.0.2 --1UWUbFP1cBYEclgG--

1 0

[Flashrom] Chip Driver Notes, JEDEC and similar
by Sean Nelson 25 Dec '09

25 Dec '09

This shows how we could refactor the jedec code. After the refactor we can delete these: * am29f040b * en29f002a -> file_not_used * m29f002 * mx29f002 * pm29f002 * sst49lf040 * w49f002u These files can be deleted if we *could* find a way to integrate the problems into jedec.c: * w29ee011 -> checks specifically for w29ee011 * w39v040c -> checks for lock in probe: address 0xfff2 * pm49fl00x -> uses chip protect code * m29f002 -> block based writing * m29f400bt -> block based writing I was looking through these two files and saw that they used variable block sizes for writing sectors, maybe we can do something simpler to block_erasers: * m29f002 * m29f400bt There are a few files that performs another map_flash_registers() after successful probe, I was wondering if we could add the re-mapping to probe_jedec_common or if its safe to omit the function call: * pm49fl00x * stm50flw0x0x * w39v080fa List of chips that use a specific addressing for command codes: 0x2AA based chips: * am29f040b * mx29f002 * pm29f002 0xAAA based chips: * m29f002 * m29f400bt 0x2AAA based chips: * pm49fl00x * sst49lf040 * stm50flw0x0x * w29ee011 * w39v040c * w39v080fa * w49f002u The full notes: @jedec { # start_program_jedec => AA 55 A0 # probe_jedec => AA 55 90 MID DID AA 55 F0 # erase_sector_jedec => AA 55 80 AA 55 30 # erase_block_jedec => AA 55 80 AA 55 50 # erase_chip_jedec => AA 55 80 AA 55 10 # write_page_write_jedec # write_byte_program_jedec # write_sector_jedec - byte_program based # write_jedec is a chip by page writer - page based # write_jedec_1 is a chip by page writer - sector based # # void start_program_jedec(chipaddr bios, unsigned int mask, # unsigned int shift) # { # chip_writeb(0xAA, bios + (0x5555 & mask) ); # chip_writeb(0x55, bios + ((0x2AAA & mask)>>shift) ); # chip_writeb(0xA0, bios + (0x5555 & mask) ); # } } @82802ab { # FWHUB map_flash_registers } @am29f040b { # 0x555 0x2AA erase_29f040b => erase_chip_jedec_2aa erase_chip_29f040b => erase_chip_block_jedec_2aa erase_sector_29f040b => erase_sector_jedec_2aa probe_29f040b => probe_jedec_2aa_reset write_29f040b => write_jedec_2aa write_sector_29f040b => write_sector_jedec_2aa } @en29f002a { # file_not_used } @m29f002 { # 0x555 0xAAA block_based_write do_block erase_m29f002 => erase_chip_block_jedec_aaa rewrite_block => write_block_jedec_aaa write_m29f002t # variable page writing write_m29f002b # same as previous } @m29f400bt { # 0x555 0xAAA block_based_write block_erase_chip_m29f400bt => erase_chip_block_jedec_aaa block_erase_m29f400bt => erase_sector_jedec_aaa erase_m29f400bt => erase_chip_jedec_aaa probe_m29f400bt => probe_jedec_aaa_did_02 write_coreboot_m29f400bt # same as previous write_m29f400bt # variable page writing write_page_m29f400bt } @mx29f002 { # 0x555 0x2AA erase_29f002 => erase_chip_jedec_2aa erase_chip_29f002 => erase_chip_block_jedec_2aa erase_sector_29f002 => erase_sector_jedec_2aa probe_29f002 => probe_jedec_2aa_reset } @pm29f002 { # 0x555 0x2AA write_pm29f002 => write_jedec_1_2aa } @pm49fl00x { # 0x5555 0x2AAA map_flash_registers needs_protects erase_49fl00x => erase_chip_block_jedec_2aaa probe_49fl00x => probe_jedec_2aaa write_49fl00x => write_jedec_2aaa write_lockbits_49fl00x } @sharplhf00l04 { # FWHUB map_flash_registers } @sst28sf040 { # FWHUB } @sst49lf040 { # 0x5555 0x2AAA erase_49lf040 => erase_sector_jedec_2aaa write_49lf040 => write_jedec_2aaa } @sst49lfxxxc { # FWHUB map_flash_registers } @sst_fwhub { # FWHUB map_flash_registers } @stm50flw0x0x { # 0x5555 0x2AAA map_flash_registers erase_block_stm50flw0x0x erase_stm50flw0x0x probe_stm50flw0x0x => probe_jedec_2aaa unlock_block_stm50flw0x0x wait_stm50flw0x0x write_page_stm50flw0x0x write_stm50flw0x0x } @w29ee011 { # 0x5555 0x2AAA has_check_W29EE011 funks_up_AMIC_A49LF040A probe_w29ee011 => probe_jedec_2aaa_60 } @w39v040c { # 0x5555 0x2AAA has_lock_fff2 probe_w39v040c => probe_jedec_2aaa } @w39v080fa { # 0x5555 0x2AAA map_flash_registers erase_sector_winbond_fwhub erase_winbond_fwhub probe_winbond_fwhub => probe_jedec_2aaa unlock_block_winbond_fwhub unlock_winbond_fwhub write_winbond_fwhub } @w49f002u { # 0x5555 0x2AAA write_49f002 => write_jedec_1_2aaa }

1 0

Report on SST SST25VF016B with flashrom v0.9.1-r824
by Water Chen 24 Dec '09

24 Dec '09

Report on SST SST25VF016B with flashrom v0.9.1-r824 Attached please find the flashrom output with the (-V, -rV, -wV, -EV) options. It's OK on Supermicro X7SLM-L / http://www.supermicro.com/products/motherboard/Core2Duo/945/X7SLM-L.cfm

1 0

[Flashrom] [PATCH] Separate Makefile's main OBJS list into Programmer, Chip, Lib, CLI object lists
by Sean Nelson 24 Dec '09

24 Dec '09

This patch shouldn't affect anything else in patchwork. It just splits $(OBJS) in Makefile into separate lists for Programmer, Chip, and CLI related files/objects. This should help later on figuring out where files may go for a libflashrom library. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

2 8

[commit] r824 - trunk
by svn＠flashrom.org 24 Dec '09

24 Dec '09

Author: snelson Date: 2009-12-24 17:54:21 +0100 (Thu, 24 Dec 2009) New Revision: 824 Modified: trunk/Makefile Log: This patch shouldn't affect anything else in patchwork. It just splits $(OBJS) in Makefile into separate lists for Programmer, Chip, and CLI related files/objects. This should help later on figuring out where files may go for a libflashrom library. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-12-24 03:33:11 UTC (rev 823) +++ trunk/Makefile 2009-12-24 16:54:21 UTC (rev 824) @@ -41,12 +41,17 @@ LDFLAGS += -L/usr/local/lib endif -OBJS = jedec.o stm50flw0x0x.o w39v080fa.o sharplhf00l04.o w29ee011.o \ +CHIP_OBJS = jedec.o stm50flw0x0x.o w39v080fa.o sharplhf00l04.o w29ee011.o \ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o w39v040c.o \ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o m29f002.o \ - sst49lfxxxc.o sst_fwhub.o flashchips.o layout.o spi.o \ - flashrom.o print.o udelay.o + sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o +LIB_OBJS = layout.o + +CLI_OBJS = flashrom.o print.o + +PROGRAMMER_OBJS = udelay.o + all: pciutils features dep $(PROGRAM) # Set the flashrom version string from the highest revision number @@ -96,13 +101,13 @@ ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'INTERNAL_SUPPORT=1' -OBJS += chipset_enable.o board_enable.o cbtable.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o +PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o NEED_PCI := yes endif ifeq ($(CONFIG_SERPROG), yes) FEATURE_CFLAGS += -D'SERPROG_SUPPORT=1' -OBJS += serprog.o +PROGRAMMER_OBJS += serprog.o ifeq ($(OS_ARCH), SunOS) LIBS += -lsocket endif @@ -110,24 +115,24 @@ ifeq ($(CONFIG_BITBANG_SPI), yes) FEATURE_CFLAGS += -D'BITBANG_SPI_SUPPORT=1' -OBJS += bitbang_spi.o +PROGRAMMER_OBJS += bitbang_spi.o endif ifeq ($(CONFIG_NIC3COM), yes) FEATURE_CFLAGS += -D'NIC3COM_SUPPORT=1' -OBJS += nic3com.o +PROGRAMMER_OBJS += nic3com.o NEED_PCI := yes endif ifeq ($(CONFIG_GFXNVIDIA), yes) FEATURE_CFLAGS += -D'GFXNVIDIA_SUPPORT=1' -OBJS += gfxnvidia.o +PROGRAMMER_OBJS += gfxnvidia.o NEED_PCI := yes endif ifeq ($(CONFIG_SATASII), yes) FEATURE_CFLAGS += -D'SATASII_SUPPORT=1' -OBJS += satasii.o +PROGRAMMER_OBJS += satasii.o NEED_PCI := yes endif @@ -136,48 +141,55 @@ # This is a totally ugly hack. FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'FT2232_SPI_SUPPORT=1'") FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "$(FTDILIBS)") -OBJS += ft2232_spi.o +PROGRAMMER_OBJS += ft2232_spi.o endif ifeq ($(CONFIG_DUMMY), yes) FEATURE_CFLAGS += -D'DUMMY_SUPPORT=1' -OBJS += dummyflasher.o +PROGRAMMER_OBJS += dummyflasher.o endif ifeq ($(CONFIG_DRKAISER), yes) FEATURE_CFLAGS += -D'DRKAISER_SUPPORT=1' -OBJS += drkaiser.o +PROGRAMMER_OBJS += drkaiser.o NEED_PCI := yes endif ifeq ($(CONFIG_BUSPIRATESPI), yes) FEATURE_CFLAGS += -D'BUSPIRATE_SPI_SUPPORT=1' -OBJS += buspirate_spi.o +PROGRAMMER_OBJS += buspirate_spi.o endif # Ugly, but there's no elif/elseif. ifeq ($(CONFIG_SERPROG), yes) -OBJS += serial.o +LIB_OBJS += serial.o else ifeq ($(CONFIG_BUSPIRATESPI), yes) -OBJS += serial.o +LIB_OBJS += serial.o endif endif ifeq ($(NEED_PCI), yes) LIBS += -lpci FEATURE_CFLAGS += -D'NEED_PCI=1' -OBJS += pcidev.o physmap.o internal.o +PROGRAMMER_OBJS += pcidev.o physmap.o internal.o #FIXME: We need to move stuff + # from internal.c and pcidev.c to pci.c + # internal.c needs to be split + # into internal-programmer-only stuff + # and a support lib for all internal+pci + # based stuff. endif ifeq ($(CONFIG_PRINT_WIKI), yes) FEATURE_CFLAGS += -D'PRINT_WIKI_SUPPORT=1' -OBJS += print_wiki.o +CLI_OBJS += print_wiki.o endif # We could use PULLED_IN_LIBS, but that would be ugly. FEATURE_LIBS += $(shell LC_ALL=C grep -q "NEEDLIBZ := yes" .libdeps && printf "%s" "-lz") +OBJS = $(CHIP_OBJS) $(CLI_OBJS) $(PROGRAMMER_OBJS) $(LIB_OBJS) + $(PROGRAM): $(OBJS) $(CC) $(LDFLAGS) -o $(PROGRAM) $(OBJS) $(FEATURE_LIBS) $(LIBS)

1 0

[PATCH] Don't compile internal code if not selected
by Carl-Daniel Hailfinger 23 Dec '09

23 Dec '09

internal.c was always compiled in because it hosted the function internal_delay(). Move that function to udelay.c and compile internal.c only if really needed. physmap.c is only needed if the programmer is internal or a PCI card. Make its compilation conditional. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-programmer_internal_refactor_delay/flash.h =================================================================== --- flashrom-programmer_internal_refactor_delay/flash.h (Revision 821) +++ flashrom-programmer_internal_refactor_delay/flash.h (Arbeitskopie) @@ -277,6 +277,7 @@ /* udelay.c */ void myusec_delay(int usecs); void myusec_calibrate_delay(void); +void internal_delay(int usecs); #if NEED_PCI == 1 /* pcidev.c */ @@ -365,7 +366,6 @@ uint8_t mmio_readb(void *addr); uint16_t mmio_readw(void *addr); uint32_t mmio_readl(void *addr); -void internal_delay(int usecs); int noop_shutdown(void); void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); void fallback_unmap(void *virt_addr, size_t len); Index: flashrom-programmer_internal_refactor_delay/Makefile =================================================================== --- flashrom-programmer_internal_refactor_delay/Makefile (Revision 821) +++ flashrom-programmer_internal_refactor_delay/Makefile (Arbeitskopie) @@ -47,7 +47,7 @@ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o w39v040c.o \ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o m29f002.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o layout.o spi.o \ - flashrom.o print.o physmap.o internal.o udelay.o + flashrom.o print.o udelay.o all: pciutils features dep $(PROGRAM) @@ -168,7 +168,7 @@ ifeq ($(NEED_PCI), yes) FEATURE_CFLAGS += -D'NEED_PCI=1' -OBJS += pcidev.o +OBJS += pcidev.o physmap.o internal.o endif ifeq ($(CONFIG_PRINT_WIKI), yes) Index: flashrom-programmer_internal_refactor_delay/internal.c =================================================================== --- flashrom-programmer_internal_refactor_delay/internal.c (Revision 821) +++ flashrom-programmer_internal_refactor_delay/internal.c (Arbeitskopie) @@ -248,18 +248,6 @@ return *(volatile uint32_t *) addr; } -void internal_delay(int usecs) -{ - /* If the delay is >1 s, use usleep because timing does not need to - * be so precise. - */ - if (usecs > 1000000) { - usleep(usecs); - } else { - myusec_delay(usecs); - } -} - /* No-op shutdown() for programmers which don't need special handling */ int noop_shutdown(void) { Index: flashrom-programmer_internal_refactor_delay/udelay.c =================================================================== --- flashrom-programmer_internal_refactor_delay/udelay.c (Revision 821) +++ flashrom-programmer_internal_refactor_delay/udelay.c (Arbeitskopie) @@ -63,3 +63,16 @@ (unsigned long)micro, timeusec); printf("OK.\n"); } + +void internal_delay(int usecs) +{ + /* If the delay is >1 s, use usleep because timing does not need to + * be so precise. + */ + if (usecs > 1000000) { + usleep(usecs); + } else { + myusec_delay(usecs); + } +} + -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 3

[PATCH] Only check for requested features in Makefile
by Carl-Daniel Hailfinger 23 Dec '09

23 Dec '09

Only check for requested features in the Makefile. libpci is no longer required to build flashrom and will not be checked for if no PCI code is needed for the selected programmers. libftdi is no longer checked for if FT2232 support is not selected. With this patch, it is possible to build on pretty much every OS out there (including Windows) without altering the Makefile. Some gcc versions may need a CFLAGS override for a warning in dummyflasher.c, though. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-makefile_check_libpci_only_if_needed/Makefile =================================================================== --- flashrom-makefile_check_libpci_only_if_needed/Makefile (Revision 822) +++ flashrom-makefile_check_libpci_only_if_needed/Makefile (Arbeitskopie) @@ -41,8 +41,6 @@ LDFLAGS += -L/usr/local/lib endif -LIBS += -lpci - OBJS = jedec.o stm50flw0x0x.o w39v080fa.o sharplhf00l04.o w29ee011.o \ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o w39v040c.o \ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o m29f002.o \ @@ -167,6 +165,7 @@ endif ifeq ($(NEED_PCI), yes) +LIBS += -lpci FEATURE_CFLAGS += -D'NEED_PCI=1' OBJS += pcidev.o physmap.o internal.o endif @@ -211,6 +210,7 @@ rm -f .test.c .test; exit 1) @rm -f .test.c .test +ifeq ($(NEED_PCI), yes) pciutils: compiler @printf "Checking for libpci headers... " @$(shell ( echo "#include <pci/pci.h>"; \ @@ -226,25 +226,30 @@ @$(shell ( echo "#include <pci/pci.h>"; \ echo "int main(int argc, char **argv)"; \ echo "{ return 0; }"; ) > .test1.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 -lpci $(LIBS) >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; echo; \ echo "Please install libpci (package pciutils)."; \ echo "See README for more information."; echo; \ rm -f .test1.c .test1; exit 1) @printf "Checking if libpci is sufficient... " @printf "" > .libdeps - @$(CC) $(LDFLAGS) .test.o -o .test $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(LDFLAGS) .test.o -o .test -lpci $(LIBS) >/dev/null 2>&1 && \ echo "yes." || ( echo "no."; \ printf "Checking if libz is present and supplies all needed symbols..."; \ - $(CC) $(LDFLAGS) .test.o -o .test $(LIBS) -lz >/dev/null 2>&1 && \ + $(CC) $(LDFLAGS) .test.o -o .test -lpci -lz $(LIBS) >/dev/null 2>&1 && \ ( echo "yes."; echo "NEEDLIBZ := yes" > .libdeps ) || ( echo "no."; echo; \ echo "Please install libz."; \ echo "See README for more information."; echo; \ rm -f .test.c .test.o .test; exit 1) ) @rm -f .test.c .test.o .test .test1.c .test1 +else +pciutils: compiler + @printf "" > .libdeps +endif .features: features +ifeq ($(CONFIG_FT2232SPI), yes) features: compiler @echo "FEATURES := yes" > .features.tmp @printf "Checking for FTDI support... " @@ -257,6 +262,10 @@ ( echo "not found."; echo "FTDISUPPORT := no" >> .features.tmp ) @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features @rm -f .featuretest.c .featuretest +else +features: compiler + @echo "FEATURES := yes" > .features +endif install: $(PROGRAM) mkdir -p $(DESTDIR)$(PREFIX)/sbin -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers."

2 2

[commit] r823 - trunk
by svn＠flashrom.org 23 Dec '09

23 Dec '09

Author: hailfinger Date: 2009-12-24 04:33:11 +0100 (Thu, 24 Dec 2009) New Revision: 823 Modified: trunk/Makefile Log: Only check for requested features in the Makefile. libpci is no longer required to build flashrom and will not be checked for if no PCI code is needed for the selected programmers. libftdi is no longer checked for if FT2232 support is not selected. With this patch, it is possible to build on pretty much every OS out there (including Windows) without altering the Makefile. Some gcc versions may need a CFLAGS override for a warning in dummyflasher.c, though. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-12-24 03:11:55 UTC (rev 822) +++ trunk/Makefile 2009-12-24 03:33:11 UTC (rev 823) @@ -41,8 +41,6 @@ LDFLAGS += -L/usr/local/lib endif -LIBS += -lpci - OBJS = jedec.o stm50flw0x0x.o w39v080fa.o sharplhf00l04.o w29ee011.o \ sst28sf040.o am29f040b.o mx29f002.o m29f400bt.o pm29f002.o w39v040c.o \ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o m29f002.o \ @@ -167,6 +165,7 @@ endif ifeq ($(NEED_PCI), yes) +LIBS += -lpci FEATURE_CFLAGS += -D'NEED_PCI=1' OBJS += pcidev.o physmap.o internal.o endif @@ -211,6 +210,7 @@ rm -f .test.c .test; exit 1) @rm -f .test.c .test +ifeq ($(NEED_PCI), yes) pciutils: compiler @printf "Checking for libpci headers... " @$(shell ( echo "#include <pci/pci.h>"; \ @@ -226,25 +226,30 @@ @$(shell ( echo "#include <pci/pci.h>"; \ echo "int main(int argc, char **argv)"; \ echo "{ return 0; }"; ) > .test1.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(CFLAGS) $(LDFLAGS) .test1.c -o .test1 -lpci $(LIBS) >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; echo; \ echo "Please install libpci (package pciutils)."; \ echo "See README for more information."; echo; \ rm -f .test1.c .test1; exit 1) @printf "Checking if libpci is sufficient... " @printf "" > .libdeps - @$(CC) $(LDFLAGS) .test.o -o .test $(LIBS) >/dev/null 2>&1 && \ + @$(CC) $(LDFLAGS) .test.o -o .test -lpci $(LIBS) >/dev/null 2>&1 && \ echo "yes." || ( echo "no."; \ printf "Checking if libz is present and supplies all needed symbols..."; \ - $(CC) $(LDFLAGS) .test.o -o .test $(LIBS) -lz >/dev/null 2>&1 && \ + $(CC) $(LDFLAGS) .test.o -o .test -lpci -lz $(LIBS) >/dev/null 2>&1 && \ ( echo "yes."; echo "NEEDLIBZ := yes" > .libdeps ) || ( echo "no."; echo; \ echo "Please install libz."; \ echo "See README for more information."; echo; \ rm -f .test.c .test.o .test; exit 1) ) @rm -f .test.c .test.o .test .test1.c .test1 +else +pciutils: compiler + @printf "" > .libdeps +endif .features: features +ifeq ($(CONFIG_FT2232SPI), yes) features: compiler @echo "FEATURES := yes" > .features.tmp @printf "Checking for FTDI support... " @@ -257,6 +262,10 @@ ( echo "not found."; echo "FTDISUPPORT := no" >> .features.tmp ) @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features @rm -f .featuretest.c .featuretest +else +features: compiler + @echo "FEATURES := yes" > .features +endif install: $(PROGRAM) mkdir -p $(DESTDIR)$(PREFIX)/sbin

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flashrom December 2009