flashrom November 2009

flashrom@flashrom.org

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148 discussions

[commit] r763 - trunk
by svn＠flashrom.org 16 Nov '09

16 Nov '09

Author: hailfinger Date: 2009-11-16 15:13:09 +0100 (Mon, 16 Nov 2009) New Revision: 763 Modified: trunk/print_wiki.c Log: Add URLs for boards ASUS K8V, ASUS K8V SE Deluxe, Elitegroup K7S5A. Add a note for ASUS M2N-E. Change "iff" to "if". Most people don't understand what "iff" means and the meaning of both words is close enough to hopefully give users the right idea. Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/print_wiki.c =================================================================== --- trunk/print_wiki.c 2009-11-16 14:05:13 UTC (rev 762) +++ trunk/print_wiki.c 2009-11-16 14:13:09 UTC (rev 763) @@ -115,6 +115,8 @@ { "ASUS", "A8V Deluxe", "http://www.asus.com/product.aspx?P_ID=tvpdgPNCPaABZRVU" }, { "ASUS", "A8V-E Deluxe", "http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=143&l4=0&model=376&model…" }, { "ASUS", "A8V-E SE", "http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=143&l4=0&model=576&model…" }, + { "ASUS", "K8V", "http://www.asus.com/product.aspx?P_ID=fG2KZOWF7v6MRFRm" }, + { "ASUS", "K8V SE Deluxe", "http://www.asus.com/product.aspx?P_ID=65HeDI8XM1u6Uy6o" }, { "ASUS", "M2A-MX", "http://www.asus.com/products.aspx?l1=3&l2=101&l3=583&l4=0&model=1909&modelm…" }, { "ASUS", "M2A-VM", "http://www.asus.com.tw/products.aspx?l1=3&l2=101&l3=496&l4=0&model=1568&mod…" }, { "ASUS", "M2N-E", "http://www.asus.com/products.aspx?l1=3&l2=101&l3=308&l4=0&model=1181&modelm…" }, @@ -131,6 +133,7 @@ { "ASUS", "P6T Deluxe V2", "http://www.asus.com/product.aspx?P_ID=iRlP8RG9han6saZx" }, { "A-Trend", "ATC-6220", "http://www.motherboard.cz/mb/atrend/atc6220.htm" }, { "BCOM", "WinNET100", "http://www.coreboot.org/BCOM_WINNET100" }, + { "Elitegroup", "K7S5A", "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&…" }, { "Elitegroup", "P6VAP-A+", "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&…" }, { "GIGABYTE", "GA-6BXC", "http://www.gigabyte.com.tw/Products/Motherboard/Products_Spec.aspx?ClassVal…" }, { "GIGABYTE", "GA-6BXDU", "http://www.gigabyte.com.tw/Products/Motherboard/Products_Spec.aspx?ProductI…" }, @@ -282,7 +285,8 @@ { "ASUS", "A8V-E SE", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html." }, { "ASUS", "M2A-VM", "See http://www.coreboot.org/pipermail/coreboot/2007-September/025281.html." }, { "BCOM", "WinNET100", "Used in the IGEL-316 thin client." }, - { "GIGABYTE", "GA-7ZM", "Works fine iff you remove jumper JP9 on the board and disable the flash protection BIOS option." }, + { "GIGABYTE", "GA-7ZM", "Works fine if you remove jumper JP9 on the board and disable the flash protection BIOS option." }, + { "ASUS", "M2N-E", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html" }, /* Verified working boards that DO need write-enables. */ { "Acer", "Aspire One", "See http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html." },

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[commit] r762 - trunk
by svn＠flashrom.org 16 Nov '09

16 Nov '09

Author: hailfinger Date: 2009-11-16 15:05:13 +0100 (Mon, 16 Nov 2009) New Revision: 762 Modified: trunk/Makefile Log: Retrieve the proper linker flags for libftdi via pkg-config and fall back if pkg-config isn't available or if it doesn't know libftdi. Fix $LIBS and $FEATURE_LIBS to honor dependency order. The original patch is from J?\195?\182rg, it has been updated by Carl-Daniel to work on the current tree and to have a fallback in case pkg-config is not available or not working. Signed-off-by: J?\195?\182rg Mayer <jmayer(a)loplof.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: J?\195?\182rg Mayer <jmayer(a)loplof.de> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-11-15 17:23:59 UTC (rev 761) +++ trunk/Makefile 2009-11-16 14:05:13 UTC (rev 762) @@ -120,10 +120,11 @@ OBJS += satasii.o endif +FTDILIBS := $(shell pkg-config --libs libftdi 2>/dev/null || printf "%s" "-lftdi -lusb") ifeq ($(CONFIG_FT2232SPI), yes) # This is a totally ugly hack. FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'FT2232_SPI_SUPPORT=1'") -FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-lftdi") +FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "$(FTDILIBS)") OBJS += ft2232_spi.o endif @@ -146,7 +147,7 @@ FEATURE_LIBS += $(shell LC_ALL=C grep -q "NEEDLIBZ := yes" .libdeps && printf "%s" "-lz") $(PROGRAM): $(OBJS) - $(CC) $(LDFLAGS) -o $(PROGRAM) $(OBJS) $(LIBS) $(FEATURE_LIBS) + $(CC) $(LDFLAGS) -o $(PROGRAM) $(OBJS) $(FEATURE_LIBS) $(LIBS) # TAROPTIONS reduces information leakage from the packager's system. # If other tar programs support command line arguments for setting uid/gid of @@ -218,7 +219,7 @@ echo "struct ftdi_context *ftdic = NULL;"; \ echo "int main(int argc, char **argv)"; \ echo "{ return ftdi_init(ftdic); }"; ) > .featuretest.c ) - @$(CC) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest $(LIBS) -lftdi >/dev/null 2>&1 && \ + @$(CC) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest $(FTDILIBS) $(LIBS) >/dev/null 2>&1 && \ ( echo "found."; echo "FTDISUPPORT := yes" >> .features.tmp ) || \ ( echo "not found."; echo "FTDISUPPORT := no" >> .features.tmp ) @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features

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Fix feature detection when fdti requires libusb for linking
by Joerg Mayer 16 Nov '09

16 Nov '09

see attached patch. patch is too small to be copyrightable... ciao Joerg -- Joerg Mayer <jmayer(a)loplof.de> We are stuck with technology when what we really want is just stuff that works. Some say that should read Microsoft instead of technology.

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[commit] r761 - trunk
by svn＠flashrom.org 15 Nov '09

15 Nov '09

Author: hailfinger Date: 2009-11-15 18:23:59 +0100 (Sun, 15 Nov 2009) New Revision: 761 Modified: trunk/ Log: svn:ignore .libdeps Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Property changes on: trunk ___________________________________________________________________ Modified: svn:ignore - flashrom .features .dependencies + flashrom .features .dependencies .libdeps

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[commit] r760 - trunk
by svn＠flashrom.org 15 Nov '09

15 Nov '09

Author: hailfinger Date: 2009-11-15 18:20:21 +0100 (Sun, 15 Nov 2009) New Revision: 760 Modified: trunk/chipset_enable.c trunk/print.c Log: Mark Elitegroup K7S5A as supported. Mark SiS 735 as supported. Remove "SiS" from the model number to avoid printing it twice. Reported by Adrian Glaubitz. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-11-15 17:13:29 UTC (rev 759) +++ trunk/chipset_enable.c 2009-11-15 17:20:21 UTC (rev 760) @@ -1155,34 +1155,34 @@ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp55}, - {0x1039, 0x0496, NT, "SiS", "SiS 85C496+497", enable_flash_sis85c496}, - {0x1039, 0x0406, NT, "SiS", "SiS 501/5101/5501", enable_flash_sis501}, - {0x1039, 0x5511, NT, "SiS", "SiS 5511", enable_flash_sis5511}, - {0x1039, 0x5596, NT, "SiS", "SiS 5596", enable_flash_sis5596}, - {0x1039, 0x5571, NT, "SiS", "SiS 5571", enable_flash_sis530}, - {0x1039, 0x5591, NT, "SiS", "SiS 5591/5592", enable_flash_sis530}, - {0x1039, 0x5597, NT, "SiS", "SiS 5597/5598/5581/5120", enable_flash_sis530}, - {0x1039, 0x0530, NT, "SiS", "SiS 530", enable_flash_sis530}, - {0x1039, 0x5600, NT, "SiS", "SiS 600", enable_flash_sis530}, - {0x1039, 0x0620, NT, "SiS", "SiS 620", enable_flash_sis530}, - {0x1039, 0x0540, NT, "SiS", "SiS 540", enable_flash_sis540}, - {0x1039, 0x0630, NT, "SiS", "SiS 630", enable_flash_sis630}, - {0x1039, 0x0635, NT, "SiS", "SiS 635", enable_flash_sis630}, - {0x1039, 0x0640, NT, "SiS", "SiS 640", enable_flash_sis630}, - {0x1039, 0x0645, NT, "SiS", "SiS 645", enable_flash_sis630}, - {0x1039, 0x0646, NT, "SiS", "SiS 645DX", enable_flash_sis630}, - {0x1039, 0x0648, NT, "SiS", "SiS 648", enable_flash_sis630}, - {0x1039, 0x0650, NT, "SiS", "SiS 650", enable_flash_sis630}, - {0x1039, 0x0651, NT, "SiS", "SiS 651", enable_flash_sis630}, - {0x1039, 0x0655, NT, "SiS", "SiS 655", enable_flash_sis630}, - {0x1039, 0x0730, NT, "SiS", "SiS 730", enable_flash_sis630}, - {0x1039, 0x0733, NT, "SiS", "SiS 733", enable_flash_sis630}, - {0x1039, 0x0735, NT, "SiS", "SiS 735", enable_flash_sis630}, - {0x1039, 0x0740, NT, "SiS", "SiS 740", enable_flash_sis630}, - {0x1039, 0x0745, NT, "SiS", "SiS 745", enable_flash_sis630}, - {0x1039, 0x0746, NT, "SiS", "SiS 746", enable_flash_sis630}, - {0x1039, 0x0748, NT, "SiS", "SiS 748", enable_flash_sis630}, - {0x1039, 0x0755, NT, "SiS", "SiS 755", enable_flash_sis630}, + {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, + {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, + {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, + {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5596}, + {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, + {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, + {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, + {0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530}, + {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, + {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, + {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, + {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis630}, + {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis630}, + {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis630}, + {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis630}, + {0x1039, 0x0646, NT, "SiS", "645DX", enable_flash_sis630}, + {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis630}, + {0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis630}, + {0x1039, 0x0651, NT, "SiS", "651", enable_flash_sis630}, + {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis630}, + {0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis630}, + {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis630}, + {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis630}, + {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis630}, + {0x1039, 0x0745, NT, "SiS", "745", enable_flash_sis630}, + {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis630}, + {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis630}, + {0x1039, 0x0755, NT, "SiS", "755", enable_flash_sis630}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x}, Modified: trunk/print.c =================================================================== --- trunk/print.c 2009-11-15 17:13:29 UTC (rev 759) +++ trunk/print.c 2009-11-15 17:20:21 UTC (rev 760) @@ -260,6 +260,7 @@ { "ASUS", "P6T Deluxe V2", }, { "A-Trend", "ATC-6220", }, { "BCOM", "WinNET100", }, + { "Elitegroup", "K7S5A", }, { "Elitegroup", "P6VAP-A+", }, { "GIGABYTE", "GA-6BXC", }, { "GIGABYTE", "GA-6BXDU", },

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[commit] r759 - trunk
by svn＠flashrom.org 15 Nov '09

15 Nov '09

Author: hailfinger Date: 2009-11-15 18:13:29 +0100 (Sun, 15 Nov 2009) New Revision: 759 Modified: trunk/chipset_enable.c trunk/flash.h trunk/internal.c Log: Add support for every single SiS chipset out there. The two existing SiS chipset enables (compared to the 28 in this patch) were refactored, and one of them was fixed. A function to match PCI vendor/class combinations was added to generic code. Tested on the "Elitegroup K7S5A". Results are somewhat unexpected (some PCI settings seem to be inaccessible, but it still works). This is not based on any docs, but rather on detailed analysis of existing opensource code for some of the chipsets. Thanks to for Adrian Glaubitz testing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Adrian Glaubitz <glaubitz(a)physik.fu-berlin.de> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-11-14 03:58:58 UTC (rev 758) +++ trunk/chipset_enable.c 2009-11-15 17:13:29 UTC (rev 759) @@ -70,54 +70,193 @@ return 0; } +static int enable_flash_sis85c496(struct pci_dev *dev, const char *name) +{ + uint8_t tmp; + + tmp = pci_read_byte(dev, 0xd0); + tmp |= 0xf8; + pci_write_byte(dev, 0xd0, tmp); + + return 0; +} + +static int enable_flash_sis_mapping(struct pci_dev *dev, const char *name) +{ + uint8_t new, newer; + + /* Extended BIOS enable = 1, Lower BIOS Enable = 1 */ + /* This is 0xFFF8000~0xFFFF0000 decoding on SiS 540/630. */ + new = pci_read_byte(dev, 0x40); + new &= (~0x04); /* No idea why we clear bit 2. */ + new |= 0xb; /* 0x3 for some chipsets, bit 7 seems to be don't care. */ + pci_write_byte(dev, 0x40, new); + newer = pci_read_byte(dev, 0x40); + if (newer != new) { + printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name); + printf_debug("Stuck at 0x%x\n", newer); + return -1; + } + return 0; +} + +static struct pci_dev *find_southbridge(uint16_t vendor, const char *name) +{ + struct pci_dev *sbdev; + + sbdev = pci_dev_find_vendorclass(vendor, 0x0601); + if (!sbdev) + sbdev = pci_dev_find_vendorclass(vendor, 0x0680); + if (!sbdev) + sbdev = pci_dev_find_vendorclass(vendor, 0x0000); + if (!sbdev) + fprintf(stderr, "No southbridge found for %s!\n", name); + if (sbdev) + printf_debug("Found southbridge %04x:%04x at %02x:%02x:%01x\n", + sbdev->vendor_id, sbdev->device_id, + sbdev->bus, sbdev->dev, sbdev->func); + return sbdev; +} + +static int enable_flash_sis501(struct pci_dev *dev, const char *name) +{ + uint8_t tmp; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + tmp = sio_read(0x22, 0x80); + tmp &= (~0x20); + tmp |= 0x4; + sio_write(0x22, 0x80, tmp); + + tmp = sio_read(0x22, 0x70); + tmp &= (~0x20); + tmp |= 0x4; + sio_write(0x22, 0x70, tmp); + + return ret; +} + +static int enable_flash_sis5511(struct pci_dev *dev, const char *name) +{ + uint8_t tmp; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + tmp = sio_read(0x22, 0x50); + tmp &= (~0x20); + tmp |= 0x4; + sio_write(0x22, 0x50, tmp); + + return ret; +} + +static int enable_flash_sis5596(struct pci_dev *dev, const char *name) +{ + int ret; + + ret = enable_flash_sis5511(dev, name); + + /* FIXME: Needs same superio handling as enable_flash_sis630 */ + return ret; +} + +static int enable_flash_sis530(struct pci_dev *dev, const char *name) +{ + uint8_t new, newer; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + new = pci_read_byte(sbdev, 0x45); + new &= (~0x20); + new |= 0x4; + pci_write_byte(sbdev, 0x45, new); + newer = pci_read_byte(dev, 0x45); + if (newer != new) { + printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); + printf_debug("Stuck at 0x%x\n", newer); + ret = -1; + } + + return ret; +} + +static int enable_flash_sis540(struct pci_dev *dev, const char *name) +{ + uint8_t new, newer; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + new = pci_read_byte(sbdev, 0x45); + new &= (~0x80); + new |= 0x40; + pci_write_byte(sbdev, 0x45, new); + newer = pci_read_byte(dev, 0x45); + if (newer != new) { + printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); + printf_debug("Stuck at 0x%x\n", newer); + ret = -1; + } + + return ret; +} + static int enable_flash_sis630(struct pci_dev *dev, const char *name) { - uint8_t b; + uint8_t tmp; + uint16_t siobase; + int ret; - /* Enable 0xFFF8000~0xFFFF0000 decoding on SiS 540/630. */ - b = pci_read_byte(dev, 0x40); - pci_write_byte(dev, 0x40, b | 0xb); + ret = enable_flash_sis540(dev, name); - /* Flash write enable on SiS 540/630. */ - b = pci_read_byte(dev, 0x45); - pci_write_byte(dev, 0x45, b | 0x40); - /* The same thing on SiS 950 Super I/O side... */ /* First probe for Super I/O on config port 0x2e. */ - OUTB(0x87, 0x2e); - OUTB(0x01, 0x2e); - OUTB(0x55, 0x2e); - OUTB(0x55, 0x2e); + siobase = 0x2e; + enter_conf_mode_ite(siobase); - if (INB(0x2f) != 0x87) { + if (INB(siobase + 1) != 0x87) { /* If that failed, try config port 0x4e. */ - OUTB(0x87, 0x4e); - OUTB(0x01, 0x4e); - OUTB(0x55, 0x4e); - OUTB(0xaa, 0x4e); - if (INB(0x4f) != 0x87) { - printf("Can not access SiS 950\n"); + siobase = 0x4e; + enter_conf_mode_ite(siobase); + if (INB(siobase + 1) != 0x87) { + printf("Can not find SuperI/O.\n"); return -1; } - OUTB(0x24, 0x4e); - b = INB(0x4f) | 0xfc; - OUTB(0x24, 0x4e); - OUTB(b, 0x4f); - OUTB(0x02, 0x4e); - OUTB(0x02, 0x4f); } - OUTB(0x24, 0x2e); - printf_debug("2f is %#x\n", INB(0x2f)); - b = INB(0x2f) | 0xfc; - OUTB(0x24, 0x2e); - OUTB(b, 0x2f); + /* Enable flash mapping. Works for most old ITE style SuperI/O. */ + tmp = sio_read(siobase, 0x24); + tmp |= 0xfc; + sio_write(siobase, 0x24, tmp); - OUTB(0x02, 0x2e); - OUTB(0x02, 0x2f); + exit_conf_mode_ite(siobase); - return 0; + return ret; } /* Datasheet: @@ -603,38 +742,6 @@ return 0; } -static int enable_flash_sis5595(struct pci_dev *dev, const char *name) -{ - uint8_t new, newer; - - new = pci_read_byte(dev, 0x45); - - new &= (~0x20); /* Clear bit 5. */ - new |= 0x4; /* Set bit 2. */ - - pci_write_byte(dev, 0x45, new); - - newer = pci_read_byte(dev, 0x45); - if (newer != new) { - printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); - printf_debug("Stuck at 0x%x\n", newer); - return -1; - } - - /* Extended BIOS enable = 1, Lower BIOS Enable = 1 */ - new = pci_read_byte(dev, 0x40); - new &= 0xFB; - new |= 0x3; - pci_write_byte(dev, 0x40, new); - newer = pci_read_byte(dev, 0x40); - if (newer != new) { - printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name); - printf_debug("Stuck at 0x%x\n", newer); - return -1; - } - return 0; -} - /* Works for AMD-8111, VIA VT82C586A/B, VIA VT82C686A/B. */ static int enable_flash_amd8111(struct pci_dev *dev, const char *name) { @@ -1048,8 +1155,34 @@ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp55}, - {0x1039, 0x0008, OK, "SiS", "SiS5595", enable_flash_sis5595}, - {0x1039, 0x0630, NT, "SiS", "SiS630", enable_flash_sis630}, + {0x1039, 0x0496, NT, "SiS", "SiS 85C496+497", enable_flash_sis85c496}, + {0x1039, 0x0406, NT, "SiS", "SiS 501/5101/5501", enable_flash_sis501}, + {0x1039, 0x5511, NT, "SiS", "SiS 5511", enable_flash_sis5511}, + {0x1039, 0x5596, NT, "SiS", "SiS 5596", enable_flash_sis5596}, + {0x1039, 0x5571, NT, "SiS", "SiS 5571", enable_flash_sis530}, + {0x1039, 0x5591, NT, "SiS", "SiS 5591/5592", enable_flash_sis530}, + {0x1039, 0x5597, NT, "SiS", "SiS 5597/5598/5581/5120", enable_flash_sis530}, + {0x1039, 0x0530, NT, "SiS", "SiS 530", enable_flash_sis530}, + {0x1039, 0x5600, NT, "SiS", "SiS 600", enable_flash_sis530}, + {0x1039, 0x0620, NT, "SiS", "SiS 620", enable_flash_sis530}, + {0x1039, 0x0540, NT, "SiS", "SiS 540", enable_flash_sis540}, + {0x1039, 0x0630, NT, "SiS", "SiS 630", enable_flash_sis630}, + {0x1039, 0x0635, NT, "SiS", "SiS 635", enable_flash_sis630}, + {0x1039, 0x0640, NT, "SiS", "SiS 640", enable_flash_sis630}, + {0x1039, 0x0645, NT, "SiS", "SiS 645", enable_flash_sis630}, + {0x1039, 0x0646, NT, "SiS", "SiS 645DX", enable_flash_sis630}, + {0x1039, 0x0648, NT, "SiS", "SiS 648", enable_flash_sis630}, + {0x1039, 0x0650, NT, "SiS", "SiS 650", enable_flash_sis630}, + {0x1039, 0x0651, NT, "SiS", "SiS 651", enable_flash_sis630}, + {0x1039, 0x0655, NT, "SiS", "SiS 655", enable_flash_sis630}, + {0x1039, 0x0730, NT, "SiS", "SiS 730", enable_flash_sis630}, + {0x1039, 0x0733, NT, "SiS", "SiS 733", enable_flash_sis630}, + {0x1039, 0x0735, NT, "SiS", "SiS 735", enable_flash_sis630}, + {0x1039, 0x0740, NT, "SiS", "SiS 740", enable_flash_sis630}, + {0x1039, 0x0745, NT, "SiS", "SiS 745", enable_flash_sis630}, + {0x1039, 0x0746, NT, "SiS", "SiS 746", enable_flash_sis630}, + {0x1039, 0x0748, NT, "SiS", "SiS 748", enable_flash_sis630}, + {0x1039, 0x0755, NT, "SiS", "SiS 755", enable_flash_sis630}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x}, Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-11-14 03:58:58 UTC (rev 758) +++ trunk/flash.h 2009-11-15 17:13:29 UTC (rev 759) @@ -389,6 +389,7 @@ /* internal.c */ struct pci_dev *pci_dev_find_filter(struct pci_filter filter); +struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class); struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, uint16_t card_vendor, uint16_t card_device); Modified: trunk/internal.c =================================================================== --- trunk/internal.c 2009-11-14 03:58:58 UTC (rev 758) +++ trunk/internal.c 2009-11-15 17:13:29 UTC (rev 759) @@ -42,6 +42,26 @@ return NULL; } +struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class) +{ + struct pci_dev *temp; + struct pci_filter filter; + uint16_t tmp2; + + pci_filter_init(NULL, &filter); + filter.vendor = vendor; + + for (temp = pacc->devices; temp; temp = temp->next) + if (pci_filter_match(&filter, temp)) { + /* Read PCI class */ + tmp2 = pci_read_word(temp, 0x0a); + if (tmp2 == class) + return temp; + } + + return NULL; +} + struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device) { struct pci_dev *temp;

1 0

[PATCH] Add support for every single SiS chipset out there
by Carl-Daniel Hailfinger 15 Nov '09

15 Nov '09

Add support for every single SiS chipset out there. The two existing SiS chipset enables (compared to the 28 in this patch) were refactored, and one of them was fixed. A function to match PCI vendor/class combinations was added to generic code. Untested. This is not based on any docs, but rather on detailed analysis of existing opensource code for some of the chipsets. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-sis_all/flash.h =================================================================== --- flashrom-sis_all/flash.h (Revision 758) +++ flashrom-sis_all/flash.h (Arbeitskopie) @@ -389,6 +389,7 @@ /* internal.c */ struct pci_dev *pci_dev_find_filter(struct pci_filter filter); +struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class); struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, uint16_t card_vendor, uint16_t card_device); Index: flashrom-sis_all/chipset_enable.c =================================================================== --- flashrom-sis_all/chipset_enable.c (Revision 758) +++ flashrom-sis_all/chipset_enable.c (Arbeitskopie) @@ -70,54 +70,190 @@ return 0; } +static int enable_flash_sis85c496(struct pci_dev *dev, const char *name) +{ + uint8_t tmp; + + tmp = pci_read_byte(dev, 0xd0); + tmp |= 0xf8; + pci_write_byte(dev, 0xd0, tmp); + + return 0; +} + +static int enable_flash_sis_mapping(struct pci_dev *dev, const char *name) +{ + uint8_t new, newer; + + /* Extended BIOS enable = 1, Lower BIOS Enable = 1 */ + /* This is 0xFFF8000~0xFFFF0000 decoding on SiS 540/630. */ + new = pci_read_byte(dev, 0x40); + new &= (~0x04); /* No idea why we clear bit 2. */ + new |= 0xb; /* 0x3 for some chipsets, bit 7 seems to be don't care. */ + pci_write_byte(dev, 0x40, new); + newer = pci_read_byte(dev, 0x40); + if (newer != new) { + printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name); + printf_debug("Stuck at 0x%x\n", newer); + return -1; + } + return 0; +} + +static struct pci_dev *find_southbridge(uint16_t vendor, const char *name) +{ + struct pci_dev *sbdev; + + sbdev = pci_dev_find_vendorclass(vendor, 0x0601); + if (!sbdev) + sbdev = pci_dev_find_vendorclass(vendor, 0x0680); + if (!sbdev) + sbdev = pci_dev_find_vendorclass(vendor, 0x0000); + if (!sbdev) + fprintf(stderr, "No southbridge found for %s!\n", name); + + return sbdev; +} + +static int enable_flash_sis501(struct pci_dev *dev, const char *name) +{ + uint8_t tmp; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + tmp = sio_read(0x22, 0x80); + tmp &= (~0x20); + tmp |= 0x4; + sio_write(0x22, 0x80, tmp); + + tmp = sio_read(0x22, 0x70); + tmp &= (~0x20); + tmp |= 0x4; + sio_write(0x22, 0x70, tmp); + + return ret; +} + +static int enable_flash_sis5511(struct pci_dev *dev, const char *name) +{ + uint8_t tmp; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + tmp = sio_read(0x22, 0x50); + tmp &= (~0x20); + tmp |= 0x4; + sio_write(0x22, 0x50, tmp); + + return ret; +} + +static int enable_flash_sis5596(struct pci_dev *dev, const char *name) +{ + int ret; + + ret = enable_flash_sis5511(dev, name); + + /* FIXME: Needs same superio handling as enable_flash_sis630 */ + return ret; +} + +static int enable_flash_sis530(struct pci_dev *dev, const char *name) +{ + uint8_t new, newer; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + new = pci_read_byte(sbdev, 0x45); + new &= (~0x20); + new |= 0x4; + pci_write_byte(sbdev, 0x45, new); + newer = pci_read_byte(dev, 0x45); + if (newer != new) { + printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); + printf_debug("Stuck at 0x%x\n", newer); + ret = -1; + } + + return ret; +} + +static int enable_flash_sis540(struct pci_dev *dev, const char *name) +{ + uint8_t new, newer; + int ret = 0; + struct pci_dev *sbdev; + + sbdev = find_southbridge(dev->vendor_id, name); + if (!sbdev) + return -1; + + ret = enable_flash_sis_mapping(sbdev, name); + + new = pci_read_byte(sbdev, 0x45); + new &= (~0x80); + new |= 0x40; + pci_write_byte(sbdev, 0x45, new); + newer = pci_read_byte(dev, 0x45); + if (newer != new) { + printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); + printf_debug("Stuck at 0x%x\n", newer); + ret = -1; + } + + return ret; +} + static int enable_flash_sis630(struct pci_dev *dev, const char *name) { - uint8_t b; + uint8_t tmp; + uint16_t siobase; + int ret; - /* Enable 0xFFF8000~0xFFFF0000 decoding on SiS 540/630. */ - b = pci_read_byte(dev, 0x40); - pci_write_byte(dev, 0x40, b | 0xb); + ret = enable_flash_sis540(dev, name); - /* Flash write enable on SiS 540/630. */ - b = pci_read_byte(dev, 0x45); - pci_write_byte(dev, 0x45, b | 0x40); - /* The same thing on SiS 950 Super I/O side... */ /* First probe for Super I/O on config port 0x2e. */ - OUTB(0x87, 0x2e); - OUTB(0x01, 0x2e); - OUTB(0x55, 0x2e); - OUTB(0x55, 0x2e); + siobase = 0x2e; + enter_conf_mode_ite(siobase); - if (INB(0x2f) != 0x87) { + if (INB(siobase + 1) != 0x87) { /* If that failed, try config port 0x4e. */ - OUTB(0x87, 0x4e); - OUTB(0x01, 0x4e); - OUTB(0x55, 0x4e); - OUTB(0xaa, 0x4e); - if (INB(0x4f) != 0x87) { - printf("Can not access SiS 950\n"); + siobase = 0x4e; + enter_conf_mode_ite(siobase); + if (INB(siobase + 1) != 0x87) { + printf("Can not find SuperI/O.\n"); return -1; } - OUTB(0x24, 0x4e); - b = INB(0x4f) | 0xfc; - OUTB(0x24, 0x4e); - OUTB(b, 0x4f); - OUTB(0x02, 0x4e); - OUTB(0x02, 0x4f); } - OUTB(0x24, 0x2e); - printf_debug("2f is %#x\n", INB(0x2f)); - b = INB(0x2f) | 0xfc; - OUTB(0x24, 0x2e); - OUTB(b, 0x2f); + /* Enable flash mapping. Works for most old ITE style SuperI/O. */ + tmp = sio_read(siobase, 0x24); + tmp |= 0xfc; + sio_write(siobase, 0x24, tmp); - OUTB(0x02, 0x2e); - OUTB(0x02, 0x2f); + exit_conf_mode_ite(siobase); - return 0; + return ret; } /* Datasheet: @@ -603,38 +739,6 @@ return 0; } -static int enable_flash_sis5595(struct pci_dev *dev, const char *name) -{ - uint8_t new, newer; - - new = pci_read_byte(dev, 0x45); - - new &= (~0x20); /* Clear bit 5. */ - new |= 0x4; /* Set bit 2. */ - - pci_write_byte(dev, 0x45, new); - - newer = pci_read_byte(dev, 0x45); - if (newer != new) { - printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name); - printf_debug("Stuck at 0x%x\n", newer); - return -1; - } - - /* Extended BIOS enable = 1, Lower BIOS Enable = 1 */ - new = pci_read_byte(dev, 0x40); - new &= 0xFB; - new |= 0x3; - pci_write_byte(dev, 0x40, new); - newer = pci_read_byte(dev, 0x40); - if (newer != new) { - printf_debug("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name); - printf_debug("Stuck at 0x%x\n", newer); - return -1; - } - return 0; -} - /* Works for AMD-8111, VIA VT82C586A/B, VIA VT82C686A/B. */ static int enable_flash_amd8111(struct pci_dev *dev, const char *name) { @@ -1048,8 +1152,34 @@ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp55}, - {0x1039, 0x0008, OK, "SiS", "SiS5595", enable_flash_sis5595}, - {0x1039, 0x0630, NT, "SiS", "SiS630", enable_flash_sis630}, + {0x1039, 0x0496, NT, "SiS", "SiS 85C496+497", enable_flash_sis85c496}, + {0x1039, 0x0406, NT, "SiS", "SiS 501/5101/5501", enable_flash_sis501}, + {0x1039, 0x5511, NT, "SiS", "SiS 5511", enable_flash_sis5511}, + {0x1039, 0x5596, NT, "SiS", "SiS 5596", enable_flash_sis5596}, + {0x1039, 0x5571, NT, "SiS", "SiS 5571", enable_flash_sis530}, + {0x1039, 0x5591, NT, "SiS", "SiS 5591/5592", enable_flash_sis530}, + {0x1039, 0x5597, NT, "SiS", "SiS 5597/5598/5581/5120", enable_flash_sis530}, + {0x1039, 0x0530, NT, "SiS", "SiS 530", enable_flash_sis530}, + {0x1039, 0x5600, NT, "SiS", "SiS 600", enable_flash_sis530}, + {0x1039, 0x0620, NT, "SiS", "SiS 620", enable_flash_sis530}, + {0x1039, 0x0540, NT, "SiS", "SiS 540", enable_flash_sis540}, + {0x1039, 0x0630, NT, "SiS", "SiS 630", enable_flash_sis630}, + {0x1039, 0x0635, NT, "SiS", "SiS 635", enable_flash_sis630}, + {0x1039, 0x0640, NT, "SiS", "SiS 640", enable_flash_sis630}, + {0x1039, 0x0645, NT, "SiS", "SiS 645", enable_flash_sis630}, + {0x1039, 0x0646, NT, "SiS", "SiS 645DX", enable_flash_sis630}, + {0x1039, 0x0648, NT, "SiS", "SiS 648", enable_flash_sis630}, + {0x1039, 0x0650, NT, "SiS", "SiS 650", enable_flash_sis630}, + {0x1039, 0x0651, NT, "SiS", "SiS 651", enable_flash_sis630}, + {0x1039, 0x0655, NT, "SiS", "SiS 655", enable_flash_sis630}, + {0x1039, 0x0730, NT, "SiS", "SiS 730", enable_flash_sis630}, + {0x1039, 0x0733, NT, "SiS", "SiS 733", enable_flash_sis630}, + {0x1039, 0x0735, NT, "SiS", "SiS 735", enable_flash_sis630}, + {0x1039, 0x0740, NT, "SiS", "SiS 740", enable_flash_sis630}, + {0x1039, 0x0745, NT, "SiS", "SiS 745", enable_flash_sis630}, + {0x1039, 0x0746, NT, "SiS", "SiS 746", enable_flash_sis630}, + {0x1039, 0x0748, NT, "SiS", "SiS 748", enable_flash_sis630}, + {0x1039, 0x0755, NT, "SiS", "SiS 755", enable_flash_sis630}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x}, Index: flashrom-sis_all/internal.c =================================================================== --- flashrom-sis_all/internal.c (Revision 758) +++ flashrom-sis_all/internal.c (Arbeitskopie) @@ -42,6 +42,26 @@ return NULL; } +struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class) +{ + struct pci_dev *temp; + struct pci_filter filter; + uint16_t tmp2; + + pci_filter_init(NULL, &filter); + filter.vendor = vendor; + + for (temp = pacc->devices; temp; temp = temp->next) + if (pci_filter_match(&filter, temp)) { + /* Read PCI class */ + tmp2 = pci_read_word(temp, 0x0a); + if (tmp2 == class) + return temp; + } + + return NULL; +} + struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device) { struct pci_dev *temp; -- Developer quote of the week: "We are juggling too many chainsaws and flaming arrows and tigers."

2 6

Output of flashrom -V on several boards
by Adrian Glaubitz 15 Nov '09

15 Nov '09

Hello, I've played around with flashrom on several different machines in my university. I haven't flashed yet any of the boards. However, there are alot of boards where flashrom detects the chip but it's not listed on the webpage. I will try flashing these boards within the next weeks once I have more time (it's not the flashing that takes so much time but the recovery of the machine in case the flash failed :)). AsRock Conroe945G: http://pastebin.org/53578 - Chip detected: "Winbond W39V040B" (512 KB, LPC) AsRock K7S8X: http://pastebin.org/53576 - NO Chip detected AsRock K8Upgrade: http://pastebin.org/53574 - Chip detected: "PMC Pm49FL002" (256 KB, LPC,FWH) ASUS K8V-XSE: http://pastebin.org/53579 - Chip detected: "PMC Pm49FL004" (512 KB, LPC,FWH) ASUS P4P-X: http://pastebin.org/53573 - Chip detected: "PMC Pm49FL002" (256 KB, LPC,FWH) ASUS P4T-E: http://pastebin.org/53572 - Chip detected: "SST SST49LF002A/B" (256 KB, FWH) ASUS P5B: http://pastebin.org/53580 - Chip detected: "SST SST25VF080B" (1024 KB, SPI) Elitegroup K7S5A: http://pastebin.org/53571 - NO Chip detected Supermicro H8DAR-T: http://pastebin.org/53583 - Chip detected: "SST SST49LF004A/B" (512 KB, FWH) Supermicro H8DA8: http://pastebin.org/53585 - Chip detected: "SST SST49LF004A/B" (512 KB, FWH) Looking forward to provide more reports, then *with* actual flashing of the boards. Adrian

2 2

Sucessfully used Flashrom with Asus M2V mainboard.
by Johannes Sjölund 14 Nov '09

14 Nov '09

Hi, I wanted to update the proprietary firmware on an Asus M2V mainboard from version 1603 to 2101. Having no floppy drive or Windows OS I browsed for the easiest way to do it on Linux and found Flashrom. I read the wiki page and found out the mainboard was supported. After downloading a package from the Asus website containing the firmware I checked with people on the IRC channel to get confirmation the filesize was correct. It was, so I charged ahead and wrote the new firmware to the chip, verified it against the file and rebooted. It worked prefectly! After that I was told that I should have read out what I had written on the chip and compared the md5sum with the downloaded firmware file. It seems I was a little reckless, but it ended well. Thank you for your good work on Flashrom!

2 1

[commit] r758 - trunk
by svn＠flashrom.org 14 Nov '09

14 Nov '09

Author: hailfinger Date: 2009-11-14 04:58:58 +0100 (Sat, 14 Nov 2009) New Revision: 758 Modified: trunk/print.c Log: Mark "Asus K8V" as supported. Reported by martin f krafft <madduck(a)madduck.net> Mark "Asus K8V SE Deluxe" as supported. Reported by Luke Dashjr <luke_coreboot(a)dashjr.org> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/print.c =================================================================== --- trunk/print.c 2009-11-14 03:48:33 UTC (rev 757) +++ trunk/print.c 2009-11-14 03:58:58 UTC (rev 758) @@ -242,6 +242,8 @@ { "ASUS", "A8V Deluxe", }, { "ASUS", "A8V-E Deluxe", }, { "ASUS", "A8V-E SE", }, + { "ASUS", "K8V", }, + { "ASUS", "K8V SE Deluxe", }, { "ASUS", "M2A-MX", }, { "ASUS", "M2A-VM", }, { "ASUS", "M2N-E", },

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flashrom November 2009