Show ICH flash descriptor info only if valid. Otherwise it is just
confusing the developers.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>
Index: flashrom-ich_spi_descriptor/chipset_enable.c
===================================================================
--- flashrom-ich_spi_descriptor/chipset_enable.c (Revision 764)
+++ flashrom-ich_spi_descriptor/chipset_enable.c (Arbeitskopie)
@@ -426,7 +426,7 @@
static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name,
int ich_generation)
{
- int ret, i;
+ int ret, i, hwseq = 0;
uint8_t old, new, bbs, buc;
uint16_t spibar_offset, tmp2;
uint32_t tmp, gcs;
@@ -540,30 +540,50 @@
printf_debug("0x04: 0x%04x (HSFS)\n", tmp2);
printf_debug("FLOCKDN %i, ", (tmp2 >> 15 & 1));
printf_debug("FDV %i, ", (tmp2 >> 14) & 1);
+ /* Flash Descriptor Override Pin-Strap Status, but unfortunately
+ * there is no info on how it affects hardware sequencing if
+ * FDV=1, nor do we know whether FDOPSS needs to be ORed or
+ * XORed with FDV.
+ */
printf_debug("FDOPSS %i, ", (tmp2 >> 13) & 1);
printf_debug("SCIP %i, ", (tmp2 >> 5) & 1);
printf_debug("BERASE %i, ", (tmp2 >> 3) & 3);
printf_debug("AEL %i, ", (tmp2 >> 2) & 1);
printf_debug("FCERR %i, ", (tmp2 >> 1) & 1);
printf_debug("FDONE %i\n", (tmp2 >> 0) & 1);
+ /* If the flash descriptor is valid, hardware sequencing is
+ * supported and software sequencing may encounter transaction
+ * errors if it tries to access regions outside the BIOS area.
+ * See the FDOPSS note above for potential pitfalls.
+ */
+ hwseq = (tmp2 >> 14) & 1;
+ if (hwseq) {
+ tmp = mmio_readl(spibar + 0x0);
+ printf("WARNING: SPI descriptor mode is active, "
+ "flashing may fail in some regions.\n");
+ printf_debug("0x00: 0x%08x (BPFR)\n", tmp);
+ printf_debug("PRB 0x%x, ", (tmp & 0x1FFF) << 12);
+ tmp >>= 16;
+ printf_debug("PRL 0x%x, ", (tmp & 0x1FFF) << 12);
- tmp = mmio_readl(spibar + 0x50);
- printf_debug("0x50: 0x%08x (FRAP)\n", tmp);
- printf_debug("BMWAG %i, ", (tmp >> 24) & 0xff);
- printf_debug("BMRAG %i, ", (tmp >> 16) & 0xff);
- printf_debug("BRWA %i, ", (tmp >> 8) & 0xff);
- printf_debug("BRRA %i\n", (tmp >> 0) & 0xff);
+ tmp = mmio_readl(spibar + 0x50);
+ printf_debug("0x50: 0x%08x (FRAP)\n", tmp);
+ printf_debug("BMWAG %i, ", (tmp >> 24) & 0xff);
+ printf_debug("BMRAG %i, ", (tmp >> 16) & 0xff);
+ printf_debug("BRWA %i, ", (tmp >> 8) & 0xff);
+ printf_debug("BRRA %i\n", (tmp >> 0) & 0xff);
- printf_debug("0x54: 0x%08x (FREG0)\n",
- mmio_readl(spibar + 0x54));
- printf_debug("0x58: 0x%08x (FREG1)\n",
- mmio_readl(spibar + 0x58));
- printf_debug("0x5C: 0x%08x (FREG2)\n",
- mmio_readl(spibar + 0x5C));
- printf_debug("0x60: 0x%08x (FREG3)\n",
- mmio_readl(spibar + 0x60));
- printf_debug("0x64: 0x%08x (FREG4)\n",
- mmio_readl(spibar + 0x64));
+ printf_debug("0x54: 0x%08x (FREG0)\n",
+ mmio_readl(spibar + 0x54));
+ printf_debug("0x58: 0x%08x (FREG1)\n",
+ mmio_readl(spibar + 0x58));
+ printf_debug("0x5C: 0x%08x (FREG2)\n",
+ mmio_readl(spibar + 0x5C));
+ printf_debug("0x60: 0x%08x (FREG3)\n",
+ mmio_readl(spibar + 0x60));
+ printf_debug("0x64: 0x%08x (FREG4)\n",
+ mmio_readl(spibar + 0x64));
+ }
printf_debug("0x74: 0x%08x (PR0)\n",
mmio_readl(spibar + 0x74));
printf_debug("0x78: 0x%08x (PR1)\n",
@@ -586,8 +606,10 @@
mmio_readl(spibar + 0x9C));
printf_debug("0xA0: 0x%08x (BBAR)\n",
mmio_readl(spibar + 0xA0));
- printf_debug("0xB0: 0x%08x (FDOC)\n",
- mmio_readl(spibar + 0xB0));
+ if (hwseq) {
+ printf_debug("0xB0: 0x%08x (FDOC)\n",
+ mmio_readl(spibar + 0xB0));
+ }
if (tmp2 & (1 << 15)) {
printf("WARNING: SPI Configuration Lockdown activated.\n");
ichspi_lock = 1;
--
Developer quote of the week:
"We are juggling too many chainsaws and flaming arrows and tigers."