On Mon, 9 May 2016 20:46:18 -0700
David Hendricks <dhendrix(a)google.com> wrote:
> Hi Victor,
> From Flashrom's software perspective all chips with the same ID are
> indistinguishable.
>
> Part number often includes characteristics such as package and thermal
> tolerance which do not affect software compatibility.
However, we will add the new names to the in-program (and hence
wiki) database so that this new information becomes public. Thanks for
the heads up, Victor.
…
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--
Kind regards/Mit freundlichen Grüßen, Stefan Tauner
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Hi,
we're hitting the 80 column limit in our code in ways which actually
reduce readability for the code. Examples are various multiline messages
and complicated nested code where refactoring to a separate function
doesn't make sense.
Keeping the old 80 column limit is not really an option anymore.
Standard terminal sizes have one of 80, 100 or 132 columns.
Given the monitor resolutions many people have nowadays, I think it is
safe to say that you can fit two xterms with 100 columns …
[View More]horizonally
next to each other. 100 columns should also be sufficient for a msg_p*
of roughly 80 columns of text.
132 columns provide more leeway, but IMHO that would be too wide for
good readability (and my screen can't fit two xterms side-by-side anymore).
Of course some files have sections where any column limit is not
acceptable (board lists etc.), but the column limit violations should be
limited to the affected file sections, not whole files.
Comments?
I'd like to get this decided today or tomorrow so we know where we need
line breaks in Stefan Tauner's new struct flashchip patch.
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
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Trying to unlock the flash on my asus C302CA and got the following
error when checking the status:
sudo flashrom --wp-status
flashrom v0.9.4 : 2842dd9 : Jun 05 2017 23:54:51 UTC on Linux
3.18.0-14860-g768489dbf73f (x86_64)
flashrom v0.9.4 : 2842dd9 : Jun 05 2017 23:54:51 UTC on Linux
3.18.0-14860-g768489dbf73f (x86_64)
coreboot table found at 0x7ab80000.
WARNING: SPI Configuration Lockdown activated.
WP: status: 0x94
WP: status.srp0: 1
WP: write protect is enabled.
WP: write protect range: …
[View More]spi_send_command called, but SPI is
unsupported on this hardware. Please report a bug at
flashrom(a)flashrom.orgrg
start=0x00c00000, len=0x00400000
attempt to unlock fails:
flashrom --wp-disable
flashrom v0.9.4 : 2842dd9 : Jun 05 2017 23:54:51 UTC on Linux
3.18.0-14860-g768489dbf73f (x86_64)
flashrom v0.9.4 : 2842dd9 : Jun 05 2017 23:54:51 UTC on Linux
3.18.0-14860-g768489dbf73f (x86_64)
coreboot table found at 0x7ab80000.
WARNING: SPI Configuration Lockdown activated.
w25_disable_writeprotect(): error=1.
FAILED
Please let me know.
Thanks,
Don
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On Wed, Jun 21, 2017 at 6:51 PM, Ed Swierk <eswierk(a)skyportsystems.com>
wrote:
> On Mon, Apr 17, 2017 at 9:54 PM, David Hendricks
> <david.hendricks(a)gmail.com> wrote:
> > Getting 4-byte address support in is something I'm interested in as
> well. In fact I have parts coming in the mail this week :-)
> >
> > On Mon, Apr 17, 2017 at 6:43 PM, Alex Henderson <
> ahenderson(a)aparnasystems.com> wrote:
> >>
> >> Hi there:
> …
[View More]>>
> >> I just started experimenting with flashrom using a
> Dediprog SF600 this weekend. I noticed that there’s no support for any of
> the 256Mb or 512Mb SPI NOR parts (4 byte addressing an issue?).
> >
> >
> > The Dediprog SF600 has commands for 4-byte addressing, but I was not
> able to get them working in the time I had to play with it. We can probably
> also ask Dediprog if they have an updated command spec, maybe there was a
> problem in the one I was looking at.
> >
> >>
> >> Is there a newer version than 0.9.9 that I should try? I did find that
> the Google fork for chromeOS has a number of these parts (W25Q256, N25Q256,
> SST_25F256).
> >
> >
> > Yes, but the systems those went in treated them as 16MB parts. The
> firmware (coreboot) is small so there wasn't really need for the extra
> space.
> >
> >> I would be happy to try an unreleased version & report
> results. I can also test with an FTDI232 based programmer. The boards I can
> test with currently have various versions of 25q512, 25q256, 25q128 and
> 25q32. Functionality with the smaller parts looks good.
>
> I'm a bit late to the party here, but in case it's relevant: I
> successfully programmed a Micron N25Q512, which is a 64 MByte SPI
> flash with 4-byte addressing, using patches originally from Boris
> Baykov on top of a more current flashrom. See
> https://github.com/skyportsystems/flashrom/commits/master .
>
> Both FT232H module and STM32 Blue Pill board with stm32-vserprog
> firmware work as programmers.
>
Nice! I've also had success with Boris's patches, as have others:
https://review.coreboot.org/#/c/19525/ . That version is squashed, though,
so perhaps the patches in your repo will be better for merging.
I also uploaded a patch to enable 4BA support on the Dediprog SF600 which
Alex might be interested in trying out:
https://review.coreboot.org/#/c/19858/
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On Mon, Apr 17, 2017 at 9:54 PM, David Hendricks
<david.hendricks(a)gmail.com> wrote:
> Getting 4-byte address support in is something I'm interested in as well. In fact I have parts coming in the mail this week :-)
>
> On Mon, Apr 17, 2017 at 6:43 PM, Alex Henderson <ahenderson(a)aparnasystems.com> wrote:
>>
>> Hi there:
>>
>> I just started experimenting with flashrom using a Dediprog SF600 this weekend. I noticed that there’s no …
[View More]support for any of the 256Mb or 512Mb SPI NOR parts (4 byte addressing an issue?).
>
>
> The Dediprog SF600 has commands for 4-byte addressing, but I was not able to get them working in the time I had to play with it. We can probably also ask Dediprog if they have an updated command spec, maybe there was a problem in the one I was looking at.
>
>>
>> Is there a newer version than 0.9.9 that I should try? I did find that the Google fork for chromeOS has a number of these parts (W25Q256, N25Q256, SST_25F256).
>
>
> Yes, but the systems those went in treated them as 16MB parts. The firmware (coreboot) is small so there wasn't really need for the extra space.
>
>> I would be happy to try an unreleased version & report results. I can also test with an FTDI232 based programmer. The boards I can test with currently have various versions of 25q512, 25q256, 25q128 and 25q32. Functionality with the smaller parts looks good.
I'm a bit late to the party here, but in case it's relevant: I
successfully programmed a Micron N25Q512, which is a 64 MByte SPI
flash with 4-byte addressing, using patches originally from Boris
Baykov on top of a more current flashrom. See
https://github.com/skyportsystems/flashrom/commits/master .
Both FT232H module and STM32 Blue Pill board with stm32-vserprog
firmware work as programmers.
--Ed
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Hello Josh
I dove into the code yesterday and here is what I found. When the bits BP0 and BP1 in the status register need to be cleared the function spi_disable_blockprotect(flash) is called. To clear these bits (for the sst25lf080a ROM chip) the commands EWSR and WRSR need to be sent to the chip. In the function spi_write_status_register(...)
the function spi_write_status_register_flag(...) is call to send the commands WREN and WRSR. The expectation seems to be that if …
[View More]this function fails to clear BP0 and BP1 bits it will return a no-zerero value and then spi_write_status_register_flag(...) will be call again to send the commands EWSR and WRSR. But spi_write_status_register_flag(...) returns a zero value for the first case so the second calll is never made.
The EWSR and WRSR commands are never sent and the chip remains in protected mode.
To correct the code the commands EWSR and WRSR must be sent to the sst25lf080a. How this should be done so that the code works for other chips I leave to the people at flashrom.
Still a mystery is how the code works for the sst25lf040a chip and not the sst25lf080a chip.
Thanks
Boyce
int spi_write_status_register_flag(struct flashctx *flash,int status,const unsigned char enable_opcode) {
.
.
.
result = spi_send_multicommand(flash,cmds);
if (result) {
.
.
.
return result;
}
.
.
.
return 0;
}
int spi_write_status_register(struct flashctx *flash,int status) {
int feature_bits = flash->chip->feature_bits;
.
.
.
if (feature_bits & FEATURE_WRSR_WREN)
ret = spi_write_status_register_flag(flash,status,JEDEC_WREN);
if (ret && feature_bits & FEATURE_WRSR_EWSR)
ret = spi_write_status_register_flag(flash,status,JEDEC_EWSR);
return ret;
}
int spi_disable_blockprotect_generic(struct flashctx *flash,uint8_t bp_mask,uint8_t lock_mask,uint8_t wp_mask,
uint8_t unprotect_mask) {
.
.
.
/* Global unprotect. ... */
result = spi_write_status_register(flash,status & ~(bp_mask | lock_mask) & unprotect_mask);
if (result) {
.
.
.
return result;
}
.
.
.
return 0;
}
int spi_disable_blockprotect(struct flashctx *flash) {
return spi_disable_blockprotect_generic(flash,0x3c,0,0,0xFF);
}
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On Wed, 7 Jun 2017 17:26:45 -0600
David Hendricks <david.hendricks(a)gmail.com> wrote:
> I am interested in getting flashrom running on MacOS, but it seems that the
> DirectHW package [1] which it depends on hasn't been updated for quite some
> time and won't install on Sierra (10.12.4).
>
> There's an updated branch of DirectHW from PureDarwin [2] that resolves
> compilation errors due to Xcode changes. However it doesn't update the
> packager from packagemaker to …
[View More]pkgbuild and productbuild.
>
> I'm a Mac n00b and didn't get far trying to make it all work, and was
> curious if there's anyone who would like to take a swing at this. Getting
> DirectHW updated will also help with other low-level tools. I'd be happy to
> help test and get patches committed.
>
> [1] https://review.coreboot.org/cgit/directhw.git
> [2] https://github.com/PureDarwin/DirectHW
Hi David,
I (and the buildbot) have been using
https://github.com/tpoechtrager/osxcross.git to build binaries for osx
in the past. Carldani set it up IIRC and I can't really comment further
on that.
Also, I made a change to flashrom regarding DirectHW locally.
IIRC that made it easier to build it...?
-PCILIBS += -framework IOKit -framework DirectHW
+PCILIBS += -framework IOKit -lDirectHW
To use that you need at least one of my two patches from here... I
think:
https://github.com/flashrom/directhw/commits/master
--
Kind regards/Mit freundlichen Grüßen, Stefan Tauner
[View Less]
I am interested in getting flashrom running on MacOS, but it seems that the
DirectHW package [1] which it depends on hasn't been updated for quite some
time and won't install on Sierra (10.12.4).
There's an updated branch of DirectHW from PureDarwin [2] that resolves
compilation errors due to Xcode changes. However it doesn't update the
packager from packagemaker to pkgbuild and productbuild.
I'm a Mac n00b and didn't get far trying to make it all work, and was
curious if there's anyone who …
[View More]would like to take a swing at this. Getting
DirectHW updated will also help with other low-level tools. I'd be happy to
help test and get patches committed.
[1] https://review.coreboot.org/cgit/directhw.git
[2] https://github.com/PureDarwin/DirectHW
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