Hello! I've tried to reflash my Gigabyte GA-6IEM with BIOS version F7 and got this output: """ Lock status for 0x000000 (size 0x004000) is 00, full access Lock status for 0x004000 (size 0x004000) is 00, full access Lock status for 0x008000 (size 0x004000) is 00, full access Lock status for 0x00c000 (size 0x004000) is 00, full access Lock status for 0x010000 (size 0x004000) is 00, full access Lock status for 0x014000 (size 0x004000) is 00, full access Lock status for 0x018000 (size 0x004000) is 00, full access Lock status for 0x01c000 (size 0x004000) is 00, full access Lock status for 0x020000 (size 0x004000) is 00, full access Lock status for 0x024000 (size 0x004000) is 00, full access Lock status for 0x028000 (size 0x004000) is 00, full access Lock status for 0x02c000 (size 0x004000) is 00, full access Lock status for 0x030000 (size 0x004000) is 00, full access Lock status for 0x034000 (size 0x004000) is 00, full access Lock status for 0x038000 (size 0x004000) is 00, full access Lock status for 0x03c000 (size 0x004000) is 00, full access Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x000fff, ERASE FAILED at 0x00000000! Expected=0xff, Read=0x25, failed byte count from 0x00000000-0x00000fff: 0xff4 ERASE FAILED!
Looking at blockwise erase function 1... trying... 0x000000-0x003fff, ERASE FAILED at 0x00000000! Expected=0xff, Read=0x25, failed byte count from 0x00000000-0x00003fff: 0x3fb3 ERASE FAILED!
Looking at blockwise erase function 2... eraseblock layout is known, but no matching block erase function found. Looking for another erase function. Looking at blockwise erase function 3... not defined. Looking for another erase function. Looking at blockwise erase function 4... not defined. Looking for another erase function. FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net (channel #flashrom) or mail flashrom@flashrom.org! """
flashrom says this: """ [root@rr-is ~]# flashrom flashrom v0.9.2-r1001 on Linux 2.6.18-194.11.1.el5 (i686), built with libpci 2.2.3, GCC 4.1.2 20080704 (Red Hat 4.1.2-48) flashrom is free software, get the source code at http://www.flashrom.org
No coreboot table found. Found ITE Super I/O, id 8712 Found chipset "Intel ICH2", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF002A/B" (256 KB, FWH) at physical address 0xfffc0000. """
What must I do now? Thanks
-- Khankin Konstantin South Ural State University hc@comp.susu.ac.ru
Hi Konstantin,
we will help you.
On 02.09.2010 13:21, hc@comp.susu.ac.ru wrote:
I've tried to reflash my Gigabyte GA-6IEM with BIOS version F7 and got this output:
Lock status for 0x000000 (size 0x004000) is 00, full access [...] Lock status for 0x03c000 (size 0x004000) is 00, full access Writing flash chip... Erasing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x000fff, ERASE FAILED at 0x00000000! Expected=0xff, Read=0x25, failed byte count from 0x00000000-0x00000fff: 0xff4 Looking at blockwise erase function 1... trying... 0x000000-0x003fff, ERASE FAILED at 0x00000000! Expected=0xff, Read=0x25, failed byte count from 0x00000000-0x00003fff: 0x3fb3
This looks like nothing changed.
[root@rr-is ~]# flashrom flashrom v0.9.2-r1001 on Linux 2.6.18-194.11.1.el5 (i686), built with libpci 2.2.3, GCC 4.1.2 20080704 (Red Hat 4.1.2-48) flashrom is free software, get the source code at http://www.flashrom.org
No coreboot table found. Found ITE Super I/O, id 8712 Found chipset "Intel ICH2", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF002A/B" (256 KB, FWH) at physical address 0xfffc0000.
Did you create a backup with "flashrom -r backup.rom" before you started to write? If yes, please run flashrom -Vv backup.rom If it says "VERIFIED", nothing was changed and it is safe to reboot. If it complains, we will help you recover.
It looks like we need a board enable for your board. BIOS update can be downloaded at http://download.gigabyte.eu/FileList/BIOS/motherboard_bios_6iem_f7.exe
Please upgrade to latest flashrom from svn and reply with the output from flashrom -V superiotool -deV lspci -nnvvvxxx Please run all commands as root.
Regards, Carl-Daniel
Am Freitag, den 03.09.2010, 06:02 +0200 schrieb Carl-Daniel Hailfinger:
Please upgrade to latest flashrom from svn and reply with the output from flashrom -V superiotool -deV lspci -nnvvvxxx Please run all commands as root.
If you send us the requested information, support for your board is just a couple of lines away: It requires raising of GPIO line #25 (decimal) of your southbridge, i.e. a call to "intel_ich_gpio25_raise".
Regards, Michael Karcher
Hi, Michael Thanks for reply
we will help you.
It's wery pleasant :)
I didn't make backup so can't check correctness
Please upgrade to latest flashrom from svn and reply with the
output from
flashrom -V
flashrom.output in attach
superiotool -deV
I haven't this tool installed or built with flashrom. Should I build it from svn?
lspci -nnvvvxxx
lspci.output in attach
I've tried to reflash again with svn version but have same result (flashrom-write.output in attach)
Thanks
PS: I can't send a letter to Carl-Daniel - my mail server is in Spamhaus CBL. Please copy this letter to him
-- Konstantin
Reported by Konstantin hc@comp.susu.ac.ru lspci (superiotool missing, doesn't matter for this patch) http://www.coreboot.org/pipermail/flashrom/2010-September/004609.html DMI is needed, as there are no usefull PCI IDs.
Signed-off-by: Michael Karcher flashrom@mkarcher.dialup.fu-berlin.de --- board_enable.c | 2 ++ print.c | 1 + 2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/board_enable.c b/board_enable.c index 815a1a6..3f89aaa 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1385,6 +1385,7 @@ static int intel_ich_gpio23_raise(void)
/* * Suited for: + * - GIGABYTE GA-6IEM: Intel Socket370 + i815 + ICH2 * - GIGABYTE GA-8IRML: Intel Socket478 + i845 + ICH2 */ static int intel_ich_gpio25_raise(void) @@ -1804,6 +1805,7 @@ const struct board_pciid_enable board_pciid_enables[] = { {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, "EPoX", "EP-8K5A2", 0, OK, w836xx_memw_enable_2e}, {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", 0, OK, nvidia_mcp_gpio31_raise}, {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, NT, intel_piix4_gpo22_raise}, + {0x8086, 0x2443, 0x8086, 0x2442, 0x8086, 0x1130, 0x8086, 0x1130, "^6IEM ", NULL, NULL, "GIGABYTE", "GA-6IEM", 0, OK, intel_ich_gpio25_raise}, {0x1106, 0x0686, 0x1106, 0x0686, 0x1106, 0x3058, 0x1458, 0xa000, NULL, NULL, NULL, "GIGABYTE", "GA-7ZM", 512, OK, NULL}, {0x8086, 0x244b, 0x8086, 0x2442, 0x8086, 0x2445, 0x1458, 0xa002, NULL, NULL, NULL, "GIGABYTE", "GA-8IRML", 0, OK, intel_ich_gpio25_raise}, {0x8086, 0x24c3, 0x1458, 0x24c2, 0x8086, 0x24cd, 0x1458, 0x5004, NULL, NULL, NULL, "GIGABYTE", "GA-8PE667 Ultra 2", 0, OK, intel_ich_gpio32_raise}, diff --git a/print.c b/print.c index 3215c2a..805b757 100644 --- a/print.c +++ b/print.c @@ -399,6 +399,7 @@ const struct board_info boards_known[] = { B("GIGABYTE", "GA-2761GXDK", 1, "http://www.computerbase.de/news/hardware/mainboards/amd-systeme/2007/mai/gig...", NULL), B("GIGABYTE", "GA-6BXC", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1445", NULL), B("GIGABYTE", "GA-6BXDU", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1429", NULL), + B("GIGABYTE", "GA-6IEM", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1379", NULL), B("GIGABYTE", "GA-6ZMA", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL), B("GIGABYTE", "GA-MA785GMT-UD2H", 1, "http://www.gigabyte.de/Products/Motherboard/Products_Overview.aspx?ProductID...", NULL), B("GIGABYTE", "GA-770TA-UD3", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3272#ov", NULL),
-
Carl-Daniel Hailfinger -
hc＠comp.susu.ac.ru -
Michael Karcher