On Tue, 5 Jul 2011 23:27:31 +0000 "Branham, Paul" paul.branham@hp.com wrote:
Hello,
We are using your open source flashrom driver for Intel PCH Ibex Peak. (SPI_Controller_ICH9 in the source code with generation>8 => ie. SPIBAR = 0x3800).
The flash ROM driver works well using CS0 by design.
What we are looking for is information on how to use the other chip select -CS1- for some other SPI device. All Intel documentation we have found for this SPI Controller only specifies how to use the Flash capabilities of CS0, but no information whatsoever on how to use CS1 for any other SPI device.
Would you have any source code or other information that may be of help?
hello paul,
most of the public documentation from Intel does not help a lot as you already have found out... :)
as far as i understand it, using multiple chips is only supported with hardware sequencing. you can read about that in detail here: http://blogs.coreboot.org/blog/2011/06/11/gsoc-2011-flashrom-part-1/
we are working on that and you can look at the following patches for preliminary support: http://patchwork.coreboot.org/patch/3242/ http://patchwork.coreboot.org/patch/3243/ http://patchwork.coreboot.org/patch/3244/ http://patchwork.coreboot.org/patch/3253/
they should be applied to the current source files, see http://flashrom.org/Downloads#Installation_from_source for details
if your flash descriptors are correct and indicate two attached devices it should already work with the above patches unless the ME or the FREG registers prohibits flashrom to access some regions (which is likely on ibex peak platforms). in that case flashrom is not an option yet. i am working on that too, but it is not ready yet.
in any case, sending us verbose logs of running flashrom with the patches above applied would be much appreciated.
-
Stefan Tauner