flashrom v1.1-rc1-69-g188127e on Linux 4.15.0-45-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org
flashrom was built with libpci 3.3.1, GCC 5.4.0 20160609, little endian Command line (3 args): ./flashrom --programmer internal -V Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Initializing internal programmer /sys/class/mtd/mtd0 does not exist No coreboot table found. Using Internal DMI decoder. No DMI table found. Found chipset "Intel C246" with PCI ID 8086:a309. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom@flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... BIOS_SPI_BC = 0x888: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x0 (SPI) Top Swap: not enabled SPI Read Configuration: prefetching enabled, caching enabled, BIOS_CNTL = 0x89: BIOS Lock Enable: disabled, BIOS Write Enable: enabled SPIBAR = 0x00007ffa5bcdb000 (phys = 0xfe010000) 0x04: 0xe800 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, SCIP=0, PRR34_LOCKDN=0, WRSDIS=1, FDOPSS=1, FDV=1, FLOCKDN=1 SPI Configuration is locked down. Reading OPCODES... done 0x06: 0x3f00 (HSFC) HSFC: FGO=0, HSFC=0, WET=0, FDBC=63, SME=0 0x0c: 0x00000000 (DLOCK) DLOCK: BMWAG_LOCKDN=0, BMRAG_LOCKDN=0, SBMWAG_LOCKDN=0, SBMRAG_LOCKDN=0, PR0_LOCKDN=0, PR1_LOCKDN=0, PR2_LOCKDN=0, PR3_LOCKDN=0, PR4_LOCKDN=0, SSEQ_LOCKDN=0 0x50: 0x00005afb (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x5a, BRRA 0xfb 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only. 0x58: 0x1fff1800 FREG1: BIOS region (0x01800000-0x01ffffff) is read-write. 0x5C: 0x0fdf0001 FREG2: Management Engine region (0x00001000-0x00fdffff) is locked. 0x68: 0x0fef0fe0 FREG5: Device Expansion region (0x00fe0000-0x00feffff) is read-only. 0xE8: 0x17ef0ff0 FREG14: unknown region (0x00ff0000-0x017effff) has unknown permissions. 0xEC: 0x17ff17f0 FREG15: unknown region (0x017f0000-0x017fffff) has unknown permissions. Not all flash regions are freely accessible by flashrom. This is most likely due to an active ME. Please see https://flashrom.org/ME for details. At least some flash regions are read protected. You have to use a flash layout and include only accessible regions. For write operations, you'll additionally need the --noverify-all switch. See manpage for more details. 0xa0: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0xa1: 0xfe0000 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=6 0xa4: 0x0000 (PREOP) 0xa6: 0x0000 (OPTYPE) 0xa8: 0x00000000 (OPMENU) 0xac: 0x00000000 (OPMENU+4) 0xc4: 0xf1d82045 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xc8: 0x20452045 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20 Enabling hardware sequencing because some important opcode is locked. OK. The following protocols are supported: Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Hardware sequencing reports 1 attached SPI flash chip with a density of 32768 kB. Found Programmer flash chip "Opaque flash chip" (32768 kB, Programmer-specific) mapped at physical address 0x0000000000000000. Found Programmer flash chip "Opaque flash chip" (32768 kB, Programmer-specific). No operations were specified. Restoring PCI config space for 00:1f:5 reg 0xdc
-
Jethro Beekman