Hallo Marcel,
On 19.02.2010 02:37, marcel partap wrote:
Hallo Carl-Daniel, nice to see progress on newer nforce, finally the day where users can apply bios bugfixes without resorting to obsolete disk operating systems disks are near - woohoo!! ;) guess it indeed does use SPI, hope you can figure something out from this log.
Thank you for the log. It definitely helps us a lot.
flashrom v0.9.1-runknown
Probably r906 (in case someone looks at this report later on).
No coreboot table found. DMI string 0: "ECS" DMI string 1: "GeForce 8000 series" DMI string 2: "1.0 " DMI string 3: "ECS" DMI string 4: "GeForce 8000 series" DMI string 5: "1.0 " Found chipset "NVIDIA MCP78S", enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Guessed flash bus type is SPI Found SMBus device 10de:0752 at 00:01:1 SPI BAR is at 0xf9e80000, after clearing low bits BAR is at 0xf9e80000 Mapping MCP67 SPI at 0xf9e80000, unaligned size 0x544. SPI control is 0xc01a, enable=0, idle=0 SPI on this chipset is not supported yet. OK. This chipset supports the following protocols: None.
And more confirmation that the code so far works fine. I hope to find some time to work on full SPI support around mid April.
Regards, Carl-Daniel
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Carl-Daniel Hailfinger