Flashrom High CPU utilization

[Pheba Philip]

Hi,
Is it expected behavior for flashrom to have high cpu utilization for bios
verification.

[Jonathan A. Kollasch]

On Thu, Oct 14, 2021 at 10:07:27PM +0530, Pheba Philip wrote:
> Hi,
> Is it expected behavior for flashrom to have high cpu utilization for bios
> verification.

Yes.

[Pheba Philip]

Thanks for response.
1. What could be the possible reason for flashrom to have high cpu
utilization during bios verification process?
2. What is the expected range of cpu utilization for flashrom process? (In
our case, it is 50-100 in top output and
> 100 in ps output)

On Fri, 15 Oct 2021, 6:51 am Jonathan A. Kollasch, 
wrote:
> On Thu, Oct 14, 2021 at 10:07:27PM +0530, Pheba Philip wrote:
> > Hi,
> > Is it expected behavior for flashrom to have high cpu utilization for
>
> bios
> > verification.
>
> Yes.

[Nico Huber]

On 15.10.21 20:44, Pheba Philip wrote:
> Thanks for response.
> What could be the possible reason for flashrom to have high cpu
>
> utilization during bios verification process?

Flashrom uses idle loops when waiting for the hardware. This is
necessary because some supported chips have very strict timing
requirements. It could be changed for chips that don't need it,
but it would need careful evaluation I guess. For every delay in
flashrom, we would have to decide if it's timing-critical and if
it's not too short considering scheduling overhead.
> What is the expected range of cpu utilization for flashrom process? (In
>
> our case, it is 50-100 in top output and
> > 100 in ps output)

100% during flash read, something between 0 and 100% during file i/o,
I guess.

Nico

[Pheba Philip]

Ok, thanks.

On Sun, 17 Oct 2021, 9:28 pm Nico Huber,  wrote:
> On 15.10.21 20:44, Pheba Philip wrote:
> > Thanks for response.
> > What could be the possible reason for flashrom to have high cpu
> >
> > utilization during bios verification process?
>
> Flashrom uses idle loops when waiting for the hardware. This is
> necessary because some supported chips have very strict timing
> requirements. It could be changed for chips that don't need it,
> but it would need careful evaluation I guess. For every delay in
> flashrom, we would have to decide if it's timing-critical and if
> it's not too short considering scheduling overhead.
> > What is the expected range of cpu utilization for flashrom process?
>
> (In
> > our case, it is 50-100 in top output and
> > > 100 in ps output)
>
> 100% during flash read, something between 0 and 100% during file i/o,
> I guess.
>
> Nico