Re: [flashrom] [PATCH] experimental patch for HP branded Tyan S2915

[Carl-Daniel Hailfinger]

Hi,

On 28.01.2010 16:36, Michael Karcher wrote:
> This patch may or may not help the HP xw9400 workstation [...]
>
> Signed-off-by: Michael Karcher

Turns out that this patch was not needed for flash detection, but it may
be needed as board enable for writing.
Besides that, it allows MCP55 GPIO access which we need anyway.
> diff --git a/board_enable.c b/board_enable.c
> index 2c836a9..6970be2 100644
> --- a/board_enable.c
> +++ b/board_enable.c
> @@ -478,6 +478,7 @@ static int nvidia_mcp_gpio_set(int gpio, int raise)
>        dev = pci_dev_find_vendorclass(0x10DE, 0x0C05);
>        switch (dev->device_id) {
>        case 0x0264: /* MCP51 */
>    case 0x0364: /* MCP55 */
> break;
>      default:
>   fprintf(stderr,
>
> @@ -513,6 +514,26 @@ static int nvidia_mcp_gpio2_raise(const char *name)
>   */
>  static int nvidia_mcp_gpio5_raise(const char *name)
>  {
> /* experimental stuff - maybe it helps the hidden flash
>   chip problem on Tyan S2915-E */
> struct pci_dev * dev;
> uint16_t base;
> uint16_t tmp;
> dev = pci_dev_find(0x10de,0x0364);
> if(!dev) {
> fprintf(stderr, "SMBus bridge not found?!\n");
> return -1;
> }
> base = pci_read_long(dev,0x60) & 0xFF00;
> if(base < 0x400) {
> fprintf(stderr, "bogus I/O base %04x\n", base);
> return -1;
> }
> tmp = INW(base+2);
> tmp &= 0xFEFF;
> OUTW(tmp, base+2);
> /* Obvious stuff for the HP variant */
> return nvidia_mcp_gpio_set(0x05, 1);
>
> }

Regards,
Carl-Daniel

[PATCH] Add hp xw9400 board enable.

[Michael Karcher]

Signed-off-by: Michael Karcher 
---
 board_enable.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/board_enable.c b/board_enable.c
index b5eb63f..c457062 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -571,6 +571,7 @@ static int nvidia_mcp_gpio_set(int gpio, int raise)
        dev = pci_dev_find_vendorclass(0x10DE, 0x0C05);
        switch (dev->device_id) {
        case 0x0264: /* MCP51 */
+	    case 0x0364: /* MCP55 */
    	break;
        default:
    	msg_perr("\nERROR: no NVIDIA LPC/SMBus controller found.\n");
@@ -619,6 +620,14 @@ static int nvidia_mcp_gpio2_raise(const char *name)
 }

/**
+ * Suited for HP xw9400 (Tyan S2915-E OEM): nVidia MCP55.
+ */
+static int nvidia_mcp_gpio5_raise(const char *name)
+{
+	return nvidia_mcp_gpio_set(0x05, 1);
+}
+
+/**
  * Suited for Abit NF7-S: NVIDIA CK804.
  */
 static int nvidia_mcp_gpio8_raise(const char *name)
@@ -1437,6 +1446,7 @@ struct board_pciid_enable board_pciid_enables[] = {
    {0x1166, 0x0223, 0x103c, 0x320d,  0x102b, 0x0522, 0x103c, 0x31fa, NULL,          "hp",         "dl145_g3",    "HP",          "DL145 G3",              0,   OK, board_hp_dl145_g3_enable},
    {0x8086, 0x2415, 0x103c, 0x1249,  0x10b7, 0x9200, 0x103c, 0x1246, NULL,          NULL,         NULL,          "HP",          "Vectra VL400",          0,   OK, board_hp_vl400}, 
    {0x8086, 0x1a30, 0x103c, 0x1a30,  0x8086, 0x2443, 0x103c, 0x2440, "^VL420$",     NULL,         NULL,          "HP",          "VL420 SFF",             0,   OK, intel_ich_gpio22_raise},
+	{0x10da, 0x0369, 0x103c, 0x12fe,  0x10da, 0x0364, 0x103c, 0x12fe, NULL,          NULL,         NULL,          "HP",          "xw9400",                0,   OK, nvidia_mcp_gpio5_raise},
    {0x8086, 0x27A0,      0,      0,  0x8086, 0x27B9,      0,      0, NULL,          "ibase",      "mb899",       "iBASE",       "MB899",                 0,   NT, intel_ich_gpio26_raise},
    {0x1166, 0x0205, 0x1014, 0x0347,  0x1002, 0x515E, 0x1014, 0x0325, NULL,          NULL,         NULL,          "IBM",         "x3455",                 0,   OK, board_ibm_x3455},
    {0x1039, 0x5513, 0x8086, 0xd61f,  0x1039, 0x6330, 0x8086, 0xd61f, NULL,          NULL,         NULL,          "Intel",       "D201GLY",               0,   OK, wbsio_check_for_spi},