Am Freitag, den 25.12.2009, 18:09 +0100 schrieb Michael Karcher:
11 bits maybe needed:
[...]
AMIC A29002B/AM29002T: [Listed here because 0xAAA would have A11 set which is not marked as don't care. Currently, it uses write_jedec_1 which will fail if the datasheet is correct about A11 being used.] http://www.amictechnology.com/pdf/A29002.pdf Page 11, Note 4 "Address bits A17 - A12 are don't cares for unlock and command cycles, unless SA or PA required."
As carldani told in IRC, there is a success report with the A29002B. This test used a 11-bit erase function (0x555/0x2AA) and a 15 bit probe and a 15 bit write function (0x5555/0x2AAA). As it worked, this chip is for sure 11-bits-needed, higher-bits-don't care.
Macronix MX29LV040: [Currently uses write_jedec_1 which will fail if the higher address lines are not ignored.] http://www.datasheetcatalog.org/datasheet/macronix/MX29LV040TI-70.pdf Datasheet does not tell anything about ignored address lines.
This chip also uses probe_29f002 (15 bits)/erase_29f002 (11 bits). Currently it is declared as probe/read successful; erase/write never was marked successful in svn since the chip got introduced in r366. As the data sheet specifies the 11-bit addresses and the 15-bit probe worked, it is very probable that all address bits starting at A11 are (as usual for 11 bit chips) don't care.
Regards, Michael Karcher