Re: [flashrom] Fwd: BPv3.6 w flashrom

[Nabs]

Hi, i would just like to thank you and let you know i've got it working with flashrom now! :)

What worked was to connect the four signal pins to their counterparts (MISO, MOSI, CS, CLK), Ground to Ground, and also Vcc to 3V3, and disconnect the AC power and battery.

Kind regards,
Nabs

________________________________
 From: Idwer Vollering 
To: flashrom  
Cc: Nabil ; Nabs  
Sent: Wednesday, 5 December 2012 11:32 PM
Subject: Fwd: [flashrom] BPv3.6 w flashrom

Forwarding. Please "reply to all".

---------- Forwarded message ----------
From: Nabs 
Date: 2012/12/5
Subject: Re: [flashrom] BPv3.6 w flashrom
To: "[e-mail]"

Just had a Eureka moment.
I think what confused me was the fact that the cables were soldered onto the actual soic clip!
So all I need to do is desolder and resolder them into their correct layouts, or desolder and use alligator clips instead?
Is that right? Cheers, Nabs.

________________________________
 From:  Idwer Vollering ; 
To:  Nabs ; 
Cc:  [e-mail] ; 
Subject:  Re: [flashrom] BPv3.6 w flashrom 
Sent:  Wed, Dec 5, 2012 12:05:04 PM

2012/12/5 Nabs :
> Hi, sorry for the trouble. I'm running bus piratev3.6, bootloaderv4.4,
> firmwarev6.1 on flashrom-0.9.6.1, i plan to run the BP at 1M.
>
> When i run the command "flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -Vr
> oldbios.bin"
> I get:
> "
> Found Generic flash chip "unknown SPI chip (RDID)" (0 kB, SPI) on
> buspirate_spi.
> Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0x0,
> id2 0x0
> Found Generic flash chip "unknown SPI chip (RDID)" (0 kB, SPI).
> ===
> This flash part has status NOT WORKING for operations: PROBE READ ERASE
> WRITE
> " etc...
>
> I think i have the wiring wrong which is why i get that error, i wonder

if
> you could help me as its my first time?
> I'm trying to use In-circuit programming with a soldered bios chip using an
> 'SOIC 8 clip' and it has 8 wires. But the bus pirate has 10 pins.
>
> From another thread, these are the connections i need:
> Bus Pirate "MISO" (Pin 1) <----- SPI Device "DO" (Wire/Pin 2)
> Bus Pirate "CS" (Pin 2) -----> SPI Device "CS" (Wire/Pin 1)
> Bus Pirate "MOSI" (Pin 3) -----> SPI Device "DI" (Wire/Pin 5)
> Bus Pirate "CLK" (Pin 4) -----> SPI Device "CLK" (Wire/Pin 6)
> Bus Pirate "GND" (Pin 10) <----> SPI Device "GND" (Wire/Pin 4)
>
> It appears to me that GND is pin 10 and that the wires of the SOIC8 clip
> only contact pins 1-8, so how can this work?
>
> Also, could i just check the layout of the pins on the bus pirate if i'm
> reading it correctly on BPv3.6:
> 10  9
> 8

7
> 6    5
> 4    3
> 2    1
>
> Corresponding to:
> GND  3V3
> +5V    ADC
> VPU   AUX
> CLK    MOSI
> CS     MISO

Forget the existence of +5V, VPU, ADC and AUX for now (
http://dangerousprototypes.com/docs/Bus_Pirate_I/O_Pin_Descriptions ),
connect the clip to the buspirate so that the clip passes the
buspirate pins like mentioned in this post:
http://www.coreboot.org/pipermail/flashrom/2012-November/010178.html

This works for me, with a MX25L1605A soic8 chip:

CS# (CS)                                     
     [1  chip  8]    VCC
(bridge with buspirate pin 3+7)
SO (MISO)                                        [2  chip  7]    HOLD# (+3V3)
WP# (bridge with buspirate pin 7+8)    [3  chip  6]    SCLK (CLK)
GND (GND)                                       [4  chip  5]    SI (MOSI)
> Or are the pin numbers read in the opposite direction?
> ie
> 9  10
> 7  8
> 5  6
> 3  4
> 1  2
>
> Here's an image of my bus pirate if it helps:
> http://dangerousprototypes.com/wp-content/media/2012/11/Bus-Pirate-v3.6inter...
>
> Your help is much appreciated and i appreciate your patience, Nabs.
>
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