Hello
I have tested patch 2148 from patchwork applied on r1215, along with patch that fixes issues appearing constantly with my setup, which are going to be fixed in other place so its a bit of hack.
erase check # ./flashrom -p nic3com -E flashrom v0.9.3-r1215 on Linux 2.6.33.3-z2 (i686), built with libpci 3.1.7, GCC 4.4.5 20100728 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK. Found "3COM 3C905B: Cyclone 10/100/BNC" (10b7:9058, BDF 00:08.0). Found chip "Atmel AT29C512" (64 KB, Parallel) at physical address 0xffff0000. Erasing and writing flash chip... SUCCESS.
# ./flashrom -p nic3com -r e flashrom v0.9.3-r1215 on Linux 2.6.33.3-z2 (i686), built with libpci 3.1.7, GCC 4.4.5 20100728 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK. Found "3COM 3C905B: Cyclone 10/100/BNC" (10b7:9058, BDF 00:08.0). Found chip "Atmel AT29C512" (64 KB, Parallel) at physical address 0xffff0000. Reading flash... done. babol:~# od -tx1 -Ax e 000000 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff * 010000
verbose read/erase/write logs in attachment, patch is as follows
Index: flash.h =================================================================== --- flash.h (revision 1215) +++ flash.h (working copy) @@ -83,6 +83,7 @@ #define FEATURE_LONG_RESET (0 << 4) #define FEATURE_SHORT_RESET (1 << 4) #define FEATURE_EITHER_RESET FEATURE_LONG_RESET +#define FEATURE_RESET_MASK (FEATURE_LONG_RESET | FEATURE_SHORT_RESET) #define FEATURE_ADDR_FULL (0 << 2) #define FEATURE_ADDR_MASK (3 << 2) #define FEATURE_ADDR_2AA (1 << 2) Index: jedec.c =================================================================== --- jedec.c (revision 1215) +++ jedec.c (working copy) @@ -142,6 +142,26 @@ return 0; }
+ /* Earlier probes might have been too fast for the chip to enter ID + * mode completely. Allow the chip to finish this before seeing a + * reset command. + */ + if (probe_timing_enter) + programmer_delay(probe_timing_enter); + /* Reset chip to a clean slate */ + if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) + { + chip_writeb(0xAA, bios + (0x5555 & mask)); + if (probe_timing_exit) + programmer_delay(10); + chip_writeb(0x55, bios + (0x2AAA & mask)); + if (probe_timing_exit) + programmer_delay(10); + } + chip_writeb(0xF0, bios + (0x5555 & mask)); + if (probe_timing_exit) + programmer_delay(probe_timing_exit); + /* Issue JEDEC Product ID Entry command */ chip_writeb(0xAA, bios + (0x5555 & mask)); if (probe_timing_enter) @@ -172,7 +192,7 @@ }
/* Issue JEDEC Product ID Exit command */ - if ((flash->feature_bits & FEATURE_SHORT_RESET) == FEATURE_LONG_RESET) + if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { chip_writeb(0xAA, bios + (0x5555 & mask)); if (probe_timing_exit)
This is because i got bored with untested chip message, so modified this part too.
Index: flashchips.c =================================================================== --- flashchips.c (revision 1215) +++ flashchips.c (working copy) @@ -1634,7 +1634,7 @@ .total_size = 64, .page_size = 128, .feature_bits = FEATURE_LONG_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 10000, /* 10mS, Enter=Exec */ .block_erasers =