On 04/09/2010 04:18 PM, Carl-Daniel Hailfinger wrote:
Hi Vadim,
thanks for your mail. I have added the flashrom mailing list in CC: because we should develop a generic way to handle DualBIOS and similar techniques.
On 09.04.2010 08:12, Vadim Girlin wrote:
I'm going to try coreboot on Gigabyte GA-MA770-UD3. It's AMD 770 (RX780 / SB700).
My motherboard supports hardware dual bios - with two chips on it. I'm going to try flashing backup chip and boot from it. It seems to be possible - I've tested it (flashing at least). Chips on this board could be switched by changing bit 0 at undocumented register EF on LDN 7 of IT8720. I can use slightly patched flashrom for accessing any chip I want without any problems. And this is tested many times.
My idea is to use backup chip for debugging - that always keeps my chance to reboot from main bios chip. And removes the need for desoldering etc.
And second problem is that original bios is checking second chip - and trying to recover it by flashing the bios from main chip on reboot? rewriting coreboot. AFAICS this could be solved by including some signatures etc. It seems to be easy to find out. May be someone is working on this?
BTW I can send the patch for flashrom - but I think that with information I mentioned above somebody could make it much better than my ugly hack. I hope the regs should be the same for all latest Gigabyte MBs using IT8720/18
It would be great if you could send that patch. It will help us make a flashrom design decision that works for all boards with multiple flash chips.
OK, I'm sending the patch for flashrom - but it is based on RE and needs careful testing. It works fine on GA-MA770-UD3 (rev 1.0) but should be tested with other MBs. Anyway I hope it should work for all latest Gigabyte MBs with dual bios chips connected through IT8720/18. I think it's not ready for inclusion in flashrom - it probably should be done in more safe and generic way. Probably it should check for default values in regs etc.
It may be used as following:
flashrom -p it87spi:gbdualindex=0 ... flashrom -p it87spi:gbdualindex=1 ...
This value needs to be set only once and further ops on selected chip can be performed without parameters.
Index: it87spi.c =================================================================== --- it87spi.c (revision 992) +++ it87spi.c (working copy) @@ -155,6 +155,28 @@ sio_write(port, 0x65, (flashport & 0xff)); free(portpos); } + + portpos = extract_param(&programmer_param, + "gbdualindex=", ",:"); + if (portpos) { + int chip_index = strtol(portpos, (char **)NULL, 0); + if ((chip_index!=0) && (chip_index!=1)) { + msg_perr("Dual bios: Invalid chip index requested: %d\n",chip_index); + flashport=0; + } else { + tmp=sio_read(port,0xEF); + msg_pinfo("Dual bios: Current chip : %d\n",tmp&1); + if (chip_index!=(tmp&1)) { + sio_write(port,0xEF,(tmp&0xFE)|chip_index); + tmp=sio_read(port,0xEF)&1; + if (tmp!=chip_index) { + msg_perr("Dual bios: Chip selection failed.\n"); + flashport=0; + } else msg_pinfo("Dual bios: Selected chip: %d\n",tmp&1); + } + } + free(portpos); + } } exit_conf_mode_ite(port); break;
By the way, some of us have good contacts at ITE, so we can ask ITE for details about the undocumented registers.
That could be very helpful for me. This register (LDN 7 reg EF) seems to be very interesting. Bit 0 is chip select, but also bits 2,4,5,6 are used in bios code. Bit 6 probably is some watchdog setting - setting it on with resetting other bits causes reboot in ~ a second.
Also there is some moment in bios code about test reg 2F @ LDN F4 - it is toggled in some place and this could be important - may be enabling some undocumented features.
Another interesting moment is checking for status of RI2 event (LDN 4 reg F1 bit 1) - it's almost first op in bios startup code. AFAICS RI2 event causes switch to chip 1 (Backup) and reboot - but there is no COM2 port on that board. And settings at reg 29 after boot told me that RI2 pin is switched to GPIO mode. So it is probably some debugging feature - if we find the way to set RI2 event then it seems to be an easy way to boot from backup bios.
BTW all info I have on this is from it8718 datasheet, but it seems that the code is same for 8718 and 8720.
Here is a dump of all regs of superio chip - may be it will help:
entered cfg 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 F4 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 0 1 0 0 0 30 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 70 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 90 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 selected LDN 0x00 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 0 1 0 0 0 30 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 3 F0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 70 6 2 0 0 2 4 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 90 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 selected LDN 0x01 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 0 1 0 0 0 30 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 3 F8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 70 4 2 0 0 4 4 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 90 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F0 0 50 50 50 0 0 0 0 0 0 0 0 0 0 0 0 selected LDN 0x02 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 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0 0 0 0 0 0 0 0 E0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F0 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 selected LDN 0x04 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 4 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 0 1 0 0 0 30 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 2 28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 70 0 2 0 0 4 4 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 90 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F0 8 8 2A 80 88 3E 1B 0 0 0 0 0 0 0 0 0 selected LDN 0x05 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 5 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 0 1 0 0 0 30 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 0 60 0 64 0 0 0 0 0 0 0 0 0 0 0 0 70 1 2 0 0 4 4 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 90 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F0 48 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 selected LDN 0x06 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 6 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 0 1 0 0 0 30 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 70 C 2 0 0 4 4 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 90 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 selected LDN 0x07 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 7 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 0 1 0 0 0 30 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 0 0 2 20 2 38 0 0 0 0 0 0 0 0 0 0 70 0 1 0 38 0 4 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 90 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0 0 0 0 0 0 0 0 0 80 0 0 40 1 0 0 0 C0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E0 0 0 0 0 0 0 0 0 0 0 0 0 0 3E 3E 7E F0 0 0 0 0 0 0 26 0 0 0 0 0 8C 0 0 0 selected LDN 0x08 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 8 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 0 1 0 0 0 30 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 70 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 90 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 selected LDN 0x09 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 9 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 0 1 0 0 0 30 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 70 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 90 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 selected LDN 0x0A 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 A 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 0 1 0 0 0 30 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 0 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0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 selected LDN 0x0C 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 C 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 0 1 0 0 0 30 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 70 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 90 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 selected LDN 0x0D 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 D 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 87 20 5 40 3A 0 10 0 40 80 0 0 1 0 0 0 30 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 70 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 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0 0 0 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 left cfg
Regards, Carl-Daniel