On Tue, Aug 03, 2010 at 03:55:19PM +0100, Andrew Morgan wrote:
Read times before patch: real 1m47.500s user 1m47.190s sys 0m0.130s
Read times after patch: real 0m51.714s user 0m51.370s sys 0m0.150s
The data read before and after the patch was identical. Log attached.
Tested-by: Andrew Morgan ziltro@ziltro.com
On 03/08/2010 15:27, Carl-Daniel Hailfinger wrote:
Use caching for Nvidia MCP SPI GPIO accesses. Reduce clock delay to zero.
Should result in a 2x speedup, maybe more.
Signed-off-by: Carl-Daniel Hailfingerc-d.hailfinger.devel.2006@gmx.net
Acked-by: Uwe Hermann uwe@hermann-uwe.de
Compile-tested and reviewed, looks good to me. Hardware-test was done by Andrew already, see above.
Uwe.