Am 18.07.2011 19:07 schrieb Stefan Reinauer:
- Wagner, Helge (GE Intelligent Platforms) Helge.Wagner@ge.com [110527 15:46]:
To be sure that the spi_block_erase_20 works for both the MX25L6405 and the MX25L6445E, we could change the block erase size from 64K to 4K. This should work even for the MX25L6405, but with the side effect of the erase taking longer than needed.
Any comments?
works great for me!
Please find my patches included.
Signed-off-by: Helge Wagner helge.wagner@ge.com
Acked-by: Stefan Reinauer stefan.reinauer@coreboot.org
Sorry, but AFAICS this will cause chip corruption. To be exact, specifying a too small eraseblock size (4 kB instead of 64 kB) means that flashrom will walk the device in 4 kB blocks, erase each block and write to it. Now if the actual erase block size is bigger than the specified block size, you'll get this:
Erase @0 kB: 0-4 kB assumed, 0-64 kB actual. No problem. Write @0-4 kB: No problem. Erase @4 kB: 4-8 kB assumed, 0-64 kB actual. You just deleted 0-4 kB again. Write @4-8 kB: No problem. Erase @8 kB: 8-12 kB assumed, 0-64 kB actual. You just deleted 0-8 kB again. .... Erase @60 kB: 60-64 kB assumed, 0-64 kB actual. You just deleted 0-60 kB again. Write @60-64 kB: No problem.
End result: 0-60 kB blank, 60-64 kB has the desired data.
We either have to be able to distinguish between both chips at probe time or we force the user to make a selection or we have flashrom detect this special evil twin problem and make flashrom use only those functions which have identical characteristics for both chips (there is a semi-finished patch for the last variant).
Regards, Carl-Daniel