Hi Ron,
here's an incomplete patch. Is is missing the exact GPIO number, but the datasheet is clear that the GPIO must be between 16 and 31 (inclusive). GPIOs below 16 are input only and thus unusable for flash write enables.
Please send complete output of "lspci -nnvvxxx" so I can find a suitable set of PCI devices to match on for the board_enable array.
On 18.09.2009 23:27, ron minnich wrote:
Using my GPIO finder posted earlier, I have the gpio needed to enable flashing on the dell. I would like to get a patch together but have not done this mainboard enable thing. I would like to do this in the most-approved manner.
As stated above, the patch is missing PCI IDs for the board enable array and the exact GPIO number (XX). That's it.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: flashrom-boardenable_cleanup_arima_hdama/board_enable.c =================================================================== --- flashrom-boardenable_cleanup_arima_hdama/board_enable.c (Revision 725) +++ flashrom-boardenable_cleanup_arima_hdama/board_enable.c (Arbeitskopie) @@ -569,6 +569,17 @@ }
/** + * Suited for the Dell S1850. All parameters except the last one are documented + * in the public Intel 82801EB ICH5 / 82801ER ICH5R Datasheet. The last + * parameter (GPIO number) has to be in the range [16,31] according to said + * Intel Datasheet and can be found by exhaustive search. + */ +static int ich5_gpioXX_raise(const char *name) +{ + return ich_gpio_raise(name, 0x8086, 0x24d0, 0x58, 0x0c, 0xffc0, XX); +} + +/** * Suited for MSI MS-7046. */ static int ich6_gpio19_raise(const char *name)